drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

/* [<][>][^][v][top][bottom][index][help] */
This source file includes following definitions.
prio2prec
pkt_align
data_ok
brcmf_sdio_kso_control
brcmf_sdio_htclk
brcmf_sdio_sdclk
brcmf_sdio_clkctl
brcmf_sdio_bus_sleep
brcmf_sdio_valid_shared_address
brcmf_sdio_readshared
brcmf_sdio_get_console_addr
brcmf_sdio_get_console_addr
brcmf_sdio_hostmail
brcmf_sdio_rxfail
brcmf_sdio_txfail
brcmf_sdio_glom_len
brcmf_sdio_free_glom
brcmf_sdio_getdatoffset
brcmf_sdio_fromevntchan
brcmf_sdio_hdparse
brcmf_sdio_update_hwhdr
brcmf_sdio_hdpack
brcmf_sdio_rxglom
brcmf_sdio_dcmd_resp_wait
brcmf_sdio_dcmd_resp_wake
brcmf_sdio_read_control
brcmf_sdio_pad
brcmf_sdio_readframes
brcmf_sdio_wait_event_wakeup
brcmf_sdio_txpkt_hdalign
brcmf_sdio_txpkt_prep_sg
brcmf_sdio_txpkt_prep
brcmf_sdio_txpkt_postp
brcmf_sdio_txpkt
brcmf_sdio_sendfromq
brcmf_sdio_tx_ctrlframe
brcmf_chip_is_ulp
brcmf_sdio_bus_stop
brcmf_sdio_clrintr
brcmf_sdio_intr_rstatus
brcmf_sdio_dpc
brcmf_sdio_bus_gettxq
brcmf_sdio_prec_enq
brcmf_sdio_bus_txdata
brcmf_sdio_readconsole
brcmf_sdio_bus_txctl
brcmf_sdio_dump_console
brcmf_sdio_trap_info
brcmf_sdio_assert_info
brcmf_sdio_checkdied
brcmf_sdio_died_dump
brcmf_sdio_forensic_read
brcmf_debugfs_sdio_count_read
brcmf_sdio_debugfs_create
brcmf_sdio_checkdied
brcmf_sdio_debugfs_create
brcmf_sdio_bus_rxctl
brcmf_sdio_verifymemory
brcmf_sdio_verifymemory
brcmf_sdio_download_code_file
brcmf_sdio_download_nvram
brcmf_sdio_download_firmware
brcmf_sdio_aos_no_decode
brcmf_sdio_sr_init
brcmf_sdio_kso_init
brcmf_sdio_bus_preinit
brcmf_sdio_bus_get_ramsize
brcmf_sdio_bus_get_memdump
brcmf_sdio_trigger_dpc
brcmf_sdio_isr
brcmf_sdio_bus_watchdog
brcmf_sdio_dataworker
brcmf_sdio_drivestrengthinit
brcmf_sdio_buscoreprep
brcmf_sdio_buscore_activate
brcmf_sdio_buscore_read32
brcmf_sdio_buscore_write32
brcmf_sdio_probe_attach
brcmf_sdio_watchdog_thread
brcmf_sdio_watchdog
brcmf_sdio_get_fwname
brcmf_sdio_firmware_callback
brcmf_sdio_prepare_fw_request
brcmf_sdio_probe
brcmf_sdio_remove
brcmf_sdio_wd_timer
brcmf_sdio_sleep
   1 // SPDX-License-Identifier: ISC
   2 /*
   3  * Copyright (c) 2010 Broadcom Corporation
   4  */
   5 
   6 #include <linux/types.h>
   7 #include <linux/atomic.h>
   8 #include <linux/kernel.h>
   9 #include <linux/kthread.h>
  10 #include <linux/printk.h>
  11 #include <linux/pci_ids.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/sched/signal.h>
  15 #include <linux/mmc/sdio.h>
  16 #include <linux/mmc/sdio_ids.h>
  17 #include <linux/mmc/sdio_func.h>
  18 #include <linux/mmc/card.h>
  19 #include <linux/semaphore.h>
  20 #include <linux/firmware.h>
  21 #include <linux/module.h>
  22 #include <linux/bcma/bcma.h>
  23 #include <linux/debugfs.h>
  24 #include <linux/vmalloc.h>
  25 #include <asm/unaligned.h>
  26 #include <defs.h>
  27 #include <brcmu_wifi.h>
  28 #include <brcmu_utils.h>
  29 #include <brcm_hw_ids.h>
  30 #include <soc.h>
  31 #include "sdio.h"
  32 #include "chip.h"
  33 #include "firmware.h"
  34 #include "core.h"
  35 #include "common.h"
  36 #include "bcdc.h"
  37 
  38 #define DCMD_RESP_TIMEOUT       msecs_to_jiffies(2500)
  39 #define CTL_DONE_TIMEOUT        msecs_to_jiffies(2500)
  40 
  41 /* watermark expressed in number of words */
  42 #define DEFAULT_F2_WATERMARK    0x8
  43 #define CY_4373_F2_WATERMARK    0x40
  44 #define CY_43012_F2_WATERMARK    0x60
  45 
  46 #ifdef DEBUG
  47 
  48 #define BRCMF_TRAP_INFO_SIZE    80
  49 
  50 #define CBUF_LEN        (128)
  51 
  52 /* Device console log buffer state */
  53 #define CONSOLE_BUFFER_MAX      2024
  54 
  55 struct rte_log_le {
  56         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  57         __le32 buf_size;
  58         __le32 idx;
  59         char *_buf_compat;      /* Redundant pointer for backward compat. */
  60 };
  61 
  62 struct rte_console {
  63         /* Virtual UART
  64          * When there is no UART (e.g. Quickturn),
  65          * the host should write a complete
  66          * input line directly into cbuf and then write
  67          * the length into vcons_in.
  68          * This may also be used when there is a real UART
  69          * (at risk of conflicting with
  70          * the real UART).  vcons_out is currently unused.
  71          */
  72         uint vcons_in;
  73         uint vcons_out;
  74 
  75         /* Output (logging) buffer
  76          * Console output is written to a ring buffer log_buf at index log_idx.
  77          * The host may read the output when it sees log_idx advance.
  78          * Output will be lost if the output wraps around faster than the host
  79          * polls.
  80          */
  81         struct rte_log_le log_le;
  82 
  83         /* Console input line buffer
  84          * Characters are read one at a time into cbuf
  85          * until <CR> is received, then
  86          * the buffer is processed as a command line.
  87          * Also used for virtual UART.
  88          */
  89         uint cbuf_idx;
  90         char cbuf[CBUF_LEN];
  91 };
  92 
  93 #endif                          /* DEBUG */
  94 #include <chipcommon.h>
  95 
  96 #include "bus.h"
  97 #include "debug.h"
  98 #include "tracepoint.h"
  99 
 100 #define TXQLEN          2048    /* bulk tx queue length */
 101 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 102 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 103 #define PRIOMASK        7
 104 
 105 #define TXRETRIES       2       /* # of retries for tx frames */
 106 
 107 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 108                                  one scheduling */
 109 
 110 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 111                                  one scheduling */
 112 
 113 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 114 
 115 #define MEMBLOCK        2048    /* Block size used for downloading
 116                                  of dongle image */
 117 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 118                                  biggest possible glom */
 119 
 120 #define BRCMF_FIRSTREAD (1 << 6)
 121 
 122 #define BRCMF_CONSOLE   10      /* watchdog interval to poll console */
 123 
 124 /* SBSDIO_DEVICE_CTL */
 125 
 126 /* 1: device will assert busy signal when receiving CMD53 */
 127 #define SBSDIO_DEVCTL_SETBUSY           0x01
 128 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 129 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 130 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 131 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 132 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 133  * sdio bus power cycle to clear (rev 9) */
 134 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 135 /* 1: enable F2 Watermark */
 136 #define SBSDIO_DEVCTL_F2WM_ENAB         0x10
 137 /* Force SD->SB reset mapping (rev 11) */
 138 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 139 /*   Determined by CoreControl bit */
 140 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 141 /*   Force backplane reset */
 142 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 143 /*   Force no backplane reset */
 144 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 145 
 146 /* direct(mapped) cis space */
 147 
 148 /* MAPPED common CIS address */
 149 #define SBSDIO_CIS_BASE_COMMON          0x1000
 150 /* maximum bytes in one CIS */
 151 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 152 /* cis offset addr is < 17 bits */
 153 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 154 
 155 /* manfid tuple length, include tuple, link bytes */
 156 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 157 
 158 #define SD_REG(field) \
 159                 (offsetof(struct sdpcmd_regs, field))
 160 
 161 /* SDIO function 1 register CHIPCLKCSR */
 162 /* Force ALP request to backplane */
 163 #define SBSDIO_FORCE_ALP                0x01
 164 /* Force HT request to backplane */
 165 #define SBSDIO_FORCE_HT                 0x02
 166 /* Force ILP request to backplane */
 167 #define SBSDIO_FORCE_ILP                0x04
 168 /* Make ALP ready (power up xtal) */
 169 #define SBSDIO_ALP_AVAIL_REQ            0x08
 170 /* Make HT ready (power up PLL) */
 171 #define SBSDIO_HT_AVAIL_REQ             0x10
 172 /* Squelch clock requests from HW */
 173 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 174 /* Status: ALP is ready */
 175 #define SBSDIO_ALP_AVAIL                0x40
 176 /* Status: HT is ready */
 177 #define SBSDIO_HT_AVAIL                 0x80
 178 #define SBSDIO_CSR_MASK                 0x1F
 179 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 180 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 181 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 182 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 183 #define SBSDIO_CLKAV(regval, alponly) \
 184         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 185 
 186 /* intstatus */
 187 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 188 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 189 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 190 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 191 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 192 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 193 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 194 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 195 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 196 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 197 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 198 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 199 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 200 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 201 #define I_PC            (1 << 10)       /* descriptor error */
 202 #define I_PD            (1 << 11)       /* data error */
 203 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 204 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 205 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 206 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 207 #define I_RI            (1 << 16)       /* Receive Interrupt */
 208 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 209 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 210 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 211 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 212 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 213 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 214 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 215 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 216 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 217 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 218 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 219 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 220 
 221 /* corecontrol */
 222 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 223 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 224 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 225 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 226 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 227 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 228 
 229 /* SDA_FRAMECTRL */
 230 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 231 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 232 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 233 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 234 
 235 /*
 236  * Software allocation of To SB Mailbox resources
 237  */
 238 
 239 /* tosbmailbox bits corresponding to intstatus bits */
 240 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 241 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 242 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 243 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 244 
 245 /* tosbmailboxdata */
 246 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 247 
 248 /*
 249  * Software allocation of To Host Mailbox resources
 250  */
 251 
 252 /* intstatus bits */
 253 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 254 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 255 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 256 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 257 
 258 /* tohostmailboxdata */
 259 #define HMB_DATA_NAKHANDLED     0x0001  /* retransmit NAK'd frame */
 260 #define HMB_DATA_DEVREADY       0x0002  /* talk to host after enable */
 261 #define HMB_DATA_FC             0x0004  /* per prio flowcontrol update flag */
 262 #define HMB_DATA_FWREADY        0x0008  /* fw ready for protocol activity */
 263 #define HMB_DATA_FWHALT         0x0010  /* firmware halted */
 264 
 265 #define HMB_DATA_FCDATA_MASK    0xff000000
 266 #define HMB_DATA_FCDATA_SHIFT   24
 267 
 268 #define HMB_DATA_VERSION_MASK   0x00ff0000
 269 #define HMB_DATA_VERSION_SHIFT  16
 270 
 271 /*
 272  * Software-defined protocol header
 273  */
 274 
 275 /* Current protocol version */
 276 #define SDPCM_PROT_VERSION      4
 277 
 278 /*
 279  * Shared structure between dongle and the host.
 280  * The structure contains pointers to trap or assert information.
 281  */
 282 #define SDPCM_SHARED_VERSION       0x0003
 283 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 284 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 285 #define SDPCM_SHARED_ASSERT        0x0200
 286 #define SDPCM_SHARED_TRAP          0x0400
 287 
 288 /* Space for header read, limit for data packets */
 289 #define MAX_HDR_READ    (1 << 6)
 290 #define MAX_RX_DATASZ   2048
 291 
 292 /* Bump up limit on waiting for HT to account for first startup;
 293  * if the image is doing a CRC calculation before programming the PMU
 294  * for HT availability, it could take a couple hundred ms more, so
 295  * max out at a 1 second (1000000us).
 296  */
 297 #undef PMU_MAX_TRANSITION_DLY
 298 #define PMU_MAX_TRANSITION_DLY 1000000
 299 
 300 /* Value for ChipClockCSR during initial setup */
 301 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 302                                         SBSDIO_ALP_AVAIL_REQ)
 303 
 304 /* Flags for SDH calls */
 305 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 306 
 307 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 308                                          * when idle
 309                                          */
 310 #define BRCMF_IDLE_INTERVAL     1
 311 
 312 #define KSO_WAIT_US 50
 313 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 314 #define BRCMF_SDIO_MAX_ACCESS_ERRORS    5
 315 
 316 /*
 317  * Conversion of 802.1D priority to precedence level
 318  */
 319 static uint prio2prec(u32 prio)
 320 {
 321         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 322                (prio^2) : prio;
 323 }
 324 
 325 #ifdef DEBUG
 326 /* Device console log buffer state */
 327 struct brcmf_console {
 328         uint count;             /* Poll interval msec counter */
 329         uint log_addr;          /* Log struct address (fixed) */
 330         struct rte_log_le log_le;       /* Log struct (host copy) */
 331         uint bufsize;           /* Size of log buffer */
 332         u8 *buf;                /* Log buffer (host copy) */
 333         uint last;              /* Last buffer read index */
 334 };
 335 
 336 struct brcmf_trap_info {
 337         __le32          type;
 338         __le32          epc;
 339         __le32          cpsr;
 340         __le32          spsr;
 341         __le32          r0;     /* a1 */
 342         __le32          r1;     /* a2 */
 343         __le32          r2;     /* a3 */
 344         __le32          r3;     /* a4 */
 345         __le32          r4;     /* v1 */
 346         __le32          r5;     /* v2 */
 347         __le32          r6;     /* v3 */
 348         __le32          r7;     /* v4 */
 349         __le32          r8;     /* v5 */
 350         __le32          r9;     /* sb/v6 */
 351         __le32          r10;    /* sl/v7 */
 352         __le32          r11;    /* fp/v8 */
 353         __le32          r12;    /* ip */
 354         __le32          r13;    /* sp */
 355         __le32          r14;    /* lr */
 356         __le32          pc;     /* r15 */
 357 };
 358 #endif                          /* DEBUG */
 359 
 360 struct sdpcm_shared {
 361         u32 flags;
 362         u32 trap_addr;
 363         u32 assert_exp_addr;
 364         u32 assert_file_addr;
 365         u32 assert_line;
 366         u32 console_addr;       /* Address of struct rte_console */
 367         u32 msgtrace_addr;
 368         u8 tag[32];
 369         u32 brpt_addr;
 370 };
 371 
 372 struct sdpcm_shared_le {
 373         __le32 flags;
 374         __le32 trap_addr;
 375         __le32 assert_exp_addr;
 376         __le32 assert_file_addr;
 377         __le32 assert_line;
 378         __le32 console_addr;    /* Address of struct rte_console */
 379         __le32 msgtrace_addr;
 380         u8 tag[32];
 381         __le32 brpt_addr;
 382 };
 383 
 384 /* dongle SDIO bus specific header info */
 385 struct brcmf_sdio_hdrinfo {
 386         u8 seq_num;
 387         u8 channel;
 388         u16 len;
 389         u16 len_left;
 390         u16 len_nxtfrm;
 391         u8 dat_offset;
 392         bool lastfrm;
 393         u16 tail_pad;
 394 };
 395 
 396 /*
 397  * hold counter variables
 398  */
 399 struct brcmf_sdio_count {
 400         uint intrcount;         /* Count of device interrupt callbacks */
 401         uint lastintrs;         /* Count as of last watchdog timer */
 402         uint pollcnt;           /* Count of active polls */
 403         uint regfails;          /* Count of R_REG failures */
 404         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 405         uint fcqueued;          /* Tx packets that got queued */
 406         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 407         uint rx_toolong;        /* Receive frames too long to receive */
 408         uint rxc_errors;        /* SDIO errors when reading control frames */
 409         uint rx_hdrfail;        /* SDIO errors on header reads */
 410         uint rx_badhdr;         /* Bad received headers (roosync?) */
 411         uint rx_badseq;         /* Mismatched rx sequence number */
 412         uint fc_rcvd;           /* Number of flow-control events received */
 413         uint fc_xoff;           /* Number which turned on flow-control */
 414         uint fc_xon;            /* Number which turned off flow-control */
 415         uint rxglomfail;        /* Failed deglom attempts */
 416         uint rxglomframes;      /* Number of glom frames (superframes) */
 417         uint rxglompkts;        /* Number of packets from glom frames */
 418         uint f2rxhdrs;          /* Number of header reads */
 419         uint f2rxdata;          /* Number of frame data reads */
 420         uint f2txdata;          /* Number of f2 frame writes */
 421         uint f1regdata;         /* Number of f1 register accesses */
 422         uint tickcnt;           /* Number of watchdog been schedule */
 423         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 424         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 425         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 426         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 427         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 428 };
 429 
 430 /* misc chip info needed by some of the routines */
 431 /* Private data for SDIO bus interaction */
 432 struct brcmf_sdio {
 433         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 434         struct brcmf_chip *ci;  /* Chip info struct */
 435         struct brcmf_core *sdio_core; /* sdio core info struct */
 436 
 437         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 438         atomic_t intstatus;     /* Intstatus bits (events) pending */
 439         atomic_t fcstate;       /* State of dongle flow-control */
 440 
 441         uint blocksize;         /* Block size of SDIO transfers */
 442         uint roundup;           /* Max roundup limit */
 443 
 444         struct pktq txq;        /* Queue length used for flow-control */
 445         u8 flowcontrol; /* per prio flow control bitmask */
 446         u8 tx_seq;              /* Transmit sequence number (next) */
 447         u8 tx_max;              /* Maximum transmit sequence allowed */
 448 
 449         u8 *hdrbuf;             /* buffer for handling rx frame */
 450         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 451         u8 rx_seq;              /* Receive sequence number (expected) */
 452         struct brcmf_sdio_hdrinfo cur_read;
 453                                 /* info of current read frame */
 454         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 455         bool rxpending;         /* Data frame pending in dongle */
 456 
 457         uint rxbound;           /* Rx frames to read before resched */
 458         uint txbound;           /* Tx frames to send before resched */
 459         uint txminmax;
 460 
 461         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 462         struct sk_buff_head glom; /* Packet list for glommed superframe */
 463 
 464         u8 *rxbuf;              /* Buffer for receiving control packets */
 465         uint rxblen;            /* Allocated length of rxbuf */
 466         u8 *rxctl;              /* Aligned pointer into rxbuf */
 467         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 468         uint rxlen;             /* Length of valid data in buffer */
 469         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 470 
 471         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 472 
 473         bool intr;              /* Use interrupts */
 474         bool poll;              /* Use polling */
 475         atomic_t ipend;         /* Device interrupt is pending */
 476         uint spurious;          /* Count of spurious interrupts */
 477         uint pollrate;          /* Ticks between device polls */
 478         uint polltick;          /* Tick counter */
 479 
 480 #ifdef DEBUG
 481         uint console_interval;
 482         struct brcmf_console console;   /* Console output polling support */
 483         uint console_addr;      /* Console address from shared struct */
 484 #endif                          /* DEBUG */
 485 
 486         uint clkstate;          /* State of sd and backplane clock(s) */
 487         s32 idletime;           /* Control for activity timeout */
 488         s32 idlecount;          /* Activity timeout counter */
 489         s32 idleclock;          /* How to set bus driver when idle */
 490         bool rxflow_mode;       /* Rx flow control mode */
 491         bool rxflow;            /* Is rx flow control on */
 492         bool alp_only;          /* Don't use HT clock (ALP only) */
 493 
 494         u8 *ctrl_frame_buf;
 495         u16 ctrl_frame_len;
 496         bool ctrl_frame_stat;
 497         int ctrl_frame_err;
 498 
 499         spinlock_t txq_lock;            /* protect bus->txq */
 500         wait_queue_head_t ctrl_wait;
 501         wait_queue_head_t dcmd_resp_wait;
 502 
 503         struct timer_list timer;
 504         struct completion watchdog_wait;
 505         struct task_struct *watchdog_tsk;
 506         bool wd_active;
 507 
 508         struct workqueue_struct *brcmf_wq;
 509         struct work_struct datawork;
 510         bool dpc_triggered;
 511         bool dpc_running;
 512 
 513         bool txoff;             /* Transmit flow-controlled */
 514         struct brcmf_sdio_count sdcnt;
 515         bool sr_enabled; /* SaveRestore enabled */
 516         bool sleeping;
 517 
 518         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 519         bool txglom;            /* host tx glomming enable flag */
 520         u16 head_align;         /* buffer pointer alignment */
 521         u16 sgentry_align;      /* scatter-gather buffer alignment */
 522 };
 523 
 524 /* clkstate */
 525 #define CLK_NONE        0
 526 #define CLK_SDONLY      1
 527 #define CLK_PENDING     2
 528 #define CLK_AVAIL       3
 529 
 530 #ifdef DEBUG
 531 static int qcount[NUMPRIO];
 532 #endif                          /* DEBUG */
 533 
 534 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 535 
 536 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 537 
 538 /* Limit on rounding up frames */
 539 static const uint max_roundup = 512;
 540 
 541 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
 542 #define ALIGNMENT  8
 543 #else
 544 #define ALIGNMENT  4
 545 #endif
 546 
 547 enum brcmf_sdio_frmtype {
 548         BRCMF_SDIO_FT_NORMAL,
 549         BRCMF_SDIO_FT_SUPER,
 550         BRCMF_SDIO_FT_SUB,
 551 };
 552 
 553 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 554 
 555 /* SDIO Pad drive strength to select value mappings */
 556 struct sdiod_drive_str {
 557         u8 strength;    /* Pad Drive Strength in mA */
 558         u8 sel;         /* Chip-specific select value */
 559 };
 560 
 561 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 562 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 563         {32, 0x6},
 564         {26, 0x7},
 565         {22, 0x4},
 566         {16, 0x5},
 567         {12, 0x2},
 568         {8, 0x3},
 569         {4, 0x0},
 570         {0, 0x1}
 571 };
 572 
 573 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 574 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 575         {6, 0x7},
 576         {5, 0x6},
 577         {4, 0x5},
 578         {3, 0x4},
 579         {2, 0x2},
 580         {1, 0x1},
 581         {0, 0x0}
 582 };
 583 
 584 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 585 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 586         {3, 0x3},
 587         {2, 0x2},
 588         {1, 0x1},
 589         {0, 0x0} };
 590 
 591 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 592 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 593         {16, 0x7},
 594         {12, 0x5},
 595         {8,  0x3},
 596         {4,  0x1}
 597 };
 598 
 599 BRCMF_FW_DEF(43143, "brcmfmac43143-sdio");
 600 BRCMF_FW_DEF(43241B0, "brcmfmac43241b0-sdio");
 601 BRCMF_FW_DEF(43241B4, "brcmfmac43241b4-sdio");
 602 BRCMF_FW_DEF(43241B5, "brcmfmac43241b5-sdio");
 603 BRCMF_FW_DEF(4329, "brcmfmac4329-sdio");
 604 BRCMF_FW_DEF(4330, "brcmfmac4330-sdio");
 605 BRCMF_FW_DEF(4334, "brcmfmac4334-sdio");
 606 BRCMF_FW_DEF(43340, "brcmfmac43340-sdio");
 607 BRCMF_FW_DEF(4335, "brcmfmac4335-sdio");
 608 BRCMF_FW_DEF(43362, "brcmfmac43362-sdio");
 609 BRCMF_FW_DEF(4339, "brcmfmac4339-sdio");
 610 BRCMF_FW_DEF(43430A0, "brcmfmac43430a0-sdio");
 611 /* Note the names are not postfixed with a1 for backward compatibility */
 612 BRCMF_FW_DEF(43430A1, "brcmfmac43430-sdio");
 613 BRCMF_FW_DEF(43455, "brcmfmac43455-sdio");
 614 BRCMF_FW_DEF(43456, "brcmfmac43456-sdio");
 615 BRCMF_FW_DEF(4354, "brcmfmac4354-sdio");
 616 BRCMF_FW_DEF(4356, "brcmfmac4356-sdio");
 617 BRCMF_FW_DEF(4373, "brcmfmac4373-sdio");
 618 BRCMF_FW_DEF(43012, "brcmfmac43012-sdio");
 619 
 620 static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
 621         BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
 622         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
 623         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
 624         BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
 625         BRCMF_FW_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
 626         BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
 627         BRCMF_FW_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
 628         BRCMF_FW_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
 629         BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),
 630         BRCMF_FW_ENTRY(BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, 4335),
 631         BRCMF_FW_ENTRY(BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, 43362),
 632         BRCMF_FW_ENTRY(BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, 4339),
 633         BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0x00000001, 43430A0),
 634         BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0xFFFFFFFE, 43430A1),
 635         BRCMF_FW_ENTRY(BRCM_CC_4345_CHIP_ID, 0x00000200, 43456),
 636         BRCMF_FW_ENTRY(BRCM_CC_4345_CHIP_ID, 0xFFFFFDC0, 43455),
 637         BRCMF_FW_ENTRY(BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, 4354),
 638         BRCMF_FW_ENTRY(BRCM_CC_4356_CHIP_ID, 0xFFFFFFFF, 4356),
 639         BRCMF_FW_ENTRY(CY_CC_4373_CHIP_ID, 0xFFFFFFFF, 4373),
 640         BRCMF_FW_ENTRY(CY_CC_43012_CHIP_ID, 0xFFFFFFFF, 43012)
 641 };
 642 
 643 static void pkt_align(struct sk_buff *p, int len, int align)
 644 {
 645         uint datalign;
 646         datalign = (unsigned long)(p->data);
 647         datalign = roundup(datalign, (align)) - datalign;
 648         if (datalign)
 649                 skb_pull(p, datalign);
 650         __skb_trim(p, len);
 651 }
 652 
 653 /* To check if there's window offered */
 654 static bool data_ok(struct brcmf_sdio *bus)
 655 {
 656         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 657                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 658 }
 659 
 660 static int
 661 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 662 {
 663         u8 wr_val = 0, rd_val, cmp_val, bmask;
 664         int err = 0;
 665         int err_cnt = 0;
 666         int try_cnt = 0;
 667 
 668         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 669 
 670         sdio_retune_crc_disable(bus->sdiodev->func1);
 671 
 672         /* Cannot re-tune if device is asleep; defer till we're awake */
 673         if (on)
 674                 sdio_retune_hold_now(bus->sdiodev->func1);
 675 
 676         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 677         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 678         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err);
 679 
 680         /* In case of 43012 chip, the chip could go down immediately after
 681          * KSO bit is cleared. So the further reads of KSO register could
 682          * fail. Thereby just bailing out immediately after clearing KSO
 683          * bit, to avoid polling of KSO bit.
 684          */
 685         if (!on && bus->ci->chip == CY_CC_43012_CHIP_ID)
 686                 return err;
 687 
 688         if (on) {
 689                 /* device WAKEUP through KSO:
 690                  * write bit 0 & read back until
 691                  * both bits 0 (kso bit) & 1 (dev on status) are set
 692                  */
 693                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 694                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 695                 bmask = cmp_val;
 696                 usleep_range(2000, 3000);
 697         } else {
 698                 /* Put device to sleep, turn off KSO */
 699                 cmp_val = 0;
 700                 /* only check for bit0, bit1(dev on status) may not
 701                  * get cleared right away
 702                  */
 703                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 704         }
 705 
 706         do {
 707                 /* reliable KSO bit set/clr:
 708                  * the sdiod sleep write access is synced to PMU 32khz clk
 709                  * just one write attempt may fail,
 710                  * read it back until it matches written value
 711                  */
 712                 rd_val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 713                                            &err);
 714                 if (!err) {
 715                         if ((rd_val & bmask) == cmp_val)
 716                                 break;
 717                         err_cnt = 0;
 718                 }
 719                 /* bail out upon subsequent access errors */
 720                 if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
 721                         break;
 722 
 723                 udelay(KSO_WAIT_US);
 724                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val,
 725                                    &err);
 726 
 727         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 728 
 729         if (try_cnt > 2)
 730                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 731                           rd_val, err);
 732 
 733         if (try_cnt > MAX_KSO_ATTEMPTS)
 734                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 735 
 736         if (on)
 737                 sdio_retune_release(bus->sdiodev->func1);
 738 
 739         sdio_retune_crc_enable(bus->sdiodev->func1);
 740 
 741         return err;
 742 }
 743 
 744 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 745 
 746 /* Turn backplane clock on or off */
 747 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 748 {
 749         int err;
 750         u8 clkctl, clkreq, devctl;
 751         unsigned long timeout;
 752 
 753         brcmf_dbg(SDIO, "Enter\n");
 754 
 755         clkctl = 0;
 756 
 757         if (bus->sr_enabled) {
 758                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 759                 return 0;
 760         }
 761 
 762         if (on) {
 763                 /* Request HT Avail */
 764                 clkreq =
 765                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 766 
 767                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 768                                    clkreq, &err);
 769                 if (err) {
 770                         brcmf_err("HT Avail request error: %d\n", err);
 771                         return -EBADE;
 772                 }
 773 
 774                 /* Check current status */
 775                 clkctl = brcmf_sdiod_readb(bus->sdiodev,
 776                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 777                 if (err) {
 778                         brcmf_err("HT Avail read error: %d\n", err);
 779                         return -EBADE;
 780                 }
 781 
 782                 /* Go to pending and await interrupt if appropriate */
 783                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 784                         /* Allow only clock-available interrupt */
 785                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 786                                                    SBSDIO_DEVICE_CTL, &err);
 787                         if (err) {
 788                                 brcmf_err("Devctl error setting CA: %d\n", err);
 789                                 return -EBADE;
 790                         }
 791 
 792                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 793                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 794                                            devctl, &err);
 795                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 796                         bus->clkstate = CLK_PENDING;
 797 
 798                         return 0;
 799                 } else if (bus->clkstate == CLK_PENDING) {
 800                         /* Cancel CA-only interrupt filter */
 801                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 802                                                    SBSDIO_DEVICE_CTL, &err);
 803                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 804                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 805                                            devctl, &err);
 806                 }
 807 
 808                 /* Otherwise, wait here (polling) for HT Avail */
 809                 timeout = jiffies +
 810                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 811                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 812                         clkctl = brcmf_sdiod_readb(bus->sdiodev,
 813                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 814                                                    &err);
 815                         if (time_after(jiffies, timeout))
 816                                 break;
 817                         else
 818                                 usleep_range(5000, 10000);
 819                 }
 820                 if (err) {
 821                         brcmf_err("HT Avail request error: %d\n", err);
 822                         return -EBADE;
 823                 }
 824                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 825                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 826                                   PMU_MAX_TRANSITION_DLY, clkctl);
 827                         return -EBADE;
 828                 }
 829 
 830                 /* Mark clock available */
 831                 bus->clkstate = CLK_AVAIL;
 832                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 833 
 834 #if defined(DEBUG)
 835                 if (!bus->alp_only) {
 836                         if (SBSDIO_ALPONLY(clkctl))
 837                                 brcmf_err("HT Clock should be on\n");
 838                 }
 839 #endif                          /* defined (DEBUG) */
 840 
 841         } else {
 842                 clkreq = 0;
 843 
 844                 if (bus->clkstate == CLK_PENDING) {
 845                         /* Cancel CA-only interrupt filter */
 846                         devctl = brcmf_sdiod_readb(bus->sdiodev,
 847                                                    SBSDIO_DEVICE_CTL, &err);
 848                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 849                         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 850                                            devctl, &err);
 851                 }
 852 
 853                 bus->clkstate = CLK_SDONLY;
 854                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 855                                    clkreq, &err);
 856                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 857                 if (err) {
 858                         brcmf_err("Failed access turning clock off: %d\n",
 859                                   err);
 860                         return -EBADE;
 861                 }
 862         }
 863         return 0;
 864 }
 865 
 866 /* Change idle/active SD state */
 867 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 868 {
 869         brcmf_dbg(SDIO, "Enter\n");
 870 
 871         if (on)
 872                 bus->clkstate = CLK_SDONLY;
 873         else
 874                 bus->clkstate = CLK_NONE;
 875 
 876         return 0;
 877 }
 878 
 879 /* Transition SD and backplane clock readiness */
 880 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 881 {
 882 #ifdef DEBUG
 883         uint oldstate = bus->clkstate;
 884 #endif                          /* DEBUG */
 885 
 886         brcmf_dbg(SDIO, "Enter\n");
 887 
 888         /* Early exit if we're already there */
 889         if (bus->clkstate == target)
 890                 return 0;
 891 
 892         switch (target) {
 893         case CLK_AVAIL:
 894                 /* Make sure SD clock is available */
 895                 if (bus->clkstate == CLK_NONE)
 896                         brcmf_sdio_sdclk(bus, true);
 897                 /* Now request HT Avail on the backplane */
 898                 brcmf_sdio_htclk(bus, true, pendok);
 899                 break;
 900 
 901         case CLK_SDONLY:
 902                 /* Remove HT request, or bring up SD clock */
 903                 if (bus->clkstate == CLK_NONE)
 904                         brcmf_sdio_sdclk(bus, true);
 905                 else if (bus->clkstate == CLK_AVAIL)
 906                         brcmf_sdio_htclk(bus, false, false);
 907                 else
 908                         brcmf_err("request for %d -> %d\n",
 909                                   bus->clkstate, target);
 910                 break;
 911 
 912         case CLK_NONE:
 913                 /* Make sure to remove HT request */
 914                 if (bus->clkstate == CLK_AVAIL)
 915                         brcmf_sdio_htclk(bus, false, false);
 916                 /* Now remove the SD clock */
 917                 brcmf_sdio_sdclk(bus, false);
 918                 break;
 919         }
 920 #ifdef DEBUG
 921         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 922 #endif                          /* DEBUG */
 923 
 924         return 0;
 925 }
 926 
 927 static int
 928 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 929 {
 930         int err = 0;
 931         u8 clkcsr;
 932 
 933         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
 934                   (sleep ? "SLEEP" : "WAKE"),
 935                   (bus->sleeping ? "SLEEP" : "WAKE"));
 936 
 937         /* If SR is enabled control bus state with KSO */
 938         if (bus->sr_enabled) {
 939                 /* Done if we're already in the requested state */
 940                 if (sleep == bus->sleeping)
 941                         goto end;
 942 
 943                 /* Going to sleep */
 944                 if (sleep) {
 945                         clkcsr = brcmf_sdiod_readb(bus->sdiodev,
 946                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 947                                                    &err);
 948                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
 949                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
 950                                 brcmf_sdiod_writeb(bus->sdiodev,
 951                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 952                                                    SBSDIO_ALP_AVAIL_REQ, &err);
 953                         }
 954                         err = brcmf_sdio_kso_control(bus, false);
 955                 } else {
 956                         err = brcmf_sdio_kso_control(bus, true);
 957                 }
 958                 if (err) {
 959                         brcmf_err("error while changing bus sleep state %d\n",
 960                                   err);
 961                         goto done;
 962                 }
 963         }
 964 
 965 end:
 966         /* control clocks */
 967         if (sleep) {
 968                 if (!bus->sr_enabled)
 969                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 970         } else {
 971                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 972                 brcmf_sdio_wd_timer(bus, true);
 973         }
 974         bus->sleeping = sleep;
 975         brcmf_dbg(SDIO, "new state %s\n",
 976                   (sleep ? "SLEEP" : "WAKE"));
 977 done:
 978         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
 979         return err;
 980 
 981 }
 982 
 983 #ifdef DEBUG
 984 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
 985 {
 986         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
 987 }
 988 
 989 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
 990                                  struct sdpcm_shared *sh)
 991 {
 992         u32 addr = 0;
 993         int rv;
 994         u32 shaddr = 0;
 995         struct sdpcm_shared_le sh_le;
 996         __le32 addr_le;
 997 
 998         sdio_claim_host(bus->sdiodev->func1);
 999         brcmf_sdio_bus_sleep(bus, false, false);
1000 
1001         /*
1002          * Read last word in socram to determine
1003          * address of sdpcm_shared structure
1004          */
1005         shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
1006         if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
1007                 shaddr -= bus->ci->srsize;
1008         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
1009                                (u8 *)&addr_le, 4);
1010         if (rv < 0)
1011                 goto fail;
1012 
1013         /*
1014          * Check if addr is valid.
1015          * NVRAM length at the end of memory should have been overwritten.
1016          */
1017         addr = le32_to_cpu(addr_le);
1018         if (!brcmf_sdio_valid_shared_address(addr)) {
1019                 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1020                 rv = -EINVAL;
1021                 goto fail;
1022         }
1023 
1024         brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1025 
1026         /* Read hndrte_shared structure */
1027         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1028                                sizeof(struct sdpcm_shared_le));
1029         if (rv < 0)
1030                 goto fail;
1031 
1032         sdio_release_host(bus->sdiodev->func1);
1033 
1034         /* Endianness */
1035         sh->flags = le32_to_cpu(sh_le.flags);
1036         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1037         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1038         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1039         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1040         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1041         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1042 
1043         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1044                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1045                           SDPCM_SHARED_VERSION,
1046                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1047                 return -EPROTO;
1048         }
1049         return 0;
1050 
1051 fail:
1052         brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1053                   rv, addr);
1054         sdio_release_host(bus->sdiodev->func1);
1055         return rv;
1056 }
1057 
1058 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1059 {
1060         struct sdpcm_shared sh;
1061 
1062         if (brcmf_sdio_readshared(bus, &sh) == 0)
1063                 bus->console_addr = sh.console_addr;
1064 }
1065 #else
1066 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1067 {
1068 }
1069 #endif /* DEBUG */
1070 
1071 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1072 {
1073         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
1074         struct brcmf_core *core = bus->sdio_core;
1075         u32 intstatus = 0;
1076         u32 hmb_data;
1077         u8 fcbits;
1078         int ret;
1079 
1080         brcmf_dbg(SDIO, "Enter\n");
1081 
1082         /* Read mailbox data and ack that we did so */
1083         hmb_data = brcmf_sdiod_readl(sdiod,
1084                                      core->base + SD_REG(tohostmailboxdata),
1085                                      &ret);
1086 
1087         if (!ret)
1088                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailbox),
1089                                    SMB_INT_ACK, &ret);
1090 
1091         bus->sdcnt.f1regdata += 2;
1092 
1093         /* dongle indicates the firmware has halted/crashed */
1094         if (hmb_data & HMB_DATA_FWHALT) {
1095                 brcmf_dbg(SDIO, "mailbox indicates firmware halted\n");
1096                 brcmf_fw_crashed(&sdiod->func1->dev);
1097         }
1098 
1099         /* Dongle recomposed rx frames, accept them again */
1100         if (hmb_data & HMB_DATA_NAKHANDLED) {
1101                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1102                           bus->rx_seq);
1103                 if (!bus->rxskip)
1104                         brcmf_err("unexpected NAKHANDLED!\n");
1105 
1106                 bus->rxskip = false;
1107                 intstatus |= I_HMB_FRAME_IND;
1108         }
1109 
1110         /*
1111          * DEVREADY does not occur with gSPI.
1112          */
1113         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1114                 bus->sdpcm_ver =
1115                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1116                     HMB_DATA_VERSION_SHIFT;
1117                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1118                         brcmf_err("Version mismatch, dongle reports %d, "
1119                                   "expecting %d\n",
1120                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1121                 else
1122                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1123                                   bus->sdpcm_ver);
1124 
1125                 /*
1126                  * Retrieve console state address now that firmware should have
1127                  * updated it.
1128                  */
1129                 brcmf_sdio_get_console_addr(bus);
1130         }
1131 
1132         /*
1133          * Flow Control has been moved into the RX headers and this out of band
1134          * method isn't used any more.
1135          * remaining backward compatible with older dongles.
1136          */
1137         if (hmb_data & HMB_DATA_FC) {
1138                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1139                                                         HMB_DATA_FCDATA_SHIFT;
1140 
1141                 if (fcbits & ~bus->flowcontrol)
1142                         bus->sdcnt.fc_xoff++;
1143 
1144                 if (bus->flowcontrol & ~fcbits)
1145                         bus->sdcnt.fc_xon++;
1146 
1147                 bus->sdcnt.fc_rcvd++;
1148                 bus->flowcontrol = fcbits;
1149         }
1150 
1151         /* Shouldn't be any others */
1152         if (hmb_data & ~(HMB_DATA_DEVREADY |
1153                          HMB_DATA_NAKHANDLED |
1154                          HMB_DATA_FC |
1155                          HMB_DATA_FWREADY |
1156                          HMB_DATA_FWHALT |
1157                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1158                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1159                           hmb_data);
1160 
1161         return intstatus;
1162 }
1163 
1164 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1165 {
1166         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
1167         struct brcmf_core *core = bus->sdio_core;
1168         uint retries = 0;
1169         u16 lastrbc;
1170         u8 hi, lo;
1171         int err;
1172 
1173         brcmf_err("%sterminate frame%s\n",
1174                   abort ? "abort command, " : "",
1175                   rtx ? ", send NAK" : "");
1176 
1177         if (abort)
1178                 brcmf_sdiod_abort(bus->sdiodev, bus->sdiodev->func2);
1179 
1180         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
1181                            &err);
1182         bus->sdcnt.f1regdata++;
1183 
1184         /* Wait until the packet has been flushed (device/FIFO stable) */
1185         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1186                 hi = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCHI,
1187                                        &err);
1188                 lo = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCLO,
1189                                        &err);
1190                 bus->sdcnt.f1regdata += 2;
1191 
1192                 if ((hi == 0) && (lo == 0))
1193                         break;
1194 
1195                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1196                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1197                                   lastrbc, (hi << 8) + lo);
1198                 }
1199                 lastrbc = (hi << 8) + lo;
1200         }
1201 
1202         if (!retries)
1203                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1204         else
1205                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1206 
1207         if (rtx) {
1208                 bus->sdcnt.rxrtx++;
1209                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailbox),
1210                                    SMB_NAK, &err);
1211 
1212                 bus->sdcnt.f1regdata++;
1213                 if (err == 0)
1214                         bus->rxskip = true;
1215         }
1216 
1217         /* Clear partial in any case */
1218         bus->cur_read.len = 0;
1219 }
1220 
1221 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1222 {
1223         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1224         u8 i, hi, lo;
1225 
1226         /* On failure, abort the command and terminate the frame */
1227         brcmf_err("sdio error, abort command and terminate frame\n");
1228         bus->sdcnt.tx_sderrs++;
1229 
1230         brcmf_sdiod_abort(sdiodev, sdiodev->func2);
1231         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1232         bus->sdcnt.f1regdata++;
1233 
1234         for (i = 0; i < 3; i++) {
1235                 hi = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1236                 lo = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1237                 bus->sdcnt.f1regdata += 2;
1238                 if ((hi == 0) && (lo == 0))
1239                         break;
1240         }
1241 }
1242 
1243 /* return total length of buffer chain */
1244 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1245 {
1246         struct sk_buff *p;
1247         uint total;
1248 
1249         total = 0;
1250         skb_queue_walk(&bus->glom, p)
1251                 total += p->len;
1252         return total;
1253 }
1254 
1255 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1256 {
1257         struct sk_buff *cur, *next;
1258 
1259         skb_queue_walk_safe(&bus->glom, cur, next) {
1260                 skb_unlink(cur, &bus->glom);
1261                 brcmu_pkt_buf_free_skb(cur);
1262         }
1263 }
1264 
1265 /**
1266  * brcmfmac sdio bus specific header
1267  * This is the lowest layer header wrapped on the packets transmitted between
1268  * host and WiFi dongle which contains information needed for SDIO core and
1269  * firmware
1270  *
1271  * It consists of 3 parts: hardware header, hardware extension header and
1272  * software header
1273  * hardware header (frame tag) - 4 bytes
1274  * Byte 0~1: Frame length
1275  * Byte 2~3: Checksum, bit-wise inverse of frame length
1276  * hardware extension header - 8 bytes
1277  * Tx glom mode only, N/A for Rx or normal Tx
1278  * Byte 0~1: Packet length excluding hw frame tag
1279  * Byte 2: Reserved
1280  * Byte 3: Frame flags, bit 0: last frame indication
1281  * Byte 4~5: Reserved
1282  * Byte 6~7: Tail padding length
1283  * software header - 8 bytes
1284  * Byte 0: Rx/Tx sequence number
1285  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1286  * Byte 2: Length of next data frame, reserved for Tx
1287  * Byte 3: Data offset
1288  * Byte 4: Flow control bits, reserved for Tx
1289  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1290  * Byte 6~7: Reserved
1291  */
1292 #define SDPCM_HWHDR_LEN                 4
1293 #define SDPCM_HWEXT_LEN                 8
1294 #define SDPCM_SWHDR_LEN                 8
1295 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1296 /* software header */
1297 #define SDPCM_SEQ_MASK                  0x000000ff
1298 #define SDPCM_SEQ_WRAP                  256
1299 #define SDPCM_CHANNEL_MASK              0x00000f00
1300 #define SDPCM_CHANNEL_SHIFT             8
1301 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1302 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1303 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1304 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1305 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1306 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1307 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1308 #define SDPCM_NEXTLEN_SHIFT             16
1309 #define SDPCM_DOFFSET_MASK              0xff000000
1310 #define SDPCM_DOFFSET_SHIFT             24
1311 #define SDPCM_FCMASK_MASK               0x000000ff
1312 #define SDPCM_WINDOW_MASK               0x0000ff00
1313 #define SDPCM_WINDOW_SHIFT              8
1314 
1315 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1316 {
1317         u32 hdrvalue;
1318         hdrvalue = *(u32 *)swheader;
1319         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1320 }
1321 
1322 static inline bool brcmf_sdio_fromevntchan(u8 *swheader)
1323 {
1324         u32 hdrvalue;
1325         u8 ret;
1326 
1327         hdrvalue = *(u32 *)swheader;
1328         ret = (u8)((hdrvalue & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT);
1329 
1330         return (ret == SDPCM_EVENT_CHANNEL);
1331 }
1332 
1333 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1334                               struct brcmf_sdio_hdrinfo *rd,
1335                               enum brcmf_sdio_frmtype type)
1336 {
1337         u16 len, checksum;
1338         u8 rx_seq, fc, tx_seq_max;
1339         u32 swheader;
1340 
1341         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1342 
1343         /* hw header */
1344         len = get_unaligned_le16(header);
1345         checksum = get_unaligned_le16(header + sizeof(u16));
1346         /* All zero means no more to read */
1347         if (!(len | checksum)) {
1348                 bus->rxpending = false;
1349                 return -ENODATA;
1350         }
1351         if ((u16)(~(len ^ checksum))) {
1352                 brcmf_err("HW header checksum error\n");
1353                 bus->sdcnt.rx_badhdr++;
1354                 brcmf_sdio_rxfail(bus, false, false);
1355                 return -EIO;
1356         }
1357         if (len < SDPCM_HDRLEN) {
1358                 brcmf_err("HW header length error\n");
1359                 return -EPROTO;
1360         }
1361         if (type == BRCMF_SDIO_FT_SUPER &&
1362             (roundup(len, bus->blocksize) != rd->len)) {
1363                 brcmf_err("HW superframe header length error\n");
1364                 return -EPROTO;
1365         }
1366         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1367                 brcmf_err("HW subframe header length error\n");
1368                 return -EPROTO;
1369         }
1370         rd->len = len;
1371 
1372         /* software header */
1373         header += SDPCM_HWHDR_LEN;
1374         swheader = le32_to_cpu(*(__le32 *)header);
1375         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1376                 brcmf_err("Glom descriptor found in superframe head\n");
1377                 rd->len = 0;
1378                 return -EINVAL;
1379         }
1380         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1381         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1382         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1383             type != BRCMF_SDIO_FT_SUPER) {
1384                 brcmf_err("HW header length too long\n");
1385                 bus->sdcnt.rx_toolong++;
1386                 brcmf_sdio_rxfail(bus, false, false);
1387                 rd->len = 0;
1388                 return -EPROTO;
1389         }
1390         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1391                 brcmf_err("Wrong channel for superframe\n");
1392                 rd->len = 0;
1393                 return -EINVAL;
1394         }
1395         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1396             rd->channel != SDPCM_EVENT_CHANNEL) {
1397                 brcmf_err("Wrong channel for subframe\n");
1398                 rd->len = 0;
1399                 return -EINVAL;
1400         }
1401         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1402         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1403                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1404                 bus->sdcnt.rx_badhdr++;
1405                 brcmf_sdio_rxfail(bus, false, false);
1406                 rd->len = 0;
1407                 return -ENXIO;
1408         }
1409         if (rd->seq_num != rx_seq) {
1410                 brcmf_dbg(SDIO, "seq %d, expected %d\n", rx_seq, rd->seq_num);
1411                 bus->sdcnt.rx_badseq++;
1412                 rd->seq_num = rx_seq;
1413         }
1414         /* no need to check the reset for subframe */
1415         if (type == BRCMF_SDIO_FT_SUB)
1416                 return 0;
1417         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1418         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1419                 /* only warm for NON glom packet */
1420                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1421                         brcmf_err("seq %d: next length error\n", rx_seq);
1422                 rd->len_nxtfrm = 0;
1423         }
1424         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1425         fc = swheader & SDPCM_FCMASK_MASK;
1426         if (bus->flowcontrol != fc) {
1427                 if (~bus->flowcontrol & fc)
1428                         bus->sdcnt.fc_xoff++;
1429                 if (bus->flowcontrol & ~fc)
1430                         bus->sdcnt.fc_xon++;
1431                 bus->sdcnt.fc_rcvd++;
1432                 bus->flowcontrol = fc;
1433         }
1434         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1435         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1436                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1437                 tx_seq_max = bus->tx_seq + 2;
1438         }
1439         bus->tx_max = tx_seq_max;
1440 
1441         return 0;
1442 }
1443 
1444 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1445 {
1446         *(__le16 *)header = cpu_to_le16(frm_length);
1447         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1448 }
1449 
1450 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1451                               struct brcmf_sdio_hdrinfo *hd_info)
1452 {
1453         u32 hdrval;
1454         u8 hdr_offset;
1455 
1456         brcmf_sdio_update_hwhdr(header, hd_info->len);
1457         hdr_offset = SDPCM_HWHDR_LEN;
1458 
1459         if (bus->txglom) {
1460                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1461                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1462                 hdrval = (u16)hd_info->tail_pad << 16;
1463                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1464                 hdr_offset += SDPCM_HWEXT_LEN;
1465         }
1466 
1467         hdrval = hd_info->seq_num;
1468         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1469                   SDPCM_CHANNEL_MASK;
1470         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1471                   SDPCM_DOFFSET_MASK;
1472         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1473         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1474         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1475 }
1476 
1477 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1478 {
1479         u16 dlen, totlen;
1480         u8 *dptr, num = 0;
1481         u16 sublen;
1482         struct sk_buff *pfirst, *pnext;
1483 
1484         int errcode;
1485         u8 doff;
1486 
1487         struct brcmf_sdio_hdrinfo rd_new;
1488 
1489         /* If packets, issue read(s) and send up packet chain */
1490         /* Return sequence numbers consumed? */
1491 
1492         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1493                   bus->glomd, skb_peek(&bus->glom));
1494 
1495         /* If there's a descriptor, generate the packet chain */
1496         if (bus->glomd) {
1497                 pfirst = pnext = NULL;
1498                 dlen = (u16) (bus->glomd->len);
1499                 dptr = bus->glomd->data;
1500                 if (!dlen || (dlen & 1)) {
1501                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1502                                   dlen);
1503                         dlen = 0;
1504                 }
1505 
1506                 for (totlen = num = 0; dlen; num++) {
1507                         /* Get (and move past) next length */
1508                         sublen = get_unaligned_le16(dptr);
1509                         dlen -= sizeof(u16);
1510                         dptr += sizeof(u16);
1511                         if ((sublen < SDPCM_HDRLEN) ||
1512                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1513                                 brcmf_err("descriptor len %d bad: %d\n",
1514                                           num, sublen);
1515                                 pnext = NULL;
1516                                 break;
1517                         }
1518                         if (sublen % bus->sgentry_align) {
1519                                 brcmf_err("sublen %d not multiple of %d\n",
1520                                           sublen, bus->sgentry_align);
1521                         }
1522                         totlen += sublen;
1523 
1524                         /* For last frame, adjust read len so total
1525                                  is a block multiple */
1526                         if (!dlen) {
1527                                 sublen +=
1528                                     (roundup(totlen, bus->blocksize) - totlen);
1529                                 totlen = roundup(totlen, bus->blocksize);
1530                         }
1531 
1532                         /* Allocate/chain packet for next subframe */
1533                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1534                         if (pnext == NULL) {
1535                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1536                                           num, sublen);
1537                                 break;
1538                         }
1539                         skb_queue_tail(&bus->glom, pnext);
1540 
1541                         /* Adhere to start alignment requirements */
1542                         pkt_align(pnext, sublen, bus->sgentry_align);
1543                 }
1544 
1545                 /* If all allocations succeeded, save packet chain
1546                          in bus structure */
1547                 if (pnext) {
1548                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1549                                   totlen, num);
1550                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1551                             totlen != bus->cur_read.len) {
1552                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1553                                           bus->cur_read.len, totlen, rxseq);
1554                         }
1555                         pfirst = pnext = NULL;
1556                 } else {
1557                         brcmf_sdio_free_glom(bus);
1558                         num = 0;
1559                 }
1560 
1561                 /* Done with descriptor packet */
1562                 brcmu_pkt_buf_free_skb(bus->glomd);
1563                 bus->glomd = NULL;
1564                 bus->cur_read.len = 0;
1565         }
1566 
1567         /* Ok -- either we just generated a packet chain,
1568                  or had one from before */
1569         if (!skb_queue_empty(&bus->glom)) {
1570                 if (BRCMF_GLOM_ON()) {
1571                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1572                         skb_queue_walk(&bus->glom, pnext) {
1573                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1574                                           pnext, (u8 *) (pnext->data),
1575                                           pnext->len, pnext->len);
1576                         }
1577                 }
1578 
1579                 pfirst = skb_peek(&bus->glom);
1580                 dlen = (u16) brcmf_sdio_glom_len(bus);
1581 
1582                 /* Do an SDIO read for the superframe.  Configurable iovar to
1583                  * read directly into the chained packet, or allocate a large
1584                  * packet and and copy into the chain.
1585                  */
1586                 sdio_claim_host(bus->sdiodev->func1);
1587                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1588                                                  &bus->glom, dlen);
1589                 sdio_release_host(bus->sdiodev->func1);
1590                 bus->sdcnt.f2rxdata++;
1591 
1592                 /* On failure, kill the superframe */
1593                 if (errcode < 0) {
1594                         brcmf_err("glom read of %d bytes failed: %d\n",
1595                                   dlen, errcode);
1596 
1597                         sdio_claim_host(bus->sdiodev->func1);
1598                         brcmf_sdio_rxfail(bus, true, false);
1599                         bus->sdcnt.rxglomfail++;
1600                         brcmf_sdio_free_glom(bus);
1601                         sdio_release_host(bus->sdiodev->func1);
1602                         return 0;
1603                 }
1604 
1605                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1606                                    pfirst->data, min_t(int, pfirst->len, 48),
1607                                    "SUPERFRAME:\n");
1608 
1609                 rd_new.seq_num = rxseq;
1610                 rd_new.len = dlen;
1611                 sdio_claim_host(bus->sdiodev->func1);
1612                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1613                                              BRCMF_SDIO_FT_SUPER);
1614                 sdio_release_host(bus->sdiodev->func1);
1615                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1616 
1617                 /* Remove superframe header, remember offset */
1618                 skb_pull(pfirst, rd_new.dat_offset);
1619                 num = 0;
1620 
1621                 /* Validate all the subframe headers */
1622                 skb_queue_walk(&bus->glom, pnext) {
1623                         /* leave when invalid subframe is found */
1624                         if (errcode)
1625                                 break;
1626 
1627                         rd_new.len = pnext->len;
1628                         rd_new.seq_num = rxseq++;
1629                         sdio_claim_host(bus->sdiodev->func1);
1630                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1631                                                      BRCMF_SDIO_FT_SUB);
1632                         sdio_release_host(bus->sdiodev->func1);
1633                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1634                                            pnext->data, 32, "subframe:\n");
1635 
1636                         num++;
1637                 }
1638 
1639                 if (errcode) {
1640                         /* Terminate frame on error */
1641                         sdio_claim_host(bus->sdiodev->func1);
1642                         brcmf_sdio_rxfail(bus, true, false);
1643                         bus->sdcnt.rxglomfail++;
1644                         brcmf_sdio_free_glom(bus);
1645                         sdio_release_host(bus->sdiodev->func1);
1646                         bus->cur_read.len = 0;
1647                         return 0;
1648                 }
1649 
1650                 /* Basic SD framing looks ok - process each packet (header) */
1651 
1652                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1653                         dptr = (u8 *) (pfirst->data);
1654                         sublen = get_unaligned_le16(dptr);
1655                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1656 
1657                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1658                                            dptr, pfirst->len,
1659                                            "Rx Subframe Data:\n");
1660 
1661                         __skb_trim(pfirst, sublen);
1662                         skb_pull(pfirst, doff);
1663 
1664                         if (pfirst->len == 0) {
1665                                 skb_unlink(pfirst, &bus->glom);
1666                                 brcmu_pkt_buf_free_skb(pfirst);
1667                                 continue;
1668                         }
1669 
1670                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1671                                            pfirst->data,
1672                                            min_t(int, pfirst->len, 32),
1673                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1674                                            bus->glom.qlen, pfirst, pfirst->data,
1675                                            pfirst->len, pfirst->next,
1676                                            pfirst->prev);
1677                         skb_unlink(pfirst, &bus->glom);
1678                         if (brcmf_sdio_fromevntchan(&dptr[SDPCM_HWHDR_LEN]))
1679                                 brcmf_rx_event(bus->sdiodev->dev, pfirst);
1680                         else
1681                                 brcmf_rx_frame(bus->sdiodev->dev, pfirst,
1682                                                false);
1683                         bus->sdcnt.rxglompkts++;
1684                 }
1685 
1686                 bus->sdcnt.rxglomframes++;
1687         }
1688         return num;
1689 }
1690 
1691 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1692                                      bool *pending)
1693 {
1694         DECLARE_WAITQUEUE(wait, current);
1695         int timeout = DCMD_RESP_TIMEOUT;
1696 
1697         /* Wait until control frame is available */
1698         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1699         set_current_state(TASK_INTERRUPTIBLE);
1700 
1701         while (!(*condition) && (!signal_pending(current) && timeout))
1702                 timeout = schedule_timeout(timeout);
1703 
1704         if (signal_pending(current))
1705                 *pending = true;
1706 
1707         set_current_state(TASK_RUNNING);
1708         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1709 
1710         return timeout;
1711 }
1712 
1713 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1714 {
1715         wake_up_interruptible(&bus->dcmd_resp_wait);
1716 
1717         return 0;
1718 }
1719 static void
1720 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1721 {
1722         uint rdlen, pad;
1723         u8 *buf = NULL, *rbuf;
1724         int sdret;
1725 
1726         brcmf_dbg(SDIO, "Enter\n");
1727         if (bus->rxblen)
1728                 buf = vzalloc(bus->rxblen);
1729         if (!buf)
1730                 goto done;
1731 
1732         rbuf = bus->rxbuf;
1733         pad = ((unsigned long)rbuf % bus->head_align);
1734         if (pad)
1735                 rbuf += (bus->head_align - pad);
1736 
1737         /* Copy the already-read portion over */
1738         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1739         if (len <= BRCMF_FIRSTREAD)
1740                 goto gotpkt;
1741 
1742         /* Raise rdlen to next SDIO block to avoid tail command */
1743         rdlen = len - BRCMF_FIRSTREAD;
1744         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1745                 pad = bus->blocksize - (rdlen % bus->blocksize);
1746                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1747                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1748                         rdlen += pad;
1749         } else if (rdlen % bus->head_align) {
1750                 rdlen += bus->head_align - (rdlen % bus->head_align);
1751         }
1752 
1753         /* Drop if the read is too big or it exceeds our maximum */
1754         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1755                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1756                           rdlen, bus->sdiodev->bus_if->maxctl);
1757                 brcmf_sdio_rxfail(bus, false, false);
1758                 goto done;
1759         }
1760 
1761         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1762                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1763                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1764                 bus->sdcnt.rx_toolong++;
1765                 brcmf_sdio_rxfail(bus, false, false);
1766                 goto done;
1767         }
1768 
1769         /* Read remain of frame body */
1770         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1771         bus->sdcnt.f2rxdata++;
1772 
1773         /* Control frame failures need retransmission */
1774         if (sdret < 0) {
1775                 brcmf_err("read %d control bytes failed: %d\n",
1776                           rdlen, sdret);
1777                 bus->sdcnt.rxc_errors++;
1778                 brcmf_sdio_rxfail(bus, true, true);
1779                 goto done;
1780         } else
1781                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1782 
1783 gotpkt:
1784 
1785         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1786                            buf, len, "RxCtrl:\n");
1787 
1788         /* Point to valid data and indicate its length */
1789         spin_lock_bh(&bus->rxctl_lock);
1790         if (bus->rxctl) {
1791                 brcmf_err("last control frame is being processed.\n");
1792                 spin_unlock_bh(&bus->rxctl_lock);
1793                 vfree(buf);
1794                 goto done;
1795         }
1796         bus->rxctl = buf + doff;
1797         bus->rxctl_orig = buf;
1798         bus->rxlen = len - doff;
1799         spin_unlock_bh(&bus->rxctl_lock);
1800 
1801 done:
1802         /* Awake any waiters */
1803         brcmf_sdio_dcmd_resp_wake(bus);
1804 }
1805 
1806 /* Pad read to blocksize for efficiency */
1807 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1808 {
1809         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1810                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1811                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1812                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1813                         *rdlen += *pad;
1814         } else if (*rdlen % bus->head_align) {
1815                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1816         }
1817 }
1818 
1819 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1820 {
1821         struct sk_buff *pkt;            /* Packet for event or data frames */
1822         u16 pad;                /* Number of pad bytes to read */
1823         uint rxleft = 0;        /* Remaining number of frames allowed */
1824         int ret;                /* Return code from calls */
1825         uint rxcount = 0;       /* Total frames read */
1826         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1827         u8 head_read = 0;
1828 
1829         brcmf_dbg(SDIO, "Enter\n");
1830 
1831         /* Not finished unless we encounter no more frames indication */
1832         bus->rxpending = true;
1833 
1834         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1835              !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1836              rd->seq_num++, rxleft--) {
1837 
1838                 /* Handle glomming separately */
1839                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1840                         u8 cnt;
1841                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1842                                   bus->glomd, skb_peek(&bus->glom));
1843                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1844                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1845                         rd->seq_num += cnt - 1;
1846                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1847                         continue;
1848                 }
1849 
1850                 rd->len_left = rd->len;
1851                 /* read header first for unknow frame length */
1852                 sdio_claim_host(bus->sdiodev->func1);
1853                 if (!rd->len) {
1854                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1855                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1856                         bus->sdcnt.f2rxhdrs++;
1857                         if (ret < 0) {
1858                                 brcmf_err("RXHEADER FAILED: %d\n",
1859                                           ret);
1860                                 bus->sdcnt.rx_hdrfail++;
1861                                 brcmf_sdio_rxfail(bus, true, true);
1862                                 sdio_release_host(bus->sdiodev->func1);
1863                                 continue;
1864                         }
1865 
1866                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1867                                            bus->rxhdr, SDPCM_HDRLEN,
1868                                            "RxHdr:\n");
1869 
1870                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1871                                                BRCMF_SDIO_FT_NORMAL)) {
1872                                 sdio_release_host(bus->sdiodev->func1);
1873                                 if (!bus->rxpending)
1874                                         break;
1875                                 else
1876                                         continue;
1877                         }
1878 
1879                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1880                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1881                                                         rd->len,
1882                                                         rd->dat_offset);
1883                                 /* prepare the descriptor for the next read */
1884                                 rd->len = rd->len_nxtfrm << 4;
1885                                 rd->len_nxtfrm = 0;
1886                                 /* treat all packet as event if we don't know */
1887                                 rd->channel = SDPCM_EVENT_CHANNEL;
1888                                 sdio_release_host(bus->sdiodev->func1);
1889                                 continue;
1890                         }
1891                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1892                                        rd->len - BRCMF_FIRSTREAD : 0;
1893                         head_read = BRCMF_FIRSTREAD;
1894                 }
1895 
1896                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1897 
1898                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1899                                             bus->head_align);
1900                 if (!pkt) {
1901                         /* Give up on data, request rtx of events */
1902                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1903                         brcmf_sdio_rxfail(bus, false,
1904                                             RETRYCHAN(rd->channel));
1905                         sdio_release_host(bus->sdiodev->func1);
1906                         continue;
1907                 }
1908                 skb_pull(pkt, head_read);
1909                 pkt_align(pkt, rd->len_left, bus->head_align);
1910 
1911                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1912                 bus->sdcnt.f2rxdata++;
1913                 sdio_release_host(bus->sdiodev->func1);
1914 
1915                 if (ret < 0) {
1916                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1917                                   rd->len, rd->channel, ret);
1918                         brcmu_pkt_buf_free_skb(pkt);
1919                         sdio_claim_host(bus->sdiodev->func1);
1920                         brcmf_sdio_rxfail(bus, true,
1921                                             RETRYCHAN(rd->channel));
1922                         sdio_release_host(bus->sdiodev->func1);
1923                         continue;
1924                 }
1925 
1926                 if (head_read) {
1927                         skb_push(pkt, head_read);
1928                         memcpy(pkt->data, bus->rxhdr, head_read);
1929                         head_read = 0;
1930                 } else {
1931                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1932                         rd_new.seq_num = rd->seq_num;
1933                         sdio_claim_host(bus->sdiodev->func1);
1934                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1935                                                BRCMF_SDIO_FT_NORMAL)) {
1936                                 rd->len = 0;
1937                                 brcmf_sdio_rxfail(bus, true, true);
1938                                 sdio_release_host(bus->sdiodev->func1);
1939                                 brcmu_pkt_buf_free_skb(pkt);
1940                                 continue;
1941                         }
1942                         bus->sdcnt.rx_readahead_cnt++;
1943                         if (rd->len != roundup(rd_new.len, 16)) {
1944                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1945                                           rd->len,
1946                                           roundup(rd_new.len, 16) >> 4);
1947                                 rd->len = 0;
1948                                 brcmf_sdio_rxfail(bus, true, true);
1949                                 sdio_release_host(bus->sdiodev->func1);
1950                                 brcmu_pkt_buf_free_skb(pkt);
1951                                 continue;
1952                         }
1953                         sdio_release_host(bus->sdiodev->func1);
1954                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1955                         rd->channel = rd_new.channel;
1956                         rd->dat_offset = rd_new.dat_offset;
1957 
1958                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1959                                              BRCMF_DATA_ON()) &&
1960                                            BRCMF_HDRS_ON(),
1961                                            bus->rxhdr, SDPCM_HDRLEN,
1962                                            "RxHdr:\n");
1963 
1964                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1965                                 brcmf_err("readahead on control packet %d?\n",
1966                                           rd_new.seq_num);
1967                                 /* Force retry w/normal header read */
1968                                 rd->len = 0;
1969                                 sdio_claim_host(bus->sdiodev->func1);
1970                                 brcmf_sdio_rxfail(bus, false, true);
1971                                 sdio_release_host(bus->sdiodev->func1);
1972                                 brcmu_pkt_buf_free_skb(pkt);
1973                                 continue;
1974                         }
1975                 }
1976 
1977                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1978                                    pkt->data, rd->len, "Rx Data:\n");
1979 
1980                 /* Save superframe descriptor and allocate packet frame */
1981                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1982                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1983                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1984                                           rd->len);
1985                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1986                                                    pkt->data, rd->len,
1987                                                    "Glom Data:\n");
1988                                 __skb_trim(pkt, rd->len);
1989                                 skb_pull(pkt, SDPCM_HDRLEN);
1990                                 bus->glomd = pkt;
1991                         } else {
1992                                 brcmf_err("%s: glom superframe w/o "
1993                                           "descriptor!\n", __func__);
1994                                 sdio_claim_host(bus->sdiodev->func1);
1995                                 brcmf_sdio_rxfail(bus, false, false);
1996                                 sdio_release_host(bus->sdiodev->func1);
1997                         }
1998                         /* prepare the descriptor for the next read */
1999                         rd->len = rd->len_nxtfrm << 4;
2000                         rd->len_nxtfrm = 0;
2001                         /* treat all packet as event if we don't know */
2002                         rd->channel = SDPCM_EVENT_CHANNEL;
2003                         continue;
2004                 }
2005 
2006                 /* Fill in packet len and prio, deliver upward */
2007                 __skb_trim(pkt, rd->len);
2008                 skb_pull(pkt, rd->dat_offset);
2009 
2010                 if (pkt->len == 0)
2011                         brcmu_pkt_buf_free_skb(pkt);
2012                 else if (rd->channel == SDPCM_EVENT_CHANNEL)
2013                         brcmf_rx_event(bus->sdiodev->dev, pkt);
2014                 else
2015                         brcmf_rx_frame(bus->sdiodev->dev, pkt,
2016                                        false);
2017 
2018                 /* prepare the descriptor for the next read */
2019                 rd->len = rd->len_nxtfrm << 4;
2020                 rd->len_nxtfrm = 0;
2021                 /* treat all packet as event if we don't know */
2022                 rd->channel = SDPCM_EVENT_CHANNEL;
2023         }
2024 
2025         rxcount = maxframes - rxleft;
2026         /* Message if we hit the limit */
2027         if (!rxleft)
2028                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2029         else
2030                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2031         /* Back off rxseq if awaiting rtx, update rx_seq */
2032         if (bus->rxskip)
2033                 rd->seq_num--;
2034         bus->rx_seq = rd->seq_num;
2035 
2036         return rxcount;
2037 }
2038 
2039 static void
2040 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2041 {
2042         wake_up_interruptible(&bus->ctrl_wait);
2043         return;
2044 }
2045 
2046 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2047 {
2048         struct brcmf_bus_stats *stats;
2049         u16 head_pad;
2050         u8 *dat_buf;
2051 
2052         dat_buf = (u8 *)(pkt->data);
2053 
2054         /* Check head padding */
2055         head_pad = ((unsigned long)dat_buf % bus->head_align);
2056         if (head_pad) {
2057                 if (skb_headroom(pkt) < head_pad) {
2058                         stats = &bus->sdiodev->bus_if->stats;
2059                         atomic_inc(&stats->pktcowed);
2060                         if (skb_cow_head(pkt, head_pad)) {
2061                                 atomic_inc(&stats->pktcow_failed);
2062                                 return -ENOMEM;
2063                         }
2064                         head_pad = 0;
2065                 }
2066                 skb_push(pkt, head_pad);
2067                 dat_buf = (u8 *)(pkt->data);
2068         }
2069         memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2070         return head_pad;
2071 }
2072 
2073 /*
2074  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2075  * bus layer usage.
2076  */
2077 /* flag marking a dummy skb added for DMA alignment requirement */
2078 #define ALIGN_SKB_FLAG          0x8000
2079 /* bit mask of data length chopped from the previous packet */
2080 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2081 
2082 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2083                                     struct sk_buff_head *pktq,
2084                                     struct sk_buff *pkt, u16 total_len)
2085 {
2086         struct brcmf_sdio_dev *sdiodev;
2087         struct sk_buff *pkt_pad;
2088         u16 tail_pad, tail_chop, chain_pad;
2089         unsigned int blksize;
2090         bool lastfrm;
2091         int ntail, ret;
2092 
2093         sdiodev = bus->sdiodev;
2094         blksize = sdiodev->func2->cur_blksize;
2095         /* sg entry alignment should be a divisor of block size */
2096         WARN_ON(blksize % bus->sgentry_align);
2097 
2098         /* Check tail padding */
2099         lastfrm = skb_queue_is_last(pktq, pkt);
2100         tail_pad = 0;
2101         tail_chop = pkt->len % bus->sgentry_align;
2102         if (tail_chop)
2103                 tail_pad = bus->sgentry_align - tail_chop;
2104         chain_pad = (total_len + tail_pad) % blksize;
2105         if (lastfrm && chain_pad)
2106                 tail_pad += blksize - chain_pad;
2107         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2108                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2109                                                 bus->head_align);
2110                 if (pkt_pad == NULL)
2111                         return -ENOMEM;
2112                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2113                 if (unlikely(ret < 0)) {
2114                         kfree_skb(pkt_pad);
2115                         return ret;
2116                 }
2117                 memcpy(pkt_pad->data,
2118                        pkt->data + pkt->len - tail_chop,
2119                        tail_chop);
2120                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2121                 skb_trim(pkt, pkt->len - tail_chop);
2122                 skb_trim(pkt_pad, tail_pad + tail_chop);
2123                 __skb_queue_after(pktq, pkt, pkt_pad);
2124         } else {
2125                 ntail = pkt->data_len + tail_pad -
2126                         (pkt->end - pkt->tail);
2127                 if (skb_cloned(pkt) || ntail > 0)
2128                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2129                                 return -ENOMEM;
2130                 if (skb_linearize(pkt))
2131                         return -ENOMEM;
2132                 __skb_put(pkt, tail_pad);
2133         }
2134 
2135         return tail_pad;
2136 }
2137 
2138 /**
2139  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2140  * @bus: brcmf_sdio structure pointer
2141  * @pktq: packet list pointer
2142  * @chan: virtual channel to transmit the packet
2143  *
2144  * Processes to be applied to the packet
2145  *      - Align data buffer pointer
2146  *      - Align data buffer length
2147  *      - Prepare header
2148  * Return: negative value if there is error
2149  */
2150 static int
2151 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2152                       uint chan)
2153 {
2154         u16 head_pad, total_len;
2155         struct sk_buff *pkt_next;
2156         u8 txseq;
2157         int ret;
2158         struct brcmf_sdio_hdrinfo hd_info = {0};
2159 
2160         txseq = bus->tx_seq;
2161         total_len = 0;
2162         skb_queue_walk(pktq, pkt_next) {
2163                 /* alignment packet inserted in previous
2164                  * loop cycle can be skipped as it is
2165                  * already properly aligned and does not
2166                  * need an sdpcm header.
2167                  */
2168                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2169                         continue;
2170 
2171                 /* align packet data pointer */
2172                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2173                 if (ret < 0)
2174                         return ret;
2175                 head_pad = (u16)ret;
2176                 if (head_pad)
2177                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2178 
2179                 total_len += pkt_next->len;
2180 
2181                 hd_info.len = pkt_next->len;
2182                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2183                 if (bus->txglom && pktq->qlen > 1) {
2184                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2185                                                        pkt_next, total_len);
2186                         if (ret < 0)
2187                                 return ret;
2188                         hd_info.tail_pad = (u16)ret;
2189                         total_len += (u16)ret;
2190                 }
2191 
2192                 hd_info.channel = chan;
2193                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2194                 hd_info.seq_num = txseq++;
2195 
2196                 /* Now fill the header */
2197                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2198 
2199                 if (BRCMF_BYTES_ON() &&
2200                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2201                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2202                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2203                                            "Tx Frame:\n");
2204                 else if (BRCMF_HDRS_ON())
2205                         brcmf_dbg_hex_dump(true, pkt_next->data,
2206                                            head_pad + bus->tx_hdrlen,
2207                                            "Tx Header:\n");
2208         }
2209         /* Hardware length tag of the first packet should be total
2210          * length of the chain (including padding)
2211          */
2212         if (bus->txglom)
2213                 brcmf_sdio_update_hwhdr(__skb_peek(pktq)->data, total_len);
2214         return 0;
2215 }
2216 
2217 /**
2218  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2219  * @bus: brcmf_sdio structure pointer
2220  * @pktq: packet list pointer
2221  *
2222  * Processes to be applied to the packet
2223  *      - Remove head padding
2224  *      - Remove tail padding
2225  */
2226 static void
2227 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2228 {
2229         u8 *hdr;
2230         u32 dat_offset;
2231         u16 tail_pad;
2232         u16 dummy_flags, chop_len;
2233         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2234 
2235         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2236                 dummy_flags = *(u16 *)(pkt_next->cb);
2237                 if (dummy_flags & ALIGN_SKB_FLAG) {
2238                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2239                         if (chop_len) {
2240                                 pkt_prev = pkt_next->prev;
2241                                 skb_put(pkt_prev, chop_len);
2242                         }
2243                         __skb_unlink(pkt_next, pktq);
2244                         brcmu_pkt_buf_free_skb(pkt_next);
2245                 } else {
2246                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2247                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2248                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2249                                      SDPCM_DOFFSET_SHIFT;
2250                         skb_pull(pkt_next, dat_offset);
2251                         if (bus->txglom) {
2252                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2253                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2254                         }
2255                 }
2256         }
2257 }
2258 
2259 /* Writes a HW/SW header into the packet and sends it. */
2260 /* Assumes: (a) header space already there, (b) caller holds lock */
2261 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2262                             uint chan)
2263 {
2264         int ret;
2265         struct sk_buff *pkt_next, *tmp;
2266 
2267         brcmf_dbg(TRACE, "Enter\n");
2268 
2269         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2270         if (ret)
2271                 goto done;
2272 
2273         sdio_claim_host(bus->sdiodev->func1);
2274         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2275         bus->sdcnt.f2txdata++;
2276 
2277         if (ret < 0)
2278                 brcmf_sdio_txfail(bus);
2279 
2280         sdio_release_host(bus->sdiodev->func1);
2281 
2282 done:
2283         brcmf_sdio_txpkt_postp(bus, pktq);
2284         if (ret == 0)
2285                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2286         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2287                 __skb_unlink(pkt_next, pktq);
2288                 brcmf_proto_bcdc_txcomplete(bus->sdiodev->dev, pkt_next,
2289                                             ret == 0);
2290         }
2291         return ret;
2292 }
2293 
2294 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2295 {
2296         struct sk_buff *pkt;
2297         struct sk_buff_head pktq;
2298         u32 intstat_addr = bus->sdio_core->base + SD_REG(intstatus);
2299         u32 intstatus = 0;
2300         int ret = 0, prec_out, i;
2301         uint cnt = 0;
2302         u8 tx_prec_map, pkt_num;
2303 
2304         brcmf_dbg(TRACE, "Enter\n");
2305 
2306         tx_prec_map = ~bus->flowcontrol;
2307 
2308         /* Send frames until the limit or some other event */
2309         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2310                 pkt_num = 1;
2311                 if (bus->txglom)
2312                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2313                                         bus->sdiodev->txglomsz);
2314                 pkt_num = min_t(u32, pkt_num,
2315                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2316                 __skb_queue_head_init(&pktq);
2317                 spin_lock_bh(&bus->txq_lock);
2318                 for (i = 0; i < pkt_num; i++) {
2319                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2320                                               &prec_out);
2321                         if (pkt == NULL)
2322                                 break;
2323                         __skb_queue_tail(&pktq, pkt);
2324                 }
2325                 spin_unlock_bh(&bus->txq_lock);
2326                 if (i == 0)
2327                         break;
2328 
2329                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2330 
2331                 cnt += i;
2332 
2333                 /* In poll mode, need to check for other events */
2334                 if (!bus->intr) {
2335                         /* Check device status, signal pending interrupt */
2336                         sdio_claim_host(bus->sdiodev->func1);
2337                         intstatus = brcmf_sdiod_readl(bus->sdiodev,
2338                                                       intstat_addr, &ret);
2339                         sdio_release_host(bus->sdiodev->func1);
2340 
2341                         bus->sdcnt.f2txdata++;
2342                         if (ret != 0)
2343                                 break;
2344                         if (intstatus & bus->hostintmask)
2345                                 atomic_set(&bus->ipend, 1);
2346                 }
2347         }
2348 
2349         /* Deflow-control stack if needed */
2350         if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2351             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2352                 bus->txoff = false;
2353                 brcmf_proto_bcdc_txflowblock(bus->sdiodev->dev, false);
2354         }
2355 
2356         return cnt;
2357 }
2358 
2359 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2360 {
2361         u8 doff;
2362         u16 pad;
2363         uint retries = 0;
2364         struct brcmf_sdio_hdrinfo hd_info = {0};
2365         int ret;
2366 
2367         brcmf_dbg(SDIO, "Enter\n");
2368 
2369         /* Back the pointer to make room for bus header */
2370         frame -= bus->tx_hdrlen;
2371         len += bus->tx_hdrlen;
2372 
2373         /* Add alignment padding (optional for ctl frames) */
2374         doff = ((unsigned long)frame % bus->head_align);
2375         if (doff) {
2376                 frame -= doff;
2377                 len += doff;
2378                 memset(frame + bus->tx_hdrlen, 0, doff);
2379         }
2380 
2381         /* Round send length to next SDIO block */
2382         pad = 0;
2383         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2384                 pad = bus->blocksize - (len % bus->blocksize);
2385                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2386                         pad = 0;
2387         } else if (len % bus->head_align) {
2388                 pad = bus->head_align - (len % bus->head_align);
2389         }
2390         len += pad;
2391 
2392         hd_info.len = len - pad;
2393         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2394         hd_info.dat_offset = doff + bus->tx_hdrlen;
2395         hd_info.seq_num = bus->tx_seq;
2396         hd_info.lastfrm = true;
2397         hd_info.tail_pad = pad;
2398         brcmf_sdio_hdpack(bus, frame, &hd_info);
2399 
2400         if (bus->txglom)
2401                 brcmf_sdio_update_hwhdr(frame, len);
2402 
2403         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2404                            frame, len, "Tx Frame:\n");
2405         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2406                            BRCMF_HDRS_ON(),
2407                            frame, min_t(u16, len, 16), "TxHdr:\n");
2408 
2409         do {
2410                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2411 
2412                 if (ret < 0)
2413                         brcmf_sdio_txfail(bus);
2414                 else
2415                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2416         } while (ret < 0 && retries++ < TXRETRIES);
2417 
2418         return ret;
2419 }
2420 
2421 static bool brcmf_chip_is_ulp(struct brcmf_chip *ci)
2422 {
2423         if (ci->chip == CY_CC_43012_CHIP_ID)
2424                 return true;
2425         else
2426                 return false;
2427 }
2428 
2429 static void brcmf_sdio_bus_stop(struct device *dev)
2430 {
2431         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2432         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2433         struct brcmf_sdio *bus = sdiodev->bus;
2434         struct brcmf_core *core = bus->sdio_core;
2435         u32 local_hostintmask;
2436         u8 saveclk, bpreq;
2437         int err;
2438 
2439         brcmf_dbg(TRACE, "Enter\n");
2440 
2441         if (bus->watchdog_tsk) {
2442                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2443                 kthread_stop(bus->watchdog_tsk);
2444                 bus->watchdog_tsk = NULL;
2445         }
2446 
2447         if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2448                 sdio_claim_host(sdiodev->func1);
2449 
2450                 /* Enable clock for device interrupts */
2451                 brcmf_sdio_bus_sleep(bus, false, false);
2452 
2453                 /* Disable and clear interrupts at the chip level also */
2454                 brcmf_sdiod_writel(sdiodev, core->base + SD_REG(hostintmask),
2455                                    0, NULL);
2456 
2457                 local_hostintmask = bus->hostintmask;
2458                 bus->hostintmask = 0;
2459 
2460                 /* Force backplane clocks to assure F2 interrupt propagates */
2461                 saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2462                                             &err);
2463                 if (!err) {
2464                         bpreq = saveclk;
2465                         bpreq |= brcmf_chip_is_ulp(bus->ci) ?
2466                                 SBSDIO_HT_AVAIL_REQ : SBSDIO_FORCE_HT;
2467                         brcmf_sdiod_writeb(sdiodev,
2468                                            SBSDIO_FUNC1_CHIPCLKCSR,
2469                                            bpreq, &err);
2470                 }
2471                 if (err)
2472                         brcmf_err("Failed to force clock for F2: err %d\n",
2473                                   err);
2474 
2475                 /* Turn off the bus (F2), free any pending packets */
2476                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2477                 sdio_disable_func(sdiodev->func2);
2478 
2479                 /* Clear any pending interrupts now that F2 is disabled */
2480                 brcmf_sdiod_writel(sdiodev, core->base + SD_REG(intstatus),
2481                                    local_hostintmask, NULL);
2482 
2483                 sdio_release_host(sdiodev->func1);
2484         }
2485         /* Clear the data packet queues */
2486         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2487 
2488         /* Clear any held glomming stuff */
2489         brcmu_pkt_buf_free_skb(bus->glomd);
2490         brcmf_sdio_free_glom(bus);
2491 
2492         /* Clear rx control and wake any waiters */
2493         spin_lock_bh(&bus->rxctl_lock);
2494         bus->rxlen = 0;
2495         spin_unlock_bh(&bus->rxctl_lock);
2496         brcmf_sdio_dcmd_resp_wake(bus);
2497 
2498         /* Reset some F2 state stuff */
2499         bus->rxskip = false;
2500         bus->tx_seq = bus->rx_seq = 0;
2501 }
2502 
2503 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2504 {
2505         struct brcmf_sdio_dev *sdiodev;
2506         unsigned long flags;
2507 
2508         sdiodev = bus->sdiodev;
2509         if (sdiodev->oob_irq_requested) {
2510                 spin_lock_irqsave(&sdiodev->irq_en_lock, flags);
2511                 if (!sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2512                         enable_irq(sdiodev->settings->bus.sdio.oob_irq_nr);
2513                         sdiodev->irq_en = true;
2514                 }
2515                 spin_unlock_irqrestore(&sdiodev->irq_en_lock, flags);
2516         }
2517 }
2518 
2519 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2520 {
2521         struct brcmf_core *core = bus->sdio_core;
2522         u32 addr;
2523         unsigned long val;
2524         int ret;
2525 
2526         addr = core->base + SD_REG(intstatus);
2527 
2528         val = brcmf_sdiod_readl(bus->sdiodev, addr, &ret);
2529         bus->sdcnt.f1regdata++;
2530         if (ret != 0)
2531                 return ret;
2532 
2533         val &= bus->hostintmask;
2534         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2535 
2536         /* Clear interrupts */
2537         if (val) {
2538                 brcmf_sdiod_writel(bus->sdiodev, addr, val, &ret);
2539                 bus->sdcnt.f1regdata++;
2540                 atomic_or(val, &bus->intstatus);
2541         }
2542 
2543         return ret;
2544 }
2545 
2546 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2547 {
2548         struct brcmf_sdio_dev *sdiod = bus->sdiodev;
2549         u32 newstatus = 0;
2550         u32 intstat_addr = bus->sdio_core->base + SD_REG(intstatus);
2551         unsigned long intstatus;
2552         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2553         uint framecnt;                  /* Temporary counter of tx/rx frames */
2554         int err = 0;
2555 
2556         brcmf_dbg(SDIO, "Enter\n");
2557 
2558         sdio_claim_host(bus->sdiodev->func1);
2559 
2560         /* If waiting for HTAVAIL, check status */
2561         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2562                 u8 clkctl, devctl = 0;
2563 
2564 #ifdef DEBUG
2565                 /* Check for inconsistent device control */
2566                 devctl = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2567                                            &err);
2568 #endif                          /* DEBUG */
2569 
2570                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2571                 clkctl = brcmf_sdiod_readb(bus->sdiodev,
2572                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2573 
2574                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2575                           devctl, clkctl);
2576 
2577                 if (SBSDIO_HTAV(clkctl)) {
2578                         devctl = brcmf_sdiod_readb(bus->sdiodev,
2579                                                    SBSDIO_DEVICE_CTL, &err);
2580                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2581                         brcmf_sdiod_writeb(bus->sdiodev,
2582                                            SBSDIO_DEVICE_CTL, devctl, &err);
2583                         bus->clkstate = CLK_AVAIL;
2584                 }
2585         }
2586 
2587         /* Make sure backplane clock is on */
2588         brcmf_sdio_bus_sleep(bus, false, true);
2589 
2590         /* Pending interrupt indicates new device status */
2591         if (atomic_read(&bus->ipend) > 0) {
2592                 atomic_set(&bus->ipend, 0);
2593                 err = brcmf_sdio_intr_rstatus(bus);
2594         }
2595 
2596         /* Start with leftover status bits */
2597         intstatus = atomic_xchg(&bus->intstatus, 0);
2598 
2599         /* Handle flow-control change: read new state in case our ack
2600          * crossed another change interrupt.  If change still set, assume
2601          * FC ON for safety, let next loop through do the debounce.
2602          */
2603         if (intstatus & I_HMB_FC_CHANGE) {
2604                 intstatus &= ~I_HMB_FC_CHANGE;
2605                 brcmf_sdiod_writel(sdiod, intstat_addr, I_HMB_FC_CHANGE, &err);
2606 
2607                 newstatus = brcmf_sdiod_readl(sdiod, intstat_addr, &err);
2608 
2609                 bus->sdcnt.f1regdata += 2;
2610                 atomic_set(&bus->fcstate,
2611                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2612                 intstatus |= (newstatus & bus->hostintmask);
2613         }
2614 
2615         /* Handle host mailbox indication */
2616         if (intstatus & I_HMB_HOST_INT) {
2617                 intstatus &= ~I_HMB_HOST_INT;
2618                 intstatus |= brcmf_sdio_hostmail(bus);
2619         }
2620 
2621         sdio_release_host(bus->sdiodev->func1);
2622 
2623         /* Generally don't ask for these, can get CRC errors... */
2624         if (intstatus & I_WR_OOSYNC) {
2625                 brcmf_err("Dongle reports WR_OOSYNC\n");
2626                 intstatus &= ~I_WR_OOSYNC;
2627         }
2628 
2629         if (intstatus & I_RD_OOSYNC) {
2630                 brcmf_err("Dongle reports RD_OOSYNC\n");
2631                 intstatus &= ~I_RD_OOSYNC;
2632         }
2633 
2634         if (intstatus & I_SBINT) {
2635                 brcmf_err("Dongle reports SBINT\n");
2636                 intstatus &= ~I_SBINT;
2637         }
2638 
2639         /* Would be active due to wake-wlan in gSPI */
2640         if (intstatus & I_CHIPACTIVE) {
2641                 brcmf_dbg(SDIO, "Dongle reports CHIPACTIVE\n");
2642                 intstatus &= ~I_CHIPACTIVE;
2643         }
2644 
2645         /* Ignore frame indications if rxskip is set */
2646         if (bus->rxskip)
2647                 intstatus &= ~I_HMB_FRAME_IND;
2648 
2649         /* On frame indication, read available frames */
2650         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2651                 brcmf_sdio_readframes(bus, bus->rxbound);
2652                 if (!bus->rxpending)
2653                         intstatus &= ~I_HMB_FRAME_IND;
2654         }
2655 
2656         /* Keep still-pending events for next scheduling */
2657         if (intstatus)
2658                 atomic_or(intstatus, &bus->intstatus);
2659 
2660         brcmf_sdio_clrintr(bus);
2661 
2662         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2663             data_ok(bus)) {
2664                 sdio_claim_host(bus->sdiodev->func1);
2665                 if (bus->ctrl_frame_stat) {
2666                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2667                                                       bus->ctrl_frame_len);
2668                         bus->ctrl_frame_err = err;
2669                         wmb();
2670                         bus->ctrl_frame_stat = false;
2671                 }
2672                 sdio_release_host(bus->sdiodev->func1);
2673                 brcmf_sdio_wait_event_wakeup(bus);
2674         }
2675         /* Send queued frames (limit 1 if rx may still be pending) */
2676         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2677             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2678             data_ok(bus)) {
2679                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2680                                             txlimit;
2681                 brcmf_sdio_sendfromq(bus, framecnt);
2682         }
2683 
2684         if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2685                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2686                 atomic_set(&bus->intstatus, 0);
2687                 if (bus->ctrl_frame_stat) {
2688                         sdio_claim_host(bus->sdiodev->func1);
2689                         if (bus->ctrl_frame_stat) {
2690                                 bus->ctrl_frame_err = -ENODEV;
2691                                 wmb();
2692                                 bus->ctrl_frame_stat = false;
2693                                 brcmf_sdio_wait_event_wakeup(bus);
2694                         }
2695                         sdio_release_host(bus->sdiodev->func1);
2696                 }
2697         } else if (atomic_read(&bus->intstatus) ||
2698                    atomic_read(&bus->ipend) > 0 ||
2699                    (!atomic_read(&bus->fcstate) &&
2700                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2701                     data_ok(bus))) {
2702                 bus->dpc_triggered = true;
2703         }
2704 }
2705 
2706 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2707 {
2708         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2709         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2710         struct brcmf_sdio *bus = sdiodev->bus;
2711 
2712         return &bus->txq;
2713 }
2714 
2715 static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2716 {
2717         struct sk_buff *p;
2718         int eprec = -1;         /* precedence to evict from */
2719 
2720         /* Fast case, precedence queue is not full and we are also not
2721          * exceeding total queue length
2722          */
2723         if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2724                 brcmu_pktq_penq(q, prec, pkt);
2725                 return true;
2726         }
2727 
2728         /* Determine precedence from which to evict packet, if any */
2729         if (pktq_pfull(q, prec)) {
2730                 eprec = prec;
2731         } else if (pktq_full(q)) {
2732                 p = brcmu_pktq_peek_tail(q, &eprec);
2733                 if (eprec > prec)
2734                         return false;
2735         }
2736 
2737         /* Evict if needed */
2738         if (eprec >= 0) {
2739                 /* Detect queueing to unconfigured precedence */
2740                 if (eprec == prec)
2741                         return false;   /* refuse newer (incoming) packet */
2742                 /* Evict packet according to discard policy */
2743                 p = brcmu_pktq_pdeq_tail(q, eprec);
2744                 if (p == NULL)
2745                         brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2746                 brcmu_pkt_buf_free_skb(p);
2747         }
2748 
2749         /* Enqueue */
2750         p = brcmu_pktq_penq(q, prec, pkt);
2751         if (p == NULL)
2752                 brcmf_err("brcmu_pktq_penq() failed\n");
2753 
2754         return p != NULL;
2755 }
2756 
2757 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2758 {
2759         int ret = -EBADE;
2760         uint prec;
2761         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2762         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2763         struct brcmf_sdio *bus = sdiodev->bus;
2764 
2765         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2766         if (sdiodev->state != BRCMF_SDIOD_DATA)
2767                 return -EIO;
2768 
2769         /* Add space for the header */
2770         skb_push(pkt, bus->tx_hdrlen);
2771         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2772 
2773         prec = prio2prec((pkt->priority & PRIOMASK));
2774 
2775         /* Check for existing queue, current flow-control,
2776                          pending event, or pending clock */
2777         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2778         bus->sdcnt.fcqueued++;
2779 
2780         /* Priority based enq */
2781         spin_lock_bh(&bus->txq_lock);
2782         /* reset bus_flags in packet cb */
2783         *(u16 *)(pkt->cb) = 0;
2784         if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2785                 skb_pull(pkt, bus->tx_hdrlen);
2786                 brcmf_err("out of bus->txq !!!\n");
2787                 ret = -ENOSR;
2788         } else {
2789                 ret = 0;
2790         }
2791 
2792         if (pktq_len(&bus->txq) >= TXHI) {
2793                 bus->txoff = true;
2794                 brcmf_proto_bcdc_txflowblock(dev, true);
2795         }
2796         spin_unlock_bh(&bus->txq_lock);
2797 
2798 #ifdef DEBUG
2799         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2800                 qcount[prec] = pktq_plen(&bus->txq, prec);
2801 #endif
2802 
2803         brcmf_sdio_trigger_dpc(bus);
2804         return ret;
2805 }
2806 
2807 #ifdef DEBUG
2808 #define CONSOLE_LINE_MAX        192
2809 
2810 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2811 {
2812         struct brcmf_console *c = &bus->console;
2813         u8 line[CONSOLE_LINE_MAX], ch;
2814         u32 n, idx, addr;
2815         int rv;
2816 
2817         /* Don't do anything until FWREADY updates console address */
2818         if (bus->console_addr == 0)
2819                 return 0;
2820 
2821         /* Read console log struct */
2822         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2823         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2824                                sizeof(c->log_le));
2825         if (rv < 0)
2826                 return rv;
2827 
2828         /* Allocate console buffer (one time only) */
2829         if (c->buf == NULL) {
2830                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2831                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2832                 if (c->buf == NULL)
2833                         return -ENOMEM;
2834         }
2835 
2836         idx = le32_to_cpu(c->log_le.idx);
2837 
2838         /* Protect against corrupt value */
2839         if (idx > c->bufsize)
2840                 return -EBADE;
2841 
2842         /* Skip reading the console buffer if the index pointer
2843          has not moved */
2844         if (idx == c->last)
2845                 return 0;
2846 
2847         /* Read the console buffer */
2848         addr = le32_to_cpu(c->log_le.buf);
2849         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2850         if (rv < 0)
2851                 return rv;
2852 
2853         while (c->last != idx) {
2854                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2855                         if (c->last == idx) {
2856                                 /* This would output a partial line.
2857                                  * Instead, back up
2858                                  * the buffer pointer and output this
2859                                  * line next time around.
2860                                  */
2861                                 if (c->last >= n)
2862                                         c->last -= n;
2863                                 else
2864                                         c->last = c->bufsize - n;
2865                                 goto break2;
2866                         }
2867                         ch = c->buf[c->last];
2868                         c->last = (c->last + 1) % c->bufsize;
2869                         if (ch == '\n')
2870                                 break;
2871                         line[n] = ch;
2872                 }
2873 
2874                 if (n > 0) {
2875                         if (line[n - 1] == '\r')
2876                                 n--;
2877                         line[n] = 0;
2878                         pr_debug("CONSOLE: %s\n", line);
2879                 }
2880         }
2881 break2:
2882 
2883         return 0;
2884 }
2885 #endif                          /* DEBUG */
2886 
2887 static int
2888 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2889 {
2890         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2891         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2892         struct brcmf_sdio *bus = sdiodev->bus;
2893         int ret;
2894 
2895         brcmf_dbg(TRACE, "Enter\n");
2896         if (sdiodev->state != BRCMF_SDIOD_DATA)
2897                 return -EIO;
2898 
2899         /* Send from dpc */
2900         bus->ctrl_frame_buf = msg;
2901         bus->ctrl_frame_len = msglen;
2902         wmb();
2903         bus->ctrl_frame_stat = true;
2904 
2905         brcmf_sdio_trigger_dpc(bus);
2906         wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2907                                          CTL_DONE_TIMEOUT);
2908         ret = 0;
2909         if (bus->ctrl_frame_stat) {
2910                 sdio_claim_host(bus->sdiodev->func1);
2911                 if (bus->ctrl_frame_stat) {
2912                         brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2913                         bus->ctrl_frame_stat = false;
2914                         ret = -ETIMEDOUT;
2915                 }
2916                 sdio_release_host(bus->sdiodev->func1);
2917         }
2918         if (!ret) {
2919                 brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2920                           bus->ctrl_frame_err);
2921                 rmb();
2922                 ret = bus->ctrl_frame_err;
2923         }
2924 
2925         if (ret)
2926                 bus->sdcnt.tx_ctlerrs++;
2927         else
2928                 bus->sdcnt.tx_ctlpkts++;
2929 
2930         return ret;
2931 }
2932 
2933 #ifdef DEBUG
2934 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2935                                    struct sdpcm_shared *sh)
2936 {
2937         u32 addr, console_ptr, console_size, console_index;
2938         char *conbuf = NULL;
2939         __le32 sh_val;
2940         int rv;
2941 
2942         /* obtain console information from device memory */
2943         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2944         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2945                                (u8 *)&sh_val, sizeof(u32));
2946         if (rv < 0)
2947                 return rv;
2948         console_ptr = le32_to_cpu(sh_val);
2949 
2950         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2951         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2952                                (u8 *)&sh_val, sizeof(u32));
2953         if (rv < 0)
2954                 return rv;
2955         console_size = le32_to_cpu(sh_val);
2956 
2957         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2958         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2959                                (u8 *)&sh_val, sizeof(u32));
2960         if (rv < 0)
2961                 return rv;
2962         console_index = le32_to_cpu(sh_val);
2963 
2964         /* allocate buffer for console data */
2965         if (console_size <= CONSOLE_BUFFER_MAX)
2966                 conbuf = vzalloc(console_size+1);
2967 
2968         if (!conbuf)
2969                 return -ENOMEM;
2970 
2971         /* obtain the console data from device */
2972         conbuf[console_size] = '\0';
2973         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2974                                console_size);
2975         if (rv < 0)
2976                 goto done;
2977 
2978         rv = seq_write(seq, conbuf + console_index,
2979                        console_size - console_index);
2980         if (rv < 0)
2981                 goto done;
2982 
2983         if (console_index > 0)
2984                 rv = seq_write(seq, conbuf, console_index - 1);
2985 
2986 done:
2987         vfree(conbuf);
2988         return rv;
2989 }
2990 
2991 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
2992                                 struct sdpcm_shared *sh)
2993 {
2994         int error;
2995         struct brcmf_trap_info tr;
2996 
2997         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2998                 brcmf_dbg(INFO, "no trap in firmware\n");
2999                 return 0;
3000         }
3001 
3002         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
3003                                   sizeof(struct brcmf_trap_info));
3004         if (error < 0)
3005                 return error;
3006 
3007         if (seq)
3008                 seq_printf(seq,
3009                            "dongle trap info: type 0x%x @ epc 0x%08x\n"
3010                            "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3011                            "  lr   0x%08x pc   0x%08x offset 0x%x\n"
3012                            "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
3013                            "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3014                            le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3015                            le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3016                            le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3017                            le32_to_cpu(tr.pc), sh->trap_addr,
3018                            le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3019                            le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3020                            le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3021                            le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3022         else
3023                 pr_debug("dongle trap info: type 0x%x @ epc 0x%08x\n"
3024                          "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3025                          "  lr   0x%08x pc   0x%08x offset 0x%x\n"
3026                          "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
3027                          "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
3028                          le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3029                          le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3030                          le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3031                          le32_to_cpu(tr.pc), sh->trap_addr,
3032                          le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3033                          le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3034                          le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3035                          le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3036         return 0;
3037 }
3038 
3039 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
3040                                   struct sdpcm_shared *sh)
3041 {
3042         int error = 0;
3043         char file[80] = "?";
3044         char expr[80] = "<???>";
3045 
3046         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3047                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3048                 return 0;
3049         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3050                 brcmf_dbg(INFO, "no assert in dongle\n");
3051                 return 0;
3052         }
3053 
3054         sdio_claim_host(bus->sdiodev->func1);
3055         if (sh->assert_file_addr != 0) {
3056                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3057                                           sh->assert_file_addr, (u8 *)file, 80);
3058                 if (error < 0)
3059                         return error;
3060         }
3061         if (sh->assert_exp_addr != 0) {
3062                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3063                                           sh->assert_exp_addr, (u8 *)expr, 80);
3064                 if (error < 0)
3065                         return error;
3066         }
3067         sdio_release_host(bus->sdiodev->func1);
3068 
3069         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3070                    file, sh->assert_line, expr);
3071         return 0;
3072 }
3073 
3074 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3075 {
3076         int error;
3077         struct sdpcm_shared sh;
3078 
3079         error = brcmf_sdio_readshared(bus, &sh);
3080 
3081         if (error < 0)
3082                 return error;
3083 
3084         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3085                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3086         else if (sh.flags & SDPCM_SHARED_ASSERT)
3087                 brcmf_err("assertion in dongle\n");
3088 
3089         if (sh.flags & SDPCM_SHARED_TRAP) {
3090                 brcmf_err("firmware trap in dongle\n");
3091                 brcmf_sdio_trap_info(NULL, bus, &sh);
3092         }
3093 
3094         return 0;
3095 }
3096 
3097 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3098 {
3099         int error = 0;
3100         struct sdpcm_shared sh;
3101 
3102         error = brcmf_sdio_readshared(bus, &sh);
3103         if (error < 0)
3104                 goto done;
3105 
3106         error = brcmf_sdio_assert_info(seq, bus, &sh);
3107         if (error < 0)
3108                 goto done;
3109 
3110         error = brcmf_sdio_trap_info(seq, bus, &sh);
3111         if (error < 0)
3112                 goto done;
3113 
3114         error = brcmf_sdio_dump_console(seq, bus, &sh);
3115 
3116 done:
3117         return error;
3118 }
3119 
3120 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3121 {
3122         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3123         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3124 
3125         return brcmf_sdio_died_dump(seq, bus);
3126 }
3127 
3128 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3129 {
3130         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3131         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3132         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3133 
3134         seq_printf(seq,
3135                    "intrcount:    %u\nlastintrs:    %u\n"
3136                    "pollcnt:      %u\nregfails:     %u\n"
3137                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3138                    "rxrtx:        %u\nrx_toolong:   %u\n"
3139                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3140                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3141                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3142                    "fc_xon:       %u\nrxglomfail:   %u\n"
3143                    "rxglomframes: %u\nrxglompkts:   %u\n"
3144                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3145                    "f2txdata:     %u\nf1regdata:    %u\n"
3146                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3147                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3148                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3149                    sdcnt->intrcount, sdcnt->lastintrs,
3150                    sdcnt->pollcnt, sdcnt->regfails,
3151                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3152                    sdcnt->rxrtx, sdcnt->rx_toolong,
3153                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3154                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3155                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3156                    sdcnt->fc_xon, sdcnt->rxglomfail,
3157                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3158                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3159                    sdcnt->f2txdata, sdcnt->f1regdata,
3160                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3161                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3162                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3163 
3164         return 0;
3165 }
3166 
3167 static void brcmf_sdio_debugfs_create(struct device *dev)
3168 {
3169         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3170         struct brcmf_pub *drvr = bus_if->drvr;
3171         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3172         struct brcmf_sdio *bus = sdiodev->bus;
3173         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3174 
3175         if (IS_ERR_OR_NULL(dentry))
3176                 return;
3177 
3178         bus->console_interval = BRCMF_CONSOLE;
3179 
3180         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3181         brcmf_debugfs_add_entry(drvr, "counters",
3182                                 brcmf_debugfs_sdio_count_read);
3183         debugfs_create_u32("console_interval", 0644, dentry,
3184                            &bus->console_interval);
3185 }
3186 #else
3187 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3188 {
3189         return 0;
3190 }
3191 
3192 static void brcmf_sdio_debugfs_create(struct device *dev)
3193 {
3194 }
3195 #endif /* DEBUG */
3196 
3197 static int
3198 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3199 {
3200         int timeleft;
3201         uint rxlen = 0;
3202         bool pending;
3203         u8 *buf;
3204         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3205         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3206         struct brcmf_sdio *bus = sdiodev->bus;
3207 
3208         brcmf_dbg(TRACE, "Enter\n");
3209         if (sdiodev->state != BRCMF_SDIOD_DATA)
3210                 return -EIO;
3211 
3212         /* Wait until control frame is available */
3213         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3214 
3215         spin_lock_bh(&bus->rxctl_lock);
3216         rxlen = bus->rxlen;
3217         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3218         bus->rxctl = NULL;
3219         buf = bus->rxctl_orig;
3220         bus->rxctl_orig = NULL;
3221         bus->rxlen = 0;
3222         spin_unlock_bh(&bus->rxctl_lock);
3223         vfree(buf);
3224 
3225         if (rxlen) {
3226                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3227                           rxlen, msglen);
3228         } else if (timeleft == 0) {
3229                 brcmf_err("resumed on timeout\n");
3230                 brcmf_sdio_checkdied(bus);
3231         } else if (pending) {
3232                 brcmf_dbg(CTL, "cancelled\n");
3233                 return -ERESTARTSYS;
3234         } else {
3235                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3236                 brcmf_sdio_checkdied(bus);
3237         }
3238 
3239         if (rxlen)
3240                 bus->sdcnt.rx_ctlpkts++;
3241         else
3242                 bus->sdcnt.rx_ctlerrs++;
3243 
3244         return rxlen ? (int)rxlen : -ETIMEDOUT;
3245 }
3246 
3247 #ifdef DEBUG
3248 static bool
3249 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3250                         u8 *ram_data, uint ram_sz)
3251 {
3252         char *ram_cmp;
3253         int err;
3254         bool ret = true;
3255         int address;
3256         int offset;
3257         int len;
3258 
3259         /* read back and verify */
3260         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3261                   ram_sz);
3262         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3263         /* do not proceed while no memory but  */
3264         if (!ram_cmp)
3265                 return true;
3266 
3267         address = ram_addr;
3268         offset = 0;
3269         while (offset < ram_sz) {
3270                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3271                       ram_sz - offset;
3272                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3273                 if (err) {
3274                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3275                                   err, len, address);
3276                         ret = false;
3277                         break;
3278                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3279                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3280                                   offset, len);
3281                         ret = false;
3282                         break;
3283                 }
3284                 offset += len;
3285                 address += len;
3286         }
3287 
3288         kfree(ram_cmp);
3289 
3290         return ret;
3291 }
3292 #else   /* DEBUG */
3293 static bool
3294 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3295                         u8 *ram_data, uint ram_sz)
3296 {
3297         return true;
3298 }
3299 #endif  /* DEBUG */
3300 
3301 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3302                                          const struct firmware *fw)
3303 {
3304         int err;
3305 
3306         brcmf_dbg(TRACE, "Enter\n");
3307 
3308         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3309                                 (u8 *)fw->data, fw->size);
3310         if (err)
3311                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3312                           err, (int)fw->size, bus->ci->rambase);
3313         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3314                                           (u8 *)fw->data, fw->size))
3315                 err = -EIO;
3316 
3317         return err;
3318 }
3319 
3320 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3321                                      void *vars, u32 varsz)
3322 {
3323         int address;
3324         int err;
3325 
3326         brcmf_dbg(TRACE, "Enter\n");
3327 
3328         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3329         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3330         if (err)
3331                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3332                           err, varsz, address);
3333         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3334                 err = -EIO;
3335 
3336         return err;
3337 }
3338 
3339 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3340                                         const struct firmware *fw,
3341                                         void *nvram, u32 nvlen)
3342 {
3343         int bcmerror;
3344         u32 rstvec;
3345 
3346         sdio_claim_host(bus->sdiodev->func1);
3347         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3348 
3349         rstvec = get_unaligned_le32(fw->data);
3350         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3351 
3352         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3353         release_firmware(fw);
3354         if (bcmerror) {
3355                 brcmf_err("dongle image file download failed\n");
3356                 brcmf_fw_nvram_free(nvram);
3357                 goto err;
3358         }
3359 
3360         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3361         brcmf_fw_nvram_free(nvram);
3362         if (bcmerror) {
3363                 brcmf_err("dongle nvram file download failed\n");
3364                 goto err;
3365         }
3366 
3367         /* Take arm out of reset */
3368         if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3369                 brcmf_err("error getting out of ARM core reset\n");
3370                 goto err;
3371         }
3372 
3373 err:
3374         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3375         sdio_release_host(bus->sdiodev->func1);
3376         return bcmerror;
3377 }
3378 
3379 static bool brcmf_sdio_aos_no_decode(struct brcmf_sdio *bus)
3380 {
3381         if (bus->ci->chip == CY_CC_43012_CHIP_ID)
3382                 return true;
3383         else
3384                 return false;
3385 }
3386 
3387 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3388 {
3389         int err = 0;
3390         u8 val;
3391         u8 wakeupctrl;
3392         u8 cardcap;
3393         u8 chipclkcsr;
3394 
3395         brcmf_dbg(TRACE, "Enter\n");
3396 
3397         if (brcmf_chip_is_ulp(bus->ci)) {
3398                 wakeupctrl = SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT;
3399                 chipclkcsr = SBSDIO_HT_AVAIL_REQ;
3400         } else {
3401                 wakeupctrl = SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3402                 chipclkcsr = SBSDIO_FORCE_HT;
3403         }
3404 
3405         if (brcmf_sdio_aos_no_decode(bus)) {
3406                 cardcap = SDIO_CCCR_BRCM_CARDCAP_CMD_NODEC;
3407         } else {
3408                 cardcap = (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3409                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT);
3410         }
3411 
3412         val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3413         if (err) {
3414                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3415                 return;
3416         }
3417         val |= 1 << wakeupctrl;
3418         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3419         if (err) {
3420                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3421                 return;
3422         }
3423 
3424         /* Add CMD14 Support */
3425         brcmf_sdiod_func0_wb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3426                              cardcap,
3427                              &err);
3428         if (err) {
3429                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3430                 return;
3431         }
3432 
3433         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3434                            chipclkcsr, &err);
3435         if (err) {
3436                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3437                 return;
3438         }
3439 
3440         /* set flag */
3441         bus->sr_enabled = true;
3442         brcmf_dbg(INFO, "SR enabled\n");
3443 }
3444 
3445 /* enable KSO bit */
3446 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3447 {
3448         struct brcmf_core *core = bus->sdio_core;
3449         u8 val;
3450         int err = 0;
3451 
3452         brcmf_dbg(TRACE, "Enter\n");
3453 
3454         /* KSO bit added in SDIO core rev 12 */
3455         if (core->rev < 12)
3456                 return 0;
3457 
3458         val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3459         if (err) {
3460                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3461                 return err;
3462         }
3463 
3464         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3465                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3466                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3467                 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3468                                    val, &err);
3469                 if (err) {
3470                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3471                         return err;
3472                 }
3473         }
3474 
3475         return 0;
3476 }
3477 
3478 
3479 static int brcmf_sdio_bus_preinit(struct device *dev)
3480 {
3481         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3482         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3483         struct brcmf_sdio *bus = sdiodev->bus;
3484         struct brcmf_core *core = bus->sdio_core;
3485         u32 value;
3486         int err;
3487 
3488         /* maxctl provided by common layer */
3489         if (WARN_ON(!bus_if->maxctl))
3490                 return -EINVAL;
3491 
3492         /* Allocate control receive buffer */
3493         bus_if->maxctl += bus->roundup;
3494         value = roundup((bus_if->maxctl + SDPCM_HDRLEN), ALIGNMENT);
3495         value += bus->head_align;
3496         bus->rxbuf = kmalloc(value, GFP_ATOMIC);
3497         if (bus->rxbuf)
3498                 bus->rxblen = value;
3499 
3500         /* the commands below use the terms tx and rx from
3501          * a device perspective, ie. bus:txglom affects the
3502          * bus transfers from device to host.
3503          */
3504         if (core->rev < 12) {
3505                 /* for sdio core rev < 12, disable txgloming */
3506                 value = 0;
3507                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3508                                            sizeof(u32));
3509         } else {
3510                 /* otherwise, set txglomalign */
3511                 value = sdiodev->settings->bus.sdio.sd_sgentry_align;
3512                 /* SDIO ADMA requires at least 32 bit alignment */
3513                 value = max_t(u32, value, ALIGNMENT);
3514                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3515                                            sizeof(u32));
3516         }
3517 
3518         if (err < 0)
3519                 goto done;
3520 
3521         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3522         if (sdiodev->sg_support) {
3523                 bus->txglom = false;
3524                 value = 1;
3525                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3526                                            &value, sizeof(u32));
3527                 if (err < 0) {
3528                         /* bus:rxglom is allowed to fail */
3529                         err = 0;
3530                 } else {
3531                         bus->txglom = true;
3532                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3533                 }
3534         }
3535         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3536 
3537 done:
3538         return err;
3539 }
3540 
3541 static size_t brcmf_sdio_bus_get_ramsize(struct device *dev)
3542 {
3543         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3544         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3545         struct brcmf_sdio *bus = sdiodev->bus;
3546 
3547         return bus->ci->ramsize - bus->ci->srsize;
3548 }
3549 
3550 static int brcmf_sdio_bus_get_memdump(struct device *dev, void *data,
3551                                       size_t mem_size)
3552 {
3553         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3554         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3555         struct brcmf_sdio *bus = sdiodev->bus;
3556         int err;
3557         int address;
3558         int offset;
3559         int len;
3560 
3561         brcmf_dbg(INFO, "dump at 0x%08x: size=%zu\n", bus->ci->rambase,
3562                   mem_size);
3563 
3564         address = bus->ci->rambase;
3565         offset = err = 0;
3566         sdio_claim_host(sdiodev->func1);
3567         while (offset < mem_size) {
3568                 len = ((offset + MEMBLOCK) < mem_size) ? MEMBLOCK :
3569                       mem_size - offset;
3570                 err = brcmf_sdiod_ramrw(sdiodev, false, address, data, len);
3571                 if (err) {
3572                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3573                                   err, len, address);
3574                         goto done;
3575                 }
3576                 data += len;
3577                 offset += len;
3578                 address += len;
3579         }
3580 
3581 done:
3582         sdio_release_host(sdiodev->func1);
3583         return err;
3584 }
3585 
3586 void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3587 {
3588         if (!bus->dpc_triggered) {
3589                 bus->dpc_triggered = true;
3590                 queue_work(bus->brcmf_wq, &bus->datawork);
3591         }
3592 }
3593 
3594 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3595 {
3596         brcmf_dbg(TRACE, "Enter\n");
3597 
3598         if (!bus) {
3599                 brcmf_err("bus is null pointer, exiting\n");
3600                 return;
3601         }
3602 
3603         /* Count the interrupt call */
3604         bus->sdcnt.intrcount++;
3605         if (in_interrupt())
3606                 atomic_set(&bus->ipend, 1);
3607         else
3608                 if (brcmf_sdio_intr_rstatus(bus)) {
3609                         brcmf_err("failed backplane access\n");
3610                 }
3611 
3612         /* Disable additional interrupts (is this needed now)? */
3613         if (!bus->intr)
3614                 brcmf_err("isr w/o interrupt configured!\n");
3615 
3616         bus->dpc_triggered = true;
3617         queue_work(bus->brcmf_wq, &bus->datawork);
3618 }
3619 
3620 static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3621 {
3622         brcmf_dbg(TIMER, "Enter\n");
3623 
3624         /* Poll period: check device if appropriate. */
3625         if (!bus->sr_enabled &&
3626             bus->poll && (++bus->polltick >= bus->pollrate)) {
3627                 u32 intstatus = 0;
3628 
3629                 /* Reset poll tick */
3630                 bus->polltick = 0;
3631 
3632                 /* Check device if no interrupts */
3633                 if (!bus->intr ||
3634                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3635 
3636                         if (!bus->dpc_triggered) {
3637                                 u8 devpend;
3638 
3639                                 sdio_claim_host(bus->sdiodev->func1);
3640                                 devpend = brcmf_sdiod_func0_rb(bus->sdiodev,
3641                                                   SDIO_CCCR_INTx, NULL);
3642                                 sdio_release_host(bus->sdiodev->func1);
3643                                 intstatus = devpend & (INTR_STATUS_FUNC1 |
3644                                                        INTR_STATUS_FUNC2);
3645                         }
3646 
3647                         /* If there is something, make like the ISR and
3648                                  schedule the DPC */
3649                         if (intstatus) {
3650                                 bus->sdcnt.pollcnt++;
3651                                 atomic_set(&bus->ipend, 1);
3652 
3653                                 bus->dpc_triggered = true;
3654                                 queue_work(bus->brcmf_wq, &bus->datawork);
3655                         }
3656                 }
3657 
3658                 /* Update interrupt tracking */
3659                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3660         }
3661 #ifdef DEBUG
3662         /* Poll for console output periodically */
3663         if (bus->sdiodev->state == BRCMF_SDIOD_DATA && BRCMF_FWCON_ON() &&
3664             bus->console_interval != 0) {
3665                 bus->console.count += jiffies_to_msecs(BRCMF_WD_POLL);
3666                 if (bus->console.count >= bus->console_interval) {
3667                         bus->console.count -= bus->console_interval;
3668                         sdio_claim_host(bus->sdiodev->func1);
3669                         /* Make sure backplane clock is on */
3670                         brcmf_sdio_bus_sleep(bus, false, false);
3671                         if (brcmf_sdio_readconsole(bus) < 0)
3672                                 /* stop on error */
3673                                 bus->console_interval = 0;
3674                         sdio_release_host(bus->sdiodev->func1);
3675                 }
3676         }
3677 #endif                          /* DEBUG */
3678 
3679         /* On idle timeout clear activity flag and/or turn off clock */
3680         if (!bus->dpc_triggered) {
3681                 rmb();
3682                 if ((!bus->dpc_running) && (bus->idletime > 0) &&
3683                     (bus->clkstate == CLK_AVAIL)) {
3684                         bus->idlecount++;
3685                         if (bus->idlecount > bus->idletime) {
3686                                 brcmf_dbg(SDIO, "idle\n");
3687                                 sdio_claim_host(bus->sdiodev->func1);
3688                                 brcmf_sdio_wd_timer(bus, false);
3689                                 bus->idlecount = 0;
3690                                 brcmf_sdio_bus_sleep(bus, true, false);
3691                                 sdio_release_host(bus->sdiodev->func1);
3692                         }
3693                 } else {
3694                         bus->idlecount = 0;
3695                 }
3696         } else {
3697                 bus->idlecount = 0;
3698         }
3699 }
3700 
3701 static void brcmf_sdio_dataworker(struct work_struct *work)
3702 {
3703         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3704                                               datawork);
3705 
3706         bus->dpc_running = true;
3707         wmb();
3708         while (READ_ONCE(bus->dpc_triggered)) {
3709                 bus->dpc_triggered = false;
3710                 brcmf_sdio_dpc(bus);
3711                 bus->idlecount = 0;
3712         }
3713         bus->dpc_running = false;
3714         if (brcmf_sdiod_freezing(bus->sdiodev)) {
3715                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3716                 brcmf_sdiod_try_freeze(bus->sdiodev);
3717                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3718         }
3719 }
3720 
3721 static void
3722 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3723                              struct brcmf_chip *ci, u32 drivestrength)
3724 {
3725         const struct sdiod_drive_str *str_tab = NULL;
3726         u32 str_mask;
3727         u32 str_shift;
3728         u32 i;
3729         u32 drivestrength_sel = 0;
3730         u32 cc_data_temp;
3731         u32 addr;
3732 
3733         if (!(ci->cc_caps & CC_CAP_PMU))
3734                 return;
3735 
3736         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3737         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3738                 str_tab = sdiod_drvstr_tab1_1v8;
3739                 str_mask = 0x00003800;
3740                 str_shift = 11;
3741                 break;
3742         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3743                 str_tab = sdiod_drvstr_tab6_1v8;
3744                 str_mask = 0x00001800;
3745                 str_shift = 11;
3746                 break;
3747         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3748                 /* note: 43143 does not support tristate */
3749                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3750                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3751                         str_tab = sdiod_drvstr_tab2_3v3;
3752                         str_mask = 0x00000007;
3753                         str_shift = 0;
3754                 } else
3755                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3756                                   ci->name, drivestrength);
3757                 break;
3758         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3759                 str_tab = sdiod_drive_strength_tab5_1v8;
3760                 str_mask = 0x00003800;
3761                 str_shift = 11;
3762                 break;
3763         default:
3764                 brcmf_dbg(INFO, "No SDIO driver strength init needed for chip %s rev %d pmurev %d\n",
3765                           ci->name, ci->chiprev, ci->pmurev);
3766                 break;
3767         }
3768 
3769         if (str_tab != NULL) {
3770                 struct brcmf_core *pmu = brcmf_chip_get_pmu(ci);
3771 
3772                 for (i = 0; str_tab[i].strength != 0; i++) {
3773                         if (drivestrength >= str_tab[i].strength) {
3774                                 drivestrength_sel = str_tab[i].sel;
3775                                 break;
3776                         }
3777                 }
3778                 addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
3779                 brcmf_sdiod_writel(sdiodev, addr, 1, NULL);
3780                 cc_data_temp = brcmf_sdiod_readl(sdiodev, addr, NULL);
3781                 cc_data_temp &= ~str_mask;
3782                 drivestrength_sel <<= str_shift;
3783                 cc_data_temp |= drivestrength_sel;
3784                 brcmf_sdiod_writel(sdiodev, addr, cc_data_temp, NULL);
3785 
3786                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3787                           str_tab[i].strength, drivestrength, cc_data_temp);
3788         }
3789 }
3790 
3791 static int brcmf_sdio_buscoreprep(void *ctx)
3792 {
3793         struct brcmf_sdio_dev *sdiodev = ctx;
3794         int err = 0;
3795         u8 clkval, clkset;
3796 
3797         /* Try forcing SDIO core to do ALPAvail request only */
3798         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3799         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3800         if (err) {
3801                 brcmf_err("error writing for HT off\n");
3802                 return err;
3803         }
3804 
3805         /* If register supported, wait for ALPAvail and then force ALP */
3806         /* This may take up to 15 milliseconds */
3807         clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3808 
3809         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3810                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3811                           clkset, clkval);
3812                 return -EACCES;
3813         }
3814 
3815         SPINWAIT(((clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3816                                               NULL)),
3817                  !SBSDIO_ALPAV(clkval)),
3818                  PMU_MAX_TRANSITION_DLY);
3819 
3820         if (!SBSDIO_ALPAV(clkval)) {
3821                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3822                           clkval);
3823                 return -EBUSY;
3824         }
3825 
3826         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3827         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3828         udelay(65);
3829 
3830         /* Also, disable the extra SDIO pull-ups */
3831         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3832 
3833         return 0;
3834 }
3835 
3836 static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3837                                         u32 rstvec)
3838 {
3839         struct brcmf_sdio_dev *sdiodev = ctx;
3840         struct brcmf_core *core = sdiodev->bus->sdio_core;
3841         u32 reg_addr;
3842 
3843         /* clear all interrupts */
3844         reg_addr = core->base + SD_REG(intstatus);
3845         brcmf_sdiod_writel(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3846 
3847         if (rstvec)
3848                 /* Write reset vector to address 0 */
3849                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3850                                   sizeof(rstvec));
3851 }
3852 
3853 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3854 {
3855         struct brcmf_sdio_dev *sdiodev = ctx;
3856         u32 val, rev;
3857 
3858         val = brcmf_sdiod_readl(sdiodev, addr, NULL);
3859 
3860         /*
3861          * this is a bit of special handling if reading the chipcommon chipid
3862          * register. The 4339 is a next-gen of the 4335. It uses the same
3863          * SDIO device id as 4335 and the chipid register returns 4335 as well.
3864          * It can be identified as 4339 by looking at the chip revision. It
3865          * is corrected here so the chip.c module has the right info.
3866          */
3867         if (addr == CORE_CC_REG(SI_ENUM_BASE, chipid) &&
3868             (sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4339 ||
3869              sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4335_4339)) {
3870                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3871                 if (rev >= 2) {
3872                         val &= ~CID_ID_MASK;
3873                         val |= BRCM_CC_4339_CHIP_ID;
3874                 }
3875         }
3876 
3877         return val;
3878 }
3879 
3880 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3881 {
3882         struct brcmf_sdio_dev *sdiodev = ctx;
3883 
3884         brcmf_sdiod_writel(sdiodev, addr, val, NULL);
3885 }
3886 
3887 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3888         .prepare = brcmf_sdio_buscoreprep,
3889         .activate = brcmf_sdio_buscore_activate,
3890         .read32 = brcmf_sdio_buscore_read32,
3891         .write32 = brcmf_sdio_buscore_write32,
3892 };
3893 
3894 static bool
3895 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3896 {
3897         struct brcmf_sdio_dev *sdiodev;
3898         u8 clkctl = 0;
3899         int err = 0;
3900         int reg_addr;
3901         u32 reg_val;
3902         u32 drivestrength;
3903 
3904         sdiodev = bus->sdiodev;
3905         sdio_claim_host(sdiodev->func1);
3906 
3907         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3908                  brcmf_sdiod_readl(sdiodev, SI_ENUM_BASE, NULL));
3909 
3910         /*
3911          * Force PLL off until brcmf_chip_attach()
3912          * programs PLL control regs
3913          */
3914 
3915         brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, BRCMF_INIT_CLKCTL1,
3916                            &err);
3917         if (!err)
3918                 clkctl = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3919                                            &err);
3920 
3921         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3922                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3923                           err, BRCMF_INIT_CLKCTL1, clkctl);
3924                 goto fail;
3925         }
3926 
3927         bus->ci = brcmf_chip_attach(sdiodev, &brcmf_sdio_buscore_ops);
3928         if (IS_ERR(bus->ci)) {
3929                 brcmf_err("brcmf_chip_attach failed!\n");
3930                 bus->ci = NULL;
3931                 goto fail;
3932         }
3933 
3934         /* Pick up the SDIO core info struct from chip.c */
3935         bus->sdio_core   = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
3936         if (!bus->sdio_core)
3937                 goto fail;
3938 
3939         /* Pick up the CHIPCOMMON core info struct, for bulk IO in bcmsdh.c */
3940         sdiodev->cc_core = brcmf_chip_get_core(bus->ci, BCMA_CORE_CHIPCOMMON);
3941         if (!sdiodev->cc_core)
3942                 goto fail;
3943 
3944         sdiodev->settings = brcmf_get_module_param(sdiodev->dev,
3945                                                    BRCMF_BUSTYPE_SDIO,
3946                                                    bus->ci->chip,
3947                                                    bus->ci->chiprev);
3948         if (!sdiodev->settings) {
3949                 brcmf_err("Failed to get device parameters\n");
3950                 goto fail;
3951         }
3952         /* platform specific configuration:
3953          *   alignments must be at least 4 bytes for ADMA
3954          */
3955         bus->head_align = ALIGNMENT;
3956         bus->sgentry_align = ALIGNMENT;
3957         if (sdiodev->settings->bus.sdio.sd_head_align > ALIGNMENT)
3958                 bus->head_align = sdiodev->settings->bus.sdio.sd_head_align;
3959         if (sdiodev->settings->bus.sdio.sd_sgentry_align > ALIGNMENT)
3960                 bus->sgentry_align =
3961                                 sdiodev->settings->bus.sdio.sd_sgentry_align;
3962 
3963         /* allocate scatter-gather table. sg support
3964          * will be disabled upon allocation failure.
3965          */
3966         brcmf_sdiod_sgtable_alloc(sdiodev);
3967 
3968 #ifdef CONFIG_PM_SLEEP
3969         /* wowl can be supported when KEEP_POWER is true and (WAKE_SDIO_IRQ
3970          * is true or when platform data OOB irq is true).
3971          */
3972         if ((sdio_get_host_pm_caps(sdiodev->func1) & MMC_PM_KEEP_POWER) &&
3973             ((sdio_get_host_pm_caps(sdiodev->func1) & MMC_PM_WAKE_SDIO_IRQ) ||
3974              (sdiodev->settings->bus.sdio.oob_irq_supported)))
3975                 sdiodev->bus_if->wowl_supported = true;
3976 #endif
3977 
3978         if (brcmf_sdio_kso_init(bus)) {
3979                 brcmf_err("error enabling KSO\n");
3980                 goto fail;
3981         }
3982 
3983         if (sdiodev->settings->bus.sdio.drive_strength)
3984                 drivestrength = sdiodev->settings->bus.sdio.drive_strength;
3985         else
3986                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3987         brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
3988 
3989         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3990         reg_val = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
3991         if (err)
3992                 goto fail;
3993 
3994         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3995 
3996         brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3997         if (err)
3998                 goto fail;
3999 
4000         /* set PMUControl so a backplane reset does PMU state reload */
4001         reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
4002         reg_val = brcmf_sdiod_readl(sdiodev, reg_addr, &err);
4003         if (err)
4004                 goto fail;
4005 
4006         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
4007 
4008         brcmf_sdiod_writel(sdiodev, reg_addr, reg_val, &err);
4009         if (err)
4010                 goto fail;
4011 
4012         sdio_release_host(sdiodev->func1);
4013 
4014         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
4015 
4016         /* allocate header buffer */
4017         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
4018         if (!bus->hdrbuf)
4019                 return false;
4020         /* Locate an appropriately-aligned portion of hdrbuf */
4021         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
4022                                     bus->head_align);
4023 
4024         /* Set the poll and/or interrupt flags */
4025         bus->intr = true;
4026         bus->poll = false;
4027         if (bus->poll)
4028                 bus->pollrate = 1;
4029 
4030         return true;
4031 
4032 fail:
4033         sdio_release_host(sdiodev->func1);
4034         return false;
4035 }
4036 
4037 static int
4038 brcmf_sdio_watchdog_thread(void *data)
4039 {
4040         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
4041         int wait;
4042 
4043         allow_signal(SIGTERM);
4044         /* Run until signal received */
4045         brcmf_sdiod_freezer_count(bus->sdiodev);
4046         while (1) {
4047                 if (kthread_should_stop())
4048                         break;
4049                 brcmf_sdiod_freezer_uncount(bus->sdiodev);
4050                 wait = wait_for_completion_interruptible(&bus->watchdog_wait);
4051                 brcmf_sdiod_freezer_count(bus->sdiodev);
4052                 brcmf_sdiod_try_freeze(bus->sdiodev);
4053                 if (!wait) {
4054                         brcmf_sdio_bus_watchdog(bus);
4055                         /* Count the tick for reference */
4056                         bus->sdcnt.tickcnt++;
4057                         reinit_completion(&bus->watchdog_wait);
4058                 } else
4059                         break;
4060         }
4061         return 0;
4062 }
4063 
4064 static void
4065 brcmf_sdio_watchdog(struct timer_list *t)
4066 {
4067         struct brcmf_sdio *bus = from_timer(bus, t, timer);
4068 
4069         if (bus->watchdog_tsk) {
4070                 complete(&bus->watchdog_wait);
4071                 /* Reschedule the watchdog */
4072                 if (bus->wd_active)
4073                         mod_timer(&bus->timer,
4074                                   jiffies + BRCMF_WD_POLL);
4075         }
4076 }
4077 
4078 static
4079 int brcmf_sdio_get_fwname(struct device *dev, const char *ext, u8 *fw_name)
4080 {
4081         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4082         struct brcmf_fw_request *fwreq;
4083         struct brcmf_fw_name fwnames[] = {
4084                 { ext, fw_name },
4085         };
4086 
4087         fwreq = brcmf_fw_alloc_request(bus_if->chip, bus_if->chiprev,
4088                                        brcmf_sdio_fwnames,
4089                                        ARRAY_SIZE(brcmf_sdio_fwnames),
4090                                        fwnames, ARRAY_SIZE(fwnames));
4091         if (!fwreq)
4092                 return -ENOMEM;
4093 
4094         kfree(fwreq);
4095         return 0;
4096 }
4097 
4098 static const struct brcmf_bus_ops brcmf_sdio_bus_ops = {
4099         .stop = brcmf_sdio_bus_stop,
4100         .preinit = brcmf_sdio_bus_preinit,
4101         .txdata = brcmf_sdio_bus_txdata,
4102         .txctl = brcmf_sdio_bus_txctl,
4103         .rxctl = brcmf_sdio_bus_rxctl,
4104         .gettxq = brcmf_sdio_bus_gettxq,
4105         .wowl_config = brcmf_sdio_wowl_config,
4106         .get_ramsize = brcmf_sdio_bus_get_ramsize,
4107         .get_memdump = brcmf_sdio_bus_get_memdump,
4108         .get_fwname = brcmf_sdio_get_fwname,
4109         .debugfs_create = brcmf_sdio_debugfs_create
4110 };
4111 
4112 #define BRCMF_SDIO_FW_CODE      0
4113 #define BRCMF_SDIO_FW_NVRAM     1
4114 
4115 static void brcmf_sdio_firmware_callback(struct device *dev, int err,
4116                                          struct brcmf_fw_request *fwreq)
4117 {
4118         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4119         struct brcmf_sdio_dev *sdiod = bus_if->bus_priv.sdio;
4120         struct brcmf_sdio *bus = sdiod->bus;
4121         struct brcmf_core *core = bus->sdio_core;
4122         const struct firmware *code;
4123         void *nvram;
4124         u32 nvram_len;
4125         u8 saveclk, bpreq;
4126         u8 devctl;
4127 
4128         brcmf_dbg(TRACE, "Enter: dev=%s, err=%d\n", dev_name(dev), err);
4129 
4130         if (err)
4131                 goto fail;
4132 
4133         code = fwreq->items[BRCMF_SDIO_FW_CODE].binary;
4134         nvram = fwreq->items[BRCMF_SDIO_FW_NVRAM].nv_data.data;
4135         nvram_len = fwreq->items[BRCMF_SDIO_FW_NVRAM].nv_data.len;
4136         kfree(fwreq);
4137 
4138         /* try to download image and nvram to the dongle */
4139         bus->alp_only = true;
4140         err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
4141         if (err)
4142                 goto fail;
4143         bus->alp_only = false;
4144 
4145         /* Start the watchdog timer */
4146         bus->sdcnt.tickcnt = 0;
4147         brcmf_sdio_wd_timer(bus, true);
4148 
4149         sdio_claim_host(sdiod->func1);
4150 
4151         /* Make sure backplane clock is on, needed to generate F2 interrupt */
4152         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4153         if (bus->clkstate != CLK_AVAIL)
4154                 goto release;
4155 
4156         /* Force clocks on backplane to be sure F2 interrupt propagates */
4157         saveclk = brcmf_sdiod_readb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4158         if (!err) {
4159                 bpreq = saveclk;
4160                 bpreq |= brcmf_chip_is_ulp(bus->ci) ?
4161                         SBSDIO_HT_AVAIL_REQ : SBSDIO_FORCE_HT;
4162                 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR,
4163                                    bpreq, &err);
4164         }
4165         if (err) {
4166                 brcmf_err("Failed to force clock for F2: err %d\n", err);
4167                 goto release;
4168         }
4169 
4170         /* Enable function 2 (frame transfers) */
4171         brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailboxdata),
4172                            SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT, NULL);
4173 
4174         err = sdio_enable_func(sdiod->func2);
4175 
4176         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4177 
4178         /* If F2 successfully enabled, set core and enable interrupts */
4179         if (!err) {
4180                 /* Set up the interrupt mask and enable interrupts */
4181                 bus->hostintmask = HOSTINTMASK;
4182                 brcmf_sdiod_writel(sdiod, core->base + SD_REG(hostintmask),
4183                                    bus->hostintmask, NULL);
4184 
4185                 switch (sdiod->func1->device) {
4186                 case SDIO_DEVICE_ID_CYPRESS_4373:
4187                         brcmf_dbg(INFO, "set F2 watermark to 0x%x*4 bytes\n",
4188                                   CY_4373_F2_WATERMARK);
4189                         brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4190                                            CY_4373_F2_WATERMARK, &err);
4191                         devctl = brcmf_sdiod_readb(sdiod, SBSDIO_DEVICE_CTL,
4192                                                    &err);
4193                         devctl |= SBSDIO_DEVCTL_F2WM_ENAB;
4194                         brcmf_sdiod_writeb(sdiod, SBSDIO_DEVICE_CTL, devctl,
4195                                            &err);
4196                         brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_MESBUSYCTRL,
4197                                            CY_4373_F2_WATERMARK |
4198                                            SBSDIO_MESBUSYCTRL_ENAB, &err);
4199                         break;
4200                 case SDIO_DEVICE_ID_CYPRESS_43012:
4201                         brcmf_dbg(INFO, "set F2 watermark to 0x%x*4 bytes\n",
4202                                   CY_43012_F2_WATERMARK);
4203                         brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4204                                            CY_43012_F2_WATERMARK, &err);
4205                         devctl = brcmf_sdiod_readb(sdiod, SBSDIO_DEVICE_CTL,
4206                                                    &err);
4207                         devctl |= SBSDIO_DEVCTL_F2WM_ENAB;
4208                         brcmf_sdiod_writeb(sdiod, SBSDIO_DEVICE_CTL, devctl,
4209                                            &err);
4210                         break;
4211                 default:
4212                         brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4213                                            DEFAULT_F2_WATERMARK, &err);
4214                         break;
4215                 }
4216         } else {
4217                 /* Disable F2 again */
4218                 sdio_disable_func(sdiod->func2);
4219                 goto checkdied;
4220         }
4221 
4222         if (brcmf_chip_sr_capable(bus->ci)) {
4223                 brcmf_sdio_sr_init(bus);
4224         } else {
4225                 /* Restore previous clock setting */
4226                 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR,
4227                                    saveclk, &err);
4228         }
4229 
4230         if (err == 0) {
4231                 /* Assign bus interface call back */
4232                 sdiod->bus_if->dev = sdiod->dev;
4233                 sdiod->bus_if->ops = &brcmf_sdio_bus_ops;
4234                 sdiod->bus_if->chip = bus->ci->chip;
4235                 sdiod->bus_if->chiprev = bus->ci->chiprev;
4236 
4237                 /* Allow full data communication using DPC from now on. */
4238                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
4239 
4240                 err = brcmf_sdiod_intr_register(sdiod);
4241                 if (err != 0)
4242                         brcmf_err("intr register failed:%d\n", err);
4243         }
4244 
4245         /* If we didn't come up, turn off backplane clock */
4246         if (err != 0) {
4247                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4248                 goto checkdied;
4249         }
4250 
4251         sdio_release_host(sdiod->func1);
4252 
4253         err = brcmf_alloc(sdiod->dev, sdiod->settings);
4254         if (err) {
4255                 brcmf_err("brcmf_alloc failed\n");
4256                 goto claim;
4257         }
4258 
4259         /* Attach to the common layer, reserve hdr space */
4260         err = brcmf_attach(sdiod->dev);
4261         if (err != 0) {
4262                 brcmf_err("brcmf_attach failed\n");
4263                 goto free;
4264         }
4265 
4266         /* ready */
4267         return;
4268 
4269 free:
4270         brcmf_free(sdiod->dev);
4271 claim:
4272         sdio_claim_host(sdiod->func1);
4273 checkdied:
4274         brcmf_sdio_checkdied(bus);
4275 release:
4276         sdio_release_host(sdiod->func1);
4277 fail:
4278         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4279         device_release_driver(&sdiod->func2->dev);
4280         device_release_driver(dev);
4281 }
4282 
4283 static struct brcmf_fw_request *
4284 brcmf_sdio_prepare_fw_request(struct brcmf_sdio *bus)
4285 {
4286         struct brcmf_fw_request *fwreq;
4287         struct brcmf_fw_name fwnames[] = {
4288                 { ".bin", bus->sdiodev->fw_name },
4289                 { ".txt", bus->sdiodev->nvram_name },
4290         };
4291 
4292         fwreq = brcmf_fw_alloc_request(bus->ci->chip, bus->ci->chiprev,
4293                                        brcmf_sdio_fwnames,
4294                                        ARRAY_SIZE(brcmf_sdio_fwnames),
4295                                        fwnames, ARRAY_SIZE(fwnames));
4296         if (!fwreq)
4297                 return NULL;
4298 
4299         fwreq->items[BRCMF_SDIO_FW_CODE].type = BRCMF_FW_TYPE_BINARY;
4300         fwreq->items[BRCMF_SDIO_FW_NVRAM].type = BRCMF_FW_TYPE_NVRAM;
4301         fwreq->board_type = bus->sdiodev->settings->board_type;
4302 
4303         return fwreq;
4304 }
4305 
4306 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4307 {
4308         int ret;
4309         struct brcmf_sdio *bus;
4310         struct workqueue_struct *wq;
4311         struct brcmf_fw_request *fwreq;
4312 
4313         brcmf_dbg(TRACE, "Enter\n");
4314 
4315         /* Allocate private bus interface state */
4316         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4317         if (!bus)
4318                 goto fail;
4319 
4320         bus->sdiodev = sdiodev;
4321         sdiodev->bus = bus;
4322         skb_queue_head_init(&bus->glom);
4323         bus->txbound = BRCMF_TXBOUND;
4324         bus->rxbound = BRCMF_RXBOUND;
4325         bus->txminmax = BRCMF_TXMINMAX;
4326         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4327 
4328         /* single-threaded workqueue */
4329         wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4330                                      dev_name(&sdiodev->func1->dev));
4331         if (!wq) {
4332                 brcmf_err("insufficient memory to create txworkqueue\n");
4333                 goto fail;
4334         }
4335         brcmf_sdiod_freezer_count(sdiodev);
4336         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4337         bus->brcmf_wq = wq;
4338 
4339         /* attempt to attach to the dongle */
4340         if (!(brcmf_sdio_probe_attach(bus))) {
4341                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4342                 goto fail;
4343         }
4344 
4345         spin_lock_init(&bus->rxctl_lock);
4346         spin_lock_init(&bus->txq_lock);
4347         init_waitqueue_head(&bus->ctrl_wait);
4348         init_waitqueue_head(&bus->dcmd_resp_wait);
4349 
4350         /* Set up the watchdog timer */
4351         timer_setup(&bus->timer, brcmf_sdio_watchdog, 0);
4352         /* Initialize watchdog thread */
4353         init_completion(&bus->watchdog_wait);
4354         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4355                                         bus, "brcmf_wdog/%s",
4356                                         dev_name(&sdiodev->func1->dev));
4357         if (IS_ERR(bus->watchdog_tsk)) {
4358                 pr_warn("brcmf_watchdog thread failed to start\n");
4359                 bus->watchdog_tsk = NULL;
4360         }
4361         /* Initialize DPC thread */
4362         bus->dpc_triggered = false;
4363         bus->dpc_running = false;
4364 
4365         /* default sdio bus header length for tx packet */
4366         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4367 
4368         /* Query the F2 block size, set roundup accordingly */
4369         bus->blocksize = bus->sdiodev->func2->cur_blksize;
4370         bus->roundup = min(max_roundup, bus->blocksize);
4371 
4372         sdio_claim_host(bus->sdiodev->func1);
4373 
4374         /* Disable F2 to clear any intermediate frame state on the dongle */
4375         sdio_disable_func(bus->sdiodev->func2);
4376 
4377         bus->rxflow = false;
4378 
4379         /* Done with backplane-dependent accesses, can drop clock... */
4380         brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4381 
4382         sdio_release_host(bus->sdiodev->func1);
4383 
4384         /* ...and initialize clock/power states */
4385         bus->clkstate = CLK_SDONLY;
4386         bus->idletime = BRCMF_IDLE_INTERVAL;
4387         bus->idleclock = BRCMF_IDLE_ACTIVE;
4388 
4389         /* SR state */
4390         bus->sr_enabled = false;
4391 
4392         brcmf_dbg(INFO, "completed!!\n");
4393 
4394         fwreq = brcmf_sdio_prepare_fw_request(bus);
4395         if (!fwreq) {
4396                 ret = -ENOMEM;
4397                 goto fail;
4398         }
4399 
4400         ret = brcmf_fw_get_firmwares(sdiodev->dev, fwreq,
4401                                      brcmf_sdio_firmware_callback);
4402         if (ret != 0) {
4403                 brcmf_err("async firmware request failed: %d\n", ret);
4404                 kfree(fwreq);
4405                 goto fail;
4406         }
4407 
4408         return bus;
4409 
4410 fail:
4411         brcmf_sdio_remove(bus);
4412         return NULL;
4413 }
4414 
4415 /* Detach and free everything */
4416 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4417 {
4418         brcmf_dbg(TRACE, "Enter\n");
4419 
4420         if (bus) {
4421                 /* Stop watchdog task */
4422                 if (bus->watchdog_tsk) {
4423                         send_sig(SIGTERM, bus->watchdog_tsk, 1);
4424                         kthread_stop(bus->watchdog_tsk);
4425                         bus->watchdog_tsk = NULL;
4426                 }
4427 
4428                 /* De-register interrupt handler */
4429                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4430 
4431                 brcmf_detach(bus->sdiodev->dev);
4432 
4433                 cancel_work_sync(&bus->datawork);
4434                 if (bus->brcmf_wq)
4435                         destroy_workqueue(bus->brcmf_wq);
4436 
4437                 if (bus->ci) {
4438                         if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4439                                 sdio_claim_host(bus->sdiodev->func1);
4440                                 brcmf_sdio_wd_timer(bus, false);
4441                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4442                                 /* Leave the device in state where it is
4443                                  * 'passive'. This is done by resetting all
4444                                  * necessary cores.
4445                                  */
4446                                 msleep(20);
4447                                 brcmf_chip_set_passive(bus->ci);
4448                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4449                                 sdio_release_host(bus->sdiodev->func1);
4450                         }
4451                         brcmf_chip_detach(bus->ci);
4452                 }
4453                 if (bus->sdiodev->settings)
4454                         brcmf_release_module_param(bus->sdiodev->settings);
4455 
4456                 kfree(bus->rxbuf);
4457                 kfree(bus->hdrbuf);
4458                 kfree(bus);
4459         }
4460 
4461         brcmf_dbg(TRACE, "Disconnected\n");
4462 }
4463 
4464 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, bool active)
4465 {
4466         /* Totally stop the timer */
4467         if (!active && bus->wd_active) {
4468                 del_timer_sync(&bus->timer);
4469                 bus->wd_active = false;
4470                 return;
4471         }
4472 
4473         /* don't start the wd until fw is loaded */
4474         if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4475                 return;
4476 
4477         if (active) {
4478                 if (!bus->wd_active) {
4479                         /* Create timer again when watchdog period is
4480                            dynamically changed or in the first instance
4481                          */
4482                         bus->timer.expires = jiffies + BRCMF_WD_POLL;
4483                         add_timer(&bus->timer);
4484                         bus->wd_active = true;
4485                 } else {
4486                         /* Re arm the timer, at last watchdog period */
4487                         mod_timer(&bus->timer, jiffies + BRCMF_WD_POLL);
4488                 }
4489         }
4490 }
4491 
4492 int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4493 {
4494         int ret;
4495 
4496         sdio_claim_host(bus->sdiodev->func1);
4497         ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4498         sdio_release_host(bus->sdiodev->func1);
4499 
4500         return ret;
4501 }
4502
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

DEFINITIONS
