1
2 #ifndef B43_TABLES_NPHY_H_
3 #define B43_TABLES_NPHY_H_
4
5 #include <linux/types.h>
6
7 struct b43_phy_n_sfo_cfg {
8 u16 phy_bw1a;
9 u16 phy_bw2;
10 u16 phy_bw3;
11 u16 phy_bw4;
12 u16 phy_bw5;
13 u16 phy_bw6;
14 };
15
16 struct b43_wldev;
17
18 struct nphy_txiqcal_ladder {
19 u8 percent;
20 u8 g_env;
21 };
22
23 struct nphy_rf_control_override_rev2 {
24 u8 addr0;
25 u8 addr1;
26 u16 bmask;
27 u8 shift;
28 };
29
30 struct nphy_rf_control_override_rev3 {
31 u16 val_mask;
32 u8 val_shift;
33 u8 en_addr0;
34 u8 val_addr0;
35 u8 en_addr1;
36 u8 val_addr1;
37 };
38
39 struct nphy_rf_control_override_rev7 {
40 u16 field;
41 u16 val_addr_core0;
42 u16 val_addr_core1;
43 u16 val_mask;
44 u8 val_shift;
45 };
46
47 struct nphy_gain_ctl_workaround_entry {
48 s8 lna1_gain[4];
49 s8 lna2_gain[4];
50 u8 gain_db[10];
51 u8 gain_bits[10];
52
53 u16 init_gain;
54 u16 rfseq_init[4];
55
56 u16 cliphi_gain;
57 u16 clipmd_gain;
58 u16 cliplo_gain;
59
60 u16 crsmin;
61 u16 crsminl;
62 u16 crsminu;
63
64 u16 nbclip;
65 u16 wlclip;
66 };
67
68
69 struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent(
70 struct b43_wldev *dev, bool ghz5, bool ext_lna);
71
72
73
74 #define B43_NTAB_TYPEMASK 0xF0000000
75 #define B43_NTAB_8BIT 0x10000000
76 #define B43_NTAB_16BIT 0x20000000
77 #define B43_NTAB_32BIT 0x30000000
78 #define B43_NTAB8(table, offset) (((table) << 10) | (offset) | B43_NTAB_8BIT)
79 #define B43_NTAB16(table, offset) (((table) << 10) | (offset) | B43_NTAB_16BIT)
80 #define B43_NTAB32(table, offset) (((table) << 10) | (offset) | B43_NTAB_32BIT)
81
82
83 #define B43_NTAB_FRAMESTRUCT B43_NTAB32(0x0A, 0x000)
84 #define B43_NTAB_FRAMESTRUCT_SIZE 832
85 #define B43_NTAB_FRAMELT B43_NTAB8 (0x18, 0x000)
86 #define B43_NTAB_FRAMELT_SIZE 32
87 #define B43_NTAB_TMAP B43_NTAB32(0x0C, 0x000)
88 #define B43_NTAB_TMAP_SIZE 448
89 #define B43_NTAB_TDTRN B43_NTAB32(0x0E, 0x000)
90 #define B43_NTAB_TDTRN_SIZE 704
91 #define B43_NTAB_INTLEVEL B43_NTAB32(0x0D, 0x000)
92 #define B43_NTAB_INTLEVEL_SIZE 7
93 #define B43_NTAB_PILOT B43_NTAB16(0x0B, 0x000)
94 #define B43_NTAB_PILOT_SIZE 88
95 #define B43_NTAB_PILOTLT B43_NTAB32(0x14, 0x000)
96 #define B43_NTAB_PILOTLT_SIZE 6
97 #define B43_NTAB_TDI20A0 B43_NTAB32(0x13, 0x080)
98 #define B43_NTAB_TDI20A0_SIZE 55
99 #define B43_NTAB_TDI20A1 B43_NTAB32(0x13, 0x100)
100 #define B43_NTAB_TDI20A1_SIZE 55
101 #define B43_NTAB_TDI40A0 B43_NTAB32(0x13, 0x280)
102 #define B43_NTAB_TDI40A0_SIZE 110
103 #define B43_NTAB_TDI40A1 B43_NTAB32(0x13, 0x300)
104 #define B43_NTAB_TDI40A1_SIZE 110
105 #define B43_NTAB_BDI B43_NTAB16(0x15, 0x000)
106 #define B43_NTAB_BDI_SIZE 6
107 #define B43_NTAB_CHANEST B43_NTAB32(0x16, 0x000)
108 #define B43_NTAB_CHANEST_SIZE 96
109 #define B43_NTAB_MCS B43_NTAB8 (0x12, 0x000)
110 #define B43_NTAB_MCS_SIZE 128
111
112
113 #define B43_NTAB_NOISEVAR10 B43_NTAB32(0x10, 0x000)
114 #define B43_NTAB_NOISEVAR10_SIZE 256
115 #define B43_NTAB_NOISEVAR11 B43_NTAB32(0x10, 0x080)
116 #define B43_NTAB_NOISEVAR11_SIZE 256
117 #define B43_NTAB_C0_ESTPLT B43_NTAB8 (0x1A, 0x000)
118 #define B43_NTAB_C0_ESTPLT_SIZE 64
119 #define B43_NTAB_C0_ADJPLT B43_NTAB8 (0x1A, 0x040)
120 #define B43_NTAB_C0_ADJPLT_SIZE 128
121 #define B43_NTAB_C0_GAINCTL B43_NTAB32(0x1A, 0x0C0)
122 #define B43_NTAB_C0_GAINCTL_SIZE 128
123 #define B43_NTAB_C0_IQLT B43_NTAB32(0x1A, 0x140)
124 #define B43_NTAB_C0_IQLT_SIZE 128
125 #define B43_NTAB_C0_LOFEEDTH B43_NTAB16(0x1A, 0x1C0)
126 #define B43_NTAB_C0_LOFEEDTH_SIZE 128
127 #define B43_NTAB_C1_ESTPLT B43_NTAB8 (0x1B, 0x000)
128 #define B43_NTAB_C1_ESTPLT_SIZE 64
129 #define B43_NTAB_C1_ADJPLT B43_NTAB8 (0x1B, 0x040)
130 #define B43_NTAB_C1_ADJPLT_SIZE 128
131 #define B43_NTAB_C1_GAINCTL B43_NTAB32(0x1B, 0x0C0)
132 #define B43_NTAB_C1_GAINCTL_SIZE 128
133 #define B43_NTAB_C1_IQLT B43_NTAB32(0x1B, 0x140)
134 #define B43_NTAB_C1_IQLT_SIZE 128
135 #define B43_NTAB_C1_LOFEEDTH B43_NTAB16(0x1B, 0x1C0)
136 #define B43_NTAB_C1_LOFEEDTH_SIZE 128
137
138
139 #define B43_NTAB_ANT_SW_CTL_R3 B43_NTAB16( 9, 0)
140
141
142 #define B43_NTAB_FRAMESTRUCT_R3 B43_NTAB32(10, 0)
143 #define B43_NTAB_PILOT_R3 B43_NTAB16(11, 0)
144 #define B43_NTAB_TMAP_R3 B43_NTAB32(12, 0)
145 #define B43_NTAB_INTLEVEL_R3 B43_NTAB32(13, 0)
146 #define B43_NTAB_TDTRN_R3 B43_NTAB32(14, 0)
147 #define B43_NTAB_NOISEVAR_R3 B43_NTAB32(16, 0)
148 #define B43_NTAB_MCS_R3 B43_NTAB16(18, 0)
149 #define B43_NTAB_TDI20A0_R3 B43_NTAB32(19, 128)
150 #define B43_NTAB_TDI20A1_R3 B43_NTAB32(19, 256)
151 #define B43_NTAB_TDI40A0_R3 B43_NTAB32(19, 640)
152 #define B43_NTAB_TDI40A1_R3 B43_NTAB32(19, 768)
153 #define B43_NTAB_PILOTLT_R3 B43_NTAB32(20, 0)
154 #define B43_NTAB_CHANEST_R3 B43_NTAB32(22, 0)
155 #define B43_NTAB_FRAMELT_R3 B43_NTAB8(24, 0)
156 #define B43_NTAB_C0_ESTPLT_R3 B43_NTAB8(26, 0)
157 #define B43_NTAB_C0_ADJPLT_R3 B43_NTAB8(26, 64)
158 #define B43_NTAB_C0_GAINCTL_R3 B43_NTAB32(26, 192)
159 #define B43_NTAB_C0_IQLT_R3 B43_NTAB32(26, 320)
160 #define B43_NTAB_C0_LOFEEDTH_R3 B43_NTAB16(26, 448)
161 #define B43_NTAB_C0_PAPD_COMP_R3 B43_NTAB16(26, 576)
162 #define B43_NTAB_C1_ESTPLT_R3 B43_NTAB8(27, 0)
163 #define B43_NTAB_C1_ADJPLT_R3 B43_NTAB8(27, 64)
164 #define B43_NTAB_C1_GAINCTL_R3 B43_NTAB32(27, 192)
165 #define B43_NTAB_C1_IQLT_R3 B43_NTAB32(27, 320)
166 #define B43_NTAB_C1_LOFEEDTH_R3 B43_NTAB16(27, 448)
167 #define B43_NTAB_C1_PAPD_COMP_R3 B43_NTAB16(27, 576)
168
169
170 #define B43_NTAB_TMAP_R7 B43_NTAB32(12, 0)
171 #define B43_NTAB_NOISEVAR_R7 B43_NTAB32(16, 0)
172
173 #define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_40_SIZE 18
174 #define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_20_SIZE 18
175 #define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_40_SIZE 18
176 #define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_20_SIZE 18
177 #define B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3 11
178 #define B43_NTAB_TX_IQLO_CAL_STARTCOEFS 9
179 #define B43_NTAB_TX_IQLO_CAL_CMDS_RECAL_REV3 12
180 #define B43_NTAB_TX_IQLO_CAL_CMDS_RECAL 10
181 #define B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL 10
182 #define B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL_REV3 12
183
184 u32 b43_ntab_read(struct b43_wldev *dev, u32 offset);
185 void b43_ntab_read_bulk(struct b43_wldev *dev, u32 offset,
186 unsigned int nr_elements, void *_data);
187 void b43_ntab_write(struct b43_wldev *dev, u32 offset, u32 value);
188 void b43_ntab_write_bulk(struct b43_wldev *dev, u32 offset,
189 unsigned int nr_elements, const void *_data);
190
191 void b43_nphy_tables_init(struct b43_wldev *dev);
192
193 const u32 *b43_nphy_get_tx_gain_table(struct b43_wldev *dev);
194
195 const s16 *b43_ntab_get_rf_pwr_offset_table(struct b43_wldev *dev);
196
197 extern const s8 b43_ntab_papd_pga_gain_delta_ipa_2g[];
198
199 extern const u16 tbl_iqcal_gainparams[2][9][8];
200 extern const struct nphy_txiqcal_ladder ladder_lo[];
201 extern const struct nphy_txiqcal_ladder ladder_iq[];
202 extern const u16 loscale[];
203
204 extern const u16 tbl_tx_iqlo_cal_loft_ladder_40[];
205 extern const u16 tbl_tx_iqlo_cal_loft_ladder_20[];
206 extern const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[];
207 extern const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[];
208 extern const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[];
209 extern const u16 tbl_tx_iqlo_cal_startcoefs[];
210 extern const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[];
211 extern const u16 tbl_tx_iqlo_cal_cmds_recal[];
212 extern const u16 tbl_tx_iqlo_cal_cmds_fullcal[];
213 extern const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[];
214 extern const s16 tbl_tx_filter_coef_rev4[7][15];
215
216 extern const struct nphy_rf_control_override_rev2
217 tbl_rf_control_override_rev2[];
218 extern const struct nphy_rf_control_override_rev3
219 tbl_rf_control_override_rev3[];
220 const struct nphy_rf_control_override_rev7 *b43_nphy_get_rf_ctl_over_rev7(
221 struct b43_wldev *dev, u16 field, u8 override);
222
223 #endif