root/drivers/net/wireless/broadcom/b43legacy/main.c

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DEFINITIONS

This source file includes following definitions.
  1. b43legacy_ratelimit
  2. b43legacyinfo
  3. b43legacyerr
  4. b43legacywarn
  5. b43legacydbg
  6. b43legacy_ram_write
  7. b43legacy_shm_control_word
  8. b43legacy_shm_read32
  9. b43legacy_shm_read16
  10. b43legacy_shm_write32
  11. b43legacy_shm_write16
  12. b43legacy_hf_read
  13. b43legacy_hf_write
  14. b43legacy_tsf_read
  15. b43legacy_time_lock
  16. b43legacy_time_unlock
  17. b43legacy_tsf_write_locked
  18. b43legacy_tsf_write
  19. b43legacy_macfilter_set
  20. b43legacy_write_mac_bssid_templates
  21. b43legacy_upload_card_macaddress
  22. b43legacy_set_slot_time
  23. b43legacy_short_slot_timing_enable
  24. b43legacy_short_slot_timing_disable
  25. b43legacy_synchronize_irq
  26. b43legacy_dummy_transmission
  27. b43legacy_switch_analog
  28. b43legacy_wireless_core_reset
  29. handle_irq_transmit_status
  30. drain_txstatus_queue
  31. b43legacy_jssi_read
  32. b43legacy_jssi_write
  33. b43legacy_generate_noise_sample
  34. b43legacy_calculate_link_quality
  35. handle_irq_noise
  36. handle_irq_tbtt_indication
  37. handle_irq_atim_end
  38. handle_irq_pmq
  39. b43legacy_write_template_common
  40. b43legacy_antenna_to_phyctl
  41. b43legacy_write_beacon_template
  42. b43legacy_write_probe_resp_plcp
  43. b43legacy_generate_probe_resp
  44. b43legacy_write_probe_resp_template
  45. b43legacy_upload_beacon0
  46. b43legacy_upload_beacon1
  47. handle_irq_beacon
  48. b43legacy_beacon_update_trigger_work
  49. b43legacy_update_templates
  50. b43legacy_set_beacon_int
  51. handle_irq_ucode_debug
  52. b43legacy_interrupt_tasklet
  53. pio_irq_workaround
  54. b43legacy_interrupt_ack
  55. b43legacy_interrupt_handler
  56. b43legacy_release_firmware
  57. b43legacy_print_fw_helptext
  58. b43legacy_fw_cb
  59. do_request_fw
  60. b43legacy_request_firmware
  61. b43legacy_upload_microcode
  62. b43legacy_write_initvals
  63. b43legacy_upload_initvals
  64. b43legacy_gpio_init
  65. b43legacy_gpio_cleanup
  66. b43legacy_mac_enable
  67. b43legacy_mac_suspend
  68. b43legacy_adjust_opmode
  69. b43legacy_rate_memory_write
  70. b43legacy_rate_memory_init
  71. b43legacy_mgmtframe_txantenna
  72. b43legacy_chip_exit
  73. b43legacy_chip_init
  74. b43legacy_periodic_every120sec
  75. b43legacy_periodic_every60sec
  76. b43legacy_periodic_every30sec
  77. b43legacy_periodic_every15sec
  78. do_periodic_work
  79. b43legacy_periodic_work_handler
  80. b43legacy_periodic_tasks_setup
  81. b43legacy_validate_chipaccess
  82. b43legacy_security_init
  83. b43legacy_rng_read
  84. b43legacy_rng_exit
  85. b43legacy_rng_init
  86. b43legacy_tx_work
  87. b43legacy_op_tx
  88. b43legacy_op_conf_tx
  89. b43legacy_op_get_stats
  90. phymode_to_string
  91. find_wldev_for_phymode
  92. b43legacy_put_phy_into_reset
  93. b43legacy_switch_phymode
  94. b43legacy_set_retry_limits
  95. b43legacy_op_dev_config
  96. b43legacy_update_basic_rates
  97. b43legacy_op_bss_info_changed
  98. b43legacy_op_configure_filter
  99. b43legacy_wireless_core_stop
  100. b43legacy_wireless_core_start
  101. b43legacy_phy_versioning
  102. setup_struct_phy_for_init
  103. setup_struct_wldev_for_init
  104. b43legacy_set_synth_pu_delay
  105. b43legacy_set_pretbtt
  106. b43legacy_wireless_core_exit
  107. prepare_phy_data_for_init
  108. b43legacy_wireless_core_init
  109. b43legacy_op_add_interface
  110. b43legacy_op_remove_interface
  111. b43legacy_op_start
  112. b43legacy_op_stop
  113. b43legacy_op_beacon_set_tim
  114. b43legacy_op_get_survey
  115. b43legacy_chip_reset
  116. b43legacy_setup_modes
  117. b43legacy_wireless_core_detach
  118. b43legacy_wireless_core_attach
  119. b43legacy_one_core_detach
  120. b43legacy_one_core_attach
  121. b43legacy_sprom_fixup
  122. b43legacy_wireless_exit
  123. b43legacy_wireless_init
  124. b43legacy_probe
  125. b43legacy_remove
  126. b43legacy_controller_restart
  127. b43legacy_suspend
  128. b43legacy_resume
  129. b43legacy_print_driverinfo
  130. b43legacy_init
  131. b43legacy_exit

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  Broadcom B43legacy wireless driver
   5  *
   6  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   7  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
   8  *  Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
   9  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
  10  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  11  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  12  *
  13  *  Some parts of the code in this file are derived from the ipw2200
  14  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  15 
  16  */
  17 
  18 #include <linux/delay.h>
  19 #include <linux/init.h>
  20 #include <linux/module.h>
  21 #include <linux/if_arp.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/firmware.h>
  24 #include <linux/workqueue.h>
  25 #include <linux/sched/signal.h>
  26 #include <linux/skbuff.h>
  27 #include <linux/dma-mapping.h>
  28 #include <linux/slab.h>
  29 #include <net/dst.h>
  30 #include <asm/unaligned.h>
  31 
  32 #include "b43legacy.h"
  33 #include "main.h"
  34 #include "debugfs.h"
  35 #include "phy.h"
  36 #include "dma.h"
  37 #include "pio.h"
  38 #include "sysfs.h"
  39 #include "xmit.h"
  40 #include "radio.h"
  41 
  42 
  43 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  44 MODULE_AUTHOR("Martin Langer");
  45 MODULE_AUTHOR("Stefano Brivio");
  46 MODULE_AUTHOR("Michael Buesch");
  47 MODULE_LICENSE("GPL");
  48 
  49 MODULE_FIRMWARE("b43legacy/ucode2.fw");
  50 MODULE_FIRMWARE("b43legacy/ucode4.fw");
  51 
  52 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  53 static int modparam_pio;
  54 module_param_named(pio, modparam_pio, int, 0444);
  55 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  56 #elif defined(CONFIG_B43LEGACY_DMA)
  57 # define modparam_pio   0
  58 #elif defined(CONFIG_B43LEGACY_PIO)
  59 # define modparam_pio   1
  60 #endif
  61 
  62 static int modparam_bad_frames_preempt;
  63 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  64 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  65                  " Preemption");
  66 
  67 static char modparam_fwpostfix[16];
  68 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  69 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  70 
  71 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  72 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  73         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  74         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  75         {},
  76 };
  77 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  78 
  79 
  80 /* Channel and ratetables are shared for all devices.
  81  * They can't be const, because ieee80211 puts some precalculated
  82  * data in there. This data is the same for all devices, so we don't
  83  * get concurrency issues */
  84 #define RATETAB_ENT(_rateid, _flags) \
  85         {                                                               \
  86                 .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
  87                 .hw_value       = (_rateid),                            \
  88                 .flags          = (_flags),                             \
  89         }
  90 /*
  91  * NOTE: When changing this, sync with xmit.c's
  92  *       b43legacy_plcp_get_bitrate_idx_* functions!
  93  */
  94 static struct ieee80211_rate __b43legacy_ratetable[] = {
  95         RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
  96         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
  97         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
  98         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
  99         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
 100         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
 101         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
 102         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
 103         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
 104         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
 105         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
 106         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
 107 };
 108 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 109 #define b43legacy_b_ratetable_size      4
 110 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 111 #define b43legacy_g_ratetable_size      12
 112 
 113 #define CHANTAB_ENT(_chanid, _freq) \
 114         {                                                       \
 115                 .center_freq    = (_freq),                      \
 116                 .hw_value       = (_chanid),                    \
 117         }
 118 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 119         CHANTAB_ENT(1, 2412),
 120         CHANTAB_ENT(2, 2417),
 121         CHANTAB_ENT(3, 2422),
 122         CHANTAB_ENT(4, 2427),
 123         CHANTAB_ENT(5, 2432),
 124         CHANTAB_ENT(6, 2437),
 125         CHANTAB_ENT(7, 2442),
 126         CHANTAB_ENT(8, 2447),
 127         CHANTAB_ENT(9, 2452),
 128         CHANTAB_ENT(10, 2457),
 129         CHANTAB_ENT(11, 2462),
 130         CHANTAB_ENT(12, 2467),
 131         CHANTAB_ENT(13, 2472),
 132         CHANTAB_ENT(14, 2484),
 133 };
 134 
 135 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
 136         .channels = b43legacy_bg_chantable,
 137         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 138         .bitrates = b43legacy_b_ratetable,
 139         .n_bitrates = b43legacy_b_ratetable_size,
 140 };
 141 
 142 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
 143         .channels = b43legacy_bg_chantable,
 144         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 145         .bitrates = b43legacy_g_ratetable,
 146         .n_bitrates = b43legacy_g_ratetable_size,
 147 };
 148 
 149 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 150 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 151 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 152 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 153 
 154 
 155 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 156 {
 157         if (!wl || !wl->current_dev)
 158                 return 1;
 159         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 160                 return 1;
 161         /* We are up and running.
 162          * Ratelimit the messages to avoid DoS over the net. */
 163         return net_ratelimit();
 164 }
 165 
 166 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 167 {
 168         struct va_format vaf;
 169         va_list args;
 170 
 171         if (!b43legacy_ratelimit(wl))
 172                 return;
 173 
 174         va_start(args, fmt);
 175 
 176         vaf.fmt = fmt;
 177         vaf.va = &args;
 178 
 179         printk(KERN_INFO "b43legacy-%s: %pV",
 180                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 181 
 182         va_end(args);
 183 }
 184 
 185 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 186 {
 187         struct va_format vaf;
 188         va_list args;
 189 
 190         if (!b43legacy_ratelimit(wl))
 191                 return;
 192 
 193         va_start(args, fmt);
 194 
 195         vaf.fmt = fmt;
 196         vaf.va = &args;
 197 
 198         printk(KERN_ERR "b43legacy-%s ERROR: %pV",
 199                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 200 
 201         va_end(args);
 202 }
 203 
 204 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 205 {
 206         struct va_format vaf;
 207         va_list args;
 208 
 209         if (!b43legacy_ratelimit(wl))
 210                 return;
 211 
 212         va_start(args, fmt);
 213 
 214         vaf.fmt = fmt;
 215         vaf.va = &args;
 216 
 217         printk(KERN_WARNING "b43legacy-%s warning: %pV",
 218                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 219 
 220         va_end(args);
 221 }
 222 
 223 #if B43legacy_DEBUG
 224 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 225 {
 226         struct va_format vaf;
 227         va_list args;
 228 
 229         va_start(args, fmt);
 230 
 231         vaf.fmt = fmt;
 232         vaf.va = &args;
 233 
 234         printk(KERN_DEBUG "b43legacy-%s debug: %pV",
 235                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 236 
 237         va_end(args);
 238 }
 239 #endif /* DEBUG */
 240 
 241 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 242                                 u32 val)
 243 {
 244         u32 status;
 245 
 246         B43legacy_WARN_ON(offset % 4 != 0);
 247 
 248         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 249         if (status & B43legacy_MACCTL_BE)
 250                 val = swab32(val);
 251 
 252         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 253         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 254 }
 255 
 256 static inline
 257 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 258                                 u16 routing, u16 offset)
 259 {
 260         u32 control;
 261 
 262         /* "offset" is the WORD offset. */
 263 
 264         control = routing;
 265         control <<= 16;
 266         control |= offset;
 267         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 268 }
 269 
 270 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 271                        u16 routing, u16 offset)
 272 {
 273         u32 ret;
 274 
 275         if (routing == B43legacy_SHM_SHARED) {
 276                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 277                 if (offset & 0x0003) {
 278                         /* Unaligned access */
 279                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 280                         ret = b43legacy_read16(dev,
 281                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 282                         ret <<= 16;
 283                         b43legacy_shm_control_word(dev, routing,
 284                                                      (offset >> 2) + 1);
 285                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 286 
 287                         return ret;
 288                 }
 289                 offset >>= 2;
 290         }
 291         b43legacy_shm_control_word(dev, routing, offset);
 292         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 293 
 294         return ret;
 295 }
 296 
 297 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 298                            u16 routing, u16 offset)
 299 {
 300         u16 ret;
 301 
 302         if (routing == B43legacy_SHM_SHARED) {
 303                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 304                 if (offset & 0x0003) {
 305                         /* Unaligned access */
 306                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 307                         ret = b43legacy_read16(dev,
 308                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 309 
 310                         return ret;
 311                 }
 312                 offset >>= 2;
 313         }
 314         b43legacy_shm_control_word(dev, routing, offset);
 315         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 316 
 317         return ret;
 318 }
 319 
 320 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 321                            u16 routing, u16 offset,
 322                            u32 value)
 323 {
 324         if (routing == B43legacy_SHM_SHARED) {
 325                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 326                 if (offset & 0x0003) {
 327                         /* Unaligned access */
 328                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 329                         b43legacy_write16(dev,
 330                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 331                                           (value >> 16) & 0xffff);
 332                         b43legacy_shm_control_word(dev, routing,
 333                                                    (offset >> 2) + 1);
 334                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 335                                           value & 0xffff);
 336                         return;
 337                 }
 338                 offset >>= 2;
 339         }
 340         b43legacy_shm_control_word(dev, routing, offset);
 341         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 342 }
 343 
 344 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 345                            u16 value)
 346 {
 347         if (routing == B43legacy_SHM_SHARED) {
 348                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 349                 if (offset & 0x0003) {
 350                         /* Unaligned access */
 351                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 352                         b43legacy_write16(dev,
 353                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 354                                           value);
 355                         return;
 356                 }
 357                 offset >>= 2;
 358         }
 359         b43legacy_shm_control_word(dev, routing, offset);
 360         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 361 }
 362 
 363 /* Read HostFlags */
 364 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 365 {
 366         u32 ret;
 367 
 368         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 369                                    B43legacy_SHM_SH_HOSTFHI);
 370         ret <<= 16;
 371         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 372                                     B43legacy_SHM_SH_HOSTFLO);
 373 
 374         return ret;
 375 }
 376 
 377 /* Write HostFlags */
 378 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 379 {
 380         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 381                               B43legacy_SHM_SH_HOSTFLO,
 382                               (value & 0x0000FFFF));
 383         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 384                               B43legacy_SHM_SH_HOSTFHI,
 385                               ((value & 0xFFFF0000) >> 16));
 386 }
 387 
 388 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 389 {
 390         /* We need to be careful. As we read the TSF from multiple
 391          * registers, we should take care of register overflows.
 392          * In theory, the whole tsf read process should be atomic.
 393          * We try to be atomic here, by restaring the read process,
 394          * if any of the high registers changed (overflew).
 395          */
 396         if (dev->dev->id.revision >= 3) {
 397                 u32 low;
 398                 u32 high;
 399                 u32 high2;
 400 
 401                 do {
 402                         high = b43legacy_read32(dev,
 403                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 404                         low = b43legacy_read32(dev,
 405                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 406                         high2 = b43legacy_read32(dev,
 407                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 408                 } while (unlikely(high != high2));
 409 
 410                 *tsf = high;
 411                 *tsf <<= 32;
 412                 *tsf |= low;
 413         } else {
 414                 u64 tmp;
 415                 u16 v0;
 416                 u16 v1;
 417                 u16 v2;
 418                 u16 v3;
 419                 u16 test1;
 420                 u16 test2;
 421                 u16 test3;
 422 
 423                 do {
 424                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 425                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 426                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 427                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 428 
 429                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 430                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 431                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 432                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 433 
 434                 *tsf = v3;
 435                 *tsf <<= 48;
 436                 tmp = v2;
 437                 tmp <<= 32;
 438                 *tsf |= tmp;
 439                 tmp = v1;
 440                 tmp <<= 16;
 441                 *tsf |= tmp;
 442                 *tsf |= v0;
 443         }
 444 }
 445 
 446 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 447 {
 448         u32 status;
 449 
 450         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 451         status |= B43legacy_MACCTL_TBTTHOLD;
 452         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 453 }
 454 
 455 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 456 {
 457         u32 status;
 458 
 459         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 460         status &= ~B43legacy_MACCTL_TBTTHOLD;
 461         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 462 }
 463 
 464 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 465 {
 466         /* Be careful with the in-progress timer.
 467          * First zero out the low register, so we have a full
 468          * register-overflow duration to complete the operation.
 469          */
 470         if (dev->dev->id.revision >= 3) {
 471                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 472                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 473 
 474                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 475                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 476                                     hi);
 477                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 478                                     lo);
 479         } else {
 480                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 481                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 482                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 483                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 484 
 485                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 486                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 487                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 488                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 489                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 490         }
 491 }
 492 
 493 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 494 {
 495         b43legacy_time_lock(dev);
 496         b43legacy_tsf_write_locked(dev, tsf);
 497         b43legacy_time_unlock(dev);
 498 }
 499 
 500 static
 501 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 502                              u16 offset, const u8 *mac)
 503 {
 504         static const u8 zero_addr[ETH_ALEN] = { 0 };
 505         u16 data;
 506 
 507         if (!mac)
 508                 mac = zero_addr;
 509 
 510         offset |= 0x0020;
 511         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 512 
 513         data = mac[0];
 514         data |= mac[1] << 8;
 515         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 516         data = mac[2];
 517         data |= mac[3] << 8;
 518         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 519         data = mac[4];
 520         data |= mac[5] << 8;
 521         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 522 }
 523 
 524 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 525 {
 526         static const u8 zero_addr[ETH_ALEN] = { 0 };
 527         const u8 *mac = dev->wl->mac_addr;
 528         const u8 *bssid = dev->wl->bssid;
 529         u8 mac_bssid[ETH_ALEN * 2];
 530         int i;
 531         u32 tmp;
 532 
 533         if (!bssid)
 534                 bssid = zero_addr;
 535         if (!mac)
 536                 mac = zero_addr;
 537 
 538         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 539 
 540         memcpy(mac_bssid, mac, ETH_ALEN);
 541         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 542 
 543         /* Write our MAC address and BSSID to template ram */
 544         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 545                 tmp =  (u32)(mac_bssid[i + 0]);
 546                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 547                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 548                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 549                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 550                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 551                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 552         }
 553 }
 554 
 555 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 556 {
 557         b43legacy_write_mac_bssid_templates(dev);
 558         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 559                                 dev->wl->mac_addr);
 560 }
 561 
 562 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 563                                     u16 slot_time)
 564 {
 565         /* slot_time is in usec. */
 566         if (dev->phy.type != B43legacy_PHYTYPE_G)
 567                 return;
 568         b43legacy_write16(dev, 0x684, 510 + slot_time);
 569         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 570                               slot_time);
 571 }
 572 
 573 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 574 {
 575         b43legacy_set_slot_time(dev, 9);
 576 }
 577 
 578 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 579 {
 580         b43legacy_set_slot_time(dev, 20);
 581 }
 582 
 583 /* Synchronize IRQ top- and bottom-half.
 584  * IRQs must be masked before calling this.
 585  * This must not be called with the irq_lock held.
 586  */
 587 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 588 {
 589         synchronize_irq(dev->dev->irq);
 590         tasklet_kill(&dev->isr_tasklet);
 591 }
 592 
 593 /* DummyTransmission function, as documented on
 594  * http://bcm-specs.sipsolutions.net/DummyTransmission
 595  */
 596 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 597 {
 598         struct b43legacy_phy *phy = &dev->phy;
 599         unsigned int i;
 600         unsigned int max_loop;
 601         u16 value;
 602         u32 buffer[5] = {
 603                 0x00000000,
 604                 0x00D40000,
 605                 0x00000000,
 606                 0x01000000,
 607                 0x00000000,
 608         };
 609 
 610         switch (phy->type) {
 611         case B43legacy_PHYTYPE_B:
 612         case B43legacy_PHYTYPE_G:
 613                 max_loop = 0xFA;
 614                 buffer[0] = 0x000B846E;
 615                 break;
 616         default:
 617                 B43legacy_BUG_ON(1);
 618                 return;
 619         }
 620 
 621         for (i = 0; i < 5; i++)
 622                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 623 
 624         /* dummy read follows */
 625         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 626 
 627         b43legacy_write16(dev, 0x0568, 0x0000);
 628         b43legacy_write16(dev, 0x07C0, 0x0000);
 629         b43legacy_write16(dev, 0x050C, 0x0000);
 630         b43legacy_write16(dev, 0x0508, 0x0000);
 631         b43legacy_write16(dev, 0x050A, 0x0000);
 632         b43legacy_write16(dev, 0x054C, 0x0000);
 633         b43legacy_write16(dev, 0x056A, 0x0014);
 634         b43legacy_write16(dev, 0x0568, 0x0826);
 635         b43legacy_write16(dev, 0x0500, 0x0000);
 636         b43legacy_write16(dev, 0x0502, 0x0030);
 637 
 638         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 639                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 640         for (i = 0x00; i < max_loop; i++) {
 641                 value = b43legacy_read16(dev, 0x050E);
 642                 if (value & 0x0080)
 643                         break;
 644                 udelay(10);
 645         }
 646         for (i = 0x00; i < 0x0A; i++) {
 647                 value = b43legacy_read16(dev, 0x050E);
 648                 if (value & 0x0400)
 649                         break;
 650                 udelay(10);
 651         }
 652         for (i = 0x00; i < 0x0A; i++) {
 653                 value = b43legacy_read16(dev, 0x0690);
 654                 if (!(value & 0x0100))
 655                         break;
 656                 udelay(10);
 657         }
 658         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 659                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 660 }
 661 
 662 /* Turn the Analog ON/OFF */
 663 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 664 {
 665         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 666 }
 667 
 668 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 669 {
 670         u32 tmslow;
 671         u32 macctl;
 672 
 673         flags |= B43legacy_TMSLOW_PHYCLKEN;
 674         flags |= B43legacy_TMSLOW_PHYRESET;
 675         ssb_device_enable(dev->dev, flags);
 676         msleep(2); /* Wait for the PLL to turn on. */
 677 
 678         /* Now take the PHY out of Reset again */
 679         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 680         tmslow |= SSB_TMSLOW_FGC;
 681         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 682         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 683         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 684         msleep(1);
 685         tmslow &= ~SSB_TMSLOW_FGC;
 686         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 687         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 688         msleep(1);
 689 
 690         /* Turn Analog ON */
 691         b43legacy_switch_analog(dev, 1);
 692 
 693         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 694         macctl &= ~B43legacy_MACCTL_GMODE;
 695         if (flags & B43legacy_TMSLOW_GMODE) {
 696                 macctl |= B43legacy_MACCTL_GMODE;
 697                 dev->phy.gmode = true;
 698         } else
 699                 dev->phy.gmode = false;
 700         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 701         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 702 }
 703 
 704 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 705 {
 706         u32 v0;
 707         u32 v1;
 708         u16 tmp;
 709         struct b43legacy_txstatus stat;
 710 
 711         while (1) {
 712                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 713                 if (!(v0 & 0x00000001))
 714                         break;
 715                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 716 
 717                 stat.cookie = (v0 >> 16);
 718                 stat.seq = (v1 & 0x0000FFFF);
 719                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 720                 tmp = (v0 & 0x0000FFFF);
 721                 stat.frame_count = ((tmp & 0xF000) >> 12);
 722                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 723                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 724                 stat.pm_indicated = !!(tmp & 0x0080);
 725                 stat.intermediate = !!(tmp & 0x0040);
 726                 stat.for_ampdu = !!(tmp & 0x0020);
 727                 stat.acked = !!(tmp & 0x0002);
 728 
 729                 b43legacy_handle_txstatus(dev, &stat);
 730         }
 731 }
 732 
 733 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 734 {
 735         u32 dummy;
 736 
 737         if (dev->dev->id.revision < 5)
 738                 return;
 739         /* Read all entries from the microcode TXstatus FIFO
 740          * and throw them away.
 741          */
 742         while (1) {
 743                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 744                 if (!(dummy & 0x00000001))
 745                         break;
 746                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 747         }
 748 }
 749 
 750 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 751 {
 752         u32 val = 0;
 753 
 754         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 755         val <<= 16;
 756         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 757 
 758         return val;
 759 }
 760 
 761 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 762 {
 763         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 764                               (jssi & 0x0000FFFF));
 765         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 766                               (jssi & 0xFFFF0000) >> 16);
 767 }
 768 
 769 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 770 {
 771         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 772         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 773                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 774                           | B43legacy_MACCMD_BGNOISE);
 775         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 776                             dev->phy.channel);
 777 }
 778 
 779 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 780 {
 781         /* Top half of Link Quality calculation. */
 782 
 783         if (dev->noisecalc.calculation_running)
 784                 return;
 785         dev->noisecalc.channel_at_start = dev->phy.channel;
 786         dev->noisecalc.calculation_running = true;
 787         dev->noisecalc.nr_samples = 0;
 788 
 789         b43legacy_generate_noise_sample(dev);
 790 }
 791 
 792 static void handle_irq_noise(struct b43legacy_wldev *dev)
 793 {
 794         struct b43legacy_phy *phy = &dev->phy;
 795         u16 tmp;
 796         u8 noise[4];
 797         u8 i;
 798         u8 j;
 799         s32 average;
 800 
 801         /* Bottom half of Link Quality calculation. */
 802 
 803         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 804         if (dev->noisecalc.channel_at_start != phy->channel)
 805                 goto drop_calculation;
 806         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 807         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 808             noise[2] == 0x7F || noise[3] == 0x7F)
 809                 goto generate_new;
 810 
 811         /* Get the noise samples. */
 812         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 813         i = dev->noisecalc.nr_samples;
 814         noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 815         noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 816         noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 817         noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 818         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 819         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 820         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 821         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 822         dev->noisecalc.nr_samples++;
 823         if (dev->noisecalc.nr_samples == 8) {
 824                 /* Calculate the Link Quality by the noise samples. */
 825                 average = 0;
 826                 for (i = 0; i < 8; i++) {
 827                         for (j = 0; j < 4; j++)
 828                                 average += dev->noisecalc.samples[i][j];
 829                 }
 830                 average /= (8 * 4);
 831                 average *= 125;
 832                 average += 64;
 833                 average /= 128;
 834                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 835                                              0x40C);
 836                 tmp = (tmp / 128) & 0x1F;
 837                 if (tmp >= 8)
 838                         average += 2;
 839                 else
 840                         average -= 25;
 841                 if (tmp == 8)
 842                         average -= 72;
 843                 else
 844                         average -= 48;
 845 
 846                 dev->stats.link_noise = average;
 847 drop_calculation:
 848                 dev->noisecalc.calculation_running = false;
 849                 return;
 850         }
 851 generate_new:
 852         b43legacy_generate_noise_sample(dev);
 853 }
 854 
 855 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 856 {
 857         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
 858                 /* TODO: PS TBTT */
 859         } else {
 860                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 861                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 862         }
 863         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
 864                 dev->dfq_valid = true;
 865 }
 866 
 867 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 868 {
 869         if (dev->dfq_valid) {
 870                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 871                                   b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 872                                   | B43legacy_MACCMD_DFQ_VALID);
 873                 dev->dfq_valid = false;
 874         }
 875 }
 876 
 877 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 878 {
 879         u32 tmp;
 880 
 881         /* TODO: AP mode. */
 882 
 883         while (1) {
 884                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 885                 if (!(tmp & 0x00000008))
 886                         break;
 887         }
 888         /* 16bit write is odd, but correct. */
 889         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 890 }
 891 
 892 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 893                                             const u8 *data, u16 size,
 894                                             u16 ram_offset,
 895                                             u16 shm_size_offset, u8 rate)
 896 {
 897         u32 i;
 898         u32 tmp;
 899         struct b43legacy_plcp_hdr4 plcp;
 900 
 901         plcp.data = 0;
 902         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 903         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 904         ram_offset += sizeof(u32);
 905         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 906          * So leave the first two bytes of the next write blank.
 907          */
 908         tmp = (u32)(data[0]) << 16;
 909         tmp |= (u32)(data[1]) << 24;
 910         b43legacy_ram_write(dev, ram_offset, tmp);
 911         ram_offset += sizeof(u32);
 912         for (i = 2; i < size; i += sizeof(u32)) {
 913                 tmp = (u32)(data[i + 0]);
 914                 if (i + 1 < size)
 915                         tmp |= (u32)(data[i + 1]) << 8;
 916                 if (i + 2 < size)
 917                         tmp |= (u32)(data[i + 2]) << 16;
 918                 if (i + 3 < size)
 919                         tmp |= (u32)(data[i + 3]) << 24;
 920                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 921         }
 922         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 923                               size + sizeof(struct b43legacy_plcp_hdr6));
 924 }
 925 
 926 /* Convert a b43legacy antenna number value to the PHY TX control value. */
 927 static u16 b43legacy_antenna_to_phyctl(int antenna)
 928 {
 929         switch (antenna) {
 930         case B43legacy_ANTENNA0:
 931                 return B43legacy_TX4_PHY_ANT0;
 932         case B43legacy_ANTENNA1:
 933                 return B43legacy_TX4_PHY_ANT1;
 934         }
 935         return B43legacy_TX4_PHY_ANTLAST;
 936 }
 937 
 938 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 939                                             u16 ram_offset,
 940                                             u16 shm_size_offset)
 941 {
 942 
 943         unsigned int i, len, variable_len;
 944         const struct ieee80211_mgmt *bcn;
 945         const u8 *ie;
 946         bool tim_found = false;
 947         unsigned int rate;
 948         u16 ctl;
 949         int antenna;
 950         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
 951 
 952         bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
 953         len = min_t(size_t, dev->wl->current_beacon->len,
 954                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 955         rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
 956 
 957         b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
 958                                         shm_size_offset, rate);
 959 
 960         /* Write the PHY TX control parameters. */
 961         antenna = B43legacy_ANTENNA_DEFAULT;
 962         antenna = b43legacy_antenna_to_phyctl(antenna);
 963         ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 964                                    B43legacy_SHM_SH_BEACPHYCTL);
 965         /* We can't send beacons with short preamble. Would get PHY errors. */
 966         ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
 967         ctl &= ~B43legacy_TX4_PHY_ANT;
 968         ctl &= ~B43legacy_TX4_PHY_ENC;
 969         ctl |= antenna;
 970         ctl |= B43legacy_TX4_PHY_ENC_CCK;
 971         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 972                               B43legacy_SHM_SH_BEACPHYCTL, ctl);
 973 
 974         /* Find the position of the TIM and the DTIM_period value
 975          * and write them to SHM. */
 976         ie = bcn->u.beacon.variable;
 977         variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
 978         for (i = 0; i < variable_len - 2; ) {
 979                 uint8_t ie_id, ie_len;
 980 
 981                 ie_id = ie[i];
 982                 ie_len = ie[i + 1];
 983                 if (ie_id == 5) {
 984                         u16 tim_position;
 985                         u16 dtim_period;
 986                         /* This is the TIM Information Element */
 987 
 988                         /* Check whether the ie_len is in the beacon data range. */
 989                         if (variable_len < ie_len + 2 + i)
 990                                 break;
 991                         /* A valid TIM is at least 4 bytes long. */
 992                         if (ie_len < 4)
 993                                 break;
 994                         tim_found = true;
 995 
 996                         tim_position = sizeof(struct b43legacy_plcp_hdr6);
 997                         tim_position += offsetof(struct ieee80211_mgmt,
 998                                                  u.beacon.variable);
 999                         tim_position += i;
1000 
1001                         dtim_period = ie[i + 3];
1002 
1003                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1004                                         B43legacy_SHM_SH_TIMPOS, tim_position);
1005                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1006                                         B43legacy_SHM_SH_DTIMP, dtim_period);
1007                         break;
1008                 }
1009                 i += ie_len + 2;
1010         }
1011         if (!tim_found) {
1012                 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1013                               "beacon template packet. AP or IBSS operation "
1014                               "may be broken.\n");
1015         } else
1016                 b43legacydbg(dev->wl, "Updated beacon template\n");
1017 }
1018 
1019 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1020                                             u16 shm_offset, u16 size,
1021                                             struct ieee80211_rate *rate)
1022 {
1023         struct b43legacy_plcp_hdr4 plcp;
1024         u32 tmp;
1025         __le16 dur;
1026 
1027         plcp.data = 0;
1028         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1029         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1030                                                dev->wl->vif,
1031                                                NL80211_BAND_2GHZ,
1032                                                size,
1033                                                rate);
1034         /* Write PLCP in two parts and timing for packet transfer */
1035         tmp = le32_to_cpu(plcp.data);
1036         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1037                               tmp & 0xFFFF);
1038         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1039                               tmp >> 16);
1040         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1041                               le16_to_cpu(dur));
1042 }
1043 
1044 /* Instead of using custom probe response template, this function
1045  * just patches custom beacon template by:
1046  * 1) Changing packet type
1047  * 2) Patching duration field
1048  * 3) Stripping TIM
1049  */
1050 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1051                                                u16 *dest_size,
1052                                                struct ieee80211_rate *rate)
1053 {
1054         const u8 *src_data;
1055         u8 *dest_data;
1056         u16 src_size, elem_size, src_pos, dest_pos;
1057         __le16 dur;
1058         struct ieee80211_hdr *hdr;
1059         size_t ie_start;
1060 
1061         src_size = dev->wl->current_beacon->len;
1062         src_data = (const u8 *)dev->wl->current_beacon->data;
1063 
1064         /* Get the start offset of the variable IEs in the packet. */
1065         ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1066         B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1067                                                u.beacon.variable));
1068 
1069         if (B43legacy_WARN_ON(src_size < ie_start))
1070                 return NULL;
1071 
1072         dest_data = kmalloc(src_size, GFP_ATOMIC);
1073         if (unlikely(!dest_data))
1074                 return NULL;
1075 
1076         /* Copy the static data and all Information Elements, except the TIM. */
1077         memcpy(dest_data, src_data, ie_start);
1078         src_pos = ie_start;
1079         dest_pos = ie_start;
1080         for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1081                 elem_size = src_data[src_pos + 1] + 2;
1082                 if (src_data[src_pos] == 5) {
1083                         /* This is the TIM. */
1084                         continue;
1085                 }
1086                 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1087                 dest_pos += elem_size;
1088         }
1089         *dest_size = dest_pos;
1090         hdr = (struct ieee80211_hdr *)dest_data;
1091 
1092         /* Set the frame control. */
1093         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1094                                          IEEE80211_STYPE_PROBE_RESP);
1095         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1096                                                dev->wl->vif,
1097                                                NL80211_BAND_2GHZ,
1098                                                *dest_size,
1099                                                rate);
1100         hdr->duration_id = dur;
1101 
1102         return dest_data;
1103 }
1104 
1105 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1106                                                 u16 ram_offset,
1107                                                 u16 shm_size_offset,
1108                                                 struct ieee80211_rate *rate)
1109 {
1110         const u8 *probe_resp_data;
1111         u16 size;
1112 
1113         size = dev->wl->current_beacon->len;
1114         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1115         if (unlikely(!probe_resp_data))
1116                 return;
1117 
1118         /* Looks like PLCP headers plus packet timings are stored for
1119          * all possible basic rates
1120          */
1121         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1122                                         &b43legacy_b_ratetable[0]);
1123         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1124                                         &b43legacy_b_ratetable[1]);
1125         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1126                                         &b43legacy_b_ratetable[2]);
1127         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1128                                         &b43legacy_b_ratetable[3]);
1129 
1130         size = min_t(size_t, size,
1131                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1132         b43legacy_write_template_common(dev, probe_resp_data,
1133                                         size, ram_offset,
1134                                         shm_size_offset, rate->hw_value);
1135         kfree(probe_resp_data);
1136 }
1137 
1138 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1139 {
1140         struct b43legacy_wl *wl = dev->wl;
1141 
1142         if (wl->beacon0_uploaded)
1143                 return;
1144         b43legacy_write_beacon_template(dev, 0x68, 0x18);
1145         /* FIXME: Probe resp upload doesn't really belong here,
1146          *        but we don't use that feature anyway. */
1147         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1148                                       &__b43legacy_ratetable[3]);
1149         wl->beacon0_uploaded = true;
1150 }
1151 
1152 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1153 {
1154         struct b43legacy_wl *wl = dev->wl;
1155 
1156         if (wl->beacon1_uploaded)
1157                 return;
1158         b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1159         wl->beacon1_uploaded = true;
1160 }
1161 
1162 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1163 {
1164         struct b43legacy_wl *wl = dev->wl;
1165         u32 cmd, beacon0_valid, beacon1_valid;
1166 
1167         if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1168                 return;
1169 
1170         /* This is the bottom half of the asynchronous beacon update. */
1171 
1172         /* Ignore interrupt in the future. */
1173         dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1174 
1175         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1176         beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1177         beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1178 
1179         /* Schedule interrupt manually, if busy. */
1180         if (beacon0_valid && beacon1_valid) {
1181                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1182                 dev->irq_mask |= B43legacy_IRQ_BEACON;
1183                 return;
1184         }
1185 
1186         if (unlikely(wl->beacon_templates_virgin)) {
1187                 /* We never uploaded a beacon before.
1188                  * Upload both templates now, but only mark one valid. */
1189                 wl->beacon_templates_virgin = false;
1190                 b43legacy_upload_beacon0(dev);
1191                 b43legacy_upload_beacon1(dev);
1192                 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1193                 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1194                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1195         } else {
1196                 if (!beacon0_valid) {
1197                         b43legacy_upload_beacon0(dev);
1198                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1199                         cmd |= B43legacy_MACCMD_BEACON0_VALID;
1200                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1201                 } else if (!beacon1_valid) {
1202                         b43legacy_upload_beacon1(dev);
1203                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1204                         cmd |= B43legacy_MACCMD_BEACON1_VALID;
1205                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1206                 }
1207         }
1208 }
1209 
1210 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1211 {
1212         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1213                                          beacon_update_trigger);
1214         struct b43legacy_wldev *dev;
1215 
1216         mutex_lock(&wl->mutex);
1217         dev = wl->current_dev;
1218         if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1219                 spin_lock_irq(&wl->irq_lock);
1220                 /* Update beacon right away or defer to IRQ. */
1221                 handle_irq_beacon(dev);
1222                 /* The handler might have updated the IRQ mask. */
1223                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1224                                   dev->irq_mask);
1225                 spin_unlock_irq(&wl->irq_lock);
1226         }
1227         mutex_unlock(&wl->mutex);
1228 }
1229 
1230 /* Asynchronously update the packet templates in template RAM.
1231  * Locking: Requires wl->irq_lock to be locked. */
1232 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1233 {
1234         struct sk_buff *beacon;
1235         /* This is the top half of the ansynchronous beacon update. The bottom
1236          * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1237          * sending an invalid beacon. This can happen for example, if the
1238          * firmware transmits a beacon while we are updating it. */
1239 
1240         /* We could modify the existing beacon and set the aid bit in the TIM
1241          * field, but that would probably require resizing and moving of data
1242          * within the beacon template. Simply request a new beacon and let
1243          * mac80211 do the hard work. */
1244         beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1245         if (unlikely(!beacon))
1246                 return;
1247 
1248         if (wl->current_beacon)
1249                 dev_kfree_skb_any(wl->current_beacon);
1250         wl->current_beacon = beacon;
1251         wl->beacon0_uploaded = false;
1252         wl->beacon1_uploaded = false;
1253         ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1254 }
1255 
1256 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1257                                      u16 beacon_int)
1258 {
1259         b43legacy_time_lock(dev);
1260         if (dev->dev->id.revision >= 3) {
1261                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1262                                  (beacon_int << 16));
1263                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1264                                  (beacon_int << 10));
1265         } else {
1266                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1267                 b43legacy_write16(dev, 0x610, beacon_int);
1268         }
1269         b43legacy_time_unlock(dev);
1270         b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1271 }
1272 
1273 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1274 {
1275 }
1276 
1277 /* Interrupt handler bottom-half */
1278 static void b43legacy_interrupt_tasklet(unsigned long data)
1279 {
1280         struct b43legacy_wldev *dev = (struct b43legacy_wldev *)data;
1281         u32 reason;
1282         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1283         u32 merged_dma_reason = 0;
1284         int i;
1285         unsigned long flags;
1286 
1287         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1288 
1289         B43legacy_WARN_ON(b43legacy_status(dev) <
1290                           B43legacy_STAT_INITIALIZED);
1291 
1292         reason = dev->irq_reason;
1293         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1294                 dma_reason[i] = dev->dma_reason[i];
1295                 merged_dma_reason |= dma_reason[i];
1296         }
1297 
1298         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1299                 b43legacyerr(dev->wl, "MAC transmission error\n");
1300 
1301         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1302                 b43legacyerr(dev->wl, "PHY transmission error\n");
1303                 rmb();
1304                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1305                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1306                                               "restarting the controller\n");
1307                         b43legacy_controller_restart(dev, "PHY TX errors");
1308                 }
1309         }
1310 
1311         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1312                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1313                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1314                         b43legacyerr(dev->wl, "Fatal DMA error: "
1315                                "0x%08X, 0x%08X, 0x%08X, "
1316                                "0x%08X, 0x%08X, 0x%08X\n",
1317                                dma_reason[0], dma_reason[1],
1318                                dma_reason[2], dma_reason[3],
1319                                dma_reason[4], dma_reason[5]);
1320                         b43legacy_controller_restart(dev, "DMA error");
1321                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1322                         return;
1323                 }
1324                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1325                         b43legacyerr(dev->wl, "DMA error: "
1326                                "0x%08X, 0x%08X, 0x%08X, "
1327                                "0x%08X, 0x%08X, 0x%08X\n",
1328                                dma_reason[0], dma_reason[1],
1329                                dma_reason[2], dma_reason[3],
1330                                dma_reason[4], dma_reason[5]);
1331         }
1332 
1333         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1334                 handle_irq_ucode_debug(dev);
1335         if (reason & B43legacy_IRQ_TBTT_INDI)
1336                 handle_irq_tbtt_indication(dev);
1337         if (reason & B43legacy_IRQ_ATIM_END)
1338                 handle_irq_atim_end(dev);
1339         if (reason & B43legacy_IRQ_BEACON)
1340                 handle_irq_beacon(dev);
1341         if (reason & B43legacy_IRQ_PMQ)
1342                 handle_irq_pmq(dev);
1343         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1344                 ;/*TODO*/
1345         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1346                 handle_irq_noise(dev);
1347 
1348         /* Check the DMA reason registers for received data. */
1349         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1350                 if (b43legacy_using_pio(dev))
1351                         b43legacy_pio_rx(dev->pio.queue0);
1352                 else
1353                         b43legacy_dma_rx(dev->dma.rx_ring0);
1354         }
1355         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1356         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1357         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1358                 if (b43legacy_using_pio(dev))
1359                         b43legacy_pio_rx(dev->pio.queue3);
1360                 else
1361                         b43legacy_dma_rx(dev->dma.rx_ring3);
1362         }
1363         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1364         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1365 
1366         if (reason & B43legacy_IRQ_TX_OK)
1367                 handle_irq_transmit_status(dev);
1368 
1369         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1370         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1371 }
1372 
1373 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1374                                u16 base, int queueidx)
1375 {
1376         u16 rxctl;
1377 
1378         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1379         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1380                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1381         else
1382                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1383 }
1384 
1385 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1386 {
1387         if (b43legacy_using_pio(dev) &&
1388             (dev->dev->id.revision < 3) &&
1389             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1390                 /* Apply a PIO specific workaround to the dma_reasons */
1391                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1392                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1393                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1394                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1395         }
1396 
1397         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1398 
1399         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1400                           dev->dma_reason[0]);
1401         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1402                           dev->dma_reason[1]);
1403         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1404                           dev->dma_reason[2]);
1405         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1406                           dev->dma_reason[3]);
1407         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1408                           dev->dma_reason[4]);
1409         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1410                           dev->dma_reason[5]);
1411 }
1412 
1413 /* Interrupt handler top-half */
1414 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1415 {
1416         irqreturn_t ret = IRQ_NONE;
1417         struct b43legacy_wldev *dev = dev_id;
1418         u32 reason;
1419 
1420         B43legacy_WARN_ON(!dev);
1421 
1422         spin_lock(&dev->wl->irq_lock);
1423 
1424         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1425                 /* This can only happen on shared IRQ lines. */
1426                 goto out;
1427         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1428         if (reason == 0xffffffff) /* shared IRQ */
1429                 goto out;
1430         ret = IRQ_HANDLED;
1431         reason &= dev->irq_mask;
1432         if (!reason)
1433                 goto out;
1434 
1435         dev->dma_reason[0] = b43legacy_read32(dev,
1436                                               B43legacy_MMIO_DMA0_REASON)
1437                                               & 0x0001DC00;
1438         dev->dma_reason[1] = b43legacy_read32(dev,
1439                                               B43legacy_MMIO_DMA1_REASON)
1440                                               & 0x0000DC00;
1441         dev->dma_reason[2] = b43legacy_read32(dev,
1442                                               B43legacy_MMIO_DMA2_REASON)
1443                                               & 0x0000DC00;
1444         dev->dma_reason[3] = b43legacy_read32(dev,
1445                                               B43legacy_MMIO_DMA3_REASON)
1446                                               & 0x0001DC00;
1447         dev->dma_reason[4] = b43legacy_read32(dev,
1448                                               B43legacy_MMIO_DMA4_REASON)
1449                                               & 0x0000DC00;
1450         dev->dma_reason[5] = b43legacy_read32(dev,
1451                                               B43legacy_MMIO_DMA5_REASON)
1452                                               & 0x0000DC00;
1453 
1454         b43legacy_interrupt_ack(dev, reason);
1455         /* Disable all IRQs. They are enabled again in the bottom half. */
1456         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1457         /* Save the reason code and call our bottom half. */
1458         dev->irq_reason = reason;
1459         tasklet_schedule(&dev->isr_tasklet);
1460 out:
1461         spin_unlock(&dev->wl->irq_lock);
1462 
1463         return ret;
1464 }
1465 
1466 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1467 {
1468         release_firmware(dev->fw.ucode);
1469         dev->fw.ucode = NULL;
1470         release_firmware(dev->fw.pcm);
1471         dev->fw.pcm = NULL;
1472         release_firmware(dev->fw.initvals);
1473         dev->fw.initvals = NULL;
1474         release_firmware(dev->fw.initvals_band);
1475         dev->fw.initvals_band = NULL;
1476 }
1477 
1478 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1479 {
1480         b43legacyerr(wl, "You must go to http://wireless.kernel.org/en/users/"
1481                      "Drivers/b43#devicefirmware "
1482                      "and download the correct firmware (version 3).\n");
1483 }
1484 
1485 static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
1486 {
1487         struct b43legacy_wldev *dev = context;
1488 
1489         dev->fwp = firmware;
1490         complete(&dev->fw_load_complete);
1491 }
1492 
1493 static int do_request_fw(struct b43legacy_wldev *dev,
1494                          const char *name,
1495                          const struct firmware **fw, bool async)
1496 {
1497         char path[sizeof(modparam_fwpostfix) + 32];
1498         struct b43legacy_fw_header *hdr;
1499         u32 size;
1500         int err;
1501 
1502         if (!name)
1503                 return 0;
1504 
1505         snprintf(path, ARRAY_SIZE(path),
1506                  "b43legacy%s/%s.fw",
1507                  modparam_fwpostfix, name);
1508         b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
1509         if (async) {
1510                 init_completion(&dev->fw_load_complete);
1511                 err = request_firmware_nowait(THIS_MODULE, 1, path,
1512                                               dev->dev->dev, GFP_KERNEL,
1513                                               dev, b43legacy_fw_cb);
1514                 if (err) {
1515                         b43legacyerr(dev->wl, "Unable to load firmware\n");
1516                         return err;
1517                 }
1518                 /* stall here until fw ready */
1519                 wait_for_completion(&dev->fw_load_complete);
1520                 if (!dev->fwp)
1521                         err = -EINVAL;
1522                 *fw = dev->fwp;
1523         } else {
1524                 err = request_firmware(fw, path, dev->dev->dev);
1525         }
1526         if (err) {
1527                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1528                        "or load failed.\n", path);
1529                 return err;
1530         }
1531         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1532                 goto err_format;
1533         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1534         switch (hdr->type) {
1535         case B43legacy_FW_TYPE_UCODE:
1536         case B43legacy_FW_TYPE_PCM:
1537                 size = be32_to_cpu(hdr->size);
1538                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1539                         goto err_format;
1540                 /* fallthrough */
1541         case B43legacy_FW_TYPE_IV:
1542                 if (hdr->ver != 1)
1543                         goto err_format;
1544                 break;
1545         default:
1546                 goto err_format;
1547         }
1548 
1549         return err;
1550 
1551 err_format:
1552         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1553         return -EPROTO;
1554 }
1555 
1556 static int b43legacy_one_core_attach(struct ssb_device *dev,
1557                                      struct b43legacy_wl *wl);
1558 static void b43legacy_one_core_detach(struct ssb_device *dev);
1559 
1560 static void b43legacy_request_firmware(struct work_struct *work)
1561 {
1562         struct b43legacy_wl *wl = container_of(work,
1563                                   struct b43legacy_wl, firmware_load);
1564         struct b43legacy_wldev *dev = wl->current_dev;
1565         struct b43legacy_firmware *fw = &dev->fw;
1566         const u8 rev = dev->dev->id.revision;
1567         const char *filename;
1568         int err;
1569 
1570         if (!fw->ucode) {
1571                 if (rev == 2)
1572                         filename = "ucode2";
1573                 else if (rev == 4)
1574                         filename = "ucode4";
1575                 else
1576                         filename = "ucode5";
1577                 err = do_request_fw(dev, filename, &fw->ucode, true);
1578                 if (err)
1579                         goto err_load;
1580         }
1581         if (!fw->pcm) {
1582                 if (rev < 5)
1583                         filename = "pcm4";
1584                 else
1585                         filename = "pcm5";
1586                 err = do_request_fw(dev, filename, &fw->pcm, false);
1587                 if (err)
1588                         goto err_load;
1589         }
1590         if (!fw->initvals) {
1591                 switch (dev->phy.type) {
1592                 case B43legacy_PHYTYPE_B:
1593                 case B43legacy_PHYTYPE_G:
1594                         if ((rev >= 5) && (rev <= 10))
1595                                 filename = "b0g0initvals5";
1596                         else if (rev == 2 || rev == 4)
1597                                 filename = "b0g0initvals2";
1598                         else
1599                                 goto err_no_initvals;
1600                         break;
1601                 default:
1602                         goto err_no_initvals;
1603                 }
1604                 err = do_request_fw(dev, filename, &fw->initvals, false);
1605                 if (err)
1606                         goto err_load;
1607         }
1608         if (!fw->initvals_band) {
1609                 switch (dev->phy.type) {
1610                 case B43legacy_PHYTYPE_B:
1611                 case B43legacy_PHYTYPE_G:
1612                         if ((rev >= 5) && (rev <= 10))
1613                                 filename = "b0g0bsinitvals5";
1614                         else if (rev >= 11)
1615                                 filename = NULL;
1616                         else if (rev == 2 || rev == 4)
1617                                 filename = NULL;
1618                         else
1619                                 goto err_no_initvals;
1620                         break;
1621                 default:
1622                         goto err_no_initvals;
1623                 }
1624                 err = do_request_fw(dev, filename, &fw->initvals_band, false);
1625                 if (err)
1626                         goto err_load;
1627         }
1628         err = ieee80211_register_hw(wl->hw);
1629         if (err)
1630                 goto err_one_core_detach;
1631         return;
1632 
1633 err_one_core_detach:
1634         b43legacy_one_core_detach(dev->dev);
1635         goto error;
1636 
1637 err_load:
1638         b43legacy_print_fw_helptext(dev->wl);
1639         goto error;
1640 
1641 err_no_initvals:
1642         err = -ENODEV;
1643         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1644                "core rev %u\n", dev->phy.type, rev);
1645         goto error;
1646 
1647 error:
1648         b43legacy_release_firmware(dev);
1649         return;
1650 }
1651 
1652 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1653 {
1654         struct wiphy *wiphy = dev->wl->hw->wiphy;
1655         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1656         const __be32 *data;
1657         unsigned int i;
1658         unsigned int len;
1659         u16 fwrev;
1660         u16 fwpatch;
1661         u16 fwdate;
1662         u16 fwtime;
1663         u32 tmp, macctl;
1664         int err = 0;
1665 
1666         /* Jump the microcode PSM to offset 0 */
1667         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1668         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1669         macctl |= B43legacy_MACCTL_PSM_JMP0;
1670         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1671         /* Zero out all microcode PSM registers and shared memory. */
1672         for (i = 0; i < 64; i++)
1673                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1674         for (i = 0; i < 4096; i += 2)
1675                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1676 
1677         /* Upload Microcode. */
1678         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1679         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1680         b43legacy_shm_control_word(dev,
1681                                    B43legacy_SHM_UCODE |
1682                                    B43legacy_SHM_AUTOINC_W,
1683                                    0x0000);
1684         for (i = 0; i < len; i++) {
1685                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1686                                     be32_to_cpu(data[i]));
1687                 udelay(10);
1688         }
1689 
1690         if (dev->fw.pcm) {
1691                 /* Upload PCM data. */
1692                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1693                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1694                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1695                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1696                 /* No need for autoinc bit in SHM_HW */
1697                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1698                 for (i = 0; i < len; i++) {
1699                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1700                                           be32_to_cpu(data[i]));
1701                         udelay(10);
1702                 }
1703         }
1704 
1705         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1706                           B43legacy_IRQ_ALL);
1707 
1708         /* Start the microcode PSM */
1709         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1710         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1711         macctl |= B43legacy_MACCTL_PSM_RUN;
1712         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1713 
1714         /* Wait for the microcode to load and respond */
1715         i = 0;
1716         while (1) {
1717                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1718                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1719                         break;
1720                 i++;
1721                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1722                         b43legacyerr(dev->wl, "Microcode not responding\n");
1723                         b43legacy_print_fw_helptext(dev->wl);
1724                         err = -ENODEV;
1725                         goto error;
1726                 }
1727                 msleep_interruptible(50);
1728                 if (signal_pending(current)) {
1729                         err = -EINTR;
1730                         goto error;
1731                 }
1732         }
1733         /* dummy read follows */
1734         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1735 
1736         /* Get and check the revisions. */
1737         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1738                                      B43legacy_SHM_SH_UCODEREV);
1739         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1740                                        B43legacy_SHM_SH_UCODEPATCH);
1741         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1742                                       B43legacy_SHM_SH_UCODEDATE);
1743         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1744                                       B43legacy_SHM_SH_UCODETIME);
1745 
1746         if (fwrev > 0x128) {
1747                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1748                              " Only firmware from binary drivers version 3.x"
1749                              " is supported. You must change your firmware"
1750                              " files.\n");
1751                 b43legacy_print_fw_helptext(dev->wl);
1752                 err = -EOPNOTSUPP;
1753                 goto error;
1754         }
1755         b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1756                       "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1757                       (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1758                       (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1759                       fwtime & 0x1F);
1760 
1761         dev->fw.rev = fwrev;
1762         dev->fw.patch = fwpatch;
1763 
1764         snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1765                         dev->fw.rev, dev->fw.patch);
1766         wiphy->hw_version = dev->dev->id.coreid;
1767 
1768         return 0;
1769 
1770 error:
1771         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1772         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1773         macctl |= B43legacy_MACCTL_PSM_JMP0;
1774         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1775 
1776         return err;
1777 }
1778 
1779 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1780                                     const struct b43legacy_iv *ivals,
1781                                     size_t count,
1782                                     size_t array_size)
1783 {
1784         const struct b43legacy_iv *iv;
1785         u16 offset;
1786         size_t i;
1787         bool bit32;
1788 
1789         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1790         iv = ivals;
1791         for (i = 0; i < count; i++) {
1792                 if (array_size < sizeof(iv->offset_size))
1793                         goto err_format;
1794                 array_size -= sizeof(iv->offset_size);
1795                 offset = be16_to_cpu(iv->offset_size);
1796                 bit32 = !!(offset & B43legacy_IV_32BIT);
1797                 offset &= B43legacy_IV_OFFSET_MASK;
1798                 if (offset >= 0x1000)
1799                         goto err_format;
1800                 if (bit32) {
1801                         u32 value;
1802 
1803                         if (array_size < sizeof(iv->data.d32))
1804                                 goto err_format;
1805                         array_size -= sizeof(iv->data.d32);
1806 
1807                         value = get_unaligned_be32(&iv->data.d32);
1808                         b43legacy_write32(dev, offset, value);
1809 
1810                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1811                                                         sizeof(__be16) +
1812                                                         sizeof(__be32));
1813                 } else {
1814                         u16 value;
1815 
1816                         if (array_size < sizeof(iv->data.d16))
1817                                 goto err_format;
1818                         array_size -= sizeof(iv->data.d16);
1819 
1820                         value = be16_to_cpu(iv->data.d16);
1821                         b43legacy_write16(dev, offset, value);
1822 
1823                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1824                                                         sizeof(__be16) +
1825                                                         sizeof(__be16));
1826                 }
1827         }
1828         if (array_size)
1829                 goto err_format;
1830 
1831         return 0;
1832 
1833 err_format:
1834         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1835         b43legacy_print_fw_helptext(dev->wl);
1836 
1837         return -EPROTO;
1838 }
1839 
1840 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1841 {
1842         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1843         const struct b43legacy_fw_header *hdr;
1844         struct b43legacy_firmware *fw = &dev->fw;
1845         const struct b43legacy_iv *ivals;
1846         size_t count;
1847         int err;
1848 
1849         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1850         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1851         count = be32_to_cpu(hdr->size);
1852         err = b43legacy_write_initvals(dev, ivals, count,
1853                                  fw->initvals->size - hdr_len);
1854         if (err)
1855                 goto out;
1856         if (fw->initvals_band) {
1857                 hdr = (const struct b43legacy_fw_header *)
1858                       (fw->initvals_band->data);
1859                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1860                         + hdr_len);
1861                 count = be32_to_cpu(hdr->size);
1862                 err = b43legacy_write_initvals(dev, ivals, count,
1863                                          fw->initvals_band->size - hdr_len);
1864                 if (err)
1865                         goto out;
1866         }
1867 out:
1868 
1869         return err;
1870 }
1871 
1872 /* Initialize the GPIOs
1873  * http://bcm-specs.sipsolutions.net/GPIO
1874  */
1875 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1876 {
1877         struct ssb_bus *bus = dev->dev->bus;
1878         struct ssb_device *gpiodev, *pcidev = NULL;
1879         u32 mask;
1880         u32 set;
1881 
1882         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1883                           b43legacy_read32(dev,
1884                           B43legacy_MMIO_MACCTL)
1885                           & 0xFFFF3FFF);
1886 
1887         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1888                           b43legacy_read16(dev,
1889                           B43legacy_MMIO_GPIO_MASK)
1890                           | 0x000F);
1891 
1892         mask = 0x0000001F;
1893         set = 0x0000000F;
1894         if (dev->dev->bus->chip_id == 0x4301) {
1895                 mask |= 0x0060;
1896                 set |= 0x0060;
1897         }
1898         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1899                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1900                                   b43legacy_read16(dev,
1901                                   B43legacy_MMIO_GPIO_MASK)
1902                                   | 0x0200);
1903                 mask |= 0x0200;
1904                 set |= 0x0200;
1905         }
1906         if (dev->dev->id.revision >= 2)
1907                 mask  |= 0x0010; /* FIXME: This is redundant. */
1908 
1909 #ifdef CONFIG_SSB_DRIVER_PCICORE
1910         pcidev = bus->pcicore.dev;
1911 #endif
1912         gpiodev = bus->chipco.dev ? : pcidev;
1913         if (!gpiodev)
1914                 return 0;
1915         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1916                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1917                      & ~mask) | set);
1918 
1919         return 0;
1920 }
1921 
1922 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1923 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1924 {
1925         struct ssb_bus *bus = dev->dev->bus;
1926         struct ssb_device *gpiodev, *pcidev = NULL;
1927 
1928 #ifdef CONFIG_SSB_DRIVER_PCICORE
1929         pcidev = bus->pcicore.dev;
1930 #endif
1931         gpiodev = bus->chipco.dev ? : pcidev;
1932         if (!gpiodev)
1933                 return;
1934         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1935 }
1936 
1937 /* http://bcm-specs.sipsolutions.net/EnableMac */
1938 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1939 {
1940         dev->mac_suspended--;
1941         B43legacy_WARN_ON(dev->mac_suspended < 0);
1942         B43legacy_WARN_ON(irqs_disabled());
1943         if (dev->mac_suspended == 0) {
1944                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1945                                   b43legacy_read32(dev,
1946                                   B43legacy_MMIO_MACCTL)
1947                                   | B43legacy_MACCTL_ENABLED);
1948                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1949                                   B43legacy_IRQ_MAC_SUSPENDED);
1950                 /* the next two are dummy reads */
1951                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1952                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1953                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1954 
1955                 /* Re-enable IRQs. */
1956                 spin_lock_irq(&dev->wl->irq_lock);
1957                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1958                                   dev->irq_mask);
1959                 spin_unlock_irq(&dev->wl->irq_lock);
1960         }
1961 }
1962 
1963 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1964 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1965 {
1966         int i;
1967         u32 tmp;
1968 
1969         might_sleep();
1970         B43legacy_WARN_ON(irqs_disabled());
1971         B43legacy_WARN_ON(dev->mac_suspended < 0);
1972 
1973         if (dev->mac_suspended == 0) {
1974                 /* Mask IRQs before suspending MAC. Otherwise
1975                  * the MAC stays busy and won't suspend. */
1976                 spin_lock_irq(&dev->wl->irq_lock);
1977                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1978                 spin_unlock_irq(&dev->wl->irq_lock);
1979                 b43legacy_synchronize_irq(dev);
1980 
1981                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1982                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1983                                   b43legacy_read32(dev,
1984                                   B43legacy_MMIO_MACCTL)
1985                                   & ~B43legacy_MACCTL_ENABLED);
1986                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1987                 for (i = 40; i; i--) {
1988                         tmp = b43legacy_read32(dev,
1989                                                B43legacy_MMIO_GEN_IRQ_REASON);
1990                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1991                                 goto out;
1992                         msleep(1);
1993                 }
1994                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1995         }
1996 out:
1997         dev->mac_suspended++;
1998 }
1999 
2000 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
2001 {
2002         struct b43legacy_wl *wl = dev->wl;
2003         u32 ctl;
2004         u16 cfp_pretbtt;
2005 
2006         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2007         /* Reset status to STA infrastructure mode. */
2008         ctl &= ~B43legacy_MACCTL_AP;
2009         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2010         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2011         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2012         ctl &= ~B43legacy_MACCTL_PROMISC;
2013         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2014         ctl |= B43legacy_MACCTL_INFRA;
2015 
2016         if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2017                 ctl |= B43legacy_MACCTL_AP;
2018         else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2019                 ctl &= ~B43legacy_MACCTL_INFRA;
2020 
2021         if (wl->filter_flags & FIF_CONTROL)
2022                 ctl |= B43legacy_MACCTL_KEEP_CTL;
2023         if (wl->filter_flags & FIF_FCSFAIL)
2024                 ctl |= B43legacy_MACCTL_KEEP_BAD;
2025         if (wl->filter_flags & FIF_PLCPFAIL)
2026                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2027         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2028                 ctl |= B43legacy_MACCTL_BEACPROMISC;
2029 
2030         /* Workaround: On old hardware the HW-MAC-address-filter
2031          * doesn't work properly, so always run promisc in filter
2032          * it in software. */
2033         if (dev->dev->id.revision <= 4)
2034                 ctl |= B43legacy_MACCTL_PROMISC;
2035 
2036         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2037 
2038         cfp_pretbtt = 2;
2039         if ((ctl & B43legacy_MACCTL_INFRA) &&
2040             !(ctl & B43legacy_MACCTL_AP)) {
2041                 if (dev->dev->bus->chip_id == 0x4306 &&
2042                     dev->dev->bus->chip_rev == 3)
2043                         cfp_pretbtt = 100;
2044                 else
2045                         cfp_pretbtt = 50;
2046         }
2047         b43legacy_write16(dev, 0x612, cfp_pretbtt);
2048 }
2049 
2050 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2051                                         u16 rate,
2052                                         int is_ofdm)
2053 {
2054         u16 offset;
2055 
2056         if (is_ofdm) {
2057                 offset = 0x480;
2058                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2059         } else {
2060                 offset = 0x4C0;
2061                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2062         }
2063         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2064                               b43legacy_shm_read16(dev,
2065                               B43legacy_SHM_SHARED, offset));
2066 }
2067 
2068 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2069 {
2070         switch (dev->phy.type) {
2071         case B43legacy_PHYTYPE_G:
2072                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2073                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2074                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2075                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2076                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2077                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2078                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2079                 /* fallthrough */
2080         case B43legacy_PHYTYPE_B:
2081                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2082                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2083                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2084                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2085                 break;
2086         default:
2087                 B43legacy_BUG_ON(1);
2088         }
2089 }
2090 
2091 /* Set the TX-Antenna for management frames sent by firmware. */
2092 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2093                                           int antenna)
2094 {
2095         u16 ant = 0;
2096         u16 tmp;
2097 
2098         switch (antenna) {
2099         case B43legacy_ANTENNA0:
2100                 ant |= B43legacy_TX4_PHY_ANT0;
2101                 break;
2102         case B43legacy_ANTENNA1:
2103                 ant |= B43legacy_TX4_PHY_ANT1;
2104                 break;
2105         case B43legacy_ANTENNA_AUTO:
2106                 ant |= B43legacy_TX4_PHY_ANTLAST;
2107                 break;
2108         default:
2109                 B43legacy_BUG_ON(1);
2110         }
2111 
2112         /* FIXME We also need to set the other flags of the PHY control
2113          * field somewhere. */
2114 
2115         /* For Beacons */
2116         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2117                                    B43legacy_SHM_SH_BEACPHYCTL);
2118         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2119         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2120                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2121         /* For ACK/CTS */
2122         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2123                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2124         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2125         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2126                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2127         /* For Probe Resposes */
2128         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2129                                    B43legacy_SHM_SH_PRPHYCTL);
2130         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2131         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2132                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2133 }
2134 
2135 /* This is the opposite of b43legacy_chip_init() */
2136 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2137 {
2138         b43legacy_radio_turn_off(dev, 1);
2139         b43legacy_gpio_cleanup(dev);
2140         /* firmware is released later */
2141 }
2142 
2143 /* Initialize the chip
2144  * http://bcm-specs.sipsolutions.net/ChipInit
2145  */
2146 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2147 {
2148         struct b43legacy_phy *phy = &dev->phy;
2149         int err;
2150         int tmp;
2151         u32 value32, macctl;
2152         u16 value16;
2153 
2154         /* Initialize the MAC control */
2155         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2156         if (dev->phy.gmode)
2157                 macctl |= B43legacy_MACCTL_GMODE;
2158         macctl |= B43legacy_MACCTL_INFRA;
2159         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2160 
2161         err = b43legacy_upload_microcode(dev);
2162         if (err)
2163                 goto out; /* firmware is released later */
2164 
2165         err = b43legacy_gpio_init(dev);
2166         if (err)
2167                 goto out; /* firmware is released later */
2168 
2169         err = b43legacy_upload_initvals(dev);
2170         if (err)
2171                 goto err_gpio_clean;
2172         b43legacy_radio_turn_on(dev);
2173 
2174         b43legacy_write16(dev, 0x03E6, 0x0000);
2175         err = b43legacy_phy_init(dev);
2176         if (err)
2177                 goto err_radio_off;
2178 
2179         /* Select initial Interference Mitigation. */
2180         tmp = phy->interfmode;
2181         phy->interfmode = B43legacy_INTERFMODE_NONE;
2182         b43legacy_radio_set_interference_mitigation(dev, tmp);
2183 
2184         b43legacy_phy_set_antenna_diversity(dev);
2185         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2186 
2187         if (phy->type == B43legacy_PHYTYPE_B) {
2188                 value16 = b43legacy_read16(dev, 0x005E);
2189                 value16 |= 0x0004;
2190                 b43legacy_write16(dev, 0x005E, value16);
2191         }
2192         b43legacy_write32(dev, 0x0100, 0x01000000);
2193         if (dev->dev->id.revision < 5)
2194                 b43legacy_write32(dev, 0x010C, 0x01000000);
2195 
2196         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2197         value32 &= ~B43legacy_MACCTL_INFRA;
2198         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2199         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2200         value32 |= B43legacy_MACCTL_INFRA;
2201         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2202 
2203         if (b43legacy_using_pio(dev)) {
2204                 b43legacy_write32(dev, 0x0210, 0x00000100);
2205                 b43legacy_write32(dev, 0x0230, 0x00000100);
2206                 b43legacy_write32(dev, 0x0250, 0x00000100);
2207                 b43legacy_write32(dev, 0x0270, 0x00000100);
2208                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2209                                       0x0000);
2210         }
2211 
2212         /* Probe Response Timeout value */
2213         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2214         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2215 
2216         /* Initially set the wireless operation mode. */
2217         b43legacy_adjust_opmode(dev);
2218 
2219         if (dev->dev->id.revision < 3) {
2220                 b43legacy_write16(dev, 0x060E, 0x0000);
2221                 b43legacy_write16(dev, 0x0610, 0x8000);
2222                 b43legacy_write16(dev, 0x0604, 0x0000);
2223                 b43legacy_write16(dev, 0x0606, 0x0200);
2224         } else {
2225                 b43legacy_write32(dev, 0x0188, 0x80000000);
2226                 b43legacy_write32(dev, 0x018C, 0x02000000);
2227         }
2228         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2229         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2230         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2231         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2232         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2233         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2234         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2235 
2236         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2237         value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2238         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2239 
2240         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2241                           dev->dev->bus->chipco.fast_pwrup_delay);
2242 
2243         /* PHY TX errors counter. */
2244         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2245 
2246         B43legacy_WARN_ON(err != 0);
2247         b43legacydbg(dev->wl, "Chip initialized\n");
2248 out:
2249         return err;
2250 
2251 err_radio_off:
2252         b43legacy_radio_turn_off(dev, 1);
2253 err_gpio_clean:
2254         b43legacy_gpio_cleanup(dev);
2255         goto out;
2256 }
2257 
2258 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2259 {
2260         struct b43legacy_phy *phy = &dev->phy;
2261 
2262         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2263                 return;
2264 
2265         b43legacy_mac_suspend(dev);
2266         b43legacy_phy_lo_g_measure(dev);
2267         b43legacy_mac_enable(dev);
2268 }
2269 
2270 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2271 {
2272         b43legacy_phy_lo_mark_all_unused(dev);
2273         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2274                 b43legacy_mac_suspend(dev);
2275                 b43legacy_calc_nrssi_slope(dev);
2276                 b43legacy_mac_enable(dev);
2277         }
2278 }
2279 
2280 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2281 {
2282         /* Update device statistics. */
2283         b43legacy_calculate_link_quality(dev);
2284 }
2285 
2286 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2287 {
2288         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2289 
2290         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2291         wmb();
2292 }
2293 
2294 static void do_periodic_work(struct b43legacy_wldev *dev)
2295 {
2296         unsigned int state;
2297 
2298         state = dev->periodic_state;
2299         if (state % 8 == 0)
2300                 b43legacy_periodic_every120sec(dev);
2301         if (state % 4 == 0)
2302                 b43legacy_periodic_every60sec(dev);
2303         if (state % 2 == 0)
2304                 b43legacy_periodic_every30sec(dev);
2305         b43legacy_periodic_every15sec(dev);
2306 }
2307 
2308 /* Periodic work locking policy:
2309  *      The whole periodic work handler is protected by
2310  *      wl->mutex. If another lock is needed somewhere in the
2311  *      pwork callchain, it's acquired in-place, where it's needed.
2312  */
2313 static void b43legacy_periodic_work_handler(struct work_struct *work)
2314 {
2315         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2316                                              periodic_work.work);
2317         struct b43legacy_wl *wl = dev->wl;
2318         unsigned long delay;
2319 
2320         mutex_lock(&wl->mutex);
2321 
2322         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2323                 goto out;
2324         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2325                 goto out_requeue;
2326 
2327         do_periodic_work(dev);
2328 
2329         dev->periodic_state++;
2330 out_requeue:
2331         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2332                 delay = msecs_to_jiffies(50);
2333         else
2334                 delay = round_jiffies_relative(HZ * 15);
2335         ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2336 out:
2337         mutex_unlock(&wl->mutex);
2338 }
2339 
2340 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2341 {
2342         struct delayed_work *work = &dev->periodic_work;
2343 
2344         dev->periodic_state = 0;
2345         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2346         ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2347 }
2348 
2349 /* Validate access to the chip (SHM) */
2350 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2351 {
2352         u32 value;
2353         u32 shm_backup;
2354 
2355         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2356         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2357         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2358                                  0xAA5555AA)
2359                 goto error;
2360         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2361         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2362                                  0x55AAAA55)
2363                 goto error;
2364         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2365 
2366         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2367         if ((value | B43legacy_MACCTL_GMODE) !=
2368             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2369                 goto error;
2370 
2371         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2372         if (value)
2373                 goto error;
2374 
2375         return 0;
2376 error:
2377         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2378         return -ENODEV;
2379 }
2380 
2381 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2382 {
2383         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2384         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2385         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2386                                         0x0056);
2387         /* KTP is a word address, but we address SHM bytewise.
2388          * So multiply by two.
2389          */
2390         dev->ktp *= 2;
2391         if (dev->dev->id.revision >= 5)
2392                 /* Number of RCMTA address slots */
2393                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2394                                   dev->max_nr_keys - 8);
2395 }
2396 
2397 #ifdef CONFIG_B43LEGACY_HWRNG
2398 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2399 {
2400         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2401         unsigned long flags;
2402 
2403         /* Don't take wl->mutex here, as it could deadlock with
2404          * hwrng internal locking. It's not needed to take
2405          * wl->mutex here, anyway. */
2406 
2407         spin_lock_irqsave(&wl->irq_lock, flags);
2408         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2409         spin_unlock_irqrestore(&wl->irq_lock, flags);
2410 
2411         return (sizeof(u16));
2412 }
2413 #endif
2414 
2415 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2416 {
2417 #ifdef CONFIG_B43LEGACY_HWRNG
2418         if (wl->rng_initialized)
2419                 hwrng_unregister(&wl->rng);
2420 #endif
2421 }
2422 
2423 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2424 {
2425         int err = 0;
2426 
2427 #ifdef CONFIG_B43LEGACY_HWRNG
2428         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2429                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2430         wl->rng.name = wl->rng_name;
2431         wl->rng.data_read = b43legacy_rng_read;
2432         wl->rng.priv = (unsigned long)wl;
2433         wl->rng_initialized = 1;
2434         err = hwrng_register(&wl->rng);
2435         if (err) {
2436                 wl->rng_initialized = 0;
2437                 b43legacyerr(wl, "Failed to register the random "
2438                        "number generator (%d)\n", err);
2439         }
2440 
2441 #endif
2442         return err;
2443 }
2444 
2445 static void b43legacy_tx_work(struct work_struct *work)
2446 {
2447         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2448                                   tx_work);
2449         struct b43legacy_wldev *dev;
2450         struct sk_buff *skb;
2451         int queue_num;
2452         int err = 0;
2453 
2454         mutex_lock(&wl->mutex);
2455         dev = wl->current_dev;
2456         if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2457                 mutex_unlock(&wl->mutex);
2458                 return;
2459         }
2460 
2461         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2462                 while (skb_queue_len(&wl->tx_queue[queue_num])) {
2463                         skb = skb_dequeue(&wl->tx_queue[queue_num]);
2464                         if (b43legacy_using_pio(dev))
2465                                 err = b43legacy_pio_tx(dev, skb);
2466                         else
2467                                 err = b43legacy_dma_tx(dev, skb);
2468                         if (err == -ENOSPC) {
2469                                 wl->tx_queue_stopped[queue_num] = 1;
2470                                 ieee80211_stop_queue(wl->hw, queue_num);
2471                                 skb_queue_head(&wl->tx_queue[queue_num], skb);
2472                                 break;
2473                         }
2474                         if (unlikely(err))
2475                                 dev_kfree_skb(skb); /* Drop it */
2476                         err = 0;
2477                 }
2478 
2479                 if (!err)
2480                         wl->tx_queue_stopped[queue_num] = 0;
2481         }
2482 
2483         mutex_unlock(&wl->mutex);
2484 }
2485 
2486 static void b43legacy_op_tx(struct ieee80211_hw *hw,
2487                             struct ieee80211_tx_control *control,
2488                             struct sk_buff *skb)
2489 {
2490         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2491 
2492         if (unlikely(skb->len < 2 + 2 + 6)) {
2493                 /* Too short, this can't be a valid frame. */
2494                 dev_kfree_skb_any(skb);
2495                 return;
2496         }
2497         B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2498 
2499         skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2500         if (!wl->tx_queue_stopped[skb->queue_mapping])
2501                 ieee80211_queue_work(wl->hw, &wl->tx_work);
2502         else
2503                 ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2504 }
2505 
2506 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2507                                 struct ieee80211_vif *vif, u16 queue,
2508                                 const struct ieee80211_tx_queue_params *params)
2509 {
2510         return 0;
2511 }
2512 
2513 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2514                                   struct ieee80211_low_level_stats *stats)
2515 {
2516         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2517         unsigned long flags;
2518 
2519         spin_lock_irqsave(&wl->irq_lock, flags);
2520         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2521         spin_unlock_irqrestore(&wl->irq_lock, flags);
2522 
2523         return 0;
2524 }
2525 
2526 static const char *phymode_to_string(unsigned int phymode)
2527 {
2528         switch (phymode) {
2529         case B43legacy_PHYMODE_B:
2530                 return "B";
2531         case B43legacy_PHYMODE_G:
2532                 return "G";
2533         default:
2534                 B43legacy_BUG_ON(1);
2535         }
2536         return "";
2537 }
2538 
2539 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2540                                   unsigned int phymode,
2541                                   struct b43legacy_wldev **dev,
2542                                   bool *gmode)
2543 {
2544         struct b43legacy_wldev *d;
2545 
2546         list_for_each_entry(d, &wl->devlist, list) {
2547                 if (d->phy.possible_phymodes & phymode) {
2548                         /* Ok, this device supports the PHY-mode.
2549                          * Set the gmode bit. */
2550                         *gmode = true;
2551                         *dev = d;
2552 
2553                         return 0;
2554                 }
2555         }
2556 
2557         return -ESRCH;
2558 }
2559 
2560 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2561 {
2562         struct ssb_device *sdev = dev->dev;
2563         u32 tmslow;
2564 
2565         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2566         tmslow &= ~B43legacy_TMSLOW_GMODE;
2567         tmslow |= B43legacy_TMSLOW_PHYRESET;
2568         tmslow |= SSB_TMSLOW_FGC;
2569         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2570         msleep(1);
2571 
2572         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2573         tmslow &= ~SSB_TMSLOW_FGC;
2574         tmslow |= B43legacy_TMSLOW_PHYRESET;
2575         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2576         msleep(1);
2577 }
2578 
2579 /* Expects wl->mutex locked */
2580 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2581                                       unsigned int new_mode)
2582 {
2583         struct b43legacy_wldev *uninitialized_var(up_dev);
2584         struct b43legacy_wldev *down_dev;
2585         int err;
2586         bool gmode = false;
2587         int prev_status;
2588 
2589         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2590         if (err) {
2591                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2592                        phymode_to_string(new_mode));
2593                 return err;
2594         }
2595         if ((up_dev == wl->current_dev) &&
2596             (!!wl->current_dev->phy.gmode == !!gmode))
2597                 /* This device is already running. */
2598                 return 0;
2599         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2600                phymode_to_string(new_mode));
2601         down_dev = wl->current_dev;
2602 
2603         prev_status = b43legacy_status(down_dev);
2604         /* Shutdown the currently running core. */
2605         if (prev_status >= B43legacy_STAT_STARTED)
2606                 b43legacy_wireless_core_stop(down_dev);
2607         if (prev_status >= B43legacy_STAT_INITIALIZED)
2608                 b43legacy_wireless_core_exit(down_dev);
2609 
2610         if (down_dev != up_dev)
2611                 /* We switch to a different core, so we put PHY into
2612                  * RESET on the old core. */
2613                 b43legacy_put_phy_into_reset(down_dev);
2614 
2615         /* Now start the new core. */
2616         up_dev->phy.gmode = gmode;
2617         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2618                 err = b43legacy_wireless_core_init(up_dev);
2619                 if (err) {
2620                         b43legacyerr(wl, "Fatal: Could not initialize device"
2621                                      " for newly selected %s-PHY mode\n",
2622                                      phymode_to_string(new_mode));
2623                         goto init_failure;
2624                 }
2625         }
2626         if (prev_status >= B43legacy_STAT_STARTED) {
2627                 err = b43legacy_wireless_core_start(up_dev);
2628                 if (err) {
2629                         b43legacyerr(wl, "Fatal: Could not start device for "
2630                                "newly selected %s-PHY mode\n",
2631                                phymode_to_string(new_mode));
2632                         b43legacy_wireless_core_exit(up_dev);
2633                         goto init_failure;
2634                 }
2635         }
2636         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2637 
2638         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2639 
2640         wl->current_dev = up_dev;
2641 
2642         return 0;
2643 init_failure:
2644         /* Whoops, failed to init the new core. No core is operating now. */
2645         wl->current_dev = NULL;
2646         return err;
2647 }
2648 
2649 /* Write the short and long frame retry limit values. */
2650 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2651                                        unsigned int short_retry,
2652                                        unsigned int long_retry)
2653 {
2654         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2655          * the chip-internal counter. */
2656         short_retry = min(short_retry, (unsigned int)0xF);
2657         long_retry = min(long_retry, (unsigned int)0xF);
2658 
2659         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2660         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2661 }
2662 
2663 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2664                                    u32 changed)
2665 {
2666         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2667         struct b43legacy_wldev *dev;
2668         struct b43legacy_phy *phy;
2669         struct ieee80211_conf *conf = &hw->conf;
2670         unsigned long flags;
2671         unsigned int new_phymode = 0xFFFF;
2672         int antenna_tx;
2673         int err = 0;
2674 
2675         antenna_tx = B43legacy_ANTENNA_DEFAULT;
2676 
2677         mutex_lock(&wl->mutex);
2678         dev = wl->current_dev;
2679         phy = &dev->phy;
2680 
2681         if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2682                 b43legacy_set_retry_limits(dev,
2683                                            conf->short_frame_max_tx_count,
2684                                            conf->long_frame_max_tx_count);
2685         changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2686         if (!changed)
2687                 goto out_unlock_mutex;
2688 
2689         /* Switch the PHY mode (if necessary). */
2690         switch (conf->chandef.chan->band) {
2691         case NL80211_BAND_2GHZ:
2692                 if (phy->type == B43legacy_PHYTYPE_B)
2693                         new_phymode = B43legacy_PHYMODE_B;
2694                 else
2695                         new_phymode = B43legacy_PHYMODE_G;
2696                 break;
2697         default:
2698                 B43legacy_WARN_ON(1);
2699         }
2700         err = b43legacy_switch_phymode(wl, new_phymode);
2701         if (err)
2702                 goto out_unlock_mutex;
2703 
2704         /* Disable IRQs while reconfiguring the device.
2705          * This makes it possible to drop the spinlock throughout
2706          * the reconfiguration process. */
2707         spin_lock_irqsave(&wl->irq_lock, flags);
2708         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2709                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2710                 goto out_unlock_mutex;
2711         }
2712         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2713         spin_unlock_irqrestore(&wl->irq_lock, flags);
2714         b43legacy_synchronize_irq(dev);
2715 
2716         /* Switch to the requested channel.
2717          * The firmware takes care of races with the TX handler. */
2718         if (conf->chandef.chan->hw_value != phy->channel)
2719                 b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value,
2720                                               0);
2721 
2722         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2723 
2724         /* Adjust the desired TX power level. */
2725         if (conf->power_level != 0) {
2726                 if (conf->power_level != phy->power_level) {
2727                         phy->power_level = conf->power_level;
2728                         b43legacy_phy_xmitpower(dev);
2729                 }
2730         }
2731 
2732         /* Antennas for RX and management frame TX. */
2733         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2734 
2735         if (wl->radio_enabled != phy->radio_on) {
2736                 if (wl->radio_enabled) {
2737                         b43legacy_radio_turn_on(dev);
2738                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2739                         if (!dev->radio_hw_enable)
2740                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2741                                               " button still turns the radio"
2742                                               " physically off. Press the"
2743                                               " button to turn it on.\n");
2744                 } else {
2745                         b43legacy_radio_turn_off(dev, 0);
2746                         b43legacyinfo(dev->wl, "Radio turned off by"
2747                                       " software\n");
2748                 }
2749         }
2750 
2751         spin_lock_irqsave(&wl->irq_lock, flags);
2752         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2753         spin_unlock_irqrestore(&wl->irq_lock, flags);
2754 out_unlock_mutex:
2755         mutex_unlock(&wl->mutex);
2756 
2757         return err;
2758 }
2759 
2760 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2761 {
2762         struct ieee80211_supported_band *sband =
2763                 dev->wl->hw->wiphy->bands[NL80211_BAND_2GHZ];
2764         struct ieee80211_rate *rate;
2765         int i;
2766         u16 basic, direct, offset, basic_offset, rateptr;
2767 
2768         for (i = 0; i < sband->n_bitrates; i++) {
2769                 rate = &sband->bitrates[i];
2770 
2771                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2772                         direct = B43legacy_SHM_SH_CCKDIRECT;
2773                         basic = B43legacy_SHM_SH_CCKBASIC;
2774                         offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2775                         offset &= 0xF;
2776                 } else {
2777                         direct = B43legacy_SHM_SH_OFDMDIRECT;
2778                         basic = B43legacy_SHM_SH_OFDMBASIC;
2779                         offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2780                         offset &= 0xF;
2781                 }
2782 
2783                 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2784 
2785                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2786                         basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2787                         basic_offset &= 0xF;
2788                 } else {
2789                         basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2790                         basic_offset &= 0xF;
2791                 }
2792 
2793                 /*
2794                  * Get the pointer that we need to point to
2795                  * from the direct map
2796                  */
2797                 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2798                                                direct + 2 * basic_offset);
2799                 /* and write it to the basic map */
2800                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2801                                       basic + 2 * offset, rateptr);
2802         }
2803 }
2804 
2805 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2806                                     struct ieee80211_vif *vif,
2807                                     struct ieee80211_bss_conf *conf,
2808                                     u32 changed)
2809 {
2810         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2811         struct b43legacy_wldev *dev;
2812         unsigned long flags;
2813 
2814         mutex_lock(&wl->mutex);
2815         B43legacy_WARN_ON(wl->vif != vif);
2816 
2817         dev = wl->current_dev;
2818 
2819         /* Disable IRQs while reconfiguring the device.
2820          * This makes it possible to drop the spinlock throughout
2821          * the reconfiguration process. */
2822         spin_lock_irqsave(&wl->irq_lock, flags);
2823         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2824                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2825                 goto out_unlock_mutex;
2826         }
2827         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2828 
2829         if (changed & BSS_CHANGED_BSSID) {
2830                 b43legacy_synchronize_irq(dev);
2831 
2832                 if (conf->bssid)
2833                         memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2834                 else
2835                         eth_zero_addr(wl->bssid);
2836         }
2837 
2838         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2839                 if (changed & BSS_CHANGED_BEACON &&
2840                     (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2841                      b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2842                         b43legacy_update_templates(wl);
2843 
2844                 if (changed & BSS_CHANGED_BSSID)
2845                         b43legacy_write_mac_bssid_templates(dev);
2846         }
2847         spin_unlock_irqrestore(&wl->irq_lock, flags);
2848 
2849         b43legacy_mac_suspend(dev);
2850 
2851         if (changed & BSS_CHANGED_BEACON_INT &&
2852             (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2853              b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2854                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2855 
2856         if (changed & BSS_CHANGED_BASIC_RATES)
2857                 b43legacy_update_basic_rates(dev, conf->basic_rates);
2858 
2859         if (changed & BSS_CHANGED_ERP_SLOT) {
2860                 if (conf->use_short_slot)
2861                         b43legacy_short_slot_timing_enable(dev);
2862                 else
2863                         b43legacy_short_slot_timing_disable(dev);
2864         }
2865 
2866         b43legacy_mac_enable(dev);
2867 
2868         spin_lock_irqsave(&wl->irq_lock, flags);
2869         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2870         /* XXX: why? */
2871         spin_unlock_irqrestore(&wl->irq_lock, flags);
2872  out_unlock_mutex:
2873         mutex_unlock(&wl->mutex);
2874 }
2875 
2876 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2877                                           unsigned int changed,
2878                                           unsigned int *fflags,u64 multicast)
2879 {
2880         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2881         struct b43legacy_wldev *dev = wl->current_dev;
2882         unsigned long flags;
2883 
2884         if (!dev) {
2885                 *fflags = 0;
2886                 return;
2887         }
2888 
2889         spin_lock_irqsave(&wl->irq_lock, flags);
2890         *fflags &= FIF_ALLMULTI |
2891                   FIF_FCSFAIL |
2892                   FIF_PLCPFAIL |
2893                   FIF_CONTROL |
2894                   FIF_OTHER_BSS |
2895                   FIF_BCN_PRBRESP_PROMISC;
2896 
2897         changed &= FIF_ALLMULTI |
2898                    FIF_FCSFAIL |
2899                    FIF_PLCPFAIL |
2900                    FIF_CONTROL |
2901                    FIF_OTHER_BSS |
2902                    FIF_BCN_PRBRESP_PROMISC;
2903 
2904         wl->filter_flags = *fflags;
2905 
2906         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2907                 b43legacy_adjust_opmode(dev);
2908         spin_unlock_irqrestore(&wl->irq_lock, flags);
2909 }
2910 
2911 /* Locking: wl->mutex */
2912 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2913 {
2914         struct b43legacy_wl *wl = dev->wl;
2915         unsigned long flags;
2916         int queue_num;
2917 
2918         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2919                 return;
2920 
2921         /* Disable and sync interrupts. We must do this before than
2922          * setting the status to INITIALIZED, as the interrupt handler
2923          * won't care about IRQs then. */
2924         spin_lock_irqsave(&wl->irq_lock, flags);
2925         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2926         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2927         spin_unlock_irqrestore(&wl->irq_lock, flags);
2928         b43legacy_synchronize_irq(dev);
2929 
2930         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2931 
2932         mutex_unlock(&wl->mutex);
2933         /* Must unlock as it would otherwise deadlock. No races here.
2934          * Cancel the possibly running self-rearming periodic work. */
2935         cancel_delayed_work_sync(&dev->periodic_work);
2936         cancel_work_sync(&wl->tx_work);
2937         mutex_lock(&wl->mutex);
2938 
2939         /* Drain all TX queues. */
2940         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2941                 while (skb_queue_len(&wl->tx_queue[queue_num]))
2942                         dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2943         }
2944 
2945 b43legacy_mac_suspend(dev);
2946         free_irq(dev->dev->irq, dev);
2947         b43legacydbg(wl, "Wireless interface stopped\n");
2948 }
2949 
2950 /* Locking: wl->mutex */
2951 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2952 {
2953         int err;
2954 
2955         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2956 
2957         drain_txstatus_queue(dev);
2958         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2959                           IRQF_SHARED, KBUILD_MODNAME, dev);
2960         if (err) {
2961                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2962                        dev->dev->irq);
2963                 goto out;
2964         }
2965         /* We are ready to run. */
2966         ieee80211_wake_queues(dev->wl->hw);
2967         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2968 
2969         /* Start data flow (TX/RX) */
2970         b43legacy_mac_enable(dev);
2971         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2972 
2973         /* Start maintenance work */
2974         b43legacy_periodic_tasks_setup(dev);
2975 
2976         b43legacydbg(dev->wl, "Wireless interface started\n");
2977 out:
2978         return err;
2979 }
2980 
2981 /* Get PHY and RADIO versioning numbers */
2982 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2983 {
2984         struct b43legacy_phy *phy = &dev->phy;
2985         u32 tmp;
2986         u8 analog_type;
2987         u8 phy_type;
2988         u8 phy_rev;
2989         u16 radio_manuf;
2990         u16 radio_ver;
2991         u16 radio_rev;
2992         int unsupported = 0;
2993 
2994         /* Get PHY versioning */
2995         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2996         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2997                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2998         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2999         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
3000         switch (phy_type) {
3001         case B43legacy_PHYTYPE_B:
3002                 if (phy_rev != 2 && phy_rev != 4
3003                     && phy_rev != 6 && phy_rev != 7)
3004                         unsupported = 1;
3005                 break;
3006         case B43legacy_PHYTYPE_G:
3007                 if (phy_rev > 8)
3008                         unsupported = 1;
3009                 break;
3010         default:
3011                 unsupported = 1;
3012         }
3013         if (unsupported) {
3014                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3015                        "(Analog %u, Type %u, Revision %u)\n",
3016                        analog_type, phy_type, phy_rev);
3017                 return -EOPNOTSUPP;
3018         }
3019         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3020                analog_type, phy_type, phy_rev);
3021 
3022 
3023         /* Get RADIO versioning */
3024         if (dev->dev->bus->chip_id == 0x4317) {
3025                 if (dev->dev->bus->chip_rev == 0)
3026                         tmp = 0x3205017F;
3027                 else if (dev->dev->bus->chip_rev == 1)
3028                         tmp = 0x4205017F;
3029                 else
3030                         tmp = 0x5205017F;
3031         } else {
3032                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3033                                   B43legacy_RADIOCTL_ID);
3034                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3035                 tmp <<= 16;
3036                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3037                                   B43legacy_RADIOCTL_ID);
3038                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3039         }
3040         radio_manuf = (tmp & 0x00000FFF);
3041         radio_ver = (tmp & 0x0FFFF000) >> 12;
3042         radio_rev = (tmp & 0xF0000000) >> 28;
3043         switch (phy_type) {
3044         case B43legacy_PHYTYPE_B:
3045                 if ((radio_ver & 0xFFF0) != 0x2050)
3046                         unsupported = 1;
3047                 break;
3048         case B43legacy_PHYTYPE_G:
3049                 if (radio_ver != 0x2050)
3050                         unsupported = 1;
3051                 break;
3052         default:
3053                 B43legacy_BUG_ON(1);
3054         }
3055         if (unsupported) {
3056                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3057                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3058                        radio_manuf, radio_ver, radio_rev);
3059                 return -EOPNOTSUPP;
3060         }
3061         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3062                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3063 
3064 
3065         phy->radio_manuf = radio_manuf;
3066         phy->radio_ver = radio_ver;
3067         phy->radio_rev = radio_rev;
3068 
3069         phy->analog = analog_type;
3070         phy->type = phy_type;
3071         phy->rev = phy_rev;
3072 
3073         return 0;
3074 }
3075 
3076 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3077                                       struct b43legacy_phy *phy)
3078 {
3079         struct b43legacy_lopair *lo;
3080         int i;
3081 
3082         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3083         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3084 
3085         /* Assume the radio is enabled. If it's not enabled, the state will
3086          * immediately get fixed on the first periodic work run. */
3087         dev->radio_hw_enable = true;
3088 
3089         phy->savedpctlreg = 0xFFFF;
3090         phy->aci_enable = false;
3091         phy->aci_wlan_automatic = false;
3092         phy->aci_hw_rssi = false;
3093 
3094         lo = phy->_lo_pairs;
3095         if (lo)
3096                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3097                                      B43legacy_LO_COUNT);
3098         phy->max_lb_gain = 0;
3099         phy->trsw_rx_gain = 0;
3100 
3101         /* Set default attenuation values. */
3102         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3103         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3104         phy->txctl1 = b43legacy_default_txctl1(dev);
3105         phy->txpwr_offset = 0;
3106 
3107         /* NRSSI */
3108         phy->nrssislope = 0;
3109         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3110                 phy->nrssi[i] = -1000;
3111         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3112                 phy->nrssi_lt[i] = i;
3113 
3114         phy->lofcal = 0xFFFF;
3115         phy->initval = 0xFFFF;
3116 
3117         phy->interfmode = B43legacy_INTERFMODE_NONE;
3118         phy->channel = 0xFF;
3119 }
3120 
3121 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3122 {
3123         /* Flags */
3124         dev->dfq_valid = false;
3125 
3126         /* Stats */
3127         memset(&dev->stats, 0, sizeof(dev->stats));
3128 
3129         setup_struct_phy_for_init(dev, &dev->phy);
3130 
3131         /* IRQ related flags */
3132         dev->irq_reason = 0;
3133         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3134         dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3135 
3136         dev->mac_suspended = 1;
3137 
3138         /* Noise calculation context */
3139         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3140 }
3141 
3142 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3143                                           bool idle) {
3144         u16 pu_delay = 1050;
3145 
3146         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3147                 pu_delay = 500;
3148         if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3149                 pu_delay = max(pu_delay, (u16)2400);
3150 
3151         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3152                               B43legacy_SHM_SH_SPUWKUP, pu_delay);
3153 }
3154 
3155 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3156 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3157 {
3158         u16 pretbtt;
3159 
3160         /* The time value is in microseconds. */
3161         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3162                 pretbtt = 2;
3163         else
3164                 pretbtt = 250;
3165         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3166                               B43legacy_SHM_SH_PRETBTT, pretbtt);
3167         b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3168 }
3169 
3170 /* Shutdown a wireless core */
3171 /* Locking: wl->mutex */
3172 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3173 {
3174         struct b43legacy_phy *phy = &dev->phy;
3175         u32 macctl;
3176 
3177         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3178         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3179                 return;
3180         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3181 
3182         /* Stop the microcode PSM. */
3183         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3184         macctl &= ~B43legacy_MACCTL_PSM_RUN;
3185         macctl |= B43legacy_MACCTL_PSM_JMP0;
3186         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3187 
3188         b43legacy_leds_exit(dev);
3189         b43legacy_rng_exit(dev->wl);
3190         b43legacy_pio_free(dev);
3191         b43legacy_dma_free(dev);
3192         b43legacy_chip_exit(dev);
3193         b43legacy_radio_turn_off(dev, 1);
3194         b43legacy_switch_analog(dev, 0);
3195         if (phy->dyn_tssi_tbl)
3196                 kfree(phy->tssi2dbm);
3197         kfree(phy->lo_control);
3198         phy->lo_control = NULL;
3199         if (dev->wl->current_beacon) {
3200                 dev_kfree_skb_any(dev->wl->current_beacon);
3201                 dev->wl->current_beacon = NULL;
3202         }
3203 
3204         ssb_device_disable(dev->dev, 0);
3205         ssb_bus_may_powerdown(dev->dev->bus);
3206 }
3207 
3208 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3209 {
3210         struct b43legacy_phy *phy = &dev->phy;
3211         int i;
3212 
3213         /* Set default attenuation values. */
3214         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3215         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3216         phy->txctl1 = b43legacy_default_txctl1(dev);
3217         phy->txctl2 = 0xFFFF;
3218         phy->txpwr_offset = 0;
3219 
3220         /* NRSSI */
3221         phy->nrssislope = 0;
3222         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3223                 phy->nrssi[i] = -1000;
3224         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3225                 phy->nrssi_lt[i] = i;
3226 
3227         phy->lofcal = 0xFFFF;
3228         phy->initval = 0xFFFF;
3229 
3230         phy->aci_enable = false;
3231         phy->aci_wlan_automatic = false;
3232         phy->aci_hw_rssi = false;
3233 
3234         phy->antenna_diversity = 0xFFFF;
3235         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3236         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3237 
3238         /* Flags */
3239         phy->calibrated = 0;
3240 
3241         if (phy->_lo_pairs)
3242                 memset(phy->_lo_pairs, 0,
3243                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3244         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3245 }
3246 
3247 /* Initialize a wireless core */
3248 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3249 {
3250         struct b43legacy_wl *wl = dev->wl;
3251         struct ssb_bus *bus = dev->dev->bus;
3252         struct b43legacy_phy *phy = &dev->phy;
3253         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3254         int err;
3255         u32 hf;
3256         u32 tmp;
3257 
3258         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3259 
3260         err = ssb_bus_powerup(bus, 0);
3261         if (err)
3262                 goto out;
3263         if (!ssb_device_is_enabled(dev->dev)) {
3264                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3265                 b43legacy_wireless_core_reset(dev, tmp);
3266         }
3267 
3268         if ((phy->type == B43legacy_PHYTYPE_B) ||
3269             (phy->type == B43legacy_PHYTYPE_G)) {
3270                 phy->_lo_pairs = kcalloc(B43legacy_LO_COUNT,
3271                                          sizeof(struct b43legacy_lopair),
3272                                          GFP_KERNEL);
3273                 if (!phy->_lo_pairs)
3274                         return -ENOMEM;
3275         }
3276         setup_struct_wldev_for_init(dev);
3277 
3278         err = b43legacy_phy_init_tssi2dbm_table(dev);
3279         if (err)
3280                 goto err_kfree_lo_control;
3281 
3282         /* Enable IRQ routing to this device. */
3283         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3284 
3285         prepare_phy_data_for_init(dev);
3286         b43legacy_phy_calibrate(dev);
3287         err = b43legacy_chip_init(dev);
3288         if (err)
3289                 goto err_kfree_tssitbl;
3290         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3291                               B43legacy_SHM_SH_WLCOREREV,
3292                               dev->dev->id.revision);
3293         hf = b43legacy_hf_read(dev);
3294         if (phy->type == B43legacy_PHYTYPE_G) {
3295                 hf |= B43legacy_HF_SYMW;
3296                 if (phy->rev == 1)
3297                         hf |= B43legacy_HF_GDCW;
3298                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3299                         hf |= B43legacy_HF_OFDMPABOOST;
3300         } else if (phy->type == B43legacy_PHYTYPE_B) {
3301                 hf |= B43legacy_HF_SYMW;
3302                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3303                         hf &= ~B43legacy_HF_GDCW;
3304         }
3305         b43legacy_hf_write(dev, hf);
3306 
3307         b43legacy_set_retry_limits(dev,
3308                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3309                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3310 
3311         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3312                               0x0044, 3);
3313         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3314                               0x0046, 2);
3315 
3316         /* Disable sending probe responses from firmware.
3317          * Setting the MaxTime to one usec will always trigger
3318          * a timeout, so we never send any probe resp.
3319          * A timeout of zero is infinite. */
3320         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3321                               B43legacy_SHM_SH_PRMAXTIME, 1);
3322 
3323         b43legacy_rate_memory_init(dev);
3324 
3325         /* Minimum Contention Window */
3326         if (phy->type == B43legacy_PHYTYPE_B)
3327                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3328                                       0x0003, 31);
3329         else
3330                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3331                                       0x0003, 15);
3332         /* Maximum Contention Window */
3333         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3334                               0x0004, 1023);
3335 
3336         do {
3337                 if (b43legacy_using_pio(dev))
3338                         err = b43legacy_pio_init(dev);
3339                 else {
3340                         err = b43legacy_dma_init(dev);
3341                         if (!err)
3342                                 b43legacy_qos_init(dev);
3343                 }
3344         } while (err == -EAGAIN);
3345         if (err)
3346                 goto err_chip_exit;
3347 
3348         b43legacy_set_synth_pu_delay(dev, 1);
3349 
3350         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3351         b43legacy_upload_card_macaddress(dev);
3352         b43legacy_security_init(dev);
3353         b43legacy_rng_init(wl);
3354 
3355         ieee80211_wake_queues(dev->wl->hw);
3356         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3357 
3358         b43legacy_leds_init(dev);
3359 out:
3360         return err;
3361 
3362 err_chip_exit:
3363         b43legacy_chip_exit(dev);
3364 err_kfree_tssitbl:
3365         if (phy->dyn_tssi_tbl)
3366                 kfree(phy->tssi2dbm);
3367 err_kfree_lo_control:
3368         kfree(phy->lo_control);
3369         phy->lo_control = NULL;
3370         ssb_bus_may_powerdown(bus);
3371         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3372         return err;
3373 }
3374 
3375 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3376                                       struct ieee80211_vif *vif)
3377 {
3378         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3379         struct b43legacy_wldev *dev;
3380         unsigned long flags;
3381         int err = -EOPNOTSUPP;
3382 
3383         /* TODO: allow WDS/AP devices to coexist */
3384 
3385         if (vif->type != NL80211_IFTYPE_AP &&
3386             vif->type != NL80211_IFTYPE_STATION &&
3387             vif->type != NL80211_IFTYPE_WDS &&
3388             vif->type != NL80211_IFTYPE_ADHOC)
3389                 return -EOPNOTSUPP;
3390 
3391         mutex_lock(&wl->mutex);
3392         if (wl->operating)
3393                 goto out_mutex_unlock;
3394 
3395         b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3396 
3397         dev = wl->current_dev;
3398         wl->operating = true;
3399         wl->vif = vif;
3400         wl->if_type = vif->type;
3401         memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3402 
3403         spin_lock_irqsave(&wl->irq_lock, flags);
3404         b43legacy_adjust_opmode(dev);
3405         b43legacy_set_pretbtt(dev);
3406         b43legacy_set_synth_pu_delay(dev, 0);
3407         b43legacy_upload_card_macaddress(dev);
3408         spin_unlock_irqrestore(&wl->irq_lock, flags);
3409 
3410         err = 0;
3411  out_mutex_unlock:
3412         mutex_unlock(&wl->mutex);
3413 
3414         return err;
3415 }
3416 
3417 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3418                                           struct ieee80211_vif *vif)
3419 {
3420         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3421         struct b43legacy_wldev *dev = wl->current_dev;
3422         unsigned long flags;
3423 
3424         b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3425 
3426         mutex_lock(&wl->mutex);
3427 
3428         B43legacy_WARN_ON(!wl->operating);
3429         B43legacy_WARN_ON(wl->vif != vif);
3430         wl->vif = NULL;
3431 
3432         wl->operating = false;
3433 
3434         spin_lock_irqsave(&wl->irq_lock, flags);
3435         b43legacy_adjust_opmode(dev);
3436         eth_zero_addr(wl->mac_addr);
3437         b43legacy_upload_card_macaddress(dev);
3438         spin_unlock_irqrestore(&wl->irq_lock, flags);
3439 
3440         mutex_unlock(&wl->mutex);
3441 }
3442 
3443 static int b43legacy_op_start(struct ieee80211_hw *hw)
3444 {
3445         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3446         struct b43legacy_wldev *dev = wl->current_dev;
3447         int did_init = 0;
3448         int err = 0;
3449 
3450         /* Kill all old instance specific information to make sure
3451          * the card won't use it in the short timeframe between start
3452          * and mac80211 reconfiguring it. */
3453         eth_zero_addr(wl->bssid);
3454         eth_zero_addr(wl->mac_addr);
3455         wl->filter_flags = 0;
3456         wl->beacon0_uploaded = false;
3457         wl->beacon1_uploaded = false;
3458         wl->beacon_templates_virgin = true;
3459         wl->radio_enabled = true;
3460 
3461         mutex_lock(&wl->mutex);
3462 
3463         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3464                 err = b43legacy_wireless_core_init(dev);
3465                 if (err)
3466                         goto out_mutex_unlock;
3467                 did_init = 1;
3468         }
3469 
3470         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3471                 err = b43legacy_wireless_core_start(dev);
3472                 if (err) {
3473                         if (did_init)
3474                                 b43legacy_wireless_core_exit(dev);
3475                         goto out_mutex_unlock;
3476                 }
3477         }
3478 
3479         wiphy_rfkill_start_polling(hw->wiphy);
3480 
3481 out_mutex_unlock:
3482         mutex_unlock(&wl->mutex);
3483 
3484         return err;
3485 }
3486 
3487 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3488 {
3489         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3490         struct b43legacy_wldev *dev = wl->current_dev;
3491 
3492         cancel_work_sync(&(wl->beacon_update_trigger));
3493 
3494         mutex_lock(&wl->mutex);
3495         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3496                 b43legacy_wireless_core_stop(dev);
3497         b43legacy_wireless_core_exit(dev);
3498         wl->radio_enabled = false;
3499         mutex_unlock(&wl->mutex);
3500 }
3501 
3502 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3503                                        struct ieee80211_sta *sta, bool set)
3504 {
3505         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3506         unsigned long flags;
3507 
3508         spin_lock_irqsave(&wl->irq_lock, flags);
3509         b43legacy_update_templates(wl);
3510         spin_unlock_irqrestore(&wl->irq_lock, flags);
3511 
3512         return 0;
3513 }
3514 
3515 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3516                                    struct survey_info *survey)
3517 {
3518         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3519         struct b43legacy_wldev *dev = wl->current_dev;
3520         struct ieee80211_conf *conf = &hw->conf;
3521 
3522         if (idx != 0)
3523                 return -ENOENT;
3524 
3525         survey->channel = conf->chandef.chan;
3526         survey->filled = SURVEY_INFO_NOISE_DBM;
3527         survey->noise = dev->stats.link_noise;
3528 
3529         return 0;
3530 }
3531 
3532 static const struct ieee80211_ops b43legacy_hw_ops = {
3533         .tx                     = b43legacy_op_tx,
3534         .conf_tx                = b43legacy_op_conf_tx,
3535         .add_interface          = b43legacy_op_add_interface,
3536         .remove_interface       = b43legacy_op_remove_interface,
3537         .config                 = b43legacy_op_dev_config,
3538         .bss_info_changed       = b43legacy_op_bss_info_changed,
3539         .configure_filter       = b43legacy_op_configure_filter,
3540         .get_stats              = b43legacy_op_get_stats,
3541         .start                  = b43legacy_op_start,
3542         .stop                   = b43legacy_op_stop,
3543         .set_tim                = b43legacy_op_beacon_set_tim,
3544         .get_survey             = b43legacy_op_get_survey,
3545         .rfkill_poll            = b43legacy_rfkill_poll,
3546 };
3547 
3548 /* Hard-reset the chip. Do not call this directly.
3549  * Use b43legacy_controller_restart()
3550  */
3551 static void b43legacy_chip_reset(struct work_struct *work)
3552 {
3553         struct b43legacy_wldev *dev =
3554                 container_of(work, struct b43legacy_wldev, restart_work);
3555         struct b43legacy_wl *wl = dev->wl;
3556         int err = 0;
3557         int prev_status;
3558 
3559         mutex_lock(&wl->mutex);
3560 
3561         prev_status = b43legacy_status(dev);
3562         /* Bring the device down... */
3563         if (prev_status >= B43legacy_STAT_STARTED)
3564                 b43legacy_wireless_core_stop(dev);
3565         if (prev_status >= B43legacy_STAT_INITIALIZED)
3566                 b43legacy_wireless_core_exit(dev);
3567 
3568         /* ...and up again. */
3569         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3570                 err = b43legacy_wireless_core_init(dev);
3571                 if (err)
3572                         goto out;
3573         }
3574         if (prev_status >= B43legacy_STAT_STARTED) {
3575                 err = b43legacy_wireless_core_start(dev);
3576                 if (err) {
3577                         b43legacy_wireless_core_exit(dev);
3578                         goto out;
3579                 }
3580         }
3581 out:
3582         if (err)
3583                 wl->current_dev = NULL; /* Failed to init the dev. */
3584         mutex_unlock(&wl->mutex);
3585         if (err)
3586                 b43legacyerr(wl, "Controller restart FAILED\n");
3587         else
3588                 b43legacyinfo(wl, "Controller restarted\n");
3589 }
3590 
3591 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3592                                  int have_bphy,
3593                                  int have_gphy)
3594 {
3595         struct ieee80211_hw *hw = dev->wl->hw;
3596         struct b43legacy_phy *phy = &dev->phy;
3597 
3598         phy->possible_phymodes = 0;
3599         if (have_bphy) {
3600                 hw->wiphy->bands[NL80211_BAND_2GHZ] =
3601                         &b43legacy_band_2GHz_BPHY;
3602                 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3603         }
3604 
3605         if (have_gphy) {
3606                 hw->wiphy->bands[NL80211_BAND_2GHZ] =
3607                         &b43legacy_band_2GHz_GPHY;
3608                 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3609         }
3610 
3611         return 0;
3612 }
3613 
3614 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3615 {
3616         /* We release firmware that late to not be required to re-request
3617          * is all the time when we reinit the core. */
3618         b43legacy_release_firmware(dev);
3619 }
3620 
3621 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3622 {
3623         struct b43legacy_wl *wl = dev->wl;
3624         struct ssb_bus *bus = dev->dev->bus;
3625         struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3626         int err;
3627         int have_bphy = 0;
3628         int have_gphy = 0;
3629         u32 tmp;
3630 
3631         /* Do NOT do any device initialization here.
3632          * Do it in wireless_core_init() instead.
3633          * This function is for gathering basic information about the HW, only.
3634          * Also some structs may be set up here. But most likely you want to
3635          * have that in core_init(), too.
3636          */
3637 
3638         err = ssb_bus_powerup(bus, 0);
3639         if (err) {
3640                 b43legacyerr(wl, "Bus powerup failed\n");
3641                 goto out;
3642         }
3643         /* Get the PHY type. */
3644         if (dev->dev->id.revision >= 5) {
3645                 u32 tmshigh;
3646 
3647                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3648                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3649                 if (!have_gphy)
3650                         have_bphy = 1;
3651         } else if (dev->dev->id.revision == 4)
3652                 have_gphy = 1;
3653         else
3654                 have_bphy = 1;
3655 
3656         dev->phy.gmode = (have_gphy || have_bphy);
3657         dev->phy.radio_on = true;
3658         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3659         b43legacy_wireless_core_reset(dev, tmp);
3660 
3661         err = b43legacy_phy_versioning(dev);
3662         if (err)
3663                 goto err_powerdown;
3664         /* Check if this device supports multiband. */
3665         if (!pdev ||
3666             (pdev->device != 0x4312 &&
3667              pdev->device != 0x4319 &&
3668              pdev->device != 0x4324)) {
3669                 /* No multiband support. */
3670                 have_bphy = 0;
3671                 have_gphy = 0;
3672                 switch (dev->phy.type) {
3673                 case B43legacy_PHYTYPE_B:
3674                         have_bphy = 1;
3675                         break;
3676                 case B43legacy_PHYTYPE_G:
3677                         have_gphy = 1;
3678                         break;
3679                 default:
3680                         B43legacy_BUG_ON(1);
3681                 }
3682         }
3683         dev->phy.gmode = (have_gphy || have_bphy);
3684         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3685         b43legacy_wireless_core_reset(dev, tmp);
3686 
3687         err = b43legacy_validate_chipaccess(dev);
3688         if (err)
3689                 goto err_powerdown;
3690         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3691         if (err)
3692                 goto err_powerdown;
3693 
3694         /* Now set some default "current_dev" */
3695         if (!wl->current_dev)
3696                 wl->current_dev = dev;
3697         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3698 
3699         b43legacy_radio_turn_off(dev, 1);
3700         b43legacy_switch_analog(dev, 0);
3701         ssb_device_disable(dev->dev, 0);
3702         ssb_bus_may_powerdown(bus);
3703 
3704 out:
3705         return err;
3706 
3707 err_powerdown:
3708         ssb_bus_may_powerdown(bus);
3709         return err;
3710 }
3711 
3712 static void b43legacy_one_core_detach(struct ssb_device *dev)
3713 {
3714         struct b43legacy_wldev *wldev;
3715         struct b43legacy_wl *wl;
3716 
3717         /* Do not cancel ieee80211-workqueue based work here.
3718          * See comment in b43legacy_remove(). */
3719 
3720         wldev = ssb_get_drvdata(dev);
3721         wl = wldev->wl;
3722         b43legacy_debugfs_remove_device(wldev);
3723         b43legacy_wireless_core_detach(wldev);
3724         list_del(&wldev->list);
3725         wl->nr_devs--;
3726         ssb_set_drvdata(dev, NULL);
3727         kfree(wldev);
3728 }
3729 
3730 static int b43legacy_one_core_attach(struct ssb_device *dev,
3731                                      struct b43legacy_wl *wl)
3732 {
3733         struct b43legacy_wldev *wldev;
3734         int err = -ENOMEM;
3735 
3736         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3737         if (!wldev)
3738                 goto out;
3739 
3740         wldev->dev = dev;
3741         wldev->wl = wl;
3742         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3743         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3744         tasklet_init(&wldev->isr_tasklet,
3745                      b43legacy_interrupt_tasklet,
3746                      (unsigned long)wldev);
3747         if (modparam_pio)
3748                 wldev->__using_pio = true;
3749         INIT_LIST_HEAD(&wldev->list);
3750 
3751         err = b43legacy_wireless_core_attach(wldev);
3752         if (err)
3753                 goto err_kfree_wldev;
3754 
3755         list_add(&wldev->list, &wl->devlist);
3756         wl->nr_devs++;
3757         ssb_set_drvdata(dev, wldev);
3758         b43legacy_debugfs_add_device(wldev);
3759 out:
3760         return err;
3761 
3762 err_kfree_wldev:
3763         kfree(wldev);
3764         return err;
3765 }
3766 
3767 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3768 {
3769         /* boardflags workarounds */
3770         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3771             bus->boardinfo.type == 0x4E &&
3772             bus->sprom.board_rev > 0x40)
3773                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3774 }
3775 
3776 static void b43legacy_wireless_exit(struct ssb_device *dev,
3777                                   struct b43legacy_wl *wl)
3778 {
3779         struct ieee80211_hw *hw = wl->hw;
3780 
3781         ssb_set_devtypedata(dev, NULL);
3782         ieee80211_free_hw(hw);
3783 }
3784 
3785 static int b43legacy_wireless_init(struct ssb_device *dev)
3786 {
3787         struct ssb_sprom *sprom = &dev->bus->sprom;
3788         struct ieee80211_hw *hw;
3789         struct b43legacy_wl *wl;
3790         int err = -ENOMEM;
3791         int queue_num;
3792 
3793         b43legacy_sprom_fixup(dev->bus);
3794 
3795         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3796         if (!hw) {
3797                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3798                 goto out;
3799         }
3800 
3801         /* fill hw info */
3802         ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3803         ieee80211_hw_set(hw, SIGNAL_DBM);
3804 
3805         hw->wiphy->interface_modes =
3806                 BIT(NL80211_IFTYPE_AP) |
3807                 BIT(NL80211_IFTYPE_STATION) |
3808 #ifdef CONFIG_WIRELESS_WDS
3809                 BIT(NL80211_IFTYPE_WDS) |
3810 #endif
3811                 BIT(NL80211_IFTYPE_ADHOC);
3812         hw->queues = 1; /* FIXME: hardware has more queues */
3813         hw->max_rates = 2;
3814         SET_IEEE80211_DEV(hw, dev->dev);
3815         if (is_valid_ether_addr(sprom->et1mac))
3816                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3817         else
3818                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3819 
3820         wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3821 
3822         /* Get and initialize struct b43legacy_wl */
3823         wl = hw_to_b43legacy_wl(hw);
3824         memset(wl, 0, sizeof(*wl));
3825         wl->hw = hw;
3826         spin_lock_init(&wl->irq_lock);
3827         spin_lock_init(&wl->leds_lock);
3828         mutex_init(&wl->mutex);
3829         INIT_LIST_HEAD(&wl->devlist);
3830         INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3831         INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3832 
3833         /* Initialize queues and flags. */
3834         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3835                 skb_queue_head_init(&wl->tx_queue[queue_num]);
3836                 wl->tx_queue_stopped[queue_num] = 0;
3837         }
3838 
3839         ssb_set_devtypedata(dev, wl);
3840         b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3841                       dev->bus->chip_id, dev->id.revision);
3842         err = 0;
3843 out:
3844         return err;
3845 }
3846 
3847 static int b43legacy_probe(struct ssb_device *dev,
3848                          const struct ssb_device_id *id)
3849 {
3850         struct b43legacy_wl *wl;
3851         int err;
3852         int first = 0;
3853 
3854         wl = ssb_get_devtypedata(dev);
3855         if (!wl) {
3856                 /* Probing the first core - setup common struct b43legacy_wl */
3857                 first = 1;
3858                 err = b43legacy_wireless_init(dev);
3859                 if (err)
3860                         goto out;
3861                 wl = ssb_get_devtypedata(dev);
3862                 B43legacy_WARN_ON(!wl);
3863         }
3864         err = b43legacy_one_core_attach(dev, wl);
3865         if (err)
3866                 goto err_wireless_exit;
3867 
3868         /* setup and start work to load firmware */
3869         INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3870         schedule_work(&wl->firmware_load);
3871 
3872 out:
3873         return err;
3874 
3875 err_wireless_exit:
3876         if (first)
3877                 b43legacy_wireless_exit(dev, wl);
3878         return err;
3879 }
3880 
3881 static void b43legacy_remove(struct ssb_device *dev)
3882 {
3883         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3884         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3885 
3886         /* We must cancel any work here before unregistering from ieee80211,
3887          * as the ieee80211 unreg will destroy the workqueue. */
3888         cancel_work_sync(&wldev->restart_work);
3889         cancel_work_sync(&wl->firmware_load);
3890         complete(&wldev->fw_load_complete);
3891 
3892         B43legacy_WARN_ON(!wl);
3893         if (!wldev->fw.ucode)
3894                 return;                 /* NULL if fw never loaded */
3895         if (wl->current_dev == wldev)
3896                 ieee80211_unregister_hw(wl->hw);
3897 
3898         b43legacy_one_core_detach(dev);
3899 
3900         if (list_empty(&wl->devlist))
3901                 /* Last core on the chip unregistered.
3902                  * We can destroy common struct b43legacy_wl.
3903                  */
3904                 b43legacy_wireless_exit(dev, wl);
3905 }
3906 
3907 /* Perform a hardware reset. This can be called from any context. */
3908 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3909                                   const char *reason)
3910 {
3911         /* Must avoid requeueing, if we are in shutdown. */
3912         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3913                 return;
3914         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3915         ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3916 }
3917 
3918 #ifdef CONFIG_PM
3919 
3920 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3921 {
3922         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3923         struct b43legacy_wl *wl = wldev->wl;
3924 
3925         b43legacydbg(wl, "Suspending...\n");
3926 
3927         mutex_lock(&wl->mutex);
3928         wldev->suspend_init_status = b43legacy_status(wldev);
3929         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3930                 b43legacy_wireless_core_stop(wldev);
3931         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3932                 b43legacy_wireless_core_exit(wldev);
3933         mutex_unlock(&wl->mutex);
3934 
3935         b43legacydbg(wl, "Device suspended.\n");
3936 
3937         return 0;
3938 }
3939 
3940 static int b43legacy_resume(struct ssb_device *dev)
3941 {
3942         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3943         struct b43legacy_wl *wl = wldev->wl;
3944         int err = 0;
3945 
3946         b43legacydbg(wl, "Resuming...\n");
3947 
3948         mutex_lock(&wl->mutex);
3949         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3950                 err = b43legacy_wireless_core_init(wldev);
3951                 if (err) {
3952                         b43legacyerr(wl, "Resume failed at core init\n");
3953                         goto out;
3954                 }
3955         }
3956         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3957                 err = b43legacy_wireless_core_start(wldev);
3958                 if (err) {
3959                         b43legacy_wireless_core_exit(wldev);
3960                         b43legacyerr(wl, "Resume failed at core start\n");
3961                         goto out;
3962                 }
3963         }
3964 
3965         b43legacydbg(wl, "Device resumed.\n");
3966 out:
3967         mutex_unlock(&wl->mutex);
3968         return err;
3969 }
3970 
3971 #else   /* CONFIG_PM */
3972 # define b43legacy_suspend      NULL
3973 # define b43legacy_resume               NULL
3974 #endif  /* CONFIG_PM */
3975 
3976 static struct ssb_driver b43legacy_ssb_driver = {
3977         .name           = KBUILD_MODNAME,
3978         .id_table       = b43legacy_ssb_tbl,
3979         .probe          = b43legacy_probe,
3980         .remove         = b43legacy_remove,
3981         .suspend        = b43legacy_suspend,
3982         .resume         = b43legacy_resume,
3983 };
3984 
3985 static void b43legacy_print_driverinfo(void)
3986 {
3987         const char *feat_pci = "", *feat_leds = "",
3988                    *feat_pio = "", *feat_dma = "";
3989 
3990 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3991         feat_pci = "P";
3992 #endif
3993 #ifdef CONFIG_B43LEGACY_LEDS
3994         feat_leds = "L";
3995 #endif
3996 #ifdef CONFIG_B43LEGACY_PIO
3997         feat_pio = "I";
3998 #endif
3999 #ifdef CONFIG_B43LEGACY_DMA
4000         feat_dma = "D";
4001 #endif
4002         printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4003                "[ Features: %s%s%s%s ]\n",
4004                feat_pci, feat_leds, feat_pio, feat_dma);
4005 }
4006 
4007 static int __init b43legacy_init(void)
4008 {
4009         int err;
4010 
4011         b43legacy_debugfs_init();
4012 
4013         err = ssb_driver_register(&b43legacy_ssb_driver);
4014         if (err)
4015                 goto err_dfs_exit;
4016 
4017         b43legacy_print_driverinfo();
4018 
4019         return err;
4020 
4021 err_dfs_exit:
4022         b43legacy_debugfs_exit();
4023         return err;
4024 }
4025 
4026 static void __exit b43legacy_exit(void)
4027 {
4028         ssb_driver_unregister(&b43legacy_ssb_driver);
4029         b43legacy_debugfs_exit();
4030 }
4031 
4032 module_init(b43legacy_init)
4033 module_exit(b43legacy_exit)

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