This source file includes following definitions.
- __b43legacy_warn_on_dummy
- hw_to_b43legacy_wl
- b43legacy_using_pio
- b43legacy_using_pio
- b43legacy_using_pio
- dev_to_b43legacy_wldev
- b43legacy_is_mode
- is_bcm_board_vendor
- b43legacy_read16
- b43legacy_write16
- b43legacy_read32
- b43legacy_write32
- b43legacy_get_lopair
1
2 #ifndef B43legacy_H_
3 #define B43legacy_H_
4
5 #include <linux/hw_random.h>
6 #include <linux/kernel.h>
7 #include <linux/spinlock.h>
8 #include <linux/interrupt.h>
9 #include <linux/stringify.h>
10 #include <linux/netdevice.h>
11 #include <linux/pci.h>
12 #include <linux/atomic.h>
13 #include <linux/io.h>
14
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_driver_chipcommon.h>
17 #include <linux/completion.h>
18
19 #include <net/mac80211.h>
20
21 #include "debugfs.h"
22 #include "leds.h"
23 #include "rfkill.h"
24 #include "phy.h"
25
26
27 #define B43legacy_IRQWAIT_MAX_RETRIES 20
28
29
30 #define B43legacy_MMIO_DMA0_REASON 0x20
31 #define B43legacy_MMIO_DMA0_IRQ_MASK 0x24
32 #define B43legacy_MMIO_DMA1_REASON 0x28
33 #define B43legacy_MMIO_DMA1_IRQ_MASK 0x2C
34 #define B43legacy_MMIO_DMA2_REASON 0x30
35 #define B43legacy_MMIO_DMA2_IRQ_MASK 0x34
36 #define B43legacy_MMIO_DMA3_REASON 0x38
37 #define B43legacy_MMIO_DMA3_IRQ_MASK 0x3C
38 #define B43legacy_MMIO_DMA4_REASON 0x40
39 #define B43legacy_MMIO_DMA4_IRQ_MASK 0x44
40 #define B43legacy_MMIO_DMA5_REASON 0x48
41 #define B43legacy_MMIO_DMA5_IRQ_MASK 0x4C
42 #define B43legacy_MMIO_MACCTL 0x120
43 #define B43legacy_MMIO_MACCMD 0x124
44 #define B43legacy_MMIO_GEN_IRQ_REASON 0x128
45 #define B43legacy_MMIO_GEN_IRQ_MASK 0x12C
46 #define B43legacy_MMIO_RAM_CONTROL 0x130
47 #define B43legacy_MMIO_RAM_DATA 0x134
48 #define B43legacy_MMIO_PS_STATUS 0x140
49 #define B43legacy_MMIO_RADIO_HWENABLED_HI 0x158
50 #define B43legacy_MMIO_SHM_CONTROL 0x160
51 #define B43legacy_MMIO_SHM_DATA 0x164
52 #define B43legacy_MMIO_SHM_DATA_UNALIGNED 0x166
53 #define B43legacy_MMIO_XMITSTAT_0 0x170
54 #define B43legacy_MMIO_XMITSTAT_1 0x174
55 #define B43legacy_MMIO_REV3PLUS_TSF_LOW 0x180
56 #define B43legacy_MMIO_REV3PLUS_TSF_HIGH 0x184
57 #define B43legacy_MMIO_TSF_CFP_REP 0x188
58 #define B43legacy_MMIO_TSF_CFP_START 0x18C
59
60 #define B43legacy_MMIO_DMA32_BASE0 0x200
61 #define B43legacy_MMIO_DMA32_BASE1 0x220
62 #define B43legacy_MMIO_DMA32_BASE2 0x240
63 #define B43legacy_MMIO_DMA32_BASE3 0x260
64 #define B43legacy_MMIO_DMA32_BASE4 0x280
65 #define B43legacy_MMIO_DMA32_BASE5 0x2A0
66
67 #define B43legacy_MMIO_DMA64_BASE0 0x200
68 #define B43legacy_MMIO_DMA64_BASE1 0x240
69 #define B43legacy_MMIO_DMA64_BASE2 0x280
70 #define B43legacy_MMIO_DMA64_BASE3 0x2C0
71 #define B43legacy_MMIO_DMA64_BASE4 0x300
72 #define B43legacy_MMIO_DMA64_BASE5 0x340
73
74 #define B43legacy_MMIO_PIO1_BASE 0x300
75 #define B43legacy_MMIO_PIO2_BASE 0x310
76 #define B43legacy_MMIO_PIO3_BASE 0x320
77 #define B43legacy_MMIO_PIO4_BASE 0x330
78
79 #define B43legacy_MMIO_PHY_VER 0x3E0
80 #define B43legacy_MMIO_PHY_RADIO 0x3E2
81 #define B43legacy_MMIO_PHY0 0x3E6
82 #define B43legacy_MMIO_ANTENNA 0x3E8
83 #define B43legacy_MMIO_CHANNEL 0x3F0
84 #define B43legacy_MMIO_CHANNEL_EXT 0x3F4
85 #define B43legacy_MMIO_RADIO_CONTROL 0x3F6
86 #define B43legacy_MMIO_RADIO_DATA_HIGH 0x3F8
87 #define B43legacy_MMIO_RADIO_DATA_LOW 0x3FA
88 #define B43legacy_MMIO_PHY_CONTROL 0x3FC
89 #define B43legacy_MMIO_PHY_DATA 0x3FE
90 #define B43legacy_MMIO_MACFILTER_CONTROL 0x420
91 #define B43legacy_MMIO_MACFILTER_DATA 0x422
92 #define B43legacy_MMIO_RCMTA_COUNT 0x43C
93 #define B43legacy_MMIO_RADIO_HWENABLED_LO 0x49A
94 #define B43legacy_MMIO_GPIO_CONTROL 0x49C
95 #define B43legacy_MMIO_GPIO_MASK 0x49E
96 #define B43legacy_MMIO_TSF_CFP_PRETBTT 0x612
97 #define B43legacy_MMIO_TSF_0 0x632
98 #define B43legacy_MMIO_TSF_1 0x634
99 #define B43legacy_MMIO_TSF_2 0x636
100 #define B43legacy_MMIO_TSF_3 0x638
101 #define B43legacy_MMIO_RNG 0x65A
102 #define B43legacy_MMIO_POWERUP_DELAY 0x6A8
103
104
105 #define B43legacy_BFL_PACTRL 0x0002
106 #define B43legacy_BFL_RSSI 0x0008
107 #define B43legacy_BFL_EXTLNA 0x1000
108
109
110 #define B43legacy_GPIO_CONTROL 0x6c
111
112
113 #define B43legacy_SHM_SHARED 0x0001
114 #define B43legacy_SHM_WIRELESS 0x0002
115 #define B43legacy_SHM_HW 0x0004
116 #define B43legacy_SHM_UCODE 0x0300
117
118
119 #define B43legacy_SHM_AUTOINC_R 0x0200
120 #define B43legacy_SHM_AUTOINC_W 0x0100
121 #define B43legacy_SHM_AUTOINC_RW (B43legacy_SHM_AUTOINC_R | \
122 B43legacy_SHM_AUTOINC_W)
123
124
125 #define B43legacy_SHM_SH_WLCOREREV 0x0016
126 #define B43legacy_SHM_SH_HOSTFLO 0x005E
127 #define B43legacy_SHM_SH_HOSTFHI 0x0060
128
129 #define B43legacy_SHM_SH_KEYIDXBLOCK 0x05D4
130
131 #define B43legacy_SHM_SH_DTIMP 0x0012
132 #define B43legacy_SHM_SH_BTL0 0x0018
133 #define B43legacy_SHM_SH_BTL1 0x001A
134 #define B43legacy_SHM_SH_BTSFOFF 0x001C
135 #define B43legacy_SHM_SH_TIMPOS 0x001E
136 #define B43legacy_SHM_SH_BEACPHYCTL 0x0054
137
138 #define B43legacy_SHM_SH_ACKCTSPHYCTL 0x0022
139
140 #define B43legacy_SHM_SH_PRTLEN 0x004A
141 #define B43legacy_SHM_SH_PRMAXTIME 0x0074
142 #define B43legacy_SHM_SH_PRPHYCTL 0x0188
143
144 #define B43legacy_SHM_SH_OFDMDIRECT 0x0480
145 #define B43legacy_SHM_SH_OFDMBASIC 0x04A0
146 #define B43legacy_SHM_SH_CCKDIRECT 0x04C0
147 #define B43legacy_SHM_SH_CCKBASIC 0x04E0
148
149 #define B43legacy_SHM_SH_UCODEREV 0x0000
150 #define B43legacy_SHM_SH_UCODEPATCH 0x0002
151 #define B43legacy_SHM_SH_UCODEDATE 0x0004
152 #define B43legacy_SHM_SH_UCODETIME 0x0006
153 #define B43legacy_SHM_SH_SPUWKUP 0x0094
154 #define B43legacy_SHM_SH_PRETBTT 0x0096
155
156 #define B43legacy_UCODEFLAGS_OFFSET 0x005E
157
158
159 #define B43legacy_MMIO_RADIO_HWENABLED_HI_MASK (1 << 16)
160 #define B43legacy_MMIO_RADIO_HWENABLED_LO_MASK (1 << 4)
161
162
163 #define B43legacy_HF_SYMW 0x00000002
164 #define B43legacy_HF_GDCW 0x00000020
165 #define B43legacy_HF_OFDMPABOOST 0x00000040
166 #define B43legacy_HF_EDCF 0x00000100
167
168
169 #define B43legacy_MACFILTER_SELF 0x0000
170 #define B43legacy_MACFILTER_BSSID 0x0003
171 #define B43legacy_MACFILTER_MAC 0x0010
172
173
174 #define B43legacy_PHYTYPE_B 0x01
175 #define B43legacy_PHYTYPE_G 0x02
176
177
178 #define B43legacy_PHY_G_LO_CONTROL 0x0810
179 #define B43legacy_PHY_ILT_G_CTRL 0x0472
180 #define B43legacy_PHY_ILT_G_DATA1 0x0473
181 #define B43legacy_PHY_ILT_G_DATA2 0x0474
182 #define B43legacy_PHY_G_PCTL 0x0029
183 #define B43legacy_PHY_RADIO_BITFIELD 0x0401
184 #define B43legacy_PHY_G_CRS 0x0429
185 #define B43legacy_PHY_NRSSILT_CTRL 0x0803
186 #define B43legacy_PHY_NRSSILT_DATA 0x0804
187
188
189 #define B43legacy_RADIOCTL_ID 0x01
190
191
192 #define B43legacy_MACCTL_ENABLED 0x00000001
193 #define B43legacy_MACCTL_PSM_RUN 0x00000002
194 #define B43legacy_MACCTL_PSM_JMP0 0x00000004
195 #define B43legacy_MACCTL_SHM_ENABLED 0x00000100
196 #define B43legacy_MACCTL_IHR_ENABLED 0x00000400
197 #define B43legacy_MACCTL_BE 0x00010000
198 #define B43legacy_MACCTL_INFRA 0x00020000
199 #define B43legacy_MACCTL_AP 0x00040000
200 #define B43legacy_MACCTL_RADIOLOCK 0x00080000
201 #define B43legacy_MACCTL_BEACPROMISC 0x00100000
202 #define B43legacy_MACCTL_KEEP_BADPLCP 0x00200000
203 #define B43legacy_MACCTL_KEEP_CTL 0x00400000
204 #define B43legacy_MACCTL_KEEP_BAD 0x00800000
205 #define B43legacy_MACCTL_PROMISC 0x01000000
206 #define B43legacy_MACCTL_HWPS 0x02000000
207 #define B43legacy_MACCTL_AWAKE 0x04000000
208 #define B43legacy_MACCTL_TBTTHOLD 0x10000000
209 #define B43legacy_MACCTL_GMODE 0x80000000
210
211
212 #define B43legacy_MACCMD_BEACON0_VALID 0x00000001
213 #define B43legacy_MACCMD_BEACON1_VALID 0x00000002
214 #define B43legacy_MACCMD_DFQ_VALID 0x00000004
215 #define B43legacy_MACCMD_CCA 0x00000008
216 #define B43legacy_MACCMD_BGNOISE 0x00000010
217
218
219 #define B43legacy_TMSLOW_GMODE 0x20000000
220 #define B43legacy_TMSLOW_PLLREFSEL 0x00200000
221 #define B43legacy_TMSLOW_MACPHYCLKEN 0x00100000
222 #define B43legacy_TMSLOW_PHYRESET 0x00080000
223 #define B43legacy_TMSLOW_PHYCLKEN 0x00040000
224
225
226 #define B43legacy_TMSHIGH_FCLOCK 0x00040000
227 #define B43legacy_TMSHIGH_GPHY 0x00010000
228
229 #define B43legacy_UCODEFLAG_AUTODIV 0x0001
230
231
232 #define B43legacy_IRQ_MAC_SUSPENDED 0x00000001
233 #define B43legacy_IRQ_BEACON 0x00000002
234 #define B43legacy_IRQ_TBTT_INDI 0x00000004
235 #define B43legacy_IRQ_BEACON_TX_OK 0x00000008
236 #define B43legacy_IRQ_BEACON_CANCEL 0x00000010
237 #define B43legacy_IRQ_ATIM_END 0x00000020
238 #define B43legacy_IRQ_PMQ 0x00000040
239 #define B43legacy_IRQ_PIO_WORKAROUND 0x00000100
240 #define B43legacy_IRQ_MAC_TXERR 0x00000200
241 #define B43legacy_IRQ_PHY_TXERR 0x00000800
242 #define B43legacy_IRQ_PMEVENT 0x00001000
243 #define B43legacy_IRQ_TIMER0 0x00002000
244 #define B43legacy_IRQ_TIMER1 0x00004000
245 #define B43legacy_IRQ_DMA 0x00008000
246 #define B43legacy_IRQ_TXFIFO_FLUSH_OK 0x00010000
247 #define B43legacy_IRQ_CCA_MEASURE_OK 0x00020000
248 #define B43legacy_IRQ_NOISESAMPLE_OK 0x00040000
249 #define B43legacy_IRQ_UCODE_DEBUG 0x08000000
250 #define B43legacy_IRQ_RFKILL 0x10000000
251 #define B43legacy_IRQ_TX_OK 0x20000000
252 #define B43legacy_IRQ_PHY_G_CHANGED 0x40000000
253 #define B43legacy_IRQ_TIMEOUT 0x80000000
254
255 #define B43legacy_IRQ_ALL 0xFFFFFFFF
256 #define B43legacy_IRQ_MASKTEMPLATE (B43legacy_IRQ_MAC_SUSPENDED | \
257 B43legacy_IRQ_TBTT_INDI | \
258 B43legacy_IRQ_ATIM_END | \
259 B43legacy_IRQ_PMQ | \
260 B43legacy_IRQ_MAC_TXERR | \
261 B43legacy_IRQ_PHY_TXERR | \
262 B43legacy_IRQ_DMA | \
263 B43legacy_IRQ_TXFIFO_FLUSH_OK | \
264 B43legacy_IRQ_NOISESAMPLE_OK | \
265 B43legacy_IRQ_UCODE_DEBUG | \
266 B43legacy_IRQ_RFKILL | \
267 B43legacy_IRQ_TX_OK)
268
269
270
271
272 #define B43legacy_CCK_RATE_1MB 2
273 #define B43legacy_CCK_RATE_2MB 4
274 #define B43legacy_CCK_RATE_5MB 11
275 #define B43legacy_CCK_RATE_11MB 22
276 #define B43legacy_OFDM_RATE_6MB 12
277 #define B43legacy_OFDM_RATE_9MB 18
278 #define B43legacy_OFDM_RATE_12MB 24
279 #define B43legacy_OFDM_RATE_18MB 36
280 #define B43legacy_OFDM_RATE_24MB 48
281 #define B43legacy_OFDM_RATE_36MB 72
282 #define B43legacy_OFDM_RATE_48MB 96
283 #define B43legacy_OFDM_RATE_54MB 108
284
285 #define B43legacy_RATE_TO_100KBPS(rate) (((rate) * 10) / 2)
286
287
288 #define B43legacy_DEFAULT_SHORT_RETRY_LIMIT 7
289 #define B43legacy_DEFAULT_LONG_RETRY_LIMIT 4
290
291 #define B43legacy_PHY_TX_BADNESS_LIMIT 1000
292
293
294 #define B43legacy_SEC_KEYSIZE 16
295
296 enum {
297 B43legacy_SEC_ALGO_NONE = 0,
298 B43legacy_SEC_ALGO_WEP40,
299 B43legacy_SEC_ALGO_TKIP,
300 B43legacy_SEC_ALGO_AES,
301 B43legacy_SEC_ALGO_WEP104,
302 B43legacy_SEC_ALGO_AES_LEGACY,
303 };
304
305
306 #define B43legacy_CIR_BASE 0xf00
307 #define B43legacy_CIR_SBTPSFLAG (B43legacy_CIR_BASE + 0x18)
308 #define B43legacy_CIR_SBIMSTATE (B43legacy_CIR_BASE + 0x90)
309 #define B43legacy_CIR_SBINTVEC (B43legacy_CIR_BASE + 0x94)
310 #define B43legacy_CIR_SBTMSTATELOW (B43legacy_CIR_BASE + 0x98)
311 #define B43legacy_CIR_SBTMSTATEHIGH (B43legacy_CIR_BASE + 0x9c)
312 #define B43legacy_CIR_SBIMCONFIGLOW (B43legacy_CIR_BASE + 0xa8)
313 #define B43legacy_CIR_SB_ID_HI (B43legacy_CIR_BASE + 0xfc)
314
315
316 #define B43legacy_SBTMSTATEHIGH_SERROR 0x00000001
317 #define B43legacy_SBTMSTATEHIGH_BUSY 0x00000004
318 #define B43legacy_SBTMSTATEHIGH_TIMEOUT 0x00000020
319 #define B43legacy_SBTMSTATEHIGH_G_PHY_AVAIL 0x00010000
320 #define B43legacy_SBTMSTATEHIGH_COREFLAGS 0x1FFF0000
321 #define B43legacy_SBTMSTATEHIGH_DMA64BIT 0x10000000
322 #define B43legacy_SBTMSTATEHIGH_GATEDCLK 0x20000000
323 #define B43legacy_SBTMSTATEHIGH_BISTFAILED 0x40000000
324 #define B43legacy_SBTMSTATEHIGH_BISTCOMPLETE 0x80000000
325
326
327 #define B43legacy_SBIMSTATE_IB_ERROR 0x20000
328 #define B43legacy_SBIMSTATE_TIMEOUT 0x40000
329
330 #define PFX KBUILD_MODNAME ": "
331 #ifdef assert
332 # undef assert
333 #endif
334 #ifdef CONFIG_B43LEGACY_DEBUG
335 # define B43legacy_WARN_ON(x) WARN_ON(x)
336 # define B43legacy_BUG_ON(expr) \
337 do { \
338 if (unlikely((expr))) { \
339 printk(KERN_INFO PFX "Test (%s) failed\n", \
340 #expr); \
341 BUG_ON(expr); \
342 } \
343 } while (0)
344 # define B43legacy_DEBUG 1
345 #else
346
347 static inline bool __b43legacy_warn_on_dummy(bool x) { return x; }
348 # define B43legacy_WARN_ON(x) __b43legacy_warn_on_dummy(unlikely(!!(x)))
349 # define B43legacy_BUG_ON(x) do { } while (0)
350 # define B43legacy_DEBUG 0
351 #endif
352
353
354 struct net_device;
355 struct pci_dev;
356 struct b43legacy_dmaring;
357 struct b43legacy_pioqueue;
358
359
360 #define B43legacy_FW_TYPE_UCODE 'u'
361 #define B43legacy_FW_TYPE_PCM 'p'
362 #define B43legacy_FW_TYPE_IV 'i'
363 struct b43legacy_fw_header {
364
365 u8 type;
366
367 u8 ver;
368 u8 __padding[2];
369
370
371 __be32 size;
372 } __packed;
373
374
375 #define B43legacy_IV_OFFSET_MASK 0x7FFF
376 #define B43legacy_IV_32BIT 0x8000
377 struct b43legacy_iv {
378 __be16 offset_size;
379 union {
380 __be16 d16;
381 __be32 d32;
382 } data __packed;
383 } __packed;
384
385 #define B43legacy_PHYMODE(phytype) (1 << (phytype))
386 #define B43legacy_PHYMODE_B B43legacy_PHYMODE \
387 ((B43legacy_PHYTYPE_B))
388 #define B43legacy_PHYMODE_G B43legacy_PHYMODE \
389 ((B43legacy_PHYTYPE_G))
390
391
392 struct b43legacy_lopair {
393 s8 low;
394 s8 high;
395 u8 used:1;
396 };
397 #define B43legacy_LO_COUNT (14*4)
398
399 struct b43legacy_phy {
400
401 u8 possible_phymodes;
402
403 bool gmode;
404
405
406 u8 analog;
407
408 u8 type;
409
410 u8 rev;
411
412 u16 antenna_diversity;
413 u16 savedpctlreg;
414
415 u16 radio_manuf;
416 u16 radio_ver;
417 u8 calibrated:1;
418 u8 radio_rev;
419
420 bool dyn_tssi_tbl;
421
422
423 bool aci_enable;
424 bool aci_wlan_automatic;
425 bool aci_hw_rssi;
426
427
428 bool radio_on;
429 struct {
430
431
432 bool valid;
433 u16 rfover;
434 u16 rfoverval;
435 } radio_off_context;
436
437 u16 minlowsig[2];
438 u16 minlowsigpos[2];
439
440
441
442
443 struct b43legacy_lopair *_lo_pairs;
444
445 const s8 *tssi2dbm;
446
447 s8 idle_tssi;
448
449 int tgt_idle_tssi;
450
451 int cur_idle_tssi;
452
453
454 struct b43legacy_txpower_lo_control *lo_control;
455
456 s16 max_lb_gain;
457 s16 trsw_rx_gain;
458 s16 lna_lod_gain;
459 s16 lna_gain;
460 s16 pga_gain;
461
462
463
464 u8 power_level;
465
466
467 u16 loopback_gain[2];
468
469
470
471 struct {
472
473 u16 rfatt;
474
475 u16 bbatt;
476
477 u16 txctl1;
478 u16 txctl2;
479 };
480
481 struct {
482 u16 txpwr_offset;
483 };
484
485
486 int interfmode;
487
488
489
490
491
492
493
494 #define B43legacy_INTERFSTACK_SIZE 26
495 u32 interfstack[B43legacy_INTERFSTACK_SIZE];
496
497
498 s16 nrssi[2];
499 s32 nrssislope;
500
501 s8 nrssi_lt[64];
502
503
504 u8 channel;
505
506 u16 lofcal;
507
508 u16 initval;
509
510
511 atomic_t txerr_cnt;
512
513 #if B43legacy_DEBUG
514
515 bool manual_txpower_control;
516
517 bool phy_locked;
518 #endif
519 };
520
521
522 struct b43legacy_dma {
523 struct b43legacy_dmaring *tx_ring0;
524 struct b43legacy_dmaring *tx_ring1;
525 struct b43legacy_dmaring *tx_ring2;
526 struct b43legacy_dmaring *tx_ring3;
527 struct b43legacy_dmaring *tx_ring4;
528 struct b43legacy_dmaring *tx_ring5;
529
530 struct b43legacy_dmaring *rx_ring0;
531 struct b43legacy_dmaring *rx_ring3;
532
533 u32 translation;
534 };
535
536
537 struct b43legacy_pio {
538 struct b43legacy_pioqueue *queue0;
539 struct b43legacy_pioqueue *queue1;
540 struct b43legacy_pioqueue *queue2;
541 struct b43legacy_pioqueue *queue3;
542 };
543
544
545 struct b43legacy_noise_calculation {
546 u8 channel_at_start;
547 bool calculation_running;
548 u8 nr_samples;
549 s8 samples[8][4];
550 };
551
552 struct b43legacy_stats {
553 u8 link_noise;
554
555 unsigned long last_tx;
556 unsigned long last_rx;
557 };
558
559 struct b43legacy_key {
560 void *keyconf;
561 bool enabled;
562 u8 algorithm;
563 };
564
565 #define B43legacy_QOS_QUEUE_NUM 4
566
567 struct b43legacy_wldev;
568
569
570 struct b43legacy_qos_params {
571
572 struct ieee80211_tx_queue_params p;
573 };
574
575
576 struct b43legacy_wl {
577
578 struct b43legacy_wldev *current_dev;
579
580 struct ieee80211_hw *hw;
581
582 spinlock_t irq_lock;
583 struct mutex mutex;
584 spinlock_t leds_lock;
585
586
587 struct work_struct firmware_load;
588
589
590
591
592
593 struct ieee80211_vif *vif;
594
595 u8 mac_addr[ETH_ALEN];
596
597 u8 bssid[ETH_ALEN];
598
599 int if_type;
600
601 bool operating;
602
603 unsigned int filter_flags;
604
605 struct ieee80211_low_level_stats ieee_stats;
606
607 #ifdef CONFIG_B43LEGACY_HWRNG
608 struct hwrng rng;
609 u8 rng_initialized;
610 char rng_name[30 + 1];
611 #endif
612
613
614 struct list_head devlist;
615 u8 nr_devs;
616
617 bool radiotap_enabled;
618 bool radio_enabled;
619
620
621
622 struct sk_buff *current_beacon;
623 bool beacon0_uploaded;
624 bool beacon1_uploaded;
625 bool beacon_templates_virgin;
626 struct work_struct beacon_update_trigger;
627
628 struct b43legacy_qos_params qos_params[B43legacy_QOS_QUEUE_NUM];
629
630
631 struct work_struct tx_work;
632
633
634 struct sk_buff_head tx_queue[B43legacy_QOS_QUEUE_NUM];
635
636
637 bool tx_queue_stopped[B43legacy_QOS_QUEUE_NUM];
638
639 };
640
641
642 struct b43legacy_firmware {
643
644 const struct firmware *ucode;
645
646 const struct firmware *pcm;
647
648 const struct firmware *initvals;
649
650 const struct firmware *initvals_band;
651
652 u16 rev;
653
654 u16 patch;
655 };
656
657
658 enum {
659 B43legacy_STAT_UNINIT = 0,
660 B43legacy_STAT_INITIALIZED = 1,
661 B43legacy_STAT_STARTED = 2,
662 };
663 #define b43legacy_status(wldev) atomic_read(&(wldev)->__init_status)
664 #define b43legacy_set_status(wldev, stat) do { \
665 atomic_set(&(wldev)->__init_status, (stat)); \
666 smp_wmb(); \
667 } while (0)
668
669
670
671
672
673
674
675
676
677
678 struct b43legacy_wldev {
679 struct ssb_device *dev;
680 struct b43legacy_wl *wl;
681
682
683
684 atomic_t __init_status;
685
686 int suspend_init_status;
687
688 bool __using_pio;
689 bool bad_frames_preempt;
690 bool dfq_valid;
691 bool short_preamble;
692 bool radio_hw_enable;
693
694
695 struct b43legacy_phy phy;
696 union {
697
698 struct b43legacy_dma dma;
699
700 struct b43legacy_pio pio;
701 };
702
703
704 struct b43legacy_stats stats;
705
706
707 struct b43legacy_led led_tx;
708 struct b43legacy_led led_rx;
709 struct b43legacy_led led_assoc;
710 struct b43legacy_led led_radio;
711
712
713 u32 irq_reason;
714 u32 dma_reason[6];
715
716 u32 irq_mask;
717
718 struct b43legacy_noise_calculation noisecalc;
719
720 int mac_suspended;
721
722
723 struct tasklet_struct isr_tasklet;
724
725
726 struct delayed_work periodic_work;
727 unsigned int periodic_state;
728
729 struct work_struct restart_work;
730
731
732 u16 ktp;
733 u8 max_nr_keys;
734 struct b43legacy_key key[58];
735
736
737 struct b43legacy_firmware fw;
738 const struct firmware *fwp;
739
740
741 struct completion fw_load_complete;
742
743
744 struct list_head list;
745
746
747 #ifdef CONFIG_B43LEGACY_DEBUG
748 struct b43legacy_dfsentry *dfsentry;
749 #endif
750 };
751
752
753 static inline
754 struct b43legacy_wl *hw_to_b43legacy_wl(struct ieee80211_hw *hw)
755 {
756 return hw->priv;
757 }
758
759
760
761
762 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
763 static inline
764 int b43legacy_using_pio(struct b43legacy_wldev *dev)
765 {
766 return dev->__using_pio;
767 }
768 #elif defined(CONFIG_B43LEGACY_DMA)
769 static inline
770 int b43legacy_using_pio(struct b43legacy_wldev *dev)
771 {
772 return 0;
773 }
774 #elif defined(CONFIG_B43LEGACY_PIO)
775 static inline
776 int b43legacy_using_pio(struct b43legacy_wldev *dev)
777 {
778 return 1;
779 }
780 #else
781 # error "Using neither DMA nor PIO? Confused..."
782 #endif
783
784
785 static inline
786 struct b43legacy_wldev *dev_to_b43legacy_wldev(struct device *dev)
787 {
788 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
789 return ssb_get_drvdata(ssb_dev);
790 }
791
792
793 static inline
794 int b43legacy_is_mode(struct b43legacy_wl *wl, int type)
795 {
796 return (wl->operating &&
797 wl->if_type == type);
798 }
799
800 static inline
801 bool is_bcm_board_vendor(struct b43legacy_wldev *dev)
802 {
803 return (dev->dev->bus->boardinfo.vendor == PCI_VENDOR_ID_BROADCOM);
804 }
805
806 static inline
807 u16 b43legacy_read16(struct b43legacy_wldev *dev, u16 offset)
808 {
809 return ssb_read16(dev->dev, offset);
810 }
811
812 static inline
813 void b43legacy_write16(struct b43legacy_wldev *dev, u16 offset, u16 value)
814 {
815 ssb_write16(dev->dev, offset, value);
816 }
817
818 static inline
819 u32 b43legacy_read32(struct b43legacy_wldev *dev, u16 offset)
820 {
821 return ssb_read32(dev->dev, offset);
822 }
823
824 static inline
825 void b43legacy_write32(struct b43legacy_wldev *dev, u16 offset, u32 value)
826 {
827 ssb_write32(dev->dev, offset, value);
828 }
829
830 static inline
831 struct b43legacy_lopair *b43legacy_get_lopair(struct b43legacy_phy *phy,
832 u16 radio_attenuation,
833 u16 baseband_attenuation)
834 {
835 return phy->_lo_pairs + (radio_attenuation
836 + 14 * (baseband_attenuation / 2));
837 }
838
839
840
841
842 __printf(2, 3)
843 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...);
844 __printf(2, 3)
845 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...);
846 __printf(2, 3)
847 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...);
848 #if B43legacy_DEBUG
849 __printf(2, 3)
850 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...);
851 #else
852 # define b43legacydbg(wl, fmt...) do { } while (0)
853 #endif
854
855
856 #define Q52_FMT "%u.%u"
857 #define Q52_ARG(q52) ((q52) / 4), (((q52) & 3) * 100 / 4)
858
859 #endif