This source file includes following definitions.
- zd_ofdm_plcp_header_rate
- zd_cck_plcp_header_signal
- zd_hw_mac
- zd_chip_to_mac
- zd_usb_to_mac
- zd_mac_get_perm_addr
1
2
3
4
5
6
7
8 #ifndef _ZD_MAC_H
9 #define _ZD_MAC_H
10
11 #include <linux/kernel.h>
12 #include <net/mac80211.h>
13
14 #include "zd_chip.h"
15
16 struct zd_ctrlset {
17 u8 modulation;
18 __le16 tx_length;
19 u8 control;
20
21 __le16 packet_length;
22 __le16 current_length;
23 u8 service;
24 __le16 next_frame_length;
25 } __packed;
26
27 #define ZD_CS_RESERVED_SIZE 25
28
29
30
31
32
33
34
35
36 #define ZD_PURE_RATE_MASK 0x0f
37 #define ZD_MODULATION_TYPE_MASK 0x10
38 #define ZD_RATE_MASK (ZD_PURE_RATE_MASK|ZD_MODULATION_TYPE_MASK)
39 #define ZD_PURE_RATE(modulation) ((modulation) & ZD_PURE_RATE_MASK)
40 #define ZD_MODULATION_TYPE(modulation) ((modulation) & ZD_MODULATION_TYPE_MASK)
41 #define ZD_RATE(modulation) ((modulation) & ZD_RATE_MASK)
42
43
44
45
46
47 #define ZD_CCK 0x00
48 #define ZD_OFDM 0x10
49
50
51
52
53
54 #define ZD_CCK_RATE_1M (ZD_CCK|0x00)
55 #define ZD_CCK_RATE_2M (ZD_CCK|0x01)
56 #define ZD_CCK_RATE_5_5M (ZD_CCK|0x02)
57 #define ZD_CCK_RATE_11M (ZD_CCK|0x03)
58 #define ZD_OFDM_RATE_6M (ZD_OFDM|ZD_OFDM_PLCP_RATE_6M)
59 #define ZD_OFDM_RATE_9M (ZD_OFDM|ZD_OFDM_PLCP_RATE_9M)
60 #define ZD_OFDM_RATE_12M (ZD_OFDM|ZD_OFDM_PLCP_RATE_12M)
61 #define ZD_OFDM_RATE_18M (ZD_OFDM|ZD_OFDM_PLCP_RATE_18M)
62 #define ZD_OFDM_RATE_24M (ZD_OFDM|ZD_OFDM_PLCP_RATE_24M)
63 #define ZD_OFDM_RATE_36M (ZD_OFDM|ZD_OFDM_PLCP_RATE_36M)
64 #define ZD_OFDM_RATE_48M (ZD_OFDM|ZD_OFDM_PLCP_RATE_48M)
65 #define ZD_OFDM_RATE_54M (ZD_OFDM|ZD_OFDM_PLCP_RATE_54M)
66
67
68
69
70 #define ZD_CCK_PREA_LONG 0x00
71 #define ZD_CCK_PREA_SHORT 0x20
72 #define ZD_OFDM_MODE_11G 0x00
73 #define ZD_OFDM_MODE_11A 0x20
74
75
76 #define ZD_CS_NEED_RANDOM_BACKOFF 0x01
77 #define ZD_CS_NO_ACK 0x02
78
79 #define ZD_CS_FRAME_TYPE_MASK 0x0c
80 #define ZD_CS_DATA_FRAME 0x00
81 #define ZD_CS_PS_POLL_FRAME 0x04
82 #define ZD_CS_MANAGEMENT_FRAME 0x08
83 #define ZD_CS_NO_SEQUENCE_CTL_FRAME 0x0c
84
85 #define ZD_CS_WAKE_DESTINATION 0x10
86 #define ZD_CS_RTS 0x20
87 #define ZD_CS_ENCRYPT 0x40
88 #define ZD_CS_SELF_CTS 0x80
89
90
91 #define ZD_PLCP_HEADER_SIZE 5
92
93 struct rx_length_info {
94 __le16 length[3];
95 __le16 tag;
96 } __packed;
97
98 #define RX_LENGTH_INFO_TAG 0x697e
99
100 struct rx_status {
101 u8 signal_quality_cck;
102
103 u8 signal_strength;
104 u8 signal_quality_ofdm;
105 u8 decryption_type;
106 u8 frame_status;
107 } __packed;
108
109
110 #define ZD_RX_NO_WEP 0
111 #define ZD_RX_WEP64 1
112 #define ZD_RX_TKIP 2
113 #define ZD_RX_AES 4
114 #define ZD_RX_WEP128 5
115 #define ZD_RX_WEP256 6
116
117
118 #define ZD_RX_FRAME_MODULATION_MASK 0x01
119 #define ZD_RX_CCK 0x00
120 #define ZD_RX_OFDM 0x01
121
122 #define ZD_RX_TIMEOUT_ERROR 0x02
123 #define ZD_RX_FIFO_OVERRUN_ERROR 0x04
124 #define ZD_RX_DECRYPTION_ERROR 0x08
125 #define ZD_RX_CRC32_ERROR 0x10
126 #define ZD_RX_NO_ADDR1_MATCH_ERROR 0x20
127 #define ZD_RX_CRC16_ERROR 0x40
128 #define ZD_RX_ERROR 0x80
129
130 struct tx_retry_rate {
131 int count;
132 int rate[10];
133 };
134
135 struct tx_status {
136 u8 type;
137 u8 id;
138 u8 rate;
139 u8 pad;
140 u8 mac[ETH_ALEN];
141 u8 retry;
142 u8 failure;
143 } __packed;
144
145 enum mac_flags {
146 MAC_FIXED_CHANNEL = 0x01,
147 };
148
149 struct housekeeping {
150 struct delayed_work link_led_work;
151 };
152
153 struct beacon {
154 struct delayed_work watchdog_work;
155 struct sk_buff *cur_beacon;
156 unsigned long last_update;
157 u16 interval;
158 u8 period;
159 };
160
161 enum zd_device_flags {
162 ZD_DEVICE_RUNNING,
163 };
164
165 #define ZD_MAC_STATS_BUFFER_SIZE 16
166
167 #define ZD_MAC_MAX_ACK_WAITERS 50
168
169 struct zd_mac {
170 struct zd_chip chip;
171 spinlock_t lock;
172 spinlock_t intr_lock;
173 struct ieee80211_hw *hw;
174 struct ieee80211_vif *vif;
175 struct housekeeping housekeeping;
176 struct beacon beacon;
177 struct work_struct set_rts_cts_work;
178 struct work_struct process_intr;
179 struct zd_mc_hash multicast_hash;
180 u8 intr_buffer[USB_MAX_EP_INT_BUFFER];
181 u8 regdomain;
182 u8 default_regdomain;
183 u8 channel;
184 int type;
185 int associated;
186 unsigned long flags;
187 struct sk_buff_head ack_wait_queue;
188 struct ieee80211_channel channels[14];
189 struct ieee80211_rate rates[12];
190 struct ieee80211_supported_band band;
191
192
193 unsigned int short_preamble:1;
194
195
196 unsigned int pass_failed_fcs:1;
197
198
199 unsigned int pass_ctrl:1;
200
201
202 unsigned int ack_pending:1;
203
204
205 int ack_signal;
206 };
207
208 #define ZD_REGDOMAIN_FCC 0x10
209 #define ZD_REGDOMAIN_IC 0x20
210 #define ZD_REGDOMAIN_ETSI 0x30
211 #define ZD_REGDOMAIN_SPAIN 0x31
212 #define ZD_REGDOMAIN_FRANCE 0x32
213 #define ZD_REGDOMAIN_JAPAN_2 0x40
214 #define ZD_REGDOMAIN_JAPAN 0x41
215 #define ZD_REGDOMAIN_JAPAN_3 0x49
216
217 enum {
218 MIN_CHANNEL24 = 1,
219 MAX_CHANNEL24 = 14,
220 };
221
222 #define ZD_PLCP_SERVICE_LENGTH_EXTENSION 0x80
223
224 struct ofdm_plcp_header {
225 u8 prefix[3];
226 __le16 service;
227 } __packed;
228
229 static inline u8 zd_ofdm_plcp_header_rate(const struct ofdm_plcp_header *header)
230 {
231 return header->prefix[0] & 0xf;
232 }
233
234
235
236
237
238
239
240 #define ZD_OFDM_PLCP_RATE_6M 0xb
241 #define ZD_OFDM_PLCP_RATE_9M 0xf
242 #define ZD_OFDM_PLCP_RATE_12M 0xa
243 #define ZD_OFDM_PLCP_RATE_18M 0xe
244 #define ZD_OFDM_PLCP_RATE_24M 0x9
245 #define ZD_OFDM_PLCP_RATE_36M 0xd
246 #define ZD_OFDM_PLCP_RATE_48M 0x8
247 #define ZD_OFDM_PLCP_RATE_54M 0xc
248
249 struct cck_plcp_header {
250 u8 signal;
251 u8 service;
252 __le16 length;
253 __le16 crc16;
254 } __packed;
255
256 static inline u8 zd_cck_plcp_header_signal(const struct cck_plcp_header *header)
257 {
258 return header->signal;
259 }
260
261
262
263
264
265
266
267
268 #define ZD_CCK_PLCP_SIGNAL_1M 0x0a
269 #define ZD_CCK_PLCP_SIGNAL_2M 0x14
270 #define ZD_CCK_PLCP_SIGNAL_5M5 0x37
271 #define ZD_CCK_PLCP_SIGNAL_11M 0x6e
272
273 static inline struct zd_mac *zd_hw_mac(struct ieee80211_hw *hw)
274 {
275 return hw->priv;
276 }
277
278 static inline struct zd_mac *zd_chip_to_mac(struct zd_chip *chip)
279 {
280 return container_of(chip, struct zd_mac, chip);
281 }
282
283 static inline struct zd_mac *zd_usb_to_mac(struct zd_usb *usb)
284 {
285 return zd_chip_to_mac(zd_usb_to_chip(usb));
286 }
287
288 static inline u8 *zd_mac_get_perm_addr(struct zd_mac *mac)
289 {
290 return mac->hw->wiphy->perm_addr;
291 }
292
293 #define zd_mac_dev(mac) (zd_chip_dev(&(mac)->chip))
294
295 struct ieee80211_hw *zd_mac_alloc_hw(struct usb_interface *intf);
296 void zd_mac_clear(struct zd_mac *mac);
297
298 int zd_mac_preinit_hw(struct ieee80211_hw *hw);
299 int zd_mac_init_hw(struct ieee80211_hw *hw);
300
301 int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length);
302 void zd_mac_tx_failed(struct urb *urb);
303 void zd_mac_tx_to_dev(struct sk_buff *skb, int error);
304
305 int zd_op_start(struct ieee80211_hw *hw);
306 void zd_op_stop(struct ieee80211_hw *hw);
307 int zd_restore_settings(struct zd_mac *mac);
308
309 #ifdef DEBUG
310 void zd_dump_rx_status(const struct rx_status *status);
311 #else
312 #define zd_dump_rx_status(status)
313 #endif
314
315 #endif