root/drivers/net/wireless/realtek/rtlwifi/rtl8723be/sw.c

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DEFINITIONS

This source file includes following definitions.
  1. rtl8723be_init_aspm_vars
  2. rtl8723be_init_sw_vars
  3. rtl8723be_deinit_sw_vars
  4. rtl8723be_get_btc_status
  5. is_fw_header

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2009-2014  Realtek Corporation.*/
   3 
   4 #include "../wifi.h"
   5 #include "../core.h"
   6 #include "../pci.h"
   7 #include "reg.h"
   8 #include "def.h"
   9 #include "phy.h"
  10 #include "../rtl8723com/phy_common.h"
  11 #include "dm.h"
  12 #include "../rtl8723com/dm_common.h"
  13 #include "hw.h"
  14 #include "fw.h"
  15 #include "../rtl8723com/fw_common.h"
  16 #include "sw.h"
  17 #include "trx.h"
  18 #include "led.h"
  19 #include "table.h"
  20 #include "../btcoexist/rtl_btc.h"
  21 
  22 #include <linux/vmalloc.h>
  23 #include <linux/module.h>
  24 
  25 static void rtl8723be_init_aspm_vars(struct ieee80211_hw *hw)
  26 {
  27         struct rtl_priv *rtlpriv = rtl_priv(hw);
  28         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  29 
  30         /*close ASPM for AMD defaultly */
  31         rtlpci->const_amdpci_aspm = 0;
  32 
  33         /* ASPM PS mode.
  34          * 0 - Disable ASPM,
  35          * 1 - Enable ASPM without Clock Req,
  36          * 2 - Enable ASPM with Clock Req,
  37          * 3 - Alwyas Enable ASPM with Clock Req,
  38          * 4 - Always Enable ASPM without Clock Req.
  39          * set defult to RTL8192CE:3 RTL8192E:2
  40          */
  41         rtlpci->const_pci_aspm = 3;
  42 
  43         /*Setting for PCI-E device */
  44         rtlpci->const_devicepci_aspm_setting = 0x03;
  45 
  46         /*Setting for PCI-E bridge */
  47         rtlpci->const_hostpci_aspm_setting = 0x02;
  48 
  49         /* In Hw/Sw Radio Off situation.
  50          * 0 - Default,
  51          * 1 - From ASPM setting without low Mac Pwr,
  52          * 2 - From ASPM setting with low Mac Pwr,
  53          * 3 - Bus D3
  54          * set default to RTL8192CE:0 RTL8192SE:2
  55          */
  56         rtlpci->const_hwsw_rfoff_d3 = 0;
  57 
  58         /* This setting works for those device with
  59          * backdoor ASPM setting such as EPHY setting.
  60          * 0 - Not support ASPM,
  61          * 1 - Support ASPM,
  62          * 2 - According to chipset.
  63          */
  64         rtlpci->const_support_pciaspm = rtlpriv->cfg->mod_params->aspm_support;
  65 }
  66 
  67 int rtl8723be_init_sw_vars(struct ieee80211_hw *hw)
  68 {
  69         int err = 0;
  70         struct rtl_priv *rtlpriv = rtl_priv(hw);
  71         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  72         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  73         char *fw_name = "rtlwifi/rtl8723befw_36.bin";
  74 
  75         rtl8723be_bt_reg_init(hw);
  76         rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer();
  77 
  78         rtlpriv->dm.dm_initialgain_enable = 1;
  79         rtlpriv->dm.dm_flag = 0;
  80         rtlpriv->dm.disable_framebursting = 0;
  81         rtlpriv->dm.thermalvalue = 0;
  82         rtlpci->transmit_config = CFENDFORM | BIT(15) | BIT(24) | BIT(25);
  83 
  84         rtlpriv->phy.lck_inprogress = false;
  85 
  86         mac->ht_enable = true;
  87 
  88         /* compatible 5G band 88ce just 2.4G band & smsp */
  89         rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
  90         rtlpriv->rtlhal.bandset = BAND_ON_2_4G;
  91         rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
  92 
  93         rtlpci->receive_config = (RCR_APPFCS            |
  94                                   RCR_APP_MIC           |
  95                                   RCR_APP_ICV           |
  96                                   RCR_APP_PHYST_RXFF    |
  97                                   RCR_HTC_LOC_CTRL      |
  98                                   RCR_AMF               |
  99                                   RCR_ACF               |
 100                                   RCR_ADF               |
 101                                   RCR_AICV              |
 102                                   RCR_AB                |
 103                                   RCR_AM                |
 104                                   RCR_APM               |
 105                                   0);
 106 
 107         rtlpci->irq_mask[0] = (u32) (IMR_PSTIMEOUT      |
 108                                      IMR_HSISR_IND_ON_INT       |
 109                                      IMR_C2HCMD         |
 110                                      IMR_HIGHDOK        |
 111                                      IMR_MGNTDOK        |
 112                                      IMR_BKDOK          |
 113                                      IMR_BEDOK          |
 114                                      IMR_VIDOK          |
 115                                      IMR_VODOK          |
 116                                      IMR_RDU            |
 117                                      IMR_ROK            |
 118                                      0);
 119 
 120         rtlpci->irq_mask[1] = (u32)(IMR_RXFOVW | 0);
 121 
 122         rtlpci->sys_irq_mask = (u32)(HSIMR_PDN_INT_EN   |
 123                                      HSIMR_RON_INT_EN   |
 124                                      0);
 125 
 126         /* for LPS & IPS */
 127         rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
 128         rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
 129         rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
 130         rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support;
 131         if (rtlpriv->cfg->mod_params->disable_watchdog)
 132                 pr_info("watchdog disabled\n");
 133         rtlpriv->psc.reg_fwctrl_lps = 2;
 134         rtlpriv->psc.reg_max_lps_awakeintvl = 2;
 135         /* for ASPM, you can close aspm through
 136          * set const_support_pciaspm = 0
 137          */
 138         rtl8723be_init_aspm_vars(hw);
 139 
 140         if (rtlpriv->psc.reg_fwctrl_lps == 1)
 141                 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
 142         else if (rtlpriv->psc.reg_fwctrl_lps == 2)
 143                 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
 144         else if (rtlpriv->psc.reg_fwctrl_lps == 3)
 145                 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
 146 
 147         /*low power: Disable 32k */
 148         rtlpriv->psc.low_power_enable = false;
 149 
 150         rtlpriv->rtlhal.earlymode_enable = false;
 151 
 152         /* for firmware buf */
 153         rtlpriv->rtlhal.pfirmware = vzalloc(0x8000);
 154         if (!rtlpriv->rtlhal.pfirmware) {
 155                 pr_err("Can't alloc buffer for fw.\n");
 156                 return 1;
 157         }
 158 
 159         rtlpriv->max_fw_size = 0x8000;
 160         pr_info("Using firmware %s\n", fw_name);
 161         err = request_firmware_nowait(THIS_MODULE, 1, fw_name,
 162                                       rtlpriv->io.dev, GFP_KERNEL, hw,
 163                                       rtl_fw_cb);
 164         if (err) {
 165                 pr_err("Failed to request firmware!\n");
 166                 vfree(rtlpriv->rtlhal.pfirmware);
 167                 rtlpriv->rtlhal.pfirmware = NULL;
 168                 return 1;
 169         }
 170         return 0;
 171 }
 172 
 173 void rtl8723be_deinit_sw_vars(struct ieee80211_hw *hw)
 174 {
 175         struct rtl_priv *rtlpriv = rtl_priv(hw);
 176 
 177         if (rtlpriv->rtlhal.pfirmware) {
 178                 vfree(rtlpriv->rtlhal.pfirmware);
 179                 rtlpriv->rtlhal.pfirmware = NULL;
 180         }
 181 }
 182 
 183 /* get bt coexist status */
 184 bool rtl8723be_get_btc_status(void)
 185 {
 186         return true;
 187 }
 188 
 189 static bool is_fw_header(struct rtlwifi_firmware_header *hdr)
 190 {
 191         return (le16_to_cpu(hdr->signature) & 0xfff0) == 0x5300;
 192 }
 193 
 194 static struct rtl_hal_ops rtl8723be_hal_ops = {
 195         .init_sw_vars = rtl8723be_init_sw_vars,
 196         .deinit_sw_vars = rtl8723be_deinit_sw_vars,
 197         .read_eeprom_info = rtl8723be_read_eeprom_info,
 198         .interrupt_recognized = rtl8723be_interrupt_recognized,
 199         .hw_init = rtl8723be_hw_init,
 200         .hw_disable = rtl8723be_card_disable,
 201         .hw_suspend = rtl8723be_suspend,
 202         .hw_resume = rtl8723be_resume,
 203         .enable_interrupt = rtl8723be_enable_interrupt,
 204         .disable_interrupt = rtl8723be_disable_interrupt,
 205         .set_network_type = rtl8723be_set_network_type,
 206         .set_chk_bssid = rtl8723be_set_check_bssid,
 207         .set_qos = rtl8723be_set_qos,
 208         .set_bcn_reg = rtl8723be_set_beacon_related_registers,
 209         .set_bcn_intv = rtl8723be_set_beacon_interval,
 210         .update_interrupt_mask = rtl8723be_update_interrupt_mask,
 211         .get_hw_reg = rtl8723be_get_hw_reg,
 212         .set_hw_reg = rtl8723be_set_hw_reg,
 213         .update_rate_tbl = rtl8723be_update_hal_rate_tbl,
 214         .fill_tx_desc = rtl8723be_tx_fill_desc,
 215         .fill_tx_cmddesc = rtl8723be_tx_fill_cmddesc,
 216         .query_rx_desc = rtl8723be_rx_query_desc,
 217         .set_channel_access = rtl8723be_update_channel_access_setting,
 218         .radio_onoff_checking = rtl8723be_gpio_radio_on_off_checking,
 219         .set_bw_mode = rtl8723be_phy_set_bw_mode,
 220         .switch_channel = rtl8723be_phy_sw_chnl,
 221         .dm_watchdog = rtl8723be_dm_watchdog,
 222         .scan_operation_backup = rtl8723be_phy_scan_operation_backup,
 223         .set_rf_power_state = rtl8723be_phy_set_rf_power_state,
 224         .led_control = rtl8723be_led_control,
 225         .set_desc = rtl8723be_set_desc,
 226         .get_desc = rtl8723be_get_desc,
 227         .is_tx_desc_closed = rtl8723be_is_tx_desc_closed,
 228         .tx_polling = rtl8723be_tx_polling,
 229         .enable_hw_sec = rtl8723be_enable_hw_security_config,
 230         .set_key = rtl8723be_set_key,
 231         .init_sw_leds = rtl8723be_init_sw_leds,
 232         .get_bbreg = rtl8723_phy_query_bb_reg,
 233         .set_bbreg = rtl8723_phy_set_bb_reg,
 234         .get_rfreg = rtl8723be_phy_query_rf_reg,
 235         .set_rfreg = rtl8723be_phy_set_rf_reg,
 236         .fill_h2c_cmd = rtl8723be_fill_h2c_cmd,
 237         .get_btc_status = rtl8723be_get_btc_status,
 238         .is_fw_header = is_fw_header,
 239 };
 240 
 241 static struct rtl_mod_params rtl8723be_mod_params = {
 242         .sw_crypto = false,
 243         .inactiveps = true,
 244         .swctrl_lps = false,
 245         .fwctrl_lps = true,
 246         .msi_support = false,
 247         .aspm_support = 1,
 248         .disable_watchdog = false,
 249         .debug_level = 0,
 250         .debug_mask = 0,
 251         .ant_sel = 0,
 252 };
 253 
 254 static const struct rtl_hal_cfg rtl8723be_hal_cfg = {
 255         .bar_id = 2,
 256         .write_readback = true,
 257         .name = "rtl8723be_pci",
 258         .alt_fw_name = "rtlwifi/rtl8723befw.bin",
 259         .ops = &rtl8723be_hal_ops,
 260         .mod_params = &rtl8723be_mod_params,
 261         .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
 262         .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
 263         .maps[SYS_CLK] = REG_SYS_CLKR,
 264         .maps[MAC_RCR_AM] = AM,
 265         .maps[MAC_RCR_AB] = AB,
 266         .maps[MAC_RCR_ACRC32] = ACRC32,
 267         .maps[MAC_RCR_ACF] = ACF,
 268         .maps[MAC_RCR_AAP] = AAP,
 269         .maps[MAC_HIMR] = REG_HIMR,
 270         .maps[MAC_HIMRE] = REG_HIMRE,
 271         .maps[MAC_HSISR] = REG_HSISR,
 272 
 273         .maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS,
 274 
 275         .maps[EFUSE_TEST] = REG_EFUSE_TEST,
 276         .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
 277         .maps[EFUSE_CLK] = 0,
 278         .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
 279         .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
 280         .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
 281         .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
 282         .maps[EFUSE_ANA8M] = ANA8M,
 283         .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
 284         .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
 285         .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
 286         .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
 287 
 288         .maps[RWCAM] = REG_CAMCMD,
 289         .maps[WCAMI] = REG_CAMWRITE,
 290         .maps[RCAMO] = REG_CAMREAD,
 291         .maps[CAMDBG] = REG_CAMDBG,
 292         .maps[SECR] = REG_SECCFG,
 293         .maps[SEC_CAM_NONE] = CAM_NONE,
 294         .maps[SEC_CAM_WEP40] = CAM_WEP40,
 295         .maps[SEC_CAM_TKIP] = CAM_TKIP,
 296         .maps[SEC_CAM_AES] = CAM_AES,
 297         .maps[SEC_CAM_WEP104] = CAM_WEP104,
 298 
 299         .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
 300         .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
 301         .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
 302         .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
 303         .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
 304         .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
 305 /*      .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,     */   /*need check*/
 306         .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
 307         .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
 308         .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
 309         .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
 310         .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
 311         .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
 312         .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
 313 /*      .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,*/
 314 /*      .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,*/
 315 
 316         .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
 317         .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
 318         .maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0,
 319         .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
 320         .maps[RTL_IMR_RDU] = IMR_RDU,
 321         .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
 322         .maps[RTL_IMR_BDOK] = IMR_BCNDOK0,
 323         .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
 324         .maps[RTL_IMR_TBDER] = IMR_TBDER,
 325         .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
 326         .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
 327         .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
 328         .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
 329         .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
 330         .maps[RTL_IMR_VODOK] = IMR_VODOK,
 331         .maps[RTL_IMR_ROK] = IMR_ROK,
 332         .maps[RTL_IMR_HSISR_IND] = IMR_HSISR_IND_ON_INT,
 333         .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER),
 334 
 335         .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M,
 336         .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M,
 337         .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M,
 338         .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M,
 339         .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M,
 340         .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M,
 341         .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M,
 342         .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M,
 343         .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M,
 344         .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M,
 345         .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M,
 346         .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M,
 347 
 348         .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7,
 349         .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15,
 350 };
 351 
 352 static const struct pci_device_id rtl8723be_pci_ids[] = {
 353         {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xB723, rtl8723be_hal_cfg)},
 354         {},
 355 };
 356 
 357 MODULE_DEVICE_TABLE(pci, rtl8723be_pci_ids);
 358 
 359 MODULE_AUTHOR("PageHe   <page_he@realsil.com.cn>");
 360 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
 361 MODULE_LICENSE("GPL");
 362 MODULE_DESCRIPTION("Realtek 8723BE 802.11n PCI wireless");
 363 MODULE_FIRMWARE("rtlwifi/rtl8723befw.bin");
 364 MODULE_FIRMWARE("rtlwifi/rtl8723befw_36.bin");
 365 
 366 module_param_named(swenc, rtl8723be_mod_params.sw_crypto, bool, 0444);
 367 module_param_named(debug_level, rtl8723be_mod_params.debug_level, int, 0644);
 368 module_param_named(debug_mask, rtl8723be_mod_params.debug_mask, ullong, 0644);
 369 module_param_named(ips, rtl8723be_mod_params.inactiveps, bool, 0444);
 370 module_param_named(swlps, rtl8723be_mod_params.swctrl_lps, bool, 0444);
 371 module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444);
 372 module_param_named(msi, rtl8723be_mod_params.msi_support, bool, 0444);
 373 module_param_named(aspm, rtl8723be_mod_params.aspm_support, int, 0444);
 374 module_param_named(disable_watchdog, rtl8723be_mod_params.disable_watchdog,
 375                    bool, 0444);
 376 module_param_named(ant_sel, rtl8723be_mod_params.ant_sel, int, 0444);
 377 MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
 378 MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
 379 MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
 380 MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
 381 MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 0)\n");
 382 MODULE_PARM_DESC(aspm, "Set to 1 to enable ASPM (default 1)\n");
 383 MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)");
 384 MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)");
 385 MODULE_PARM_DESC(disable_watchdog,
 386                  "Set to 1 to disable the watchdog (default 0)\n");
 387 MODULE_PARM_DESC(ant_sel, "Set to 1 or 2 to force antenna number (default 0)\n");
 388 
 389 static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
 390 
 391 static struct pci_driver rtl8723be_driver = {
 392         .name = KBUILD_MODNAME,
 393         .id_table = rtl8723be_pci_ids,
 394         .probe = rtl_pci_probe,
 395         .remove = rtl_pci_disconnect,
 396         .driver.pm = &rtlwifi_pm_ops,
 397 };
 398 
 399 module_pci_driver(rtl8723be_driver);

/* [<][>][^][v][top][bottom][index][help] */