root/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/sw.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. rtl88e_init_aspm_vars
  2. rtl88e_init_sw_vars
  3. rtl88e_deinit_sw_vars
  4. rtl88e_get_btc_status

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2009-2013  Realtek Corporation.*/
   3 
   4 #include "../wifi.h"
   5 #include "../core.h"
   6 #include "../pci.h"
   7 #include "reg.h"
   8 #include "def.h"
   9 #include "phy.h"
  10 #include "dm.h"
  11 #include "hw.h"
  12 #include "sw.h"
  13 #include "trx.h"
  14 #include "led.h"
  15 #include "table.h"
  16 
  17 #include <linux/vmalloc.h>
  18 #include <linux/module.h>
  19 
  20 static void rtl88e_init_aspm_vars(struct ieee80211_hw *hw)
  21 {
  22         struct rtl_priv *rtlpriv = rtl_priv(hw);
  23         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  24 
  25         /*close ASPM for AMD defaultly */
  26         rtlpci->const_amdpci_aspm = 0;
  27 
  28         /* ASPM PS mode.
  29          * 0 - Disable ASPM,
  30          * 1 - Enable ASPM without Clock Req,
  31          * 2 - Enable ASPM with Clock Req,
  32          * 3 - Alwyas Enable ASPM with Clock Req,
  33          * 4 - Always Enable ASPM without Clock Req.
  34          * set defult to RTL8192CE:3 RTL8192E:2
  35          */
  36         rtlpci->const_pci_aspm = 3;
  37 
  38         /*Setting for PCI-E device */
  39         rtlpci->const_devicepci_aspm_setting = 0x03;
  40 
  41         /*Setting for PCI-E bridge */
  42         rtlpci->const_hostpci_aspm_setting = 0x02;
  43 
  44         /* In Hw/Sw Radio Off situation.
  45          * 0 - Default,
  46          * 1 - From ASPM setting without low Mac Pwr,
  47          * 2 - From ASPM setting with low Mac Pwr,
  48          * 3 - Bus D3
  49          * set default to RTL8192CE:0 RTL8192SE:2
  50          */
  51         rtlpci->const_hwsw_rfoff_d3 = 0;
  52 
  53         /* This setting works for those device with
  54          * backdoor ASPM setting such as EPHY setting.
  55          * 0 - Not support ASPM,
  56          * 1 - Support ASPM,
  57          * 2 - According to chipset.
  58          */
  59         rtlpci->const_support_pciaspm = rtlpriv->cfg->mod_params->aspm_support;
  60 }
  61 
  62 int rtl88e_init_sw_vars(struct ieee80211_hw *hw)
  63 {
  64         int err = 0;
  65         struct rtl_priv *rtlpriv = rtl_priv(hw);
  66         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  67         u8 tid;
  68         char *fw_name;
  69 
  70         rtl8188ee_bt_reg_init(hw);
  71         rtlpriv->dm.dm_initialgain_enable = 1;
  72         rtlpriv->dm.dm_flag = 0;
  73         rtlpriv->dm.disable_framebursting = 0;
  74         rtlpriv->dm.thermalvalue = 0;
  75         rtlpci->transmit_config = CFENDFORM | BIT(15);
  76 
  77         /* compatible 5G band 88ce just 2.4G band & smsp */
  78         rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G;
  79         rtlpriv->rtlhal.bandset = BAND_ON_2_4G;
  80         rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY;
  81 
  82         rtlpci->receive_config = (RCR_APPFCS |
  83                                   RCR_APP_MIC |
  84                                   RCR_APP_ICV |
  85                                   RCR_APP_PHYST_RXFF |
  86                                   RCR_HTC_LOC_CTRL |
  87                                   RCR_AMF |
  88                                   RCR_ACF |
  89                                   RCR_ADF |
  90                                   RCR_AICV |
  91                                   RCR_ACRC32 |
  92                                   RCR_AB |
  93                                   RCR_AM |
  94                                   RCR_APM |
  95                                   0);
  96 
  97         rtlpci->irq_mask[0] =
  98                                 (u32)(IMR_PSTIMEOUT     |
  99                                 IMR_HSISR_IND_ON_INT    |
 100                                 IMR_C2HCMD              |
 101                                 IMR_HIGHDOK             |
 102                                 IMR_MGNTDOK             |
 103                                 IMR_BKDOK               |
 104                                 IMR_BEDOK               |
 105                                 IMR_VIDOK               |
 106                                 IMR_VODOK               |
 107                                 IMR_RDU                 |
 108                                 IMR_ROK                 |
 109                                 0);
 110         rtlpci->irq_mask[1] = (u32) (IMR_RXFOVW | 0);
 111         rtlpci->sys_irq_mask = (u32) (HSIMR_PDN_INT_EN | HSIMR_RON_INT_EN);
 112 
 113         /* for LPS & IPS */
 114         rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps;
 115         rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps;
 116         rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps;
 117         rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support;
 118         if (rtlpriv->cfg->mod_params->disable_watchdog)
 119                 pr_info("watchdog disabled\n");
 120         if (!rtlpriv->psc.inactiveps)
 121                 pr_info("rtl8188ee: Power Save off (module option)\n");
 122         if (!rtlpriv->psc.fwctrl_lps)
 123                 pr_info("rtl8188ee: FW Power Save off (module option)\n");
 124         rtlpriv->psc.reg_fwctrl_lps = 3;
 125         rtlpriv->psc.reg_max_lps_awakeintvl = 5;
 126         /* for ASPM, you can close aspm through
 127          * set const_support_pciaspm = 0
 128          */
 129         rtl88e_init_aspm_vars(hw);
 130 
 131         if (rtlpriv->psc.reg_fwctrl_lps == 1)
 132                 rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE;
 133         else if (rtlpriv->psc.reg_fwctrl_lps == 2)
 134                 rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE;
 135         else if (rtlpriv->psc.reg_fwctrl_lps == 3)
 136                 rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE;
 137 
 138         /* for firmware buf */
 139         rtlpriv->rtlhal.pfirmware = vzalloc(0x8000);
 140         if (!rtlpriv->rtlhal.pfirmware) {
 141                 pr_info("Can't alloc buffer for fw.\n");
 142                 return 1;
 143         }
 144 
 145         fw_name = "rtlwifi/rtl8188efw.bin";
 146         rtlpriv->max_fw_size = 0x8000;
 147         pr_info("Using firmware %s\n", fw_name);
 148         err = request_firmware_nowait(THIS_MODULE, 1, fw_name,
 149                                       rtlpriv->io.dev, GFP_KERNEL, hw,
 150                                       rtl_fw_cb);
 151         if (err) {
 152                 pr_info("Failed to request firmware!\n");
 153                 vfree(rtlpriv->rtlhal.pfirmware);
 154                 rtlpriv->rtlhal.pfirmware = NULL;
 155                 return 1;
 156         }
 157 
 158         /* for early mode */
 159         rtlpriv->rtlhal.earlymode_enable = false;
 160         rtlpriv->rtlhal.max_earlymode_num = 10;
 161         for (tid = 0; tid < 8; tid++)
 162                 skb_queue_head_init(&rtlpriv->mac80211.skb_waitq[tid]);
 163 
 164         /*low power */
 165         rtlpriv->psc.low_power_enable = false;
 166         if (rtlpriv->psc.low_power_enable) {
 167                 timer_setup(&rtlpriv->works.fw_clockoff_timer,
 168                             rtl88ee_fw_clk_off_timer_callback, 0);
 169         }
 170 
 171         timer_setup(&rtlpriv->works.fast_antenna_training_timer,
 172                     rtl88e_dm_fast_antenna_training_callback, 0);
 173         return err;
 174 }
 175 
 176 void rtl88e_deinit_sw_vars(struct ieee80211_hw *hw)
 177 {
 178         struct rtl_priv *rtlpriv = rtl_priv(hw);
 179 
 180         if (rtlpriv->rtlhal.pfirmware) {
 181                 vfree(rtlpriv->rtlhal.pfirmware);
 182                 rtlpriv->rtlhal.pfirmware = NULL;
 183         }
 184 
 185         if (rtlpriv->psc.low_power_enable)
 186                 del_timer_sync(&rtlpriv->works.fw_clockoff_timer);
 187 
 188         del_timer_sync(&rtlpriv->works.fast_antenna_training_timer);
 189 }
 190 
 191 /* get bt coexist status */
 192 bool rtl88e_get_btc_status(void)
 193 {
 194         return false;
 195 }
 196 
 197 static struct rtl_hal_ops rtl8188ee_hal_ops = {
 198         .init_sw_vars = rtl88e_init_sw_vars,
 199         .deinit_sw_vars = rtl88e_deinit_sw_vars,
 200         .read_eeprom_info = rtl88ee_read_eeprom_info,
 201         .interrupt_recognized = rtl88ee_interrupt_recognized,/*need check*/
 202         .hw_init = rtl88ee_hw_init,
 203         .hw_disable = rtl88ee_card_disable,
 204         .hw_suspend = rtl88ee_suspend,
 205         .hw_resume = rtl88ee_resume,
 206         .enable_interrupt = rtl88ee_enable_interrupt,
 207         .disable_interrupt = rtl88ee_disable_interrupt,
 208         .set_network_type = rtl88ee_set_network_type,
 209         .set_chk_bssid = rtl88ee_set_check_bssid,
 210         .set_qos = rtl88ee_set_qos,
 211         .set_bcn_reg = rtl88ee_set_beacon_related_registers,
 212         .set_bcn_intv = rtl88ee_set_beacon_interval,
 213         .update_interrupt_mask = rtl88ee_update_interrupt_mask,
 214         .get_hw_reg = rtl88ee_get_hw_reg,
 215         .set_hw_reg = rtl88ee_set_hw_reg,
 216         .update_rate_tbl = rtl88ee_update_hal_rate_tbl,
 217         .fill_tx_desc = rtl88ee_tx_fill_desc,
 218         .fill_tx_cmddesc = rtl88ee_tx_fill_cmddesc,
 219         .query_rx_desc = rtl88ee_rx_query_desc,
 220         .set_channel_access = rtl88ee_update_channel_access_setting,
 221         .radio_onoff_checking = rtl88ee_gpio_radio_on_off_checking,
 222         .set_bw_mode = rtl88e_phy_set_bw_mode,
 223         .switch_channel = rtl88e_phy_sw_chnl,
 224         .dm_watchdog = rtl88e_dm_watchdog,
 225         .scan_operation_backup = rtl88e_phy_scan_operation_backup,
 226         .set_rf_power_state = rtl88e_phy_set_rf_power_state,
 227         .led_control = rtl88ee_led_control,
 228         .set_desc = rtl88ee_set_desc,
 229         .get_desc = rtl88ee_get_desc,
 230         .is_tx_desc_closed = rtl88ee_is_tx_desc_closed,
 231         .tx_polling = rtl88ee_tx_polling,
 232         .enable_hw_sec = rtl88ee_enable_hw_security_config,
 233         .set_key = rtl88ee_set_key,
 234         .init_sw_leds = rtl88ee_init_sw_leds,
 235         .get_bbreg = rtl88e_phy_query_bb_reg,
 236         .set_bbreg = rtl88e_phy_set_bb_reg,
 237         .get_rfreg = rtl88e_phy_query_rf_reg,
 238         .set_rfreg = rtl88e_phy_set_rf_reg,
 239         .get_btc_status = rtl88e_get_btc_status,
 240 };
 241 
 242 static struct rtl_mod_params rtl88ee_mod_params = {
 243         .sw_crypto = false,
 244         .inactiveps = true,
 245         .swctrl_lps = false,
 246         .fwctrl_lps = false,
 247         .msi_support = true,
 248         .aspm_support = 1,
 249         .debug_level = 0,
 250         .debug_mask = 0,
 251 };
 252 
 253 static const struct rtl_hal_cfg rtl88ee_hal_cfg = {
 254         .bar_id = 2,
 255         .write_readback = true,
 256         .name = "rtl88e_pci",
 257         .ops = &rtl8188ee_hal_ops,
 258         .mod_params = &rtl88ee_mod_params,
 259 
 260         .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL,
 261         .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN,
 262         .maps[SYS_CLK] = REG_SYS_CLKR,
 263         .maps[MAC_RCR_AM] = AM,
 264         .maps[MAC_RCR_AB] = AB,
 265         .maps[MAC_RCR_ACRC32] = ACRC32,
 266         .maps[MAC_RCR_ACF] = ACF,
 267         .maps[MAC_RCR_AAP] = AAP,
 268         .maps[MAC_HIMR] = REG_HIMR,
 269         .maps[MAC_HIMRE] = REG_HIMRE,
 270         .maps[MAC_HSISR] = REG_HSISR,
 271 
 272         .maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS,
 273 
 274         .maps[EFUSE_TEST] = REG_EFUSE_TEST,
 275         .maps[EFUSE_CTRL] = REG_EFUSE_CTRL,
 276         .maps[EFUSE_CLK] = 0,
 277         .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL,
 278         .maps[EFUSE_PWC_EV12V] = PWC_EV12V,
 279         .maps[EFUSE_FEN_ELDR] = FEN_ELDR,
 280         .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN,
 281         .maps[EFUSE_ANA8M] = ANA8M,
 282         .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE,
 283         .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION,
 284         .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN,
 285         .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES,
 286 
 287         .maps[RWCAM] = REG_CAMCMD,
 288         .maps[WCAMI] = REG_CAMWRITE,
 289         .maps[RCAMO] = REG_CAMREAD,
 290         .maps[CAMDBG] = REG_CAMDBG,
 291         .maps[SECR] = REG_SECCFG,
 292         .maps[SEC_CAM_NONE] = CAM_NONE,
 293         .maps[SEC_CAM_WEP40] = CAM_WEP40,
 294         .maps[SEC_CAM_TKIP] = CAM_TKIP,
 295         .maps[SEC_CAM_AES] = CAM_AES,
 296         .maps[SEC_CAM_WEP104] = CAM_WEP104,
 297 
 298         .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6,
 299         .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5,
 300         .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4,
 301         .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3,
 302         .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2,
 303         .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1,
 304 /*      .maps[RTL_IMR_BCNDOK8] = IMR_BCNDOK8,     */   /*need check*/
 305         .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7,
 306         .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6,
 307         .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5,
 308         .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4,
 309         .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3,
 310         .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2,
 311         .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1,
 312 /*      .maps[RTL_IMR_TIMEOUT2] = IMR_TIMEOUT2,*/
 313 /*      .maps[RTL_IMR_TIMEOUT1] = IMR_TIMEOUT1,*/
 314 
 315         .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW,
 316         .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT,
 317         .maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0,
 318         .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW,
 319         .maps[RTL_IMR_RDU] = IMR_RDU,
 320         .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND,
 321         .maps[RTL_IMR_BDOK] = IMR_BCNDOK0,
 322         .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK,
 323         .maps[RTL_IMR_TBDER] = IMR_TBDER,
 324         .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK,
 325         .maps[RTL_IMR_TBDOK] = IMR_TBDOK,
 326         .maps[RTL_IMR_BKDOK] = IMR_BKDOK,
 327         .maps[RTL_IMR_BEDOK] = IMR_BEDOK,
 328         .maps[RTL_IMR_VIDOK] = IMR_VIDOK,
 329         .maps[RTL_IMR_VODOK] = IMR_VODOK,
 330         .maps[RTL_IMR_ROK] = IMR_ROK,
 331         .maps[RTL_IMR_HSISR_IND] = IMR_HSISR_IND_ON_INT,
 332         .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER),
 333 
 334         .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M,
 335         .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M,
 336         .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M,
 337         .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M,
 338         .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M,
 339         .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M,
 340         .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M,
 341         .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M,
 342         .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M,
 343         .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M,
 344         .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M,
 345         .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M,
 346 
 347         .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7,
 348         .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15,
 349 };
 350 
 351 static const struct pci_device_id rtl88ee_pci_ids[] = {
 352         {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8179, rtl88ee_hal_cfg)},
 353         {},
 354 };
 355 
 356 MODULE_DEVICE_TABLE(pci, rtl88ee_pci_ids);
 357 
 358 MODULE_AUTHOR("zhiyuan_yang     <zhiyuan_yang@realsil.com.cn>");
 359 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
 360 MODULE_AUTHOR("Larry Finger     <Larry.Finger@lwfinger.net>");
 361 MODULE_LICENSE("GPL");
 362 MODULE_DESCRIPTION("Realtek 8188E 802.11n PCI wireless");
 363 MODULE_FIRMWARE("rtlwifi/rtl8188efw.bin");
 364 
 365 module_param_named(swenc, rtl88ee_mod_params.sw_crypto, bool, 0444);
 366 module_param_named(debug_level, rtl88ee_mod_params.debug_level, int, 0644);
 367 module_param_named(debug_mask, rtl88ee_mod_params.debug_mask, ullong, 0644);
 368 module_param_named(ips, rtl88ee_mod_params.inactiveps, bool, 0444);
 369 module_param_named(swlps, rtl88ee_mod_params.swctrl_lps, bool, 0444);
 370 module_param_named(fwlps, rtl88ee_mod_params.fwctrl_lps, bool, 0444);
 371 module_param_named(msi, rtl88ee_mod_params.msi_support, bool, 0444);
 372 module_param_named(aspm, rtl88ee_mod_params.aspm_support, int, 0444);
 373 module_param_named(disable_watchdog, rtl88ee_mod_params.disable_watchdog,
 374                    bool, 0444);
 375 MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n");
 376 MODULE_PARM_DESC(ips, "Set to 0 to not use link power save (default 1)\n");
 377 MODULE_PARM_DESC(swlps, "Set to 1 to use SW control power save (default 0)\n");
 378 MODULE_PARM_DESC(fwlps, "Set to 1 to use FW control power save (default 1)\n");
 379 MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 1)\n");
 380 MODULE_PARM_DESC(aspm, "Set to 1 to enable ASPM (default 1)\n");
 381 MODULE_PARM_DESC(debug_level, "Set debug level (0-5) (default 0)");
 382 MODULE_PARM_DESC(debug_mask, "Set debug mask (default 0)");
 383 MODULE_PARM_DESC(disable_watchdog, "Set to 1 to disable the watchdog (default 0)\n");
 384 
 385 static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume);
 386 
 387 static struct pci_driver rtl88ee_driver = {
 388         .name = KBUILD_MODNAME,
 389         .id_table = rtl88ee_pci_ids,
 390         .probe = rtl_pci_probe,
 391         .remove = rtl_pci_disconnect,
 392         .driver.pm = &rtlwifi_pm_ops,
 393 };
 394 
 395 module_pci_driver(rtl88ee_driver);

/* [<][>][^][v][top][bottom][index][help] */