This source file includes following definitions.
- _rtl88ee_map_hwqueue_to_fwqueue
- _rtl88ee_query_rxphystatus
- _rtl88ee_smart_antenna
- _rtl88ee_translate_rx_signal_stuff
- rtl88ee_insert_emcontent
- rtl88ee_rx_query_desc
- rtl88ee_tx_fill_desc
- rtl88ee_tx_fill_cmddesc
- rtl88ee_set_desc
- rtl88ee_get_desc
- rtl88ee_is_tx_desc_closed
- rtl88ee_tx_polling
1
2
3
4 #include "../wifi.h"
5 #include "../pci.h"
6 #include "../base.h"
7 #include "../stats.h"
8 #include "reg.h"
9 #include "def.h"
10 #include "trx.h"
11 #include "led.h"
12 #include "dm.h"
13 #include "phy.h"
14
15 static u8 _rtl88ee_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
16 {
17 __le16 fc = rtl_get_fc(skb);
18
19 if (unlikely(ieee80211_is_beacon(fc)))
20 return QSLT_BEACON;
21 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
22 return QSLT_MGNT;
23
24 return skb->priority;
25 }
26
27 static void _rtl88ee_query_rxphystatus(struct ieee80211_hw *hw,
28 struct rtl_stats *pstatus, __le32 *pdesc,
29 struct rx_fwinfo_88e *p_drvinfo,
30 bool bpacket_match_bssid,
31 bool bpacket_toself, bool packet_beacon)
32 {
33 struct rtl_priv *rtlpriv = rtl_priv(hw);
34 struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
35 struct phy_sts_cck_8192s_t *cck_buf;
36 struct phy_status_rpt *phystrpt =
37 (struct phy_status_rpt *)p_drvinfo;
38 struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
39 s8 rx_pwr_all = 0, rx_pwr[4];
40 u8 rf_rx_num = 0, evm, pwdb_all;
41 u8 i, max_spatial_stream;
42 u32 rssi, total_rssi = 0;
43 bool is_cck = pstatus->is_cck;
44 u8 lan_idx, vga_idx;
45
46
47 pstatus->packet_matchbssid = bpacket_match_bssid;
48 pstatus->packet_toself = bpacket_toself;
49 pstatus->packet_beacon = packet_beacon;
50 pstatus->rx_mimo_signalquality[0] = -1;
51 pstatus->rx_mimo_signalquality[1] = -1;
52
53 if (is_cck) {
54 u8 cck_highpwr;
55 u8 cck_agc_rpt;
56
57 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
58 cck_agc_rpt = cck_buf->cck_agc_rpt;
59
60
61
62
63
64 if (ppsc->rfpwr_state == ERFON)
65 cck_highpwr =
66 (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
67 BIT(9));
68 else
69 cck_highpwr = false;
70
71 lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
72 vga_idx = (cck_agc_rpt & 0x1f);
73 switch (lan_idx) {
74 case 7:
75 if (vga_idx <= 27)
76
77 rx_pwr_all = -100 + 2*(27-vga_idx);
78 else
79 rx_pwr_all = -100;
80 break;
81 case 6:
82
83 rx_pwr_all = -48 + 2*(2-vga_idx);
84 break;
85 case 5:
86
87 rx_pwr_all = -42 + 2*(7-vga_idx);
88 break;
89 case 4:
90
91 rx_pwr_all = -36 + 2*(7-vga_idx);
92 break;
93 case 3:
94
95 rx_pwr_all = -24 + 2*(7-vga_idx);
96 break;
97 case 2:
98 if (cck_highpwr)
99
100 rx_pwr_all = -12 + 2*(5-vga_idx);
101 else
102 rx_pwr_all = -6 + 2*(5-vga_idx);
103 break;
104 case 1:
105 rx_pwr_all = 8-2*vga_idx;
106 break;
107 case 0:
108 rx_pwr_all = 14-2*vga_idx;
109 break;
110 default:
111 break;
112 }
113 rx_pwr_all += 6;
114 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
115
116
117 pwdb_all += 6;
118 if (pwdb_all > 100)
119 pwdb_all = 100;
120
121
122
123 if (pwdb_all > 34 && pwdb_all <= 42)
124 pwdb_all -= 2;
125 else if (pwdb_all > 26 && pwdb_all <= 34)
126 pwdb_all -= 6;
127 else if (pwdb_all > 14 && pwdb_all <= 26)
128 pwdb_all -= 8;
129 else if (pwdb_all > 4 && pwdb_all <= 14)
130 pwdb_all -= 4;
131 if (!cck_highpwr) {
132 if (pwdb_all >= 80)
133 pwdb_all = ((pwdb_all-80)<<1) +
134 ((pwdb_all-80)>>1) + 80;
135 else if ((pwdb_all <= 78) && (pwdb_all >= 20))
136 pwdb_all += 3;
137 if (pwdb_all > 100)
138 pwdb_all = 100;
139 }
140
141 pstatus->rx_pwdb_all = pwdb_all;
142 pstatus->recvsignalpower = rx_pwr_all;
143
144
145 if (bpacket_match_bssid) {
146 u8 sq;
147
148 if (pstatus->rx_pwdb_all > 40)
149 sq = 100;
150 else {
151 sq = cck_buf->sq_rpt;
152 if (sq > 64)
153 sq = 0;
154 else if (sq < 20)
155 sq = 100;
156 else
157 sq = ((64 - sq) * 100) / 44;
158 }
159
160 pstatus->signalquality = sq;
161 pstatus->rx_mimo_signalquality[0] = sq;
162 pstatus->rx_mimo_signalquality[1] = -1;
163 }
164 } else {
165 rtlpriv->dm.rfpath_rxenable[0] =
166 rtlpriv->dm.rfpath_rxenable[1] = true;
167
168
169 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
170
171 if (rtlpriv->dm.rfpath_rxenable[i])
172 rf_rx_num++;
173
174 rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
175 0x3f) * 2) - 110;
176
177
178 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
179 total_rssi += rssi;
180
181
182 rtlpriv->stats.rx_snr_db[i] =
183 (long)(p_drvinfo->rxsnr[i] / 2);
184
185
186 if (bpacket_match_bssid)
187 pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
188 }
189
190
191
192
193 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
194
195 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
196 pstatus->rx_pwdb_all = pwdb_all;
197 pstatus->rxpower = rx_pwr_all;
198 pstatus->recvsignalpower = rx_pwr_all;
199
200
201 if (pstatus->is_ht && pstatus->rate >= DESC92C_RATEMCS8 &&
202 pstatus->rate <= DESC92C_RATEMCS15)
203 max_spatial_stream = 2;
204 else
205 max_spatial_stream = 1;
206
207 for (i = 0; i < max_spatial_stream; i++) {
208 evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
209
210 if (bpacket_match_bssid) {
211
212
213
214 if (i == 0)
215 pstatus->signalquality =
216 (u8)(evm & 0xff);
217 pstatus->rx_mimo_signalquality[i] =
218 (u8)(evm & 0xff);
219 }
220 }
221 }
222
223
224
225
226 if (is_cck)
227 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
228 pwdb_all));
229 else if (rf_rx_num != 0)
230 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
231 total_rssi /= rf_rx_num));
232
233 rtldm->fat_table.antsel_rx_keep_0 = phystrpt->ant_sel;
234 rtldm->fat_table.antsel_rx_keep_1 = phystrpt->ant_sel_b;
235 rtldm->fat_table.antsel_rx_keep_2 = phystrpt->antsel_rx_keep_2;
236 }
237
238 static void _rtl88ee_smart_antenna(struct ieee80211_hw *hw,
239 struct rtl_stats *pstatus)
240 {
241 struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
242 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
243 u8 antsel_tr_mux;
244 struct fast_ant_training *pfat_table = &rtldm->fat_table;
245
246 if (rtlefuse->antenna_div_type == CG_TRX_SMART_ANTDIV) {
247 if (pfat_table->fat_state == FAT_TRAINING_STATE) {
248 if (pstatus->packet_toself) {
249 antsel_tr_mux =
250 (pfat_table->antsel_rx_keep_2 << 2) |
251 (pfat_table->antsel_rx_keep_1 << 1) |
252 pfat_table->antsel_rx_keep_0;
253 pfat_table->ant_sum[antsel_tr_mux] +=
254 pstatus->rx_pwdb_all;
255 pfat_table->ant_cnt[antsel_tr_mux]++;
256 }
257 }
258 } else if ((rtlefuse->antenna_div_type == CG_TRX_HW_ANTDIV) ||
259 (rtlefuse->antenna_div_type == CGCS_RX_HW_ANTDIV)) {
260 if (pstatus->packet_toself || pstatus->packet_matchbssid) {
261 antsel_tr_mux = (pfat_table->antsel_rx_keep_2 << 2) |
262 (pfat_table->antsel_rx_keep_1 << 1) |
263 pfat_table->antsel_rx_keep_0;
264 rtl88e_dm_ant_sel_statistics(hw, antsel_tr_mux, 0,
265 pstatus->rx_pwdb_all);
266 }
267
268 }
269 }
270
271 static void _rtl88ee_translate_rx_signal_stuff(struct ieee80211_hw *hw,
272 struct sk_buff *skb,
273 struct rtl_stats *pstatus,
274 __le32 *pdesc,
275 struct rx_fwinfo_88e *p_drvinfo)
276 {
277 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
278 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
279 struct ieee80211_hdr *hdr;
280 u8 *tmp_buf;
281 u8 *praddr;
282 u8 *psaddr;
283 __le16 fc;
284 bool packet_matchbssid, packet_toself, packet_beacon;
285
286 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
287
288 hdr = (struct ieee80211_hdr *)tmp_buf;
289 fc = hdr->frame_control;
290 praddr = hdr->addr1;
291 psaddr = ieee80211_get_SA(hdr);
292 memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
293
294 packet_matchbssid = ((!ieee80211_is_ctl(fc)) &&
295 (ether_addr_equal(mac->bssid, ieee80211_has_tods(fc) ?
296 hdr->addr1 : ieee80211_has_fromds(fc) ?
297 hdr->addr2 : hdr->addr3)) &&
298 (!pstatus->hwerror) &&
299 (!pstatus->crc) && (!pstatus->icv));
300
301 packet_toself = packet_matchbssid &&
302 (ether_addr_equal(praddr, rtlefuse->dev_addr));
303
304 if (ieee80211_is_beacon(hdr->frame_control))
305 packet_beacon = true;
306 else
307 packet_beacon = false;
308
309 _rtl88ee_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
310 packet_matchbssid, packet_toself,
311 packet_beacon);
312 _rtl88ee_smart_antenna(hw, pstatus);
313 rtl_process_phyinfo(hw, tmp_buf, pstatus);
314 }
315
316 static void rtl88ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
317 __le32 *virtualaddress)
318 {
319 u32 dwtmp = 0;
320 memset(virtualaddress, 0, 8);
321
322 set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);
323 if (ptcb_desc->empkt_num == 1) {
324 dwtmp = ptcb_desc->empkt_len[0];
325 } else {
326 dwtmp = ptcb_desc->empkt_len[0];
327 dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
328 dwtmp += ptcb_desc->empkt_len[1];
329 }
330 set_earlymode_len0(virtualaddress, dwtmp);
331
332 if (ptcb_desc->empkt_num <= 3) {
333 dwtmp = ptcb_desc->empkt_len[2];
334 } else {
335 dwtmp = ptcb_desc->empkt_len[2];
336 dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
337 dwtmp += ptcb_desc->empkt_len[3];
338 }
339 set_earlymode_len1(virtualaddress, dwtmp);
340 if (ptcb_desc->empkt_num <= 5) {
341 dwtmp = ptcb_desc->empkt_len[4];
342 } else {
343 dwtmp = ptcb_desc->empkt_len[4];
344 dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
345 dwtmp += ptcb_desc->empkt_len[5];
346 }
347 set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);
348 set_earlymode_len2_2(virtualaddress, dwtmp >> 4);
349 if (ptcb_desc->empkt_num <= 7) {
350 dwtmp = ptcb_desc->empkt_len[6];
351 } else {
352 dwtmp = ptcb_desc->empkt_len[6];
353 dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
354 dwtmp += ptcb_desc->empkt_len[7];
355 }
356 set_earlymode_len3(virtualaddress, dwtmp);
357 if (ptcb_desc->empkt_num <= 9) {
358 dwtmp = ptcb_desc->empkt_len[8];
359 } else {
360 dwtmp = ptcb_desc->empkt_len[8];
361 dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
362 dwtmp += ptcb_desc->empkt_len[9];
363 }
364 set_earlymode_len4(virtualaddress, dwtmp);
365 }
366
367 bool rtl88ee_rx_query_desc(struct ieee80211_hw *hw,
368 struct rtl_stats *status,
369 struct ieee80211_rx_status *rx_status,
370 u8 *pdesc8, struct sk_buff *skb)
371 {
372 struct rtl_priv *rtlpriv = rtl_priv(hw);
373 struct rx_fwinfo_88e *p_drvinfo;
374 struct ieee80211_hdr *hdr;
375 u8 wake_match;
376 __le32 *pdesc = (__le32 *)pdesc8;
377 u32 phystatus = get_rx_desc_physt(pdesc);
378
379 status->packet_report_type = (u8)get_rx_status_desc_rpt_sel(pdesc);
380 if (status->packet_report_type == TX_REPORT2)
381 status->length = (u16)get_rx_rpt2_desc_pkt_len(pdesc);
382 else
383 status->length = (u16)get_rx_desc_pkt_len(pdesc);
384 status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
385 RX_DRV_INFO_SIZE_UNIT;
386 status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
387 status->icv = (u16)get_rx_desc_icv(pdesc);
388 status->crc = (u16)get_rx_desc_crc32(pdesc);
389 status->hwerror = (status->crc | status->icv);
390 status->decrypted = !get_rx_desc_swdec(pdesc);
391 status->rate = (u8)get_rx_desc_rxmcs(pdesc);
392 status->shortpreamble = (u16)get_rx_desc_splcp(pdesc);
393 status->isampdu = (bool) (get_rx_desc_paggr(pdesc) == 1);
394 status->isfirst_ampdu = (bool)((get_rx_desc_paggr(pdesc) == 1) &&
395 (get_rx_desc_faggr(pdesc) == 1));
396 if (status->packet_report_type == NORMAL_RX)
397 status->timestamp_low = get_rx_desc_tsfl(pdesc);
398 status->rx_is40mhzpacket = (bool)get_rx_desc_bw(pdesc);
399 status->is_ht = (bool)get_rx_desc_rxht(pdesc);
400
401 status->is_cck = RTL8188_RX_HAL_IS_CCK_RATE(status->rate);
402
403 status->macid = get_rx_desc_macid(pdesc);
404 if (get_rx_status_desc_pattern_match(pdesc))
405 wake_match = BIT(2);
406 else if (get_rx_status_desc_magic_match(pdesc))
407 wake_match = BIT(1);
408 else if (get_rx_status_desc_unicast_match(pdesc))
409 wake_match = BIT(0);
410 else
411 wake_match = 0;
412 if (wake_match)
413 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
414 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
415 wake_match);
416 rx_status->freq = hw->conf.chandef.chan->center_freq;
417 rx_status->band = hw->conf.chandef.chan->band;
418
419 hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size
420 + status->rx_bufshift);
421
422 if (status->crc)
423 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
424
425 if (status->rx_is40mhzpacket)
426 rx_status->bw = RATE_INFO_BW_40;
427
428 if (status->is_ht)
429 rx_status->encoding = RX_ENC_HT;
430
431 rx_status->flag |= RX_FLAG_MACTIME_START;
432
433
434
435
436
437
438
439
440
441 if (status->decrypted) {
442 if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
443 (ieee80211_has_protected(hdr->frame_control)))
444 rx_status->flag |= RX_FLAG_DECRYPTED;
445 else
446 rx_status->flag &= ~RX_FLAG_DECRYPTED;
447 }
448
449
450
451
452
453
454 rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
455 false, status->rate);
456
457 rx_status->mactime = status->timestamp_low;
458 if (phystatus == true) {
459 p_drvinfo = (struct rx_fwinfo_88e *)(skb->data +
460 status->rx_bufshift);
461
462 _rtl88ee_translate_rx_signal_stuff(hw,
463 skb, status, pdesc,
464 p_drvinfo);
465 }
466 rx_status->signal = status->recvsignalpower + 10;
467 if (status->packet_report_type == TX_REPORT2) {
468 status->macid_valid_entry[0] =
469 get_rx_rpt2_desc_macid_valid_1(pdesc);
470 status->macid_valid_entry[1] =
471 get_rx_rpt2_desc_macid_valid_2(pdesc);
472 }
473 return true;
474 }
475
476 void rtl88ee_tx_fill_desc(struct ieee80211_hw *hw,
477 struct ieee80211_hdr *hdr, u8 *pdesc8,
478 u8 *txbd, struct ieee80211_tx_info *info,
479 struct ieee80211_sta *sta,
480 struct sk_buff *skb,
481 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
482
483 {
484 struct rtl_priv *rtlpriv = rtl_priv(hw);
485 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
486 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
487 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
488 u16 seq_number;
489 __le16 fc = hdr->frame_control;
490 unsigned int buf_len = 0;
491 unsigned int skb_len = skb->len;
492 u8 fw_qsel = _rtl88ee_map_hwqueue_to_fwqueue(skb, hw_queue);
493 bool firstseg = ((hdr->seq_ctrl &
494 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
495 bool lastseg = ((hdr->frame_control &
496 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
497 dma_addr_t mapping;
498 u8 bw_40 = 0;
499 u8 short_gi = 0;
500 __le32 *pdesc = (u32 *)pdesc8;
501
502 if (mac->opmode == NL80211_IFTYPE_STATION) {
503 bw_40 = mac->bw_40;
504 } else if (mac->opmode == NL80211_IFTYPE_AP ||
505 mac->opmode == NL80211_IFTYPE_ADHOC) {
506 if (sta)
507 bw_40 = sta->ht_cap.cap &
508 IEEE80211_HT_CAP_SUP_WIDTH_20_40;
509 }
510 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
511 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
512
513 if (rtlhal->earlymode_enable) {
514 skb_push(skb, EM_HDR_LEN);
515 memset(skb->data, 0, EM_HDR_LEN);
516 }
517 buf_len = skb->len;
518 mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
519 PCI_DMA_TODEVICE);
520 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
521 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
522 "DMA mapping error\n");
523 return;
524 }
525 clear_pci_tx_desc_content(pdesc, sizeof(struct tx_desc_88e));
526 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
527 firstseg = true;
528 lastseg = true;
529 }
530 if (firstseg) {
531 if (rtlhal->earlymode_enable) {
532 set_tx_desc_pkt_offset(pdesc, 1);
533 set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN +
534 EM_HDR_LEN);
535 if (ptcb_desc->empkt_num) {
536 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
537 "Insert 8 byte.pTcb->EMPktNum:%d\n",
538 ptcb_desc->empkt_num);
539 rtl88ee_insert_emcontent(ptcb_desc,
540 (__le32 *)(skb->data));
541 }
542 } else {
543 set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
544 }
545
546 ptcb_desc->use_driver_rate = true;
547 set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
548 if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
549 short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
550 else
551 short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
552
553 set_tx_desc_data_shortgi(pdesc, short_gi);
554
555 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
556 set_tx_desc_agg_enable(pdesc, 1);
557 set_tx_desc_max_agg_num(pdesc, 0x14);
558 }
559 set_tx_desc_seq(pdesc, seq_number);
560 set_tx_desc_rts_enable(pdesc, ((ptcb_desc->rts_enable &&
561 !ptcb_desc->cts_enable) ? 1 : 0));
562 set_tx_desc_hw_rts_enable(pdesc, 0);
563 set_tx_desc_cts2self(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
564 set_tx_desc_rts_stbc(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
565
566 set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
567 set_tx_desc_rts_bw(pdesc, 0);
568 set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
569 set_tx_desc_rts_short(pdesc,
570 ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
571 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
572 (ptcb_desc->rts_use_shortgi ? 1 : 0)));
573
574 if (ptcb_desc->tx_enable_sw_calc_duration)
575 set_tx_desc_nav_use_hdr(pdesc, 1);
576
577 if (bw_40) {
578 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
579 set_tx_desc_data_bw(pdesc, 1);
580 set_tx_desc_tx_sub_carrier(pdesc, 3);
581 } else {
582 set_tx_desc_data_bw(pdesc, 0);
583 set_tx_desc_tx_sub_carrier(pdesc,
584 mac->cur_40_prime_sc);
585 }
586 } else {
587 set_tx_desc_data_bw(pdesc, 0);
588 set_tx_desc_tx_sub_carrier(pdesc, 0);
589 }
590
591 set_tx_desc_linip(pdesc, 0);
592 set_tx_desc_pkt_size(pdesc, (u16)skb_len);
593 if (sta) {
594 u8 ampdu_density = sta->ht_cap.ampdu_density;
595 set_tx_desc_ampdu_density(pdesc, ampdu_density);
596 }
597 if (info->control.hw_key) {
598 struct ieee80211_key_conf *keyconf;
599
600 keyconf = info->control.hw_key;
601 switch (keyconf->cipher) {
602 case WLAN_CIPHER_SUITE_WEP40:
603 case WLAN_CIPHER_SUITE_WEP104:
604 case WLAN_CIPHER_SUITE_TKIP:
605 set_tx_desc_sec_type(pdesc, 0x1);
606 break;
607 case WLAN_CIPHER_SUITE_CCMP:
608 set_tx_desc_sec_type(pdesc, 0x3);
609 break;
610 default:
611 set_tx_desc_sec_type(pdesc, 0x0);
612 break;
613
614 }
615 }
616
617 set_tx_desc_queue_sel(pdesc, fw_qsel);
618 set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
619 set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
620 set_tx_desc_disable_fb(pdesc, ptcb_desc->disable_ratefallback ?
621 1 : 0);
622 set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
623
624
625
626
627
628 if (!ptcb_desc->use_driver_rate) {
629
630
631 }
632 if (ieee80211_is_data_qos(fc)) {
633 if (mac->rdg_en) {
634 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
635 "Enable RDG function.\n");
636 set_tx_desc_rdg_enable(pdesc, 1);
637 set_tx_desc_htc(pdesc, 1);
638 }
639 }
640 }
641
642 set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
643 set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
644 set_tx_desc_tx_buffer_size(pdesc, (u16)buf_len);
645 set_tx_desc_tx_buffer_address(pdesc, mapping);
646 if (rtlpriv->dm.useramask) {
647 set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
648 set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
649 } else {
650 set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
651 set_tx_desc_macid(pdesc, ptcb_desc->ratr_index);
652 }
653 if (ieee80211_is_data_qos(fc))
654 set_tx_desc_qos(pdesc, 1);
655
656 if (!ieee80211_is_data_qos(fc))
657 set_tx_desc_hwseq_en(pdesc, 1);
658 set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
659 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
660 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
661 set_tx_desc_bmc(pdesc, 1);
662 }
663
664 rtl88e_dm_set_tx_ant_by_tx_info(hw, pdesc8, ptcb_desc->mac_id);
665 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
666 }
667
668 void rtl88ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
669 u8 *pdesc8, bool firstseg,
670 bool lastseg, struct sk_buff *skb)
671 {
672 struct rtl_priv *rtlpriv = rtl_priv(hw);
673 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
674 u8 fw_queue = QSLT_BEACON;
675 __le32 *pdesc = (__le32 *)pdesc8;
676
677 dma_addr_t mapping = pci_map_single(rtlpci->pdev,
678 skb->data, skb->len,
679 PCI_DMA_TODEVICE);
680
681 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
682 __le16 fc = hdr->frame_control;
683
684 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
685 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
686 "DMA mapping error\n");
687 return;
688 }
689 clear_pci_tx_desc_content(pdesc, TX_DESC_SIZE);
690
691 if (firstseg)
692 set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
693
694 set_tx_desc_tx_rate(pdesc, DESC92C_RATE1M);
695
696 set_tx_desc_seq(pdesc, 0);
697
698 set_tx_desc_linip(pdesc, 0);
699
700 set_tx_desc_queue_sel(pdesc, fw_queue);
701
702 set_tx_desc_first_seg(pdesc, 1);
703 set_tx_desc_last_seg(pdesc, 1);
704
705 set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
706
707 set_tx_desc_tx_buffer_address(pdesc, mapping);
708
709 set_tx_desc_rate_id(pdesc, 7);
710 set_tx_desc_macid(pdesc, 0);
711
712 set_tx_desc_own(pdesc, 1);
713
714 set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
715
716 set_tx_desc_first_seg(pdesc, 1);
717 set_tx_desc_last_seg(pdesc, 1);
718
719 set_tx_desc_offset(pdesc, 0x20);
720
721 set_tx_desc_use_rate(pdesc, 1);
722
723 if (!ieee80211_is_data_qos(fc))
724 set_tx_desc_hwseq_en(pdesc, 1);
725
726 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
727 "H2C Tx Cmd Content\n",
728 pdesc, TX_DESC_SIZE);
729 }
730
731 void rtl88ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc8,
732 bool istx, u8 desc_name, u8 *val)
733 {
734 __le32 *pdesc = (__le32 *)pdesc8;
735
736 if (istx == true) {
737 switch (desc_name) {
738 case HW_DESC_OWN:
739 set_tx_desc_own(pdesc, 1);
740 break;
741 case HW_DESC_TX_NEXTDESC_ADDR:
742 set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
743 break;
744 default:
745 WARN_ONCE(true, "rtl8188ee: ERR txdesc :%d not processed\n",
746 desc_name);
747 break;
748 }
749 } else {
750 switch (desc_name) {
751 case HW_DESC_RXOWN:
752 set_rx_desc_own(pdesc, 1);
753 break;
754 case HW_DESC_RXBUFF_ADDR:
755 set_rx_desc_buff_addr(pdesc, *(u32 *)val);
756 break;
757 case HW_DESC_RXPKT_LEN:
758 set_rx_desc_pkt_len(pdesc, *(u32 *)val);
759 break;
760 case HW_DESC_RXERO:
761 set_rx_desc_eor(pdesc, 1);
762 break;
763 default:
764 WARN_ONCE(true, "rtl8188ee: ERR rxdesc :%d not processed\n",
765 desc_name);
766 break;
767 }
768 }
769 }
770
771 u64 rtl88ee_get_desc(struct ieee80211_hw *hw,
772 u8 *pdesc8, bool istx, u8 desc_name)
773 {
774 u32 ret = 0;
775 __le32 *pdesc = (__le32 *)pdesc8;
776
777 if (istx == true) {
778 switch (desc_name) {
779 case HW_DESC_OWN:
780 ret = get_tx_desc_own(pdesc);
781 break;
782 case HW_DESC_TXBUFF_ADDR:
783 ret = get_tx_desc_tx_buffer_address(pdesc);
784 break;
785 default:
786 WARN_ONCE(true, "rtl8188ee: ERR txdesc :%d not processed\n",
787 desc_name);
788 break;
789 }
790 } else {
791 switch (desc_name) {
792 case HW_DESC_OWN:
793 ret = get_rx_desc_own(pdesc);
794 break;
795 case HW_DESC_RXPKT_LEN:
796 ret = get_rx_desc_pkt_len(pdesc);
797 break;
798 case HW_DESC_RXBUFF_ADDR:
799 ret = get_rx_desc_buff_addr(pdesc);
800 break;
801 default:
802 WARN_ONCE(true, "rtl8188ee: ERR rxdesc :%d not processed\n",
803 desc_name);
804 break;
805 }
806 }
807 return ret;
808 }
809
810 bool rtl88ee_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue, u16 index)
811 {
812 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
813 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
814 u8 *entry = (u8 *)(&ring->desc[ring->idx]);
815 u8 own = (u8)rtl88ee_get_desc(hw, entry, true, HW_DESC_OWN);
816
817
818
819
820
821 if (own)
822 return false;
823 return true;
824 }
825
826 void rtl88ee_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
827 {
828 struct rtl_priv *rtlpriv = rtl_priv(hw);
829 if (hw_queue == BEACON_QUEUE) {
830 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
831 } else {
832 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
833 BIT(0) << (hw_queue));
834 }
835 }