This source file includes following definitions.
- halwifionly_phy_set_bb_reg
1
2
3
4 #ifndef __HALBTC_OUT_SRC_H__
5 #define __HALBTC_OUT_SRC_H__
6
7 #include "../wifi.h"
8
9 #define NORMAL_EXEC false
10 #define FORCE_EXEC true
11
12 #define BTC_RF_OFF 0x0
13 #define BTC_RF_ON 0x1
14
15 #define BTC_RF_A RF90_PATH_A
16 #define BTC_RF_B RF90_PATH_B
17 #define BTC_RF_C RF90_PATH_C
18 #define BTC_RF_D RF90_PATH_D
19
20 #define BTC_SMSP SINGLEMAC_SINGLEPHY
21 #define BTC_DMDP DUALMAC_DUALPHY
22 #define BTC_DMSP DUALMAC_SINGLEPHY
23 #define BTC_MP_UNKNOWN 0xff
24
25 #define IN
26 #define OUT
27
28 #define BT_TMP_BUF_SIZE 100
29
30 #define BT_COEX_ANT_TYPE_PG 0
31 #define BT_COEX_ANT_TYPE_ANTDIV 1
32 #define BT_COEX_ANT_TYPE_DETECTED 2
33
34 #define BTC_MIMO_PS_STATIC 0
35 #define BTC_MIMO_PS_DYNAMIC 1
36
37 #define BTC_RATE_DISABLE 0
38 #define BTC_RATE_ENABLE 1
39
40
41 #define BTC_ANT_PATH_WIFI 0
42 #define BTC_ANT_PATH_BT 1
43 #define BTC_ANT_PATH_PTA 2
44 #define BTC_ANT_PATH_WIFI5G 3
45 #define BTC_ANT_PATH_AUTO 4
46
47 #define BTC_ANT_WIFI_AT_MAIN 0
48 #define BTC_ANT_WIFI_AT_AUX 1
49
50 #define BTC_ANT_WIFI_AT_CPL_MAIN 0
51 #define BTC_ANT_WIFI_AT_CPL_AUX 1
52
53 enum btc_bt_reg_type {
54 BTC_BT_REG_RF = 0,
55 BTC_BT_REG_MODEM = 1,
56 BTC_BT_REG_BLUEWIZE = 2,
57 BTC_BT_REG_VENDOR = 3,
58 BTC_BT_REG_LE = 4,
59 BTC_BT_REG_MAX
60 };
61
62 enum btc_chip_interface {
63 BTC_INTF_UNKNOWN = 0,
64 BTC_INTF_PCI = 1,
65 BTC_INTF_USB = 2,
66 BTC_INTF_SDIO = 3,
67 BTC_INTF_GSPI = 4,
68 BTC_INTF_MAX
69 };
70
71 enum btc_chip_type {
72 BTC_CHIP_UNDEF = 0,
73 BTC_CHIP_CSR_BC4 = 1,
74 BTC_CHIP_CSR_BC8 = 2,
75 BTC_CHIP_RTL8723A = 3,
76 BTC_CHIP_RTL8821 = 4,
77 BTC_CHIP_RTL8723B = 5,
78 BTC_CHIP_MAX
79 };
80
81 enum btc_msg_type {
82 BTC_MSG_INTERFACE = 0x0,
83 BTC_MSG_ALGORITHM = 0x1,
84 BTC_MSG_MAX
85 };
86
87
88 #define INTF_INIT BIT0
89 #define INTF_NOTIFY BIT2
90
91
92 #define ALGO_BT_RSSI_STATE BIT0
93 #define ALGO_WIFI_RSSI_STATE BIT1
94 #define ALGO_BT_MONITOR BIT2
95 #define ALGO_TRACE BIT3
96 #define ALGO_TRACE_FW BIT4
97 #define ALGO_TRACE_FW_DETAIL BIT5
98 #define ALGO_TRACE_FW_EXEC BIT6
99 #define ALGO_TRACE_SW BIT7
100 #define ALGO_TRACE_SW_DETAIL BIT8
101 #define ALGO_TRACE_SW_EXEC BIT9
102
103
104 #define WIFI_STA_CONNECTED BIT0
105 #define WIFI_AP_CONNECTED BIT1
106 #define WIFI_HS_CONNECTED BIT2
107 #define WIFI_P2P_GO_CONNECTED BIT3
108 #define WIFI_P2P_GC_CONNECTED BIT4
109
110 #define BTC_RSSI_HIGH(_rssi_) \
111 ((_rssi_ == BTC_RSSI_STATE_HIGH || \
112 _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? true : false)
113 #define BTC_RSSI_MEDIUM(_rssi_) \
114 ((_rssi_ == BTC_RSSI_STATE_MEDIUM || \
115 _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? true : false)
116 #define BTC_RSSI_LOW(_rssi_) \
117 ((_rssi_ == BTC_RSSI_STATE_LOW || \
118 _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? true : false)
119
120 enum btc_power_save_type {
121 BTC_PS_WIFI_NATIVE = 0,
122 BTC_PS_LPS_ON = 1,
123 BTC_PS_LPS_OFF = 2,
124 BTC_PS_LPS_MAX
125 };
126
127 struct btc_board_info {
128
129 u8 bt_chip_type;
130 u8 pg_ant_num;
131 u8 btdm_ant_num;
132 u8 btdm_ant_pos;
133 u8 single_ant_path;
134 bool tfbga_package;
135
136 u8 rfe_type;
137 u8 ant_div_cfg;
138 u8 customer_id;
139 };
140
141 enum btc_dbg_opcode {
142 BTC_DBG_SET_COEX_NORMAL = 0x0,
143 BTC_DBG_SET_COEX_WIFI_ONLY = 0x1,
144 BTC_DBG_SET_COEX_BT_ONLY = 0x2,
145 BTC_DBG_MAX
146 };
147
148 enum btc_rssi_state {
149 BTC_RSSI_STATE_HIGH = 0x0,
150 BTC_RSSI_STATE_MEDIUM = 0x1,
151 BTC_RSSI_STATE_LOW = 0x2,
152 BTC_RSSI_STATE_STAY_HIGH = 0x3,
153 BTC_RSSI_STATE_STAY_MEDIUM = 0x4,
154 BTC_RSSI_STATE_STAY_LOW = 0x5,
155 BTC_RSSI_MAX
156 };
157
158 enum btc_wifi_role {
159 BTC_ROLE_STATION = 0x0,
160 BTC_ROLE_AP = 0x1,
161 BTC_ROLE_IBSS = 0x2,
162 BTC_ROLE_HS_MODE = 0x3,
163 BTC_ROLE_MAX
164 };
165
166 enum btc_wireless_freq {
167 BTC_FREQ_2_4G = 0x0,
168 BTC_FREQ_5G = 0x1,
169 BTC_FREQ_MAX
170 };
171
172 enum btc_wifi_bw_mode {
173 BTC_WIFI_BW_LEGACY = 0x0,
174 BTC_WIFI_BW_HT20 = 0x1,
175 BTC_WIFI_BW_HT40 = 0x2,
176 BTC_WIFI_BW_HT80 = 0x3,
177 BTC_WIFI_BW_MAX
178 };
179
180 enum btc_wifi_traffic_dir {
181 BTC_WIFI_TRAFFIC_TX = 0x0,
182 BTC_WIFI_TRAFFIC_RX = 0x1,
183 BTC_WIFI_TRAFFIC_MAX
184 };
185
186 enum btc_wifi_pnp {
187 BTC_WIFI_PNP_WAKE_UP = 0x0,
188 BTC_WIFI_PNP_SLEEP = 0x1,
189 BTC_WIFI_PNP_SLEEP_KEEP_ANT = 0x2,
190 BTC_WIFI_PNP_MAX
191 };
192
193 enum btc_iot_peer {
194 BTC_IOT_PEER_UNKNOWN = 0,
195 BTC_IOT_PEER_REALTEK = 1,
196 BTC_IOT_PEER_REALTEK_92SE = 2,
197 BTC_IOT_PEER_BROADCOM = 3,
198 BTC_IOT_PEER_RALINK = 4,
199 BTC_IOT_PEER_ATHEROS = 5,
200 BTC_IOT_PEER_CISCO = 6,
201 BTC_IOT_PEER_MERU = 7,
202 BTC_IOT_PEER_MARVELL = 8,
203 BTC_IOT_PEER_REALTEK_SOFTAP = 9,
204 BTC_IOT_PEER_SELF_SOFTAP = 10,
205 BTC_IOT_PEER_AIRGO = 11,
206 BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 12,
207 BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 13,
208 BTC_IOT_PEER_MAX,
209 };
210
211
212 enum bt_wifi_coex_state {
213 BTC_WIFI_STAT_INIT,
214 BTC_WIFI_STAT_IQK,
215 BTC_WIFI_STAT_NORMAL_OFF,
216 BTC_WIFI_STAT_MP_OFF,
217 BTC_WIFI_STAT_NORMAL,
218 BTC_WIFI_STAT_ANT_DIV,
219 BTC_WIFI_STAT_MAX
220 };
221
222 enum bt_ant_type {
223 BTC_ANT_TYPE_0,
224 BTC_ANT_TYPE_1,
225 BTC_ANT_TYPE_2,
226 BTC_ANT_TYPE_3,
227 BTC_ANT_TYPE_4,
228 BTC_ANT_TYPE_MAX
229 };
230
231 enum btc_get_type {
232
233 BTC_GET_BL_HS_OPERATION,
234 BTC_GET_BL_HS_CONNECTING,
235 BTC_GET_BL_WIFI_CONNECTED,
236 BTC_GET_BL_WIFI_DUAL_BAND_CONNECTED,
237 BTC_GET_BL_WIFI_BUSY,
238 BTC_GET_BL_WIFI_SCAN,
239 BTC_GET_BL_WIFI_LINK,
240 BTC_GET_BL_WIFI_DHCP,
241 BTC_GET_BL_WIFI_SOFTAP_IDLE,
242 BTC_GET_BL_WIFI_SOFTAP_LINKING,
243 BTC_GET_BL_WIFI_IN_EARLY_SUSPEND,
244 BTC_GET_BL_WIFI_ROAM,
245 BTC_GET_BL_WIFI_4_WAY_PROGRESS,
246 BTC_GET_BL_WIFI_UNDER_5G,
247 BTC_GET_BL_WIFI_AP_MODE_ENABLE,
248 BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
249 BTC_GET_BL_WIFI_UNDER_B_MODE,
250 BTC_GET_BL_EXT_SWITCH,
251 BTC_GET_BL_WIFI_IS_IN_MP_MODE,
252 BTC_GET_BL_IS_ASUS_8723B,
253 BTC_GET_BL_FW_READY,
254 BTC_GET_BL_RF4CE_CONNECTED,
255
256
257 BTC_GET_S4_WIFI_RSSI,
258 BTC_GET_S4_HS_RSSI,
259
260
261 BTC_GET_U4_WIFI_BW,
262 BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
263 BTC_GET_U4_WIFI_FW_VER,
264 BTC_GET_U4_WIFI_LINK_STATUS,
265 BTC_GET_U4_BT_PATCH_VER,
266 BTC_GET_U4_VENDOR,
267 BTC_GET_U4_SUPPORTED_VERSION,
268 BTC_GET_U4_SUPPORTED_FEATURE,
269 BTC_GET_U4_BT_DEVICE_INFO,
270 BTC_GET_U4_BT_FORBIDDEN_SLOT_VAL,
271 BTC_GET_U4_WIFI_IQK_TOTAL,
272 BTC_GET_U4_WIFI_IQK_OK,
273 BTC_GET_U4_WIFI_IQK_FAIL,
274
275
276 BTC_GET_U1_WIFI_DOT11_CHNL,
277 BTC_GET_U1_WIFI_CENTRAL_CHNL,
278 BTC_GET_U1_WIFI_HS_CHNL,
279 BTC_GET_U1_MAC_PHY_MODE,
280 BTC_GET_U1_AP_NUM,
281 BTC_GET_U1_ANT_TYPE,
282 BTC_GET_U1_IOT_PEER,
283
284
285 BTC_GET_U1_LPS_MODE,
286 BTC_GET_BL_BT_SCO_BUSY,
287
288
289 BTC_GET_DRIVER_TEST_CFG,
290 BTC_GET_MAX
291 };
292
293 enum btc_vendor {
294 BTC_VENDOR_LENOVO,
295 BTC_VENDOR_ASUS,
296 BTC_VENDOR_OTHER
297 };
298
299 enum btc_set_type {
300
301 BTC_SET_BL_BT_DISABLE,
302 BTC_SET_BL_BT_TRAFFIC_BUSY,
303 BTC_SET_BL_BT_LIMITED_DIG,
304 BTC_SET_BL_FORCE_TO_ROAM,
305 BTC_SET_BL_TO_REJ_AP_AGG_PKT,
306 BTC_SET_BL_BT_CTRL_AGG_SIZE,
307 BTC_SET_BL_INC_SCAN_DEV_NUM,
308 BTC_SET_BL_BT_TX_RX_MASK,
309 BTC_SET_BL_MIRACAST_PLUS_BT,
310
311
312 BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
313 BTC_SET_UI_SCAN_SIG_COMPENSATION,
314 BTC_SET_U1_AGG_BUF_SIZE,
315
316
317 BTC_SET_ACT_GET_BT_RSSI,
318 BTC_SET_ACT_AGGREGATE_CTRL,
319 BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
320 BTC_SET_MIMO_PS_MODE,
321
322
323
324 BTC_SET_BL_BT_SCO_BUSY,
325
326 BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE,
327 BTC_SET_U1_LPS_VAL,
328 BTC_SET_U1_RPWM_VAL,
329 BTC_SET_U1_1ANT_LPS,
330 BTC_SET_U1_1ANT_RPWM,
331
332 BTC_SET_ACT_LEAVE_LPS,
333 BTC_SET_ACT_ENTER_LPS,
334 BTC_SET_ACT_NORMAL_LPS,
335 BTC_SET_ACT_PRE_NORMAL_LPS,
336 BTC_SET_ACT_POST_NORMAL_LPS,
337 BTC_SET_ACT_INC_FORCE_EXEC_PWR_CMD_CNT,
338 BTC_SET_ACT_DISABLE_LOW_POWER,
339 BTC_SET_BL_BT_LNA_CONSTRAIN_LEVEL,
340 BTC_SET_ACT_UPDATE_RAMASK,
341 BTC_SET_ACT_SEND_MIMO_PS,
342
343 BTC_SET_ACT_CTRL_BT_INFO,
344 BTC_SET_ACT_CTRL_BT_COEX,
345 BTC_SET_ACT_CTRL_8723B_ANT,
346
347 BTC_SET_MAX
348 };
349
350 enum btc_dbg_disp_type {
351 BTC_DBG_DISP_COEX_STATISTICS = 0x0,
352 BTC_DBG_DISP_BT_LINK_INFO = 0x1,
353 BTC_DBG_DISP_BT_FW_VER = 0x2,
354 BTC_DBG_DISP_FW_PWR_MODE_CMD = 0x3,
355 BTC_DBG_DISP_WIFI_STATUS = 0x04,
356 BTC_DBG_DISP_MAX
357 };
358
359 enum btc_notify_type_ips {
360 BTC_IPS_LEAVE = 0x0,
361 BTC_IPS_ENTER = 0x1,
362 BTC_IPS_MAX
363 };
364
365 enum btc_notify_type_lps {
366 BTC_LPS_DISABLE = 0x0,
367 BTC_LPS_ENABLE = 0x1,
368 BTC_LPS_MAX
369 };
370
371 enum btc_notify_type_scan {
372 BTC_SCAN_FINISH = 0x0,
373 BTC_SCAN_START = 0x1,
374 BTC_SCAN_START_2G = 0x2,
375 BTC_SCAN_MAX
376 };
377
378 enum btc_notify_type_switchband {
379 BTC_NOT_SWITCH = 0x0,
380 BTC_SWITCH_TO_24G = 0x1,
381 BTC_SWITCH_TO_5G = 0x2,
382 BTC_SWITCH_TO_24G_NOFORSCAN = 0x3,
383 BTC_SWITCH_MAX
384 };
385
386 enum btc_notify_type_associate {
387 BTC_ASSOCIATE_FINISH = 0x0,
388 BTC_ASSOCIATE_START = 0x1,
389 BTC_ASSOCIATE_5G_FINISH = 0x2,
390 BTC_ASSOCIATE_5G_START = 0x3,
391 BTC_ASSOCIATE_MAX
392 };
393
394 enum btc_notify_type_media_status {
395 BTC_MEDIA_DISCONNECT = 0x0,
396 BTC_MEDIA_CONNECT = 0x1,
397 BTC_MEDIA_MAX
398 };
399
400 enum btc_notify_type_special_packet {
401 BTC_PACKET_UNKNOWN = 0x0,
402 BTC_PACKET_DHCP = 0x1,
403 BTC_PACKET_ARP = 0x2,
404 BTC_PACKET_EAPOL = 0x3,
405 BTC_PACKET_MAX
406 };
407
408 enum hci_ext_bt_operation {
409 HCI_BT_OP_NONE = 0x0,
410 HCI_BT_OP_INQUIRY_START = 0x1,
411 HCI_BT_OP_INQUIRY_FINISH = 0x2,
412 HCI_BT_OP_PAGING_START = 0x3,
413 HCI_BT_OP_PAGING_SUCCESS = 0x4,
414 HCI_BT_OP_PAGING_UNSUCCESS = 0x5,
415 HCI_BT_OP_PAIRING_START = 0x6,
416 HCI_BT_OP_PAIRING_FINISH = 0x7,
417 HCI_BT_OP_BT_DEV_ENABLE = 0x8,
418 HCI_BT_OP_BT_DEV_DISABLE = 0x9,
419 HCI_BT_OP_MAX
420 };
421
422 enum btc_notify_type_stack_operation {
423 BTC_STACK_OP_NONE = 0x0,
424 BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1,
425 BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2,
426 BTC_STACK_OP_MAX
427 };
428
429 enum {
430 BTC_CCK_1,
431 BTC_CCK_2,
432 BTC_CCK_5_5,
433 BTC_CCK_11,
434 BTC_OFDM_6,
435 BTC_OFDM_9,
436 BTC_OFDM_12,
437 BTC_OFDM_18,
438 BTC_OFDM_24,
439 BTC_OFDM_36,
440 BTC_OFDM_48,
441 BTC_OFDM_54,
442 BTC_MCS_0,
443 BTC_MCS_1,
444 BTC_MCS_2,
445 BTC_MCS_3,
446 BTC_MCS_4,
447 BTC_MCS_5,
448 BTC_MCS_6,
449 BTC_MCS_7,
450 BTC_MCS_8,
451 BTC_MCS_9,
452 BTC_MCS_10,
453 BTC_MCS_11,
454 BTC_MCS_12,
455 BTC_MCS_13,
456 BTC_MCS_14,
457 BTC_MCS_15,
458 BTC_MCS_16,
459 BTC_MCS_17,
460 BTC_MCS_18,
461 BTC_MCS_19,
462 BTC_MCS_20,
463 BTC_MCS_21,
464 BTC_MCS_22,
465 BTC_MCS_23,
466 BTC_MCS_24,
467 BTC_MCS_25,
468 BTC_MCS_26,
469 BTC_MCS_27,
470 BTC_MCS_28,
471 BTC_MCS_29,
472 BTC_MCS_30,
473 BTC_MCS_31,
474 BTC_VHT_1SS_MCS_0,
475 BTC_VHT_1SS_MCS_1,
476 BTC_VHT_1SS_MCS_2,
477 BTC_VHT_1SS_MCS_3,
478 BTC_VHT_1SS_MCS_4,
479 BTC_VHT_1SS_MCS_5,
480 BTC_VHT_1SS_MCS_6,
481 BTC_VHT_1SS_MCS_7,
482 BTC_VHT_1SS_MCS_8,
483 BTC_VHT_1SS_MCS_9,
484 BTC_VHT_2SS_MCS_0,
485 BTC_VHT_2SS_MCS_1,
486 BTC_VHT_2SS_MCS_2,
487 BTC_VHT_2SS_MCS_3,
488 BTC_VHT_2SS_MCS_4,
489 BTC_VHT_2SS_MCS_5,
490 BTC_VHT_2SS_MCS_6,
491 BTC_VHT_2SS_MCS_7,
492 BTC_VHT_2SS_MCS_8,
493 BTC_VHT_2SS_MCS_9,
494 BTC_VHT_3SS_MCS_0,
495 BTC_VHT_3SS_MCS_1,
496 BTC_VHT_3SS_MCS_2,
497 BTC_VHT_3SS_MCS_3,
498 BTC_VHT_3SS_MCS_4,
499 BTC_VHT_3SS_MCS_5,
500 BTC_VHT_3SS_MCS_6,
501 BTC_VHT_3SS_MCS_7,
502 BTC_VHT_3SS_MCS_8,
503 BTC_VHT_3SS_MCS_9,
504 BTC_VHT_4SS_MCS_0,
505 BTC_VHT_4SS_MCS_1,
506 BTC_VHT_4SS_MCS_2,
507 BTC_VHT_4SS_MCS_3,
508 BTC_VHT_4SS_MCS_4,
509 BTC_VHT_4SS_MCS_5,
510 BTC_VHT_4SS_MCS_6,
511 BTC_VHT_4SS_MCS_7,
512 BTC_VHT_4SS_MCS_8,
513 BTC_VHT_4SS_MCS_9,
514 BTC_MCS_32,
515 BTC_UNKNOWN,
516 BTC_PKT_MGNT,
517 BTC_PKT_CTRL,
518 BTC_PKT_UNKNOWN,
519 BTC_PKT_NOT_FOR_ME,
520 BTC_RATE_MAX
521 };
522
523 enum {
524 BTC_MULTIPORT_SCC,
525 BTC_MULTIPORT_MCC_2CHANNEL,
526 BTC_MULTIPORT_MCC_2BAND,
527 BTC_MULTIPORT_MAX
528 };
529
530 struct btc_bt_info {
531 bool bt_disabled;
532 u8 rssi_adjust_for_agc_table_on;
533 u8 rssi_adjust_for_1ant_coex_type;
534 bool pre_bt_ctrl_agg_buf_size;
535 bool bt_busy;
536 u8 pre_agg_buf_size;
537 u8 agg_buf_size;
538 bool limited_dig;
539 bool pre_reject_agg_pkt;
540 bool reject_agg_pkt;
541 bool bt_ctrl_buf_size;
542 bool increase_scan_dev_num;
543 bool miracast_plus_bt;
544 bool bt_ctrl_agg_buf_size;
545 bool bt_tx_rx_mask;
546 u16 bt_hci_ver;
547 u16 bt_real_fw_ver;
548 u8 bt_fw_ver;
549 u32 bt_get_fw_ver;
550
551 bool bt_disable_low_pwr;
552
553
554 bool bt_ctrl_lps;
555 bool bt_pwr_save_mode;
556 bool bt_lps_on;
557 bool force_to_roam;
558 u8 force_exec_pwr_cmd_cnt;
559 u8 lps_val;
560 u8 rpwm_val;
561 u32 ra_mask;
562
563 u32 afh_map_l;
564 u32 afh_map_m;
565 u16 afh_map_h;
566 u32 bt_supported_feature;
567 u32 bt_supported_version;
568 u32 bt_device_info;
569 u32 bt_forb_slot_val;
570 u8 bt_ant_det_val;
571 u8 bt_ble_scan_type;
572 u32 bt_ble_scan_para;
573 };
574
575 struct btc_stack_info {
576 bool profile_notified;
577 u16 hci_version;
578 u8 num_of_link;
579 bool bt_link_exist;
580 bool sco_exist;
581 bool acl_exist;
582 bool a2dp_exist;
583 bool hid_exist;
584 u8 num_of_hid;
585 bool pan_exist;
586 bool unknown_acl_exist;
587 s8 min_bt_rssi;
588 };
589
590 struct btc_statistics {
591 u32 cnt_bind;
592 u32 cnt_init_hw_config;
593 u32 cnt_init_coex_dm;
594 u32 cnt_ips_notify;
595 u32 cnt_lps_notify;
596 u32 cnt_scan_notify;
597 u32 cnt_connect_notify;
598 u32 cnt_media_status_notify;
599 u32 cnt_special_packet_notify;
600 u32 cnt_bt_info_notify;
601 u32 cnt_periodical;
602 u32 cnt_coex_dm_switch;
603 u32 cnt_stack_operation_notify;
604 u32 cnt_dbg_ctrl;
605 u32 cnt_pre_load_firmware;
606 u32 cnt_power_on;
607 };
608
609 struct btc_bt_link_info {
610 bool bt_link_exist;
611 bool bt_hi_pri_link_exist;
612 bool sco_exist;
613 bool sco_only;
614 bool a2dp_exist;
615 bool a2dp_only;
616 bool hid_exist;
617 bool hid_only;
618 bool pan_exist;
619 bool pan_only;
620 bool slave_role;
621 bool acl_busy;
622 };
623
624 enum btc_antenna_pos {
625 BTC_ANTENNA_AT_MAIN_PORT = 0x1,
626 BTC_ANTENNA_AT_AUX_PORT = 0x2,
627 };
628
629 enum btc_mp_h2c_op_code {
630 BT_OP_GET_BT_VERSION = 0,
631 BT_OP_WRITE_REG_ADDR = 12,
632 BT_OP_WRITE_REG_VALUE = 13,
633 BT_OP_READ_REG = 17,
634 BT_OP_GET_AFH_MAP_L = 30,
635 BT_OP_GET_AFH_MAP_M = 31,
636 BT_OP_GET_AFH_MAP_H = 32,
637 BT_OP_GET_BT_COEX_SUPPORTED_FEATURE = 42,
638 BT_OP_GET_BT_COEX_SUPPORTED_VERSION = 43,
639 BT_OP_GET_BT_ANT_DET_VAL = 44,
640 BT_OP_GET_BT_BLE_SCAN_PARA = 45,
641 BT_OP_GET_BT_BLE_SCAN_TYPE = 46,
642 BT_OP_GET_BT_DEVICE_INFO = 48,
643 BT_OP_GET_BT_FORBIDDEN_SLOT_VAL = 49,
644 BT_OP_MAX
645 };
646
647 enum btc_mp_h2c_req_num {
648
649 BT_SEQ_DONT_CARE = 0,
650 BT_SEQ_GET_BT_VERSION = 0xE,
651 BT_SEQ_GET_AFH_MAP_L = 0x5,
652 BT_SEQ_GET_AFH_MAP_M = 0x6,
653 BT_SEQ_GET_AFH_MAP_H = 0x9,
654 BT_SEQ_GET_BT_COEX_SUPPORTED_FEATURE = 0x7,
655 BT_SEQ_GET_BT_COEX_SUPPORTED_VERSION = 0x8,
656 BT_SEQ_GET_BT_ANT_DET_VAL = 0x2,
657 BT_SEQ_GET_BT_BLE_SCAN_PARA = 0x3,
658 BT_SEQ_GET_BT_BLE_SCAN_TYPE = 0x4,
659 BT_SEQ_GET_BT_DEVICE_INFO = 0xA,
660 BT_SEQ_GET_BT_FORB_SLOT_VAL = 0xB,
661 };
662
663 struct btc_coexist {
664
665 bool binded;
666
667 void *adapter;
668 struct btc_board_info board_info;
669
670 struct btc_bt_info bt_info;
671 struct btc_stack_info stack_info;
672 enum btc_chip_interface chip_interface;
673 struct btc_bt_link_info bt_link_info;
674
675
676
677
678 bool auto_report_1ant;
679 bool auto_report_2ant;
680 bool dbg_mode_1ant;
681 bool dbg_mode_2ant;
682 bool initilized;
683 bool stop_coex_dm;
684 bool manual_control;
685 struct btc_statistics statistics;
686 u8 pwr_mode_val[10];
687
688 struct completion bt_mp_comp;
689
690
691 u8 (*btc_read_1byte)(void *btc_context, u32 reg_addr);
692 void (*btc_write_1byte)(void *btc_context, u32 reg_addr, u32 data);
693 void (*btc_write_1byte_bitmask)(void *btc_context, u32 reg_addr,
694 u32 bit_mask, u8 data1b);
695 u16 (*btc_read_2byte)(void *btc_context, u32 reg_addr);
696 void (*btc_write_2byte)(void *btc_context, u32 reg_addr, u16 data);
697 u32 (*btc_read_4byte)(void *btc_context, u32 reg_addr);
698 void (*btc_write_4byte)(void *btc_context, u32 reg_addr, u32 data);
699
700 void (*btc_write_local_reg_1byte)(void *btc_context, u32 reg_addr,
701 u8 data);
702 void (*btc_set_bb_reg)(void *btc_context, u32 reg_addr,
703 u32 bit_mask, u32 data);
704 u32 (*btc_get_bb_reg)(void *btc_context, u32 reg_addr,
705 u32 bit_mask);
706 void (*btc_set_rf_reg)(void *btc_context, u8 rf_path, u32 reg_addr,
707 u32 bit_mask, u32 data);
708 u32 (*btc_get_rf_reg)(void *btc_context, u8 rf_path,
709 u32 reg_addr, u32 bit_mask);
710
711 void (*btc_fill_h2c)(void *btc_context, u8 element_id,
712 u32 cmd_len, u8 *cmd_buffer);
713
714 void (*btc_disp_dbg_msg)(void *btcoexist, u8 disp_type,
715 struct seq_file *m);
716
717 bool (*btc_get)(void *btcoexist, u8 get_type, void *out_buf);
718 bool (*btc_set)(void *btcoexist, u8 set_type, void *in_buf);
719
720 void (*btc_set_bt_reg)(void *btc_context, u8 reg_type, u32 offset,
721 u32 value);
722 u32 (*btc_get_bt_reg)(void *btc_context, u8 reg_type, u32 offset);
723 u32 (*btc_get_bt_coex_supported_feature)(void *btcoexist);
724 u32 (*btc_get_bt_coex_supported_version)(void *btcoexist);
725 u32 (*btc_get_bt_phydm_version)(void *btcoexist);
726 void (*btc_phydm_modify_ra_pcr_threshold)(void *btcoexist,
727 u8 ra_offset_direction,
728 u8 ra_threshold_offset);
729 u32 (*btc_phydm_query_phy_counter)(void *btcoexist,
730 enum dm_info_query dm_id);
731 u8 (*btc_get_ant_det_val_from_bt)(void *btcoexist);
732 u8 (*btc_get_ble_scan_type_from_bt)(void *btcoexist);
733 u32 (*btc_get_ble_scan_para_from_bt)(void *btcoexist, u8 scan_type);
734 bool (*btc_get_bt_afh_map_from_bt)(void *btcoexist, u8 map_type,
735 u8 *afh_map);
736 };
737
738 bool halbtc_is_wifi_uplink(struct rtl_priv *adapter);
739
740 #define rtl_btc_coexist(rtlpriv) \
741 ((struct btc_coexist *)((rtlpriv)->btcoexist.btc_context))
742 #define rtl_btc_wifi_only(rtlpriv) \
743 ((struct wifi_only_cfg *)((rtlpriv)->btcoexist.wifi_only_context))
744
745 struct wifi_only_cfg;
746
747 bool exhalbtc_initlize_variables(struct rtl_priv *rtlpriv);
748 bool exhalbtc_initlize_variables_wifi_only(struct rtl_priv *rtlpriv);
749 bool exhalbtc_bind_bt_coex_withadapter(void *adapter);
750 void exhalbtc_power_on_setting(struct btc_coexist *btcoexist);
751 void exhalbtc_pre_load_firmware(struct btc_coexist *btcoexist);
752 void exhalbtc_init_hw_config(struct btc_coexist *btcoexist, bool wifi_only);
753 void exhalbtc_init_hw_config_wifi_only(struct wifi_only_cfg *wifionly_cfg);
754 void exhalbtc_init_coex_dm(struct btc_coexist *btcoexist);
755 void exhalbtc_ips_notify(struct btc_coexist *btcoexist, u8 type);
756 void exhalbtc_lps_notify(struct btc_coexist *btcoexist, u8 type);
757 void exhalbtc_scan_notify(struct btc_coexist *btcoexist, u8 type);
758 void exhalbtc_scan_notify_wifi_only(struct wifi_only_cfg *wifionly_cfg,
759 u8 is_5g);
760 void exhalbtc_connect_notify(struct btc_coexist *btcoexist, u8 action);
761 void exhalbtc_mediastatus_notify(struct btc_coexist *btcoexist,
762 enum rt_media_status media_status);
763 void exhalbtc_special_packet_notify(struct btc_coexist *btcoexist, u8 pkt_type);
764 void exhalbtc_bt_info_notify(struct btc_coexist *btcoexist, u8 *tmp_buf,
765 u8 length);
766 void exhalbtc_rf_status_notify(struct btc_coexist *btcoexist, u8 type);
767 void exhalbtc_halt_notify(struct btc_coexist *btcoexist);
768 void exhalbtc_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state);
769 void exhalbtc_coex_dm_switch(struct btc_coexist *btcoexist);
770 void exhalbtc_periodical(struct btc_coexist *btcoexist);
771 void exhalbtc_dbg_control(struct btc_coexist *btcoexist, u8 code, u8 len,
772 u8 *data);
773 void exhalbtc_antenna_detection(struct btc_coexist *btcoexist, u32 cent_freq,
774 u32 offset, u32 span, u32 seconds);
775 void exhalbtc_stack_update_profile_info(void);
776 void exhalbtc_set_hci_version(struct btc_coexist *btcoexist, u16 hci_version);
777 void exhalbtc_set_bt_patch_version(struct btc_coexist *btcoexist,
778 u16 bt_hci_version, u16 bt_patch_version);
779 void exhalbtc_update_min_bt_rssi(struct btc_coexist *btcoexist, s8 bt_rssi);
780 void exhalbtc_set_bt_exist(struct btc_coexist *btcoexist, bool bt_exist);
781 void exhalbtc_set_chip_type(struct btc_coexist *btcoexist, u8 chip_type);
782 void exhalbtc_set_ant_num(struct rtl_priv *rtlpriv, u8 type, u8 ant_num);
783 void exhalbtc_display_bt_coex_info(struct btc_coexist *btcoexist,
784 struct seq_file *m);
785 void exhalbtc_switch_band_notify(struct btc_coexist *btcoexist, u8 type);
786 void exhalbtc_switch_band_notify_wifi_only(struct wifi_only_cfg *wifionly_cfg,
787 u8 is_5g);
788 void exhalbtc_signal_compensation(struct btc_coexist *btcoexist,
789 u8 *rssi_wifi, u8 *rssi_bt);
790 void exhalbtc_lps_leave(struct btc_coexist *btcoexist);
791 void exhalbtc_low_wifi_traffic_notify(struct btc_coexist *btcoexist);
792 void exhalbtc_set_single_ant_path(struct btc_coexist *btcoexist,
793 u8 single_ant_path);
794 void halbtc_send_wifi_port_id_cmd(void *bt_context);
795 void halbtc_set_default_port_id_cmd(void *bt_context);
796
797
798 enum wifionly_chip_interface {
799 WIFIONLY_INTF_UNKNOWN = 0,
800 WIFIONLY_INTF_PCI = 1,
801 WIFIONLY_INTF_USB = 2,
802 WIFIONLY_INTF_SDIO = 3,
803 WIFIONLY_INTF_MAX
804 };
805
806 enum wifionly_customer_id {
807 CUSTOMER_NORMAL = 0,
808 CUSTOMER_HP_1 = 1,
809 };
810
811 struct wifi_only_haldata {
812 u16 customer_id;
813 u8 efuse_pg_antnum;
814 u8 efuse_pg_antpath;
815 u8 rfe_type;
816 u8 ant_div_cfg;
817 };
818
819 struct wifi_only_cfg {
820 void *adapter;
821 struct wifi_only_haldata haldata_info;
822 enum wifionly_chip_interface chip_interface;
823 };
824
825 static inline
826 void halwifionly_phy_set_bb_reg(struct wifi_only_cfg *wifi_conly_cfg,
827 u32 regaddr, u32 bitmask, u32 data)
828 {
829 struct rtl_priv *rtlpriv = (struct rtl_priv *)wifi_conly_cfg->adapter;
830
831 rtl_set_bbreg(rtlpriv->hw, regaddr, bitmask, data);
832 }
833
834 #endif