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2
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5 #ifndef __RTW_TX_H_
6 #define __RTW_TX_H_
7
8 #define RTK_TX_MAX_AGG_NUM_MASK 0x1f
9
10 #define RTW_TX_PROBE_TIMEOUT msecs_to_jiffies(500)
11
12 #define SET_TX_DESC_TXPKTSIZE(txdesc, value) \
13 le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(15, 0))
14 #define SET_TX_DESC_OFFSET(txdesc, value) \
15 le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(23, 16))
16 #define SET_TX_DESC_PKT_OFFSET(txdesc, value) \
17 le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(28, 24))
18 #define SET_TX_DESC_QSEL(txdesc, value) \
19 le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(12, 8))
20 #define SET_TX_DESC_BMC(txdesc, value) \
21 le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(24))
22 #define SET_TX_DESC_RATE_ID(txdesc, value) \
23 le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(20, 16))
24 #define SET_TX_DESC_DATARATE(txdesc, value) \
25 le32p_replace_bits((__le32 *)(txdesc) + 0x04, value, GENMASK(6, 0))
26 #define SET_TX_DESC_DISDATAFB(txdesc, value) \
27 le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(10))
28 #define SET_TX_DESC_USE_RATE(txdesc, value) \
29 le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(8))
30 #define SET_TX_DESC_SEC_TYPE(txdesc, value) \
31 le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(23, 22))
32 #define SET_TX_DESC_DATA_BW(txdesc, value) \
33 le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, GENMASK(6, 5))
34 #define SET_TX_DESC_SW_SEQ(txdesc, value) \
35 le32p_replace_bits((__le32 *)(txdesc) + 0x09, value, GENMASK(23, 12))
36 #define SET_TX_DESC_MAX_AGG_NUM(txdesc, value) \
37 le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(21, 17))
38 #define SET_TX_DESC_AMPDU_DENSITY(txdesc, value) \
39 le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, GENMASK(22, 20))
40 #define SET_TX_DESC_DATA_STBC(txdesc, value) \
41 le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, GENMASK(9, 8))
42 #define SET_TX_DESC_DATA_LDPC(txdesc, value) \
43 le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(7))
44 #define SET_TX_DESC_AGG_EN(txdesc, value) \
45 le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(12))
46 #define SET_TX_DESC_LS(txdesc, value) \
47 le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(26))
48 #define SET_TX_DESC_DATA_SHORT(txdesc, value) \
49 le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(4))
50 #define SET_TX_DESC_SPE_RPT(tx_desc, value) \
51 le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(19))
52 #define SET_TX_DESC_SW_DEFINE(tx_desc, value) \
53 le32p_replace_bits((__le32 *)(txdesc) + 0x06, value, GENMASK(11, 0))
54
55 enum rtw_tx_desc_queue_select {
56 TX_DESC_QSEL_TID0 = 0,
57 TX_DESC_QSEL_TID1 = 1,
58 TX_DESC_QSEL_TID2 = 2,
59 TX_DESC_QSEL_TID3 = 3,
60 TX_DESC_QSEL_TID4 = 4,
61 TX_DESC_QSEL_TID5 = 5,
62 TX_DESC_QSEL_TID6 = 6,
63 TX_DESC_QSEL_TID7 = 7,
64 TX_DESC_QSEL_TID8 = 8,
65 TX_DESC_QSEL_TID9 = 9,
66 TX_DESC_QSEL_TID10 = 10,
67 TX_DESC_QSEL_TID11 = 11,
68 TX_DESC_QSEL_TID12 = 12,
69 TX_DESC_QSEL_TID13 = 13,
70 TX_DESC_QSEL_TID14 = 14,
71 TX_DESC_QSEL_TID15 = 15,
72 TX_DESC_QSEL_BEACON = 16,
73 TX_DESC_QSEL_HIGH = 17,
74 TX_DESC_QSEL_MGMT = 18,
75 TX_DESC_QSEL_H2C = 19,
76 };
77
78 void rtw_tx_pkt_info_update(struct rtw_dev *rtwdev,
79 struct rtw_tx_pkt_info *pkt_info,
80 struct ieee80211_tx_control *control,
81 struct sk_buff *skb);
82 void rtw_tx_fill_tx_desc(struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb);
83 void rtw_tx_report_enqueue(struct rtw_dev *rtwdev, struct sk_buff *skb, u8 sn);
84 void rtw_tx_report_handle(struct rtw_dev *rtwdev, struct sk_buff *skb);
85 void rtw_rsvd_page_pkt_info_update(struct rtw_dev *rtwdev,
86 struct rtw_tx_pkt_info *pkt_info,
87 struct sk_buff *skb);
88
89 #endif