This source file includes following definitions.
- rtw_vif_watch_dog_iter
- rtw_watch_dog_work
- rtw_c2h_work
- rtw_get_channel_params
- rtw_set_channel
- rtw_vif_write_addr
- rtw_vif_port_config
- hw_bw_cap_to_bitamp
- rtw_hw_config_rf_ant_num
- get_vht_ra_mask
- get_rate_id
- rtw_update_sta_info
- rtw_power_on
- rtw_core_start
- rtw_power_off
- rtw_core_stop
- rtw_init_ht_cap
- rtw_init_vht_cap
- rtw_set_supported_band
- rtw_unset_supported_band
- rtw_load_firmware_cb
- rtw_load_firmware
- rtw_chip_parameter_setup
- rtw_chip_efuse_enable
- rtw_dump_hw_feature
- rtw_chip_efuse_disable
- rtw_chip_efuse_info_setup
- rtw_chip_board_info_setup
- rtw_chip_info_setup
- rtw_core_init
- rtw_core_deinit
- rtw_register_hw
- rtw_unregister_hw
1
2
3
4
5 #include "main.h"
6 #include "regd.h"
7 #include "fw.h"
8 #include "ps.h"
9 #include "sec.h"
10 #include "mac.h"
11 #include "coex.h"
12 #include "phy.h"
13 #include "reg.h"
14 #include "efuse.h"
15 #include "debug.h"
16
17 static bool rtw_fw_support_lps;
18 unsigned int rtw_debug_mask;
19 EXPORT_SYMBOL(rtw_debug_mask);
20
21 module_param_named(support_lps, rtw_fw_support_lps, bool, 0644);
22 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
23
24 MODULE_PARM_DESC(support_lps, "Set Y to enable Leisure Power Save support, to turn radio off between beacons");
25 MODULE_PARM_DESC(debug_mask, "Debugging mask");
26
27 static struct ieee80211_channel rtw_channeltable_2g[] = {
28 {.center_freq = 2412, .hw_value = 1,},
29 {.center_freq = 2417, .hw_value = 2,},
30 {.center_freq = 2422, .hw_value = 3,},
31 {.center_freq = 2427, .hw_value = 4,},
32 {.center_freq = 2432, .hw_value = 5,},
33 {.center_freq = 2437, .hw_value = 6,},
34 {.center_freq = 2442, .hw_value = 7,},
35 {.center_freq = 2447, .hw_value = 8,},
36 {.center_freq = 2452, .hw_value = 9,},
37 {.center_freq = 2457, .hw_value = 10,},
38 {.center_freq = 2462, .hw_value = 11,},
39 {.center_freq = 2467, .hw_value = 12,},
40 {.center_freq = 2472, .hw_value = 13,},
41 {.center_freq = 2484, .hw_value = 14,},
42 };
43
44 static struct ieee80211_channel rtw_channeltable_5g[] = {
45 {.center_freq = 5180, .hw_value = 36,},
46 {.center_freq = 5200, .hw_value = 40,},
47 {.center_freq = 5220, .hw_value = 44,},
48 {.center_freq = 5240, .hw_value = 48,},
49 {.center_freq = 5260, .hw_value = 52,},
50 {.center_freq = 5280, .hw_value = 56,},
51 {.center_freq = 5300, .hw_value = 60,},
52 {.center_freq = 5320, .hw_value = 64,},
53 {.center_freq = 5500, .hw_value = 100,},
54 {.center_freq = 5520, .hw_value = 104,},
55 {.center_freq = 5540, .hw_value = 108,},
56 {.center_freq = 5560, .hw_value = 112,},
57 {.center_freq = 5580, .hw_value = 116,},
58 {.center_freq = 5600, .hw_value = 120,},
59 {.center_freq = 5620, .hw_value = 124,},
60 {.center_freq = 5640, .hw_value = 128,},
61 {.center_freq = 5660, .hw_value = 132,},
62 {.center_freq = 5680, .hw_value = 136,},
63 {.center_freq = 5700, .hw_value = 140,},
64 {.center_freq = 5745, .hw_value = 149,},
65 {.center_freq = 5765, .hw_value = 153,},
66 {.center_freq = 5785, .hw_value = 157,},
67 {.center_freq = 5805, .hw_value = 161,},
68 {.center_freq = 5825, .hw_value = 165,
69 .flags = IEEE80211_CHAN_NO_HT40MINUS},
70 };
71
72 static struct ieee80211_rate rtw_ratetable[] = {
73 {.bitrate = 10, .hw_value = 0x00,},
74 {.bitrate = 20, .hw_value = 0x01,},
75 {.bitrate = 55, .hw_value = 0x02,},
76 {.bitrate = 110, .hw_value = 0x03,},
77 {.bitrate = 60, .hw_value = 0x04,},
78 {.bitrate = 90, .hw_value = 0x05,},
79 {.bitrate = 120, .hw_value = 0x06,},
80 {.bitrate = 180, .hw_value = 0x07,},
81 {.bitrate = 240, .hw_value = 0x08,},
82 {.bitrate = 360, .hw_value = 0x09,},
83 {.bitrate = 480, .hw_value = 0x0a,},
84 {.bitrate = 540, .hw_value = 0x0b,},
85 };
86
87 static struct ieee80211_supported_band rtw_band_2ghz = {
88 .band = NL80211_BAND_2GHZ,
89
90 .channels = rtw_channeltable_2g,
91 .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
92
93 .bitrates = rtw_ratetable,
94 .n_bitrates = ARRAY_SIZE(rtw_ratetable),
95
96 .ht_cap = {0},
97 .vht_cap = {0},
98 };
99
100 static struct ieee80211_supported_band rtw_band_5ghz = {
101 .band = NL80211_BAND_5GHZ,
102
103 .channels = rtw_channeltable_5g,
104 .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
105
106
107 .bitrates = rtw_ratetable + 4,
108 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
109
110 .ht_cap = {0},
111 .vht_cap = {0},
112 };
113
114 struct rtw_watch_dog_iter_data {
115 struct rtw_vif *rtwvif;
116 bool active;
117 u8 assoc_cnt;
118 };
119
120 static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
121 struct ieee80211_vif *vif)
122 {
123 struct rtw_watch_dog_iter_data *iter_data = data;
124 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
125
126 if (vif->type == NL80211_IFTYPE_STATION) {
127 if (vif->bss_conf.assoc) {
128 iter_data->assoc_cnt++;
129 iter_data->rtwvif = rtwvif;
130 }
131 if (rtwvif->stats.tx_cnt > RTW_LPS_THRESHOLD ||
132 rtwvif->stats.rx_cnt > RTW_LPS_THRESHOLD)
133 iter_data->active = true;
134 } else {
135
136 iter_data->active = true;
137 }
138
139 rtwvif->stats.tx_unicast = 0;
140 rtwvif->stats.rx_unicast = 0;
141 rtwvif->stats.tx_cnt = 0;
142 rtwvif->stats.rx_cnt = 0;
143 }
144
145
146
147
148 static void rtw_watch_dog_work(struct work_struct *work)
149 {
150 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
151 watch_dog_work.work);
152 struct rtw_watch_dog_iter_data data = {};
153 bool busy_traffic = rtw_flag_check(rtwdev, RTW_FLAG_BUSY_TRAFFIC);
154
155 if (!rtw_flag_check(rtwdev, RTW_FLAG_RUNNING))
156 return;
157
158 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
159 RTW_WATCH_DOG_DELAY_TIME);
160
161 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
162 rtw_flag_set(rtwdev, RTW_FLAG_BUSY_TRAFFIC);
163 else
164 rtw_flag_clear(rtwdev, RTW_FLAG_BUSY_TRAFFIC);
165
166 if (busy_traffic != rtw_flag_check(rtwdev, RTW_FLAG_BUSY_TRAFFIC))
167 rtw_coex_wl_status_change_notify(rtwdev);
168
169
170 rtwdev->stats.tx_unicast = 0;
171 rtwdev->stats.rx_unicast = 0;
172 rtwdev->stats.tx_cnt = 0;
173 rtwdev->stats.rx_cnt = 0;
174
175
176 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data);
177
178
179
180
181
182 if (rtw_fw_support_lps &&
183 data.rtwvif && !data.active && data.assoc_cnt == 1)
184 rtw_enter_lps(rtwdev, data.rtwvif);
185
186 if (rtw_flag_check(rtwdev, RTW_FLAG_SCANNING))
187 return;
188
189 rtw_phy_dynamic_mechanism(rtwdev);
190
191 rtwdev->watch_dog_cnt++;
192 }
193
194 static void rtw_c2h_work(struct work_struct *work)
195 {
196 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
197 struct sk_buff *skb, *tmp;
198
199 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
200 skb_unlink(skb, &rtwdev->c2h_queue);
201 rtw_fw_c2h_cmd_handle(rtwdev, skb);
202 dev_kfree_skb_any(skb);
203 }
204 }
205
206 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
207 struct rtw_channel_params *chan_params)
208 {
209 struct ieee80211_channel *channel = chandef->chan;
210 enum nl80211_chan_width width = chandef->width;
211 u8 *cch_by_bw = chan_params->cch_by_bw;
212 u32 primary_freq, center_freq;
213 u8 center_chan;
214 u8 bandwidth = RTW_CHANNEL_WIDTH_20;
215 u8 primary_chan_idx = 0;
216 u8 i;
217
218 center_chan = channel->hw_value;
219 primary_freq = channel->center_freq;
220 center_freq = chandef->center_freq1;
221
222
223 cch_by_bw[RTW_CHANNEL_WIDTH_20] = channel->hw_value;
224
225 switch (width) {
226 case NL80211_CHAN_WIDTH_20_NOHT:
227 case NL80211_CHAN_WIDTH_20:
228 bandwidth = RTW_CHANNEL_WIDTH_20;
229 primary_chan_idx = 0;
230 break;
231 case NL80211_CHAN_WIDTH_40:
232 bandwidth = RTW_CHANNEL_WIDTH_40;
233 if (primary_freq > center_freq) {
234 primary_chan_idx = 1;
235 center_chan -= 2;
236 } else {
237 primary_chan_idx = 2;
238 center_chan += 2;
239 }
240 break;
241 case NL80211_CHAN_WIDTH_80:
242 bandwidth = RTW_CHANNEL_WIDTH_80;
243 if (primary_freq > center_freq) {
244 if (primary_freq - center_freq == 10) {
245 primary_chan_idx = 1;
246 center_chan -= 2;
247 } else {
248 primary_chan_idx = 3;
249 center_chan -= 6;
250 }
251
252
253
254 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan + 4;
255 } else {
256 if (center_freq - primary_freq == 10) {
257 primary_chan_idx = 2;
258 center_chan += 2;
259 } else {
260 primary_chan_idx = 4;
261 center_chan += 6;
262 }
263
264
265
266 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan - 4;
267 }
268 break;
269 default:
270 center_chan = 0;
271 break;
272 }
273
274 chan_params->center_chan = center_chan;
275 chan_params->bandwidth = bandwidth;
276 chan_params->primary_chan_idx = primary_chan_idx;
277
278
279 cch_by_bw[bandwidth] = center_chan;
280
281 for (i = bandwidth + 1; i <= RTW_MAX_CHANNEL_WIDTH; i++)
282 cch_by_bw[i] = 0;
283 }
284
285 void rtw_set_channel(struct rtw_dev *rtwdev)
286 {
287 struct ieee80211_hw *hw = rtwdev->hw;
288 struct rtw_hal *hal = &rtwdev->hal;
289 struct rtw_chip_info *chip = rtwdev->chip;
290 struct rtw_channel_params ch_param;
291 u8 center_chan, bandwidth, primary_chan_idx;
292 u8 i;
293
294 rtw_get_channel_params(&hw->conf.chandef, &ch_param);
295 if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
296 return;
297
298 center_chan = ch_param.center_chan;
299 bandwidth = ch_param.bandwidth;
300 primary_chan_idx = ch_param.primary_chan_idx;
301
302 hal->current_band_width = bandwidth;
303 hal->current_channel = center_chan;
304 hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
305
306 for (i = RTW_CHANNEL_WIDTH_20; i <= RTW_MAX_CHANNEL_WIDTH; i++)
307 hal->cch_by_bw[i] = ch_param.cch_by_bw[i];
308
309 chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx);
310
311 if (hal->current_band_type == RTW_BAND_5G) {
312 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
313 } else {
314 if (rtw_flag_check(rtwdev, RTW_FLAG_SCANNING))
315 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
316 else
317 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
318 }
319
320 rtw_phy_set_tx_power_level(rtwdev, center_chan);
321 }
322
323 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
324 {
325 int i;
326
327 for (i = 0; i < ETH_ALEN; i++)
328 rtw_write8(rtwdev, start + i, addr[i]);
329 }
330
331 void rtw_vif_port_config(struct rtw_dev *rtwdev,
332 struct rtw_vif *rtwvif,
333 u32 config)
334 {
335 u32 addr, mask;
336
337 if (config & PORT_SET_MAC_ADDR) {
338 addr = rtwvif->conf->mac_addr.addr;
339 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
340 }
341 if (config & PORT_SET_BSSID) {
342 addr = rtwvif->conf->bssid.addr;
343 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
344 }
345 if (config & PORT_SET_NET_TYPE) {
346 addr = rtwvif->conf->net_type.addr;
347 mask = rtwvif->conf->net_type.mask;
348 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
349 }
350 if (config & PORT_SET_AID) {
351 addr = rtwvif->conf->aid.addr;
352 mask = rtwvif->conf->aid.mask;
353 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
354 }
355 if (config & PORT_SET_BCN_CTRL) {
356 addr = rtwvif->conf->bcn_ctrl.addr;
357 mask = rtwvif->conf->bcn_ctrl.mask;
358 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
359 }
360 }
361
362 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
363 {
364 u8 bw = 0;
365
366 switch (bw_cap) {
367 case EFUSE_HW_CAP_IGNORE:
368 case EFUSE_HW_CAP_SUPP_BW80:
369 bw |= BIT(RTW_CHANNEL_WIDTH_80);
370
371 case EFUSE_HW_CAP_SUPP_BW40:
372 bw |= BIT(RTW_CHANNEL_WIDTH_40);
373
374 default:
375 bw |= BIT(RTW_CHANNEL_WIDTH_20);
376 break;
377 }
378
379 return bw;
380 }
381
382 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
383 {
384 struct rtw_hal *hal = &rtwdev->hal;
385
386 if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
387 hw_ant_num >= hal->rf_path_num)
388 return;
389
390 switch (hw_ant_num) {
391 case 1:
392 hal->rf_type = RF_1T1R;
393 hal->rf_path_num = 1;
394 hal->antenna_tx = BB_PATH_A;
395 hal->antenna_rx = BB_PATH_A;
396 break;
397 default:
398 WARN(1, "invalid hw configuration from efuse\n");
399 break;
400 }
401 }
402
403 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
404 {
405 u64 ra_mask = 0;
406 u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map);
407 u8 vht_mcs_cap;
408 int i, nss;
409
410
411 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
412 vht_mcs_cap = mcs_map & 0x3;
413 switch (vht_mcs_cap) {
414 case 2:
415 ra_mask |= 0x3ffULL << nss;
416 break;
417 case 1:
418 ra_mask |= 0x1ffULL << nss;
419 break;
420 case 0:
421 ra_mask |= 0x0ffULL << nss;
422 break;
423 default:
424 break;
425 }
426 }
427
428 return ra_mask;
429 }
430
431 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
432 {
433 u8 rate_id = 0;
434
435 switch (wireless_set) {
436 case WIRELESS_CCK:
437 rate_id = RTW_RATEID_B_20M;
438 break;
439 case WIRELESS_OFDM:
440 rate_id = RTW_RATEID_G;
441 break;
442 case WIRELESS_CCK | WIRELESS_OFDM:
443 rate_id = RTW_RATEID_BG;
444 break;
445 case WIRELESS_OFDM | WIRELESS_HT:
446 if (tx_num == 1)
447 rate_id = RTW_RATEID_GN_N1SS;
448 else if (tx_num == 2)
449 rate_id = RTW_RATEID_GN_N2SS;
450 else if (tx_num == 3)
451 rate_id = RTW_RATEID_ARFR5_N_3SS;
452 break;
453 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
454 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
455 if (tx_num == 1)
456 rate_id = RTW_RATEID_BGN_40M_1SS;
457 else if (tx_num == 2)
458 rate_id = RTW_RATEID_BGN_40M_2SS;
459 else if (tx_num == 3)
460 rate_id = RTW_RATEID_ARFR5_N_3SS;
461 else if (tx_num == 4)
462 rate_id = RTW_RATEID_ARFR7_N_4SS;
463 } else {
464 if (tx_num == 1)
465 rate_id = RTW_RATEID_BGN_20M_1SS;
466 else if (tx_num == 2)
467 rate_id = RTW_RATEID_BGN_20M_2SS;
468 else if (tx_num == 3)
469 rate_id = RTW_RATEID_ARFR5_N_3SS;
470 else if (tx_num == 4)
471 rate_id = RTW_RATEID_ARFR7_N_4SS;
472 }
473 break;
474 case WIRELESS_OFDM | WIRELESS_VHT:
475 if (tx_num == 1)
476 rate_id = RTW_RATEID_ARFR1_AC_1SS;
477 else if (tx_num == 2)
478 rate_id = RTW_RATEID_ARFR0_AC_2SS;
479 else if (tx_num == 3)
480 rate_id = RTW_RATEID_ARFR4_AC_3SS;
481 else if (tx_num == 4)
482 rate_id = RTW_RATEID_ARFR6_AC_4SS;
483 break;
484 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
485 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
486 if (tx_num == 1)
487 rate_id = RTW_RATEID_ARFR1_AC_1SS;
488 else if (tx_num == 2)
489 rate_id = RTW_RATEID_ARFR0_AC_2SS;
490 else if (tx_num == 3)
491 rate_id = RTW_RATEID_ARFR4_AC_3SS;
492 else if (tx_num == 4)
493 rate_id = RTW_RATEID_ARFR6_AC_4SS;
494 } else {
495 if (tx_num == 1)
496 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
497 else if (tx_num == 2)
498 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
499 else if (tx_num == 3)
500 rate_id = RTW_RATEID_ARFR4_AC_3SS;
501 else if (tx_num == 4)
502 rate_id = RTW_RATEID_ARFR6_AC_4SS;
503 }
504 break;
505 default:
506 break;
507 }
508
509 return rate_id;
510 }
511
512 #define RA_MASK_CCK_RATES 0x0000f
513 #define RA_MASK_OFDM_RATES 0x00ff0
514 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0)
515 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8)
516 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16)
517 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \
518 RA_MASK_HT_RATES_2SS | \
519 RA_MASK_HT_RATES_3SS)
520 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0)
521 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10)
522 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20)
523 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \
524 RA_MASK_VHT_RATES_2SS | \
525 RA_MASK_VHT_RATES_3SS)
526 #define RA_MASK_CCK_IN_HT 0x00005
527 #define RA_MASK_CCK_IN_VHT 0x00005
528 #define RA_MASK_OFDM_IN_VHT 0x00010
529 #define RA_MASK_OFDM_IN_HT_2G 0x00010
530 #define RA_MASK_OFDM_IN_HT_5G 0x00030
531
532 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)
533 {
534 struct ieee80211_sta *sta = si->sta;
535 struct rtw_efuse *efuse = &rtwdev->efuse;
536 struct rtw_hal *hal = &rtwdev->hal;
537 u8 rssi_level;
538 u8 wireless_set;
539 u8 bw_mode;
540 u8 rate_id;
541 u8 rf_type = RF_1T1R;
542 u8 stbc_en = 0;
543 u8 ldpc_en = 0;
544 u8 tx_num = 1;
545 u64 ra_mask = 0;
546 bool is_vht_enable = false;
547 bool is_support_sgi = false;
548
549 if (sta->vht_cap.vht_supported) {
550 is_vht_enable = true;
551 ra_mask |= get_vht_ra_mask(sta);
552 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
553 stbc_en = VHT_STBC_EN;
554 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
555 ldpc_en = VHT_LDPC_EN;
556 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
557 is_support_sgi = true;
558 } else if (sta->ht_cap.ht_supported) {
559 ra_mask |= (sta->ht_cap.mcs.rx_mask[1] << 20) |
560 (sta->ht_cap.mcs.rx_mask[0] << 12);
561 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
562 stbc_en = HT_STBC_EN;
563 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
564 ldpc_en = HT_LDPC_EN;
565 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20 ||
566 sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
567 is_support_sgi = true;
568 }
569
570 if (efuse->hw_cap.nss == 1)
571 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
572
573 if (hal->current_band_type == RTW_BAND_5G) {
574 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4;
575 if (sta->vht_cap.vht_supported) {
576 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
577 wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
578 } else if (sta->ht_cap.ht_supported) {
579 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
580 wireless_set = WIRELESS_OFDM | WIRELESS_HT;
581 } else {
582 wireless_set = WIRELESS_OFDM;
583 }
584 } else if (hal->current_band_type == RTW_BAND_2G) {
585 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ];
586 if (sta->vht_cap.vht_supported) {
587 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
588 RA_MASK_OFDM_IN_VHT;
589 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
590 WIRELESS_HT | WIRELESS_VHT;
591 } else if (sta->ht_cap.ht_supported) {
592 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
593 RA_MASK_OFDM_IN_HT_2G;
594 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
595 WIRELESS_HT;
596 } else if (sta->supp_rates[0] <= 0xf) {
597 wireless_set = WIRELESS_CCK;
598 } else {
599 wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
600 }
601 } else {
602 rtw_err(rtwdev, "Unknown band type\n");
603 wireless_set = 0;
604 }
605
606 switch (sta->bandwidth) {
607 case IEEE80211_STA_RX_BW_80:
608 bw_mode = RTW_CHANNEL_WIDTH_80;
609 break;
610 case IEEE80211_STA_RX_BW_40:
611 bw_mode = RTW_CHANNEL_WIDTH_40;
612 break;
613 default:
614 bw_mode = RTW_CHANNEL_WIDTH_20;
615 break;
616 }
617
618 if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) {
619 tx_num = 2;
620 rf_type = RF_2T2R;
621 } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) {
622 tx_num = 2;
623 rf_type = RF_2T2R;
624 }
625
626 rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
627
628 if (wireless_set != WIRELESS_CCK) {
629 rssi_level = si->rssi_level;
630 if (rssi_level == 0)
631 ra_mask &= 0xffffffffffffffffULL;
632 else if (rssi_level == 1)
633 ra_mask &= 0xfffffffffffffff0ULL;
634 else if (rssi_level == 2)
635 ra_mask &= 0xffffffffffffefe0ULL;
636 else if (rssi_level == 3)
637 ra_mask &= 0xffffffffffffcfc0ULL;
638 else if (rssi_level == 4)
639 ra_mask &= 0xffffffffffff8f80ULL;
640 else if (rssi_level >= 5)
641 ra_mask &= 0xffffffffffff0f00ULL;
642 }
643
644 si->bw_mode = bw_mode;
645 si->stbc_en = stbc_en;
646 si->ldpc_en = ldpc_en;
647 si->rf_type = rf_type;
648 si->wireless_set = wireless_set;
649 si->sgi_enable = is_support_sgi;
650 si->vht_enable = is_vht_enable;
651 si->ra_mask = ra_mask;
652 si->rate_id = rate_id;
653
654 rtw_fw_send_ra_info(rtwdev, si);
655 }
656
657 static int rtw_power_on(struct rtw_dev *rtwdev)
658 {
659 struct rtw_chip_info *chip = rtwdev->chip;
660 struct rtw_fw_state *fw = &rtwdev->fw;
661 bool wifi_only;
662 int ret;
663
664 ret = rtw_hci_setup(rtwdev);
665 if (ret) {
666 rtw_err(rtwdev, "failed to setup hci\n");
667 goto err;
668 }
669
670
671 ret = rtw_mac_power_on(rtwdev);
672 if (ret) {
673 rtw_err(rtwdev, "failed to power on mac\n");
674 goto err;
675 }
676
677 wait_for_completion(&fw->completion);
678 if (!fw->firmware) {
679 ret = -EINVAL;
680 rtw_err(rtwdev, "failed to load firmware\n");
681 goto err;
682 }
683
684 ret = rtw_download_firmware(rtwdev, fw);
685 if (ret) {
686 rtw_err(rtwdev, "failed to download firmware\n");
687 goto err_off;
688 }
689
690
691 ret = rtw_mac_init(rtwdev);
692 if (ret) {
693 rtw_err(rtwdev, "failed to configure mac\n");
694 goto err_off;
695 }
696
697 chip->ops->phy_set_param(rtwdev);
698
699 ret = rtw_hci_start(rtwdev);
700 if (ret) {
701 rtw_err(rtwdev, "failed to start hci\n");
702 goto err_off;
703 }
704
705
706 rtw_fw_send_general_info(rtwdev);
707 rtw_fw_send_phydm_info(rtwdev);
708
709 wifi_only = !rtwdev->efuse.btcoex;
710 rtw_coex_power_on_setting(rtwdev);
711 rtw_coex_init_hw_config(rtwdev, wifi_only);
712
713 return 0;
714
715 err_off:
716 rtw_mac_power_off(rtwdev);
717
718 err:
719 return ret;
720 }
721
722 int rtw_core_start(struct rtw_dev *rtwdev)
723 {
724 int ret;
725
726 ret = rtw_power_on(rtwdev);
727 if (ret)
728 return ret;
729
730 rtw_sec_enable_sec_engine(rtwdev);
731
732
733 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
734
735 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
736 RTW_WATCH_DOG_DELAY_TIME);
737
738 rtw_flag_set(rtwdev, RTW_FLAG_RUNNING);
739
740 return 0;
741 }
742
743 static void rtw_power_off(struct rtw_dev *rtwdev)
744 {
745 rtwdev->hci.ops->stop(rtwdev);
746 rtw_mac_power_off(rtwdev);
747 }
748
749 void rtw_core_stop(struct rtw_dev *rtwdev)
750 {
751 struct rtw_coex *coex = &rtwdev->coex;
752
753 rtw_flag_clear(rtwdev, RTW_FLAG_RUNNING);
754 rtw_flag_clear(rtwdev, RTW_FLAG_FW_RUNNING);
755
756 cancel_delayed_work_sync(&rtwdev->watch_dog_work);
757 cancel_delayed_work_sync(&coex->bt_relink_work);
758 cancel_delayed_work_sync(&coex->bt_reenable_work);
759 cancel_delayed_work_sync(&coex->defreeze_work);
760
761 rtw_power_off(rtwdev);
762 }
763
764 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
765 struct ieee80211_sta_ht_cap *ht_cap)
766 {
767 struct rtw_efuse *efuse = &rtwdev->efuse;
768
769 ht_cap->ht_supported = true;
770 ht_cap->cap = 0;
771 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
772 IEEE80211_HT_CAP_MAX_AMSDU |
773 IEEE80211_HT_CAP_LDPC_CODING |
774 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
775 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
776 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
777 IEEE80211_HT_CAP_DSSSCCK40 |
778 IEEE80211_HT_CAP_SGI_40;
779 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
780 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16;
781 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
782 if (efuse->hw_cap.nss > 1) {
783 ht_cap->mcs.rx_mask[0] = 0xFF;
784 ht_cap->mcs.rx_mask[1] = 0xFF;
785 ht_cap->mcs.rx_mask[4] = 0x01;
786 ht_cap->mcs.rx_highest = cpu_to_le16(300);
787 } else {
788 ht_cap->mcs.rx_mask[0] = 0xFF;
789 ht_cap->mcs.rx_mask[1] = 0x00;
790 ht_cap->mcs.rx_mask[4] = 0x01;
791 ht_cap->mcs.rx_highest = cpu_to_le16(150);
792 }
793 }
794
795 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
796 struct ieee80211_sta_vht_cap *vht_cap)
797 {
798 struct rtw_efuse *efuse = &rtwdev->efuse;
799 u16 mcs_map;
800 __le16 highest;
801
802 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
803 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
804 return;
805
806 vht_cap->vht_supported = true;
807 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
808 IEEE80211_VHT_CAP_RXLDPC |
809 IEEE80211_VHT_CAP_SHORT_GI_80 |
810 IEEE80211_VHT_CAP_TXSTBC |
811 IEEE80211_VHT_CAP_RXSTBC_1 |
812 IEEE80211_VHT_CAP_HTC_VHT |
813 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
814 0;
815 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
816 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
817 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
818 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
819 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
820 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
821 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
822 if (efuse->hw_cap.nss > 1) {
823 highest = cpu_to_le16(780);
824 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
825 } else {
826 highest = cpu_to_le16(390);
827 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
828 }
829
830 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
831 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
832 vht_cap->vht_mcs.rx_highest = highest;
833 vht_cap->vht_mcs.tx_highest = highest;
834 }
835
836 static void rtw_set_supported_band(struct ieee80211_hw *hw,
837 struct rtw_chip_info *chip)
838 {
839 struct rtw_dev *rtwdev = hw->priv;
840 struct ieee80211_supported_band *sband;
841
842 if (chip->band & RTW_BAND_2G) {
843 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
844 if (!sband)
845 goto err_out;
846 if (chip->ht_supported)
847 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
848 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
849 }
850
851 if (chip->band & RTW_BAND_5G) {
852 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
853 if (!sband)
854 goto err_out;
855 if (chip->ht_supported)
856 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
857 if (chip->vht_supported)
858 rtw_init_vht_cap(rtwdev, &sband->vht_cap);
859 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
860 }
861
862 return;
863
864 err_out:
865 rtw_err(rtwdev, "failed to set supported band\n");
866 kfree(sband);
867 }
868
869 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
870 struct rtw_chip_info *chip)
871 {
872 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
873 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
874 }
875
876 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
877 {
878 struct rtw_dev *rtwdev = context;
879 struct rtw_fw_state *fw = &rtwdev->fw;
880
881 if (!firmware)
882 rtw_err(rtwdev, "failed to request firmware\n");
883
884 fw->firmware = firmware;
885 complete_all(&fw->completion);
886 }
887
888 static int rtw_load_firmware(struct rtw_dev *rtwdev, const char *fw_name)
889 {
890 struct rtw_fw_state *fw = &rtwdev->fw;
891 int ret;
892
893 init_completion(&fw->completion);
894
895 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
896 GFP_KERNEL, rtwdev, rtw_load_firmware_cb);
897 if (ret) {
898 rtw_err(rtwdev, "async firmware request failed\n");
899 return ret;
900 }
901
902 return 0;
903 }
904
905 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
906 {
907 struct rtw_chip_info *chip = rtwdev->chip;
908 struct rtw_hal *hal = &rtwdev->hal;
909 struct rtw_efuse *efuse = &rtwdev->efuse;
910 int ret = 0;
911
912 switch (rtw_hci_type(rtwdev)) {
913 case RTW_HCI_TYPE_PCIE:
914 rtwdev->hci.rpwm_addr = 0x03d9;
915 break;
916 default:
917 rtw_err(rtwdev, "unsupported hci type\n");
918 return -EINVAL;
919 }
920
921 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
922 hal->fab_version = BIT_GET_VENDOR_ID(hal->chip_version) >> 2;
923 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
924 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
925 if (hal->chip_version & BIT_RF_TYPE_ID) {
926 hal->rf_type = RF_2T2R;
927 hal->rf_path_num = 2;
928 hal->antenna_tx = BB_PATH_AB;
929 hal->antenna_rx = BB_PATH_AB;
930 } else {
931 hal->rf_type = RF_1T1R;
932 hal->rf_path_num = 1;
933 hal->antenna_tx = BB_PATH_A;
934 hal->antenna_rx = BB_PATH_A;
935 }
936
937 if (hal->fab_version == 2)
938 hal->fab_version = 1;
939 else if (hal->fab_version == 1)
940 hal->fab_version = 2;
941
942 efuse->physical_size = chip->phy_efuse_size;
943 efuse->logical_size = chip->log_efuse_size;
944 efuse->protect_size = chip->ptct_efuse_size;
945
946
947 rtwdev->hal.rcr |= BIT_VHT_DACK;
948
949 return ret;
950 }
951
952 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
953 {
954 struct rtw_fw_state *fw = &rtwdev->fw;
955 int ret;
956
957 ret = rtw_hci_setup(rtwdev);
958 if (ret) {
959 rtw_err(rtwdev, "failed to setup hci\n");
960 goto err;
961 }
962
963 ret = rtw_mac_power_on(rtwdev);
964 if (ret) {
965 rtw_err(rtwdev, "failed to power on mac\n");
966 goto err;
967 }
968
969 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
970
971 wait_for_completion(&fw->completion);
972 if (!fw->firmware) {
973 ret = -EINVAL;
974 rtw_err(rtwdev, "failed to load firmware\n");
975 goto err;
976 }
977
978 ret = rtw_download_firmware(rtwdev, fw);
979 if (ret) {
980 rtw_err(rtwdev, "failed to download firmware\n");
981 goto err_off;
982 }
983
984 return 0;
985
986 err_off:
987 rtw_mac_power_off(rtwdev);
988
989 err:
990 return ret;
991 }
992
993 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
994 {
995 struct rtw_efuse *efuse = &rtwdev->efuse;
996 u8 hw_feature[HW_FEATURE_LEN];
997 u8 id;
998 u8 bw;
999 int i;
1000
1001 id = rtw_read8(rtwdev, REG_C2HEVT);
1002 if (id != C2H_HW_FEATURE_REPORT) {
1003 rtw_err(rtwdev, "failed to read hw feature report\n");
1004 return -EBUSY;
1005 }
1006
1007 for (i = 0; i < HW_FEATURE_LEN; i++)
1008 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
1009
1010 rtw_write8(rtwdev, REG_C2HEVT, 0);
1011
1012 bw = GET_EFUSE_HW_CAP_BW(hw_feature);
1013 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1014 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1015 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1016 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1017 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1018
1019 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1020
1021 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
1022 efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
1023 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1024
1025 rtw_dbg(rtwdev, RTW_DBG_EFUSE,
1026 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
1027 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1028 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1029
1030 return 0;
1031 }
1032
1033 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
1034 {
1035 rtw_hci_stop(rtwdev);
1036 rtw_mac_power_off(rtwdev);
1037 }
1038
1039 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
1040 {
1041 struct rtw_efuse *efuse = &rtwdev->efuse;
1042 int ret;
1043
1044 mutex_lock(&rtwdev->mutex);
1045
1046
1047 ret = rtw_chip_efuse_enable(rtwdev);
1048 if (ret)
1049 goto out_unlock;
1050
1051 ret = rtw_parse_efuse_map(rtwdev);
1052 if (ret)
1053 goto out_disable;
1054
1055 ret = rtw_dump_hw_feature(rtwdev);
1056 if (ret)
1057 goto out_disable;
1058
1059 ret = rtw_check_supported_rfe(rtwdev);
1060 if (ret)
1061 goto out_disable;
1062
1063 if (efuse->crystal_cap == 0xff)
1064 efuse->crystal_cap = 0;
1065 if (efuse->pa_type_2g == 0xff)
1066 efuse->pa_type_2g = 0;
1067 if (efuse->pa_type_5g == 0xff)
1068 efuse->pa_type_5g = 0;
1069 if (efuse->lna_type_2g == 0xff)
1070 efuse->lna_type_2g = 0;
1071 if (efuse->lna_type_5g == 0xff)
1072 efuse->lna_type_5g = 0;
1073 if (efuse->channel_plan == 0xff)
1074 efuse->channel_plan = 0x7f;
1075 if (efuse->rf_board_option == 0xff)
1076 efuse->rf_board_option = 0;
1077 if (efuse->bt_setting & BIT(0))
1078 efuse->share_ant = true;
1079 if (efuse->regd == 0xff)
1080 efuse->regd = 0;
1081
1082 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
1083 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1084 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1085 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1086 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1087
1088 out_disable:
1089 rtw_chip_efuse_disable(rtwdev);
1090
1091 out_unlock:
1092 mutex_unlock(&rtwdev->mutex);
1093 return ret;
1094 }
1095
1096 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
1097 {
1098 struct rtw_hal *hal = &rtwdev->hal;
1099 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
1100
1101 if (!rfe_def)
1102 return -ENODEV;
1103
1104 rtw_phy_setup_phy_cond(rtwdev, 0);
1105
1106 rtw_phy_init_tx_power(rtwdev);
1107 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
1108 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
1109 rtw_phy_tx_power_by_rate_config(hal);
1110 rtw_phy_tx_power_limit_config(hal);
1111
1112 return 0;
1113 }
1114
1115 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
1116 {
1117 int ret;
1118
1119 ret = rtw_chip_parameter_setup(rtwdev);
1120 if (ret) {
1121 rtw_err(rtwdev, "failed to setup chip parameters\n");
1122 goto err_out;
1123 }
1124
1125 ret = rtw_chip_efuse_info_setup(rtwdev);
1126 if (ret) {
1127 rtw_err(rtwdev, "failed to setup chip efuse info\n");
1128 goto err_out;
1129 }
1130
1131 ret = rtw_chip_board_info_setup(rtwdev);
1132 if (ret) {
1133 rtw_err(rtwdev, "failed to setup chip board info\n");
1134 goto err_out;
1135 }
1136
1137 return 0;
1138
1139 err_out:
1140 return ret;
1141 }
1142 EXPORT_SYMBOL(rtw_chip_info_setup);
1143
1144 int rtw_core_init(struct rtw_dev *rtwdev)
1145 {
1146 struct rtw_coex *coex = &rtwdev->coex;
1147 int ret;
1148
1149 INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
1150
1151 timer_setup(&rtwdev->tx_report.purge_timer,
1152 rtw_tx_report_purge_timer, 0);
1153
1154 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
1155 INIT_DELAYED_WORK(&rtwdev->lps_work, rtw_lps_work);
1156 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
1157 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
1158 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
1159 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
1160 skb_queue_head_init(&rtwdev->c2h_queue);
1161 skb_queue_head_init(&rtwdev->coex.queue);
1162 skb_queue_head_init(&rtwdev->tx_report.queue);
1163
1164 spin_lock_init(&rtwdev->dm_lock);
1165 spin_lock_init(&rtwdev->rf_lock);
1166 spin_lock_init(&rtwdev->h2c.lock);
1167 spin_lock_init(&rtwdev->tx_report.q_lock);
1168
1169 mutex_init(&rtwdev->mutex);
1170 mutex_init(&rtwdev->coex.mutex);
1171 mutex_init(&rtwdev->hal.tx_power_mutex);
1172
1173 init_waitqueue_head(&rtwdev->coex.wait);
1174
1175 rtwdev->sec.total_cam_num = 32;
1176 rtwdev->hal.current_channel = 1;
1177 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
1178
1179 mutex_lock(&rtwdev->mutex);
1180 rtw_add_rsvd_page(rtwdev, RSVD_BEACON, false);
1181 mutex_unlock(&rtwdev->mutex);
1182
1183
1184 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
1185 BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
1186 BIT_AB | BIT_AM | BIT_APM;
1187
1188 ret = rtw_load_firmware(rtwdev, rtwdev->chip->fw_name);
1189 if (ret) {
1190 rtw_warn(rtwdev, "no firmware loaded\n");
1191 return ret;
1192 }
1193
1194 return 0;
1195 }
1196 EXPORT_SYMBOL(rtw_core_init);
1197
1198 void rtw_core_deinit(struct rtw_dev *rtwdev)
1199 {
1200 struct rtw_fw_state *fw = &rtwdev->fw;
1201 struct rtw_rsvd_page *rsvd_pkt, *tmp;
1202 unsigned long flags;
1203
1204 if (fw->firmware)
1205 release_firmware(fw->firmware);
1206
1207 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
1208 skb_queue_purge(&rtwdev->tx_report.queue);
1209 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
1210
1211 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) {
1212 list_del(&rsvd_pkt->list);
1213 kfree(rsvd_pkt);
1214 }
1215
1216 mutex_destroy(&rtwdev->mutex);
1217 mutex_destroy(&rtwdev->coex.mutex);
1218 mutex_destroy(&rtwdev->hal.tx_power_mutex);
1219 }
1220 EXPORT_SYMBOL(rtw_core_deinit);
1221
1222 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1223 {
1224 int max_tx_headroom = 0;
1225 int ret;
1226
1227
1228 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
1229
1230 hw->extra_tx_headroom = max_tx_headroom;
1231 hw->queues = IEEE80211_NUM_ACS;
1232 hw->sta_data_size = sizeof(struct rtw_sta_info);
1233 hw->vif_data_size = sizeof(struct rtw_vif);
1234
1235 ieee80211_hw_set(hw, SIGNAL_DBM);
1236 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
1237 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
1238 ieee80211_hw_set(hw, MFP_CAPABLE);
1239 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
1240 ieee80211_hw_set(hw, SUPPORTS_PS);
1241 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
1242 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
1243 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
1244
1245 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1246 BIT(NL80211_IFTYPE_AP) |
1247 BIT(NL80211_IFTYPE_ADHOC) |
1248 BIT(NL80211_IFTYPE_MESH_POINT);
1249
1250 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
1251 WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
1252
1253 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
1254
1255 rtw_set_supported_band(hw, rtwdev->chip);
1256 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
1257
1258 rtw_regd_init(rtwdev, rtw_regd_notifier);
1259
1260 ret = ieee80211_register_hw(hw);
1261 if (ret) {
1262 rtw_err(rtwdev, "failed to register hw\n");
1263 return ret;
1264 }
1265
1266 if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2))
1267 rtw_err(rtwdev, "regulatory_hint fail\n");
1268
1269 rtw_debugfs_init(rtwdev);
1270
1271 return 0;
1272 }
1273 EXPORT_SYMBOL(rtw_register_hw);
1274
1275 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1276 {
1277 struct rtw_chip_info *chip = rtwdev->chip;
1278
1279 ieee80211_unregister_hw(hw);
1280 rtw_unset_supported_band(hw, chip);
1281 }
1282 EXPORT_SYMBOL(rtw_unregister_hw);
1283
1284 MODULE_AUTHOR("Realtek Corporation");
1285 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
1286 MODULE_LICENSE("Dual BSD/GPL");