This source file includes following definitions.
- create_key
- get_nvram_var
- NVRAM_READ_VAL
- nvram_read_leddc
- nvram_read_macaddr
- nvram_read_alpha2
- bcm47xx_sprom_fill_auto
- bcm47xx_fill_sprom_path_r4589
- bcm47xx_fill_sprom_path_r45
- bcm47xx_is_valid_mac
- bcm47xx_increase_mac_addr
- bcm47xx_fill_sprom_ethernet
- bcm47xx_fill_board_data
- bcm47xx_fill_sprom
- bcm47xx_get_sprom_ssb
- bcm47xx_sprom_apply_prefix_alias
- bcm47xx_get_sprom_bcma
- bcm47xx_sprom_register_fallbacks
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29 #include <linux/bcm47xx_nvram.h>
30 #include <linux/bcma/bcma.h>
31 #include <linux/etherdevice.h>
32 #include <linux/if_ether.h>
33 #include <linux/ssb/ssb.h>
34
35 static void create_key(const char *prefix, const char *postfix,
36 const char *name, char *buf, int len)
37 {
38 if (prefix && postfix)
39 snprintf(buf, len, "%s%s%s", prefix, name, postfix);
40 else if (prefix)
41 snprintf(buf, len, "%s%s", prefix, name);
42 else if (postfix)
43 snprintf(buf, len, "%s%s", name, postfix);
44 else
45 snprintf(buf, len, "%s", name);
46 }
47
48 static int get_nvram_var(const char *prefix, const char *postfix,
49 const char *name, char *buf, int len, bool fallback)
50 {
51 char key[40];
52 int err;
53
54 create_key(prefix, postfix, name, key, sizeof(key));
55
56 err = bcm47xx_nvram_getenv(key, buf, len);
57 if (fallback && err == -ENOENT && prefix) {
58 create_key(NULL, postfix, name, key, sizeof(key));
59 err = bcm47xx_nvram_getenv(key, buf, len);
60 }
61 return err;
62 }
63
64 #define NVRAM_READ_VAL(type) \
65 static void nvram_read_ ## type(const char *prefix, \
66 const char *postfix, const char *name, \
67 type *val, type allset, bool fallback) \
68 { \
69 char buf[100]; \
70 int err; \
71 type var; \
72 \
73 err = get_nvram_var(prefix, postfix, name, buf, sizeof(buf), \
74 fallback); \
75 if (err < 0) \
76 return; \
77 err = kstrto ## type(strim(buf), 0, &var); \
78 if (err) { \
79 pr_warn("can not parse nvram name %s%s%s with value %s got %i\n", \
80 prefix, name, postfix, buf, err); \
81 return; \
82 } \
83 if (allset && var == allset) \
84 return; \
85 *val = var; \
86 }
87
88 NVRAM_READ_VAL(u8)
89 NVRAM_READ_VAL(s8)
90 NVRAM_READ_VAL(u16)
91 NVRAM_READ_VAL(u32)
92
93 #undef NVRAM_READ_VAL
94
95 static void nvram_read_u32_2(const char *prefix, const char *name,
96 u16 *val_lo, u16 *val_hi, bool fallback)
97 {
98 char buf[100];
99 int err;
100 u32 val;
101
102 err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
103 if (err < 0)
104 return;
105 err = kstrtou32(strim(buf), 0, &val);
106 if (err) {
107 pr_warn("can not parse nvram name %s%s with value %s got %i\n",
108 prefix, name, buf, err);
109 return;
110 }
111 *val_lo = (val & 0x0000FFFFU);
112 *val_hi = (val & 0xFFFF0000U) >> 16;
113 }
114
115 static void nvram_read_leddc(const char *prefix, const char *name,
116 u8 *leddc_on_time, u8 *leddc_off_time,
117 bool fallback)
118 {
119 char buf[100];
120 int err;
121 u32 val;
122
123 err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
124 if (err < 0)
125 return;
126 err = kstrtou32(strim(buf), 0, &val);
127 if (err) {
128 pr_warn("can not parse nvram name %s%s with value %s got %i\n",
129 prefix, name, buf, err);
130 return;
131 }
132
133 if (val == 0xffff || val == 0xffffffff)
134 return;
135
136 *leddc_on_time = val & 0xff;
137 *leddc_off_time = (val >> 16) & 0xff;
138 }
139
140 static void nvram_read_macaddr(const char *prefix, const char *name,
141 u8 val[6], bool fallback)
142 {
143 char buf[100];
144 int err;
145
146 err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
147 if (err < 0)
148 return;
149
150 strreplace(buf, '-', ':');
151 if (!mac_pton(buf, val))
152 pr_warn("Can not parse mac address: %s\n", buf);
153 }
154
155 static void nvram_read_alpha2(const char *prefix, const char *name,
156 char val[2], bool fallback)
157 {
158 char buf[10];
159 int err;
160
161 err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
162 if (err < 0)
163 return;
164 if (buf[0] == '0')
165 return;
166 if (strlen(buf) > 2) {
167 pr_warn("alpha2 is too long %s\n", buf);
168 return;
169 }
170 memcpy(val, buf, 2);
171 }
172
173
174 #define ENTRY(_revmask, _type, _prefix, _name, _val, _allset, _fallback) \
175 if (_revmask & BIT(sprom->revision)) \
176 nvram_read_ ## _type(_prefix, NULL, _name, &sprom->_val, \
177 _allset, _fallback)
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186
187 static void bcm47xx_sprom_fill_auto(struct ssb_sprom *sprom,
188 const char *prefix, bool fallback)
189 {
190 const char *pre = prefix;
191 bool fb = fallback;
192
193
194 ENTRY(0xfffffffe, u16, pre, "devid", dev_id, 0, fallback);
195
196 ENTRY(0xfffffffe, u16, pre, "boardrev", board_rev, 0, true);
197 ENTRY(0xfffffffe, u32, pre, "boardflags", boardflags, 0, fb);
198 ENTRY(0xfffffff0, u32, pre, "boardflags2", boardflags2, 0, fb);
199 ENTRY(0xfffff800, u32, pre, "boardflags3", boardflags3, 0, fb);
200 ENTRY(0x00000002, u16, pre, "boardflags", boardflags_lo, 0, fb);
201 ENTRY(0xfffffffc, u16, pre, "boardtype", board_type, 0, true);
202 ENTRY(0xfffffffe, u16, pre, "boardnum", board_num, 0, fb);
203 ENTRY(0x00000002, u8, pre, "cc", country_code, 0, fb);
204 ENTRY(0xfffffff8, u8, pre, "regrev", regrev, 0, fb);
205
206 ENTRY(0xfffffffe, u8, pre, "ledbh0", gpio0, 0xff, fb);
207 ENTRY(0xfffffffe, u8, pre, "ledbh1", gpio1, 0xff, fb);
208 ENTRY(0xfffffffe, u8, pre, "ledbh2", gpio2, 0xff, fb);
209 ENTRY(0xfffffffe, u8, pre, "ledbh3", gpio3, 0xff, fb);
210
211 ENTRY(0x0000070e, u16, pre, "pa0b0", pa0b0, 0, fb);
212 ENTRY(0x0000070e, u16, pre, "pa0b1", pa0b1, 0, fb);
213 ENTRY(0x0000070e, u16, pre, "pa0b2", pa0b2, 0, fb);
214 ENTRY(0x0000070e, u8, pre, "pa0itssit", itssi_bg, 0, fb);
215 ENTRY(0x0000070e, u8, pre, "pa0maxpwr", maxpwr_bg, 0, fb);
216
217 ENTRY(0x0000070c, u8, pre, "opo", opo, 0, fb);
218 ENTRY(0xfffffffe, u8, pre, "aa2g", ant_available_bg, 0, fb);
219 ENTRY(0xfffffffe, u8, pre, "aa5g", ant_available_a, 0, fb);
220 ENTRY(0x000007fe, s8, pre, "ag0", antenna_gain.a0, 0, fb);
221 ENTRY(0x000007fe, s8, pre, "ag1", antenna_gain.a1, 0, fb);
222 ENTRY(0x000007f0, s8, pre, "ag2", antenna_gain.a2, 0, fb);
223 ENTRY(0x000007f0, s8, pre, "ag3", antenna_gain.a3, 0, fb);
224
225 ENTRY(0x0000070e, u16, pre, "pa1b0", pa1b0, 0, fb);
226 ENTRY(0x0000070e, u16, pre, "pa1b1", pa1b1, 0, fb);
227 ENTRY(0x0000070e, u16, pre, "pa1b2", pa1b2, 0, fb);
228 ENTRY(0x0000070c, u16, pre, "pa1lob0", pa1lob0, 0, fb);
229 ENTRY(0x0000070c, u16, pre, "pa1lob1", pa1lob1, 0, fb);
230 ENTRY(0x0000070c, u16, pre, "pa1lob2", pa1lob2, 0, fb);
231 ENTRY(0x0000070c, u16, pre, "pa1hib0", pa1hib0, 0, fb);
232 ENTRY(0x0000070c, u16, pre, "pa1hib1", pa1hib1, 0, fb);
233 ENTRY(0x0000070c, u16, pre, "pa1hib2", pa1hib2, 0, fb);
234 ENTRY(0x0000070e, u8, pre, "pa1itssit", itssi_a, 0, fb);
235 ENTRY(0x0000070e, u8, pre, "pa1maxpwr", maxpwr_a, 0, fb);
236 ENTRY(0x0000070c, u8, pre, "pa1lomaxpwr", maxpwr_al, 0, fb);
237 ENTRY(0x0000070c, u8, pre, "pa1himaxpwr", maxpwr_ah, 0, fb);
238
239 ENTRY(0x00000708, u8, pre, "bxa2g", bxa2g, 0, fb);
240 ENTRY(0x00000708, u8, pre, "rssisav2g", rssisav2g, 0, fb);
241 ENTRY(0x00000708, u8, pre, "rssismc2g", rssismc2g, 0, fb);
242 ENTRY(0x00000708, u8, pre, "rssismf2g", rssismf2g, 0, fb);
243 ENTRY(0x00000708, u8, pre, "bxa5g", bxa5g, 0, fb);
244 ENTRY(0x00000708, u8, pre, "rssisav5g", rssisav5g, 0, fb);
245 ENTRY(0x00000708, u8, pre, "rssismc5g", rssismc5g, 0, fb);
246 ENTRY(0x00000708, u8, pre, "rssismf5g", rssismf5g, 0, fb);
247 ENTRY(0x00000708, u8, pre, "tri2g", tri2g, 0, fb);
248 ENTRY(0x00000708, u8, pre, "tri5g", tri5g, 0, fb);
249 ENTRY(0x00000708, u8, pre, "tri5gl", tri5gl, 0, fb);
250 ENTRY(0x00000708, u8, pre, "tri5gh", tri5gh, 0, fb);
251 ENTRY(0x00000708, s8, pre, "rxpo2g", rxpo2g, 0, fb);
252 ENTRY(0x00000708, s8, pre, "rxpo5g", rxpo5g, 0, fb);
253 ENTRY(0xfffffff0, u8, pre, "txchain", txchain, 0xf, fb);
254 ENTRY(0xfffffff0, u8, pre, "rxchain", rxchain, 0xf, fb);
255 ENTRY(0xfffffff0, u8, pre, "antswitch", antswitch, 0xff, fb);
256 ENTRY(0x00000700, u8, pre, "tssipos2g", fem.ghz2.tssipos, 0, fb);
257 ENTRY(0x00000700, u8, pre, "extpagain2g", fem.ghz2.extpa_gain, 0, fb);
258 ENTRY(0x00000700, u8, pre, "pdetrange2g", fem.ghz2.pdet_range, 0, fb);
259 ENTRY(0x00000700, u8, pre, "triso2g", fem.ghz2.tr_iso, 0, fb);
260 ENTRY(0x00000700, u8, pre, "antswctl2g", fem.ghz2.antswlut, 0, fb);
261 ENTRY(0x00000700, u8, pre, "tssipos5g", fem.ghz5.tssipos, 0, fb);
262 ENTRY(0x00000700, u8, pre, "extpagain5g", fem.ghz5.extpa_gain, 0, fb);
263 ENTRY(0x00000700, u8, pre, "pdetrange5g", fem.ghz5.pdet_range, 0, fb);
264 ENTRY(0x00000700, u8, pre, "triso5g", fem.ghz5.tr_iso, 0, fb);
265 ENTRY(0x00000700, u8, pre, "antswctl5g", fem.ghz5.antswlut, 0, fb);
266 ENTRY(0x000000f0, u8, pre, "txpid2ga0", txpid2g[0], 0, fb);
267 ENTRY(0x000000f0, u8, pre, "txpid2ga1", txpid2g[1], 0, fb);
268 ENTRY(0x000000f0, u8, pre, "txpid2ga2", txpid2g[2], 0, fb);
269 ENTRY(0x000000f0, u8, pre, "txpid2ga3", txpid2g[3], 0, fb);
270 ENTRY(0x000000f0, u8, pre, "txpid5ga0", txpid5g[0], 0, fb);
271 ENTRY(0x000000f0, u8, pre, "txpid5ga1", txpid5g[1], 0, fb);
272 ENTRY(0x000000f0, u8, pre, "txpid5ga2", txpid5g[2], 0, fb);
273 ENTRY(0x000000f0, u8, pre, "txpid5ga3", txpid5g[3], 0, fb);
274 ENTRY(0x000000f0, u8, pre, "txpid5gla0", txpid5gl[0], 0, fb);
275 ENTRY(0x000000f0, u8, pre, "txpid5gla1", txpid5gl[1], 0, fb);
276 ENTRY(0x000000f0, u8, pre, "txpid5gla2", txpid5gl[2], 0, fb);
277 ENTRY(0x000000f0, u8, pre, "txpid5gla3", txpid5gl[3], 0, fb);
278 ENTRY(0x000000f0, u8, pre, "txpid5gha0", txpid5gh[0], 0, fb);
279 ENTRY(0x000000f0, u8, pre, "txpid5gha1", txpid5gh[1], 0, fb);
280 ENTRY(0x000000f0, u8, pre, "txpid5gha2", txpid5gh[2], 0, fb);
281 ENTRY(0x000000f0, u8, pre, "txpid5gha3", txpid5gh[3], 0, fb);
282
283 ENTRY(0xffffff00, u8, pre, "tempthresh", tempthresh, 0, fb);
284 ENTRY(0xffffff00, u8, pre, "tempoffset", tempoffset, 0, fb);
285 ENTRY(0xffffff00, u16, pre, "rawtempsense", rawtempsense, 0, fb);
286 ENTRY(0xffffff00, u8, pre, "measpower", measpower, 0, fb);
287 ENTRY(0xffffff00, u8, pre, "tempsense_slope", tempsense_slope, 0, fb);
288 ENTRY(0xffffff00, u8, pre, "tempcorrx", tempcorrx, 0, fb);
289 ENTRY(0xffffff00, u8, pre, "tempsense_option", tempsense_option, 0, fb);
290 ENTRY(0x00000700, u8, pre, "freqoffset_corr", freqoffset_corr, 0, fb);
291 ENTRY(0x00000700, u8, pre, "iqcal_swp_dis", iqcal_swp_dis, 0, fb);
292 ENTRY(0x00000700, u8, pre, "hw_iqcal_en", hw_iqcal_en, 0, fb);
293 ENTRY(0x00000700, u8, pre, "elna2g", elna2g, 0, fb);
294 ENTRY(0x00000700, u8, pre, "elna5g", elna5g, 0, fb);
295 ENTRY(0xffffff00, u8, pre, "phycal_tempdelta", phycal_tempdelta, 0, fb);
296 ENTRY(0xffffff00, u8, pre, "temps_period", temps_period, 0, fb);
297 ENTRY(0xffffff00, u8, pre, "temps_hysteresis", temps_hysteresis, 0, fb);
298 ENTRY(0xffffff00, u8, pre, "measpower1", measpower1, 0, fb);
299 ENTRY(0xffffff00, u8, pre, "measpower2", measpower2, 0, fb);
300
301 ENTRY(0x000001f0, u16, pre, "cck2gpo", cck2gpo, 0, fb);
302 ENTRY(0x000001f0, u32, pre, "ofdm2gpo", ofdm2gpo, 0, fb);
303 ENTRY(0x000001f0, u32, pre, "ofdm5gpo", ofdm5gpo, 0, fb);
304 ENTRY(0x000001f0, u32, pre, "ofdm5glpo", ofdm5glpo, 0, fb);
305 ENTRY(0x000001f0, u32, pre, "ofdm5ghpo", ofdm5ghpo, 0, fb);
306 ENTRY(0x000001f0, u16, pre, "mcs2gpo0", mcs2gpo[0], 0, fb);
307 ENTRY(0x000001f0, u16, pre, "mcs2gpo1", mcs2gpo[1], 0, fb);
308 ENTRY(0x000001f0, u16, pre, "mcs2gpo2", mcs2gpo[2], 0, fb);
309 ENTRY(0x000001f0, u16, pre, "mcs2gpo3", mcs2gpo[3], 0, fb);
310 ENTRY(0x000001f0, u16, pre, "mcs2gpo4", mcs2gpo[4], 0, fb);
311 ENTRY(0x000001f0, u16, pre, "mcs2gpo5", mcs2gpo[5], 0, fb);
312 ENTRY(0x000001f0, u16, pre, "mcs2gpo6", mcs2gpo[6], 0, fb);
313 ENTRY(0x000001f0, u16, pre, "mcs2gpo7", mcs2gpo[7], 0, fb);
314 ENTRY(0x000001f0, u16, pre, "mcs5gpo0", mcs5gpo[0], 0, fb);
315 ENTRY(0x000001f0, u16, pre, "mcs5gpo1", mcs5gpo[1], 0, fb);
316 ENTRY(0x000001f0, u16, pre, "mcs5gpo2", mcs5gpo[2], 0, fb);
317 ENTRY(0x000001f0, u16, pre, "mcs5gpo3", mcs5gpo[3], 0, fb);
318 ENTRY(0x000001f0, u16, pre, "mcs5gpo4", mcs5gpo[4], 0, fb);
319 ENTRY(0x000001f0, u16, pre, "mcs5gpo5", mcs5gpo[5], 0, fb);
320 ENTRY(0x000001f0, u16, pre, "mcs5gpo6", mcs5gpo[6], 0, fb);
321 ENTRY(0x000001f0, u16, pre, "mcs5gpo7", mcs5gpo[7], 0, fb);
322 ENTRY(0x000001f0, u16, pre, "mcs5glpo0", mcs5glpo[0], 0, fb);
323 ENTRY(0x000001f0, u16, pre, "mcs5glpo1", mcs5glpo[1], 0, fb);
324 ENTRY(0x000001f0, u16, pre, "mcs5glpo2", mcs5glpo[2], 0, fb);
325 ENTRY(0x000001f0, u16, pre, "mcs5glpo3", mcs5glpo[3], 0, fb);
326 ENTRY(0x000001f0, u16, pre, "mcs5glpo4", mcs5glpo[4], 0, fb);
327 ENTRY(0x000001f0, u16, pre, "mcs5glpo5", mcs5glpo[5], 0, fb);
328 ENTRY(0x000001f0, u16, pre, "mcs5glpo6", mcs5glpo[6], 0, fb);
329 ENTRY(0x000001f0, u16, pre, "mcs5glpo7", mcs5glpo[7], 0, fb);
330 ENTRY(0x000001f0, u16, pre, "mcs5ghpo0", mcs5ghpo[0], 0, fb);
331 ENTRY(0x000001f0, u16, pre, "mcs5ghpo1", mcs5ghpo[1], 0, fb);
332 ENTRY(0x000001f0, u16, pre, "mcs5ghpo2", mcs5ghpo[2], 0, fb);
333 ENTRY(0x000001f0, u16, pre, "mcs5ghpo3", mcs5ghpo[3], 0, fb);
334 ENTRY(0x000001f0, u16, pre, "mcs5ghpo4", mcs5ghpo[4], 0, fb);
335 ENTRY(0x000001f0, u16, pre, "mcs5ghpo5", mcs5ghpo[5], 0, fb);
336 ENTRY(0x000001f0, u16, pre, "mcs5ghpo6", mcs5ghpo[6], 0, fb);
337 ENTRY(0x000001f0, u16, pre, "mcs5ghpo7", mcs5ghpo[7], 0, fb);
338 ENTRY(0x000001f0, u16, pre, "cddpo", cddpo, 0, fb);
339 ENTRY(0x000001f0, u16, pre, "stbcpo", stbcpo, 0, fb);
340 ENTRY(0x000001f0, u16, pre, "bw40po", bw40po, 0, fb);
341 ENTRY(0x000001f0, u16, pre, "bwduppo", bwduppo, 0, fb);
342
343 ENTRY(0xfffffe00, u16, pre, "cckbw202gpo", cckbw202gpo, 0, fb);
344 ENTRY(0xfffffe00, u16, pre, "cckbw20ul2gpo", cckbw20ul2gpo, 0, fb);
345 ENTRY(0x00000600, u32, pre, "legofdmbw202gpo", legofdmbw202gpo, 0, fb);
346 ENTRY(0x00000600, u32, pre, "legofdmbw20ul2gpo", legofdmbw20ul2gpo, 0, fb);
347 ENTRY(0x00000600, u32, pre, "legofdmbw205glpo", legofdmbw205glpo, 0, fb);
348 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5glpo", legofdmbw20ul5glpo, 0, fb);
349 ENTRY(0x00000600, u32, pre, "legofdmbw205gmpo", legofdmbw205gmpo, 0, fb);
350 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5gmpo", legofdmbw20ul5gmpo, 0, fb);
351 ENTRY(0x00000600, u32, pre, "legofdmbw205ghpo", legofdmbw205ghpo, 0, fb);
352 ENTRY(0x00000600, u32, pre, "legofdmbw20ul5ghpo", legofdmbw20ul5ghpo, 0, fb);
353 ENTRY(0xfffffe00, u32, pre, "mcsbw202gpo", mcsbw202gpo, 0, fb);
354 ENTRY(0x00000600, u32, pre, "mcsbw20ul2gpo", mcsbw20ul2gpo, 0, fb);
355 ENTRY(0xfffffe00, u32, pre, "mcsbw402gpo", mcsbw402gpo, 0, fb);
356 ENTRY(0xfffffe00, u32, pre, "mcsbw205glpo", mcsbw205glpo, 0, fb);
357 ENTRY(0x00000600, u32, pre, "mcsbw20ul5glpo", mcsbw20ul5glpo, 0, fb);
358 ENTRY(0xfffffe00, u32, pre, "mcsbw405glpo", mcsbw405glpo, 0, fb);
359 ENTRY(0xfffffe00, u32, pre, "mcsbw205gmpo", mcsbw205gmpo, 0, fb);
360 ENTRY(0x00000600, u32, pre, "mcsbw20ul5gmpo", mcsbw20ul5gmpo, 0, fb);
361 ENTRY(0xfffffe00, u32, pre, "mcsbw405gmpo", mcsbw405gmpo, 0, fb);
362 ENTRY(0xfffffe00, u32, pre, "mcsbw205ghpo", mcsbw205ghpo, 0, fb);
363 ENTRY(0x00000600, u32, pre, "mcsbw20ul5ghpo", mcsbw20ul5ghpo, 0, fb);
364 ENTRY(0xfffffe00, u32, pre, "mcsbw405ghpo", mcsbw405ghpo, 0, fb);
365 ENTRY(0x00000600, u16, pre, "mcs32po", mcs32po, 0, fb);
366 ENTRY(0x00000600, u16, pre, "legofdm40duppo", legofdm40duppo, 0, fb);
367 ENTRY(0x00000700, u8, pre, "pcieingress_war", pcieingress_war, 0, fb);
368
369
370 ENTRY(0x00000700, u8, pre, "rxgainerr2ga0", rxgainerr2ga[0], 0, fb);
371 ENTRY(0x00000700, u8, pre, "rxgainerr2ga1", rxgainerr2ga[1], 0, fb);
372 ENTRY(0x00000700, u8, pre, "rxgainerr2ga2", rxgainerr2ga[2], 0, fb);
373 ENTRY(0x00000700, u8, pre, "rxgainerr5gla0", rxgainerr5gla[0], 0, fb);
374 ENTRY(0x00000700, u8, pre, "rxgainerr5gla1", rxgainerr5gla[1], 0, fb);
375 ENTRY(0x00000700, u8, pre, "rxgainerr5gla2", rxgainerr5gla[2], 0, fb);
376 ENTRY(0x00000700, u8, pre, "rxgainerr5gma0", rxgainerr5gma[0], 0, fb);
377 ENTRY(0x00000700, u8, pre, "rxgainerr5gma1", rxgainerr5gma[1], 0, fb);
378 ENTRY(0x00000700, u8, pre, "rxgainerr5gma2", rxgainerr5gma[2], 0, fb);
379 ENTRY(0x00000700, u8, pre, "rxgainerr5gha0", rxgainerr5gha[0], 0, fb);
380 ENTRY(0x00000700, u8, pre, "rxgainerr5gha1", rxgainerr5gha[1], 0, fb);
381 ENTRY(0x00000700, u8, pre, "rxgainerr5gha2", rxgainerr5gha[2], 0, fb);
382 ENTRY(0x00000700, u8, pre, "rxgainerr5gua0", rxgainerr5gua[0], 0, fb);
383 ENTRY(0x00000700, u8, pre, "rxgainerr5gua1", rxgainerr5gua[1], 0, fb);
384 ENTRY(0x00000700, u8, pre, "rxgainerr5gua2", rxgainerr5gua[2], 0, fb);
385
386 ENTRY(0xfffffe00, u8, pre, "sar2g", sar2g, 0, fb);
387 ENTRY(0xfffffe00, u8, pre, "sar5g", sar5g, 0, fb);
388
389
390 ENTRY(0x00000700, u8, pre, "noiselvl2ga0", noiselvl2ga[0], 0, fb);
391 ENTRY(0x00000700, u8, pre, "noiselvl2ga1", noiselvl2ga[1], 0, fb);
392 ENTRY(0x00000700, u8, pre, "noiselvl2ga2", noiselvl2ga[2], 0, fb);
393 ENTRY(0x00000700, u8, pre, "noiselvl5gla0", noiselvl5gla[0], 0, fb);
394 ENTRY(0x00000700, u8, pre, "noiselvl5gla1", noiselvl5gla[1], 0, fb);
395 ENTRY(0x00000700, u8, pre, "noiselvl5gla2", noiselvl5gla[2], 0, fb);
396 ENTRY(0x00000700, u8, pre, "noiselvl5gma0", noiselvl5gma[0], 0, fb);
397 ENTRY(0x00000700, u8, pre, "noiselvl5gma1", noiselvl5gma[1], 0, fb);
398 ENTRY(0x00000700, u8, pre, "noiselvl5gma2", noiselvl5gma[2], 0, fb);
399 ENTRY(0x00000700, u8, pre, "noiselvl5gha0", noiselvl5gha[0], 0, fb);
400 ENTRY(0x00000700, u8, pre, "noiselvl5gha1", noiselvl5gha[1], 0, fb);
401 ENTRY(0x00000700, u8, pre, "noiselvl5gha2", noiselvl5gha[2], 0, fb);
402 ENTRY(0x00000700, u8, pre, "noiselvl5gua0", noiselvl5gua[0], 0, fb);
403 ENTRY(0x00000700, u8, pre, "noiselvl5gua1", noiselvl5gua[1], 0, fb);
404 ENTRY(0x00000700, u8, pre, "noiselvl5gua2", noiselvl5gua[2], 0, fb);
405 }
406 #undef ENTRY
407
408 static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
409 const char *prefix, bool fallback)
410 {
411 char postfix[2];
412 int i;
413
414 for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
415 struct ssb_sprom_core_pwr_info *pwr_info;
416
417 pwr_info = &sprom->core_pwr_info[i];
418
419 snprintf(postfix, sizeof(postfix), "%i", i);
420 nvram_read_u8(prefix, postfix, "maxp2ga",
421 &pwr_info->maxpwr_2g, 0, fallback);
422 nvram_read_u8(prefix, postfix, "itt2ga",
423 &pwr_info->itssi_2g, 0, fallback);
424 nvram_read_u8(prefix, postfix, "itt5ga",
425 &pwr_info->itssi_5g, 0, fallback);
426 nvram_read_u16(prefix, postfix, "pa2gw0a",
427 &pwr_info->pa_2g[0], 0, fallback);
428 nvram_read_u16(prefix, postfix, "pa2gw1a",
429 &pwr_info->pa_2g[1], 0, fallback);
430 nvram_read_u16(prefix, postfix, "pa2gw2a",
431 &pwr_info->pa_2g[2], 0, fallback);
432 nvram_read_u8(prefix, postfix, "maxp5ga",
433 &pwr_info->maxpwr_5g, 0, fallback);
434 nvram_read_u8(prefix, postfix, "maxp5gha",
435 &pwr_info->maxpwr_5gh, 0, fallback);
436 nvram_read_u8(prefix, postfix, "maxp5gla",
437 &pwr_info->maxpwr_5gl, 0, fallback);
438 nvram_read_u16(prefix, postfix, "pa5gw0a",
439 &pwr_info->pa_5g[0], 0, fallback);
440 nvram_read_u16(prefix, postfix, "pa5gw1a",
441 &pwr_info->pa_5g[1], 0, fallback);
442 nvram_read_u16(prefix, postfix, "pa5gw2a",
443 &pwr_info->pa_5g[2], 0, fallback);
444 nvram_read_u16(prefix, postfix, "pa5glw0a",
445 &pwr_info->pa_5gl[0], 0, fallback);
446 nvram_read_u16(prefix, postfix, "pa5glw1a",
447 &pwr_info->pa_5gl[1], 0, fallback);
448 nvram_read_u16(prefix, postfix, "pa5glw2a",
449 &pwr_info->pa_5gl[2], 0, fallback);
450 nvram_read_u16(prefix, postfix, "pa5ghw0a",
451 &pwr_info->pa_5gh[0], 0, fallback);
452 nvram_read_u16(prefix, postfix, "pa5ghw1a",
453 &pwr_info->pa_5gh[1], 0, fallback);
454 nvram_read_u16(prefix, postfix, "pa5ghw2a",
455 &pwr_info->pa_5gh[2], 0, fallback);
456 }
457 }
458
459 static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
460 const char *prefix, bool fallback)
461 {
462 char postfix[2];
463 int i;
464
465 for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
466 struct ssb_sprom_core_pwr_info *pwr_info;
467
468 pwr_info = &sprom->core_pwr_info[i];
469
470 snprintf(postfix, sizeof(postfix), "%i", i);
471 nvram_read_u16(prefix, postfix, "pa2gw3a",
472 &pwr_info->pa_2g[3], 0, fallback);
473 nvram_read_u16(prefix, postfix, "pa5gw3a",
474 &pwr_info->pa_5g[3], 0, fallback);
475 nvram_read_u16(prefix, postfix, "pa5glw3a",
476 &pwr_info->pa_5gl[3], 0, fallback);
477 nvram_read_u16(prefix, postfix, "pa5ghw3a",
478 &pwr_info->pa_5gh[3], 0, fallback);
479 }
480 }
481
482 static bool bcm47xx_is_valid_mac(u8 *mac)
483 {
484 return mac && !(mac[0] == 0x00 && mac[1] == 0x90 && mac[2] == 0x4c);
485 }
486
487 static int bcm47xx_increase_mac_addr(u8 *mac, u8 num)
488 {
489 u8 *oui = mac + ETH_ALEN/2 - 1;
490 u8 *p = mac + ETH_ALEN - 1;
491
492 do {
493 (*p) += num;
494 if (*p > num)
495 break;
496 p--;
497 num = 1;
498 } while (p != oui);
499
500 if (p == oui) {
501 pr_err("unable to fetch mac address\n");
502 return -ENOENT;
503 }
504 return 0;
505 }
506
507 static int mac_addr_used = 2;
508
509 static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
510 const char *prefix, bool fallback)
511 {
512 bool fb = fallback;
513
514 nvram_read_macaddr(prefix, "et0macaddr", sprom->et0mac, fallback);
515 nvram_read_u8(prefix, NULL, "et0mdcport", &sprom->et0mdcport, 0,
516 fallback);
517 nvram_read_u8(prefix, NULL, "et0phyaddr", &sprom->et0phyaddr, 0,
518 fallback);
519
520 nvram_read_macaddr(prefix, "et1macaddr", sprom->et1mac, fallback);
521 nvram_read_u8(prefix, NULL, "et1mdcport", &sprom->et1mdcport, 0,
522 fallback);
523 nvram_read_u8(prefix, NULL, "et1phyaddr", &sprom->et1phyaddr, 0,
524 fallback);
525
526 nvram_read_macaddr(prefix, "et2macaddr", sprom->et2mac, fb);
527 nvram_read_u8(prefix, NULL, "et2mdcport", &sprom->et2mdcport, 0, fb);
528 nvram_read_u8(prefix, NULL, "et2phyaddr", &sprom->et2phyaddr, 0, fb);
529
530 nvram_read_macaddr(prefix, "macaddr", sprom->il0mac, fallback);
531 nvram_read_macaddr(prefix, "il0macaddr", sprom->il0mac, fallback);
532
533
534
535
536
537
538
539 if (!bcm47xx_is_valid_mac(sprom->il0mac)) {
540 u8 mac[6];
541
542 nvram_read_macaddr(NULL, "et0macaddr", mac, false);
543 if (bcm47xx_is_valid_mac(mac)) {
544 int err = bcm47xx_increase_mac_addr(mac, mac_addr_used);
545
546 if (!err) {
547 ether_addr_copy(sprom->il0mac, mac);
548 mac_addr_used++;
549 }
550 }
551 }
552 }
553
554 static void bcm47xx_fill_board_data(struct ssb_sprom *sprom, const char *prefix,
555 bool fallback)
556 {
557 nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
558 &sprom->boardflags_hi, fallback);
559 nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo,
560 &sprom->boardflags2_hi, fallback);
561 }
562
563 void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,
564 bool fallback)
565 {
566 bcm47xx_fill_sprom_ethernet(sprom, prefix, fallback);
567 bcm47xx_fill_board_data(sprom, prefix, fallback);
568
569 nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0, fallback);
570
571
572 nvram_read_alpha2(prefix, "ccode", sprom->alpha2, fallback);
573 if (sprom->revision >= 3)
574 nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
575 &sprom->leddc_off_time, fallback);
576
577 switch (sprom->revision) {
578 case 4:
579 case 5:
580 bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
581 bcm47xx_fill_sprom_path_r45(sprom, prefix, fallback);
582 break;
583 case 8:
584 case 9:
585 bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
586 break;
587 }
588
589 bcm47xx_sprom_fill_auto(sprom, prefix, fallback);
590 }
591
592 #if IS_BUILTIN(CONFIG_SSB) && IS_ENABLED(CONFIG_SSB_SPROM)
593 static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)
594 {
595 char prefix[10];
596
597 switch (bus->bustype) {
598 case SSB_BUSTYPE_SSB:
599 bcm47xx_fill_sprom(out, NULL, false);
600 return 0;
601 case SSB_BUSTYPE_PCI:
602 memset(out, 0, sizeof(struct ssb_sprom));
603 snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
604 bus->host_pci->bus->number + 1,
605 PCI_SLOT(bus->host_pci->devfn));
606 bcm47xx_fill_sprom(out, prefix, false);
607 return 0;
608 default:
609 pr_warn("Unable to fill SPROM for given bustype.\n");
610 return -EINVAL;
611 }
612 }
613 #endif
614
615 #if IS_BUILTIN(CONFIG_BCMA)
616
617
618
619
620
621
622
623 static void bcm47xx_sprom_apply_prefix_alias(char *prefix, size_t prefix_size)
624 {
625 size_t prefix_len = strlen(prefix);
626 size_t short_len = prefix_len - 1;
627 char nvram_var[10];
628 char buf[20];
629 int i;
630
631
632 if (prefix_len <= 0 || prefix[prefix_len - 1] != '/')
633 return;
634
635 for (i = 0; i < 3; i++) {
636 if (snprintf(nvram_var, sizeof(nvram_var), "devpath%d", i) <= 0)
637 continue;
638 if (bcm47xx_nvram_getenv(nvram_var, buf, sizeof(buf)) < 0)
639 continue;
640 if (!strcmp(buf, prefix) ||
641 (short_len && strlen(buf) == short_len && !strncmp(buf, prefix, short_len))) {
642 snprintf(prefix, prefix_size, "%d:", i);
643 return;
644 }
645 }
646 }
647
648 static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)
649 {
650 struct bcma_boardinfo *binfo = &bus->boardinfo;
651 struct bcma_device *core;
652 char buf[10];
653 char *prefix;
654 bool fallback = false;
655
656 switch (bus->hosttype) {
657 case BCMA_HOSTTYPE_PCI:
658 memset(out, 0, sizeof(struct ssb_sprom));
659
660 if (IS_ENABLED(CONFIG_BCM47XX))
661 snprintf(buf, sizeof(buf), "pci/%u/%u/",
662 bus->host_pci->bus->number + 1,
663 PCI_SLOT(bus->host_pci->devfn));
664 else
665 snprintf(buf, sizeof(buf), "pci/%u/%u/",
666 pci_domain_nr(bus->host_pci->bus) + 1,
667 bus->host_pci->bus->number);
668 bcm47xx_sprom_apply_prefix_alias(buf, sizeof(buf));
669 prefix = buf;
670 break;
671 case BCMA_HOSTTYPE_SOC:
672 memset(out, 0, sizeof(struct ssb_sprom));
673 core = bcma_find_core(bus, BCMA_CORE_80211);
674 if (core) {
675 snprintf(buf, sizeof(buf), "sb/%u/",
676 core->core_index);
677 prefix = buf;
678 fallback = true;
679 } else {
680 prefix = NULL;
681 }
682 break;
683 default:
684 pr_warn("Unable to fill SPROM for given bustype.\n");
685 return -EINVAL;
686 }
687
688 nvram_read_u16(prefix, NULL, "boardvendor", &binfo->vendor, 0, true);
689 if (!binfo->vendor)
690 binfo->vendor = SSB_BOARDVENDOR_BCM;
691 nvram_read_u16(prefix, NULL, "boardtype", &binfo->type, 0, true);
692
693 bcm47xx_fill_sprom(out, prefix, fallback);
694
695 return 0;
696 }
697 #endif
698
699 static unsigned int bcm47xx_sprom_registered;
700
701
702
703
704
705 int bcm47xx_sprom_register_fallbacks(void)
706 {
707 if (bcm47xx_sprom_registered)
708 return 0;
709
710 #if IS_BUILTIN(CONFIG_SSB) && IS_ENABLED(CONFIG_SSB_SPROM)
711 if (ssb_arch_register_fallback_sprom(&bcm47xx_get_sprom_ssb))
712 pr_warn("Failed to register ssb SPROM handler\n");
713 #endif
714
715 #if IS_BUILTIN(CONFIG_BCMA)
716 if (bcma_arch_register_fallback_sprom(&bcm47xx_get_sprom_bcma))
717 pr_warn("Failed to register bcma SPROM handler\n");
718 #endif
719
720 bcm47xx_sprom_registered = 1;
721
722 return 0;
723 }
724
725 fs_initcall(bcm47xx_sprom_register_fallbacks);