This source file includes following definitions.
- zynqmp_pm_ret_code
- do_fw_call_fail
- do_fw_call_smc
- do_fw_call_hvc
- zynqmp_pm_invoke_fn
- zynqmp_pm_get_api_version
- zynqmp_pm_get_chipid
- zynqmp_pm_get_trustzone_version
- get_set_conduit_method
- zynqmp_pm_query_data
- zynqmp_pm_clock_enable
- zynqmp_pm_clock_disable
- zynqmp_pm_clock_getstate
- zynqmp_pm_clock_setdivider
- zynqmp_pm_clock_getdivider
- zynqmp_pm_clock_setrate
- zynqmp_pm_clock_getrate
- zynqmp_pm_clock_setparent
- zynqmp_pm_clock_getparent
- zynqmp_is_valid_ioctl
- zynqmp_pm_ioctl
- zynqmp_pm_reset_assert
- zynqmp_pm_reset_get_status
- zynqmp_pm_fpga_load
- zynqmp_pm_fpga_get_status
- zynqmp_pm_init_finalize
- zynqmp_pm_set_suspend_mode
- zynqmp_pm_request_node
- zynqmp_pm_release_node
- zynqmp_pm_set_requirement
- zynqmp_pm_get_eemi_ops
- zynqmp_firmware_probe
- zynqmp_firmware_remove
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13 #include <linux/arm-smccc.h>
14 #include <linux/compiler.h>
15 #include <linux/device.h>
16 #include <linux/init.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_platform.h>
21 #include <linux/slab.h>
22 #include <linux/uaccess.h>
23
24 #include <linux/firmware/xlnx-zynqmp.h>
25 #include "zynqmp-debug.h"
26
27 static const struct zynqmp_eemi_ops *eemi_ops_tbl;
28
29 static const struct mfd_cell firmware_devs[] = {
30 {
31 .name = "zynqmp_power_controller",
32 },
33 };
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35
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37
38
39
40
41 static int zynqmp_pm_ret_code(u32 ret_status)
42 {
43 switch (ret_status) {
44 case XST_PM_SUCCESS:
45 case XST_PM_DOUBLE_REQ:
46 return 0;
47 case XST_PM_NO_ACCESS:
48 return -EACCES;
49 case XST_PM_ABORT_SUSPEND:
50 return -ECANCELED;
51 case XST_PM_INTERNAL:
52 case XST_PM_CONFLICT:
53 case XST_PM_INVALID_NODE:
54 default:
55 return -EINVAL;
56 }
57 }
58
59 static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
60 u32 *ret_payload)
61 {
62 return -ENODEV;
63 }
64
65
66
67
68
69 static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
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81
82 static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
83 u32 *ret_payload)
84 {
85 struct arm_smccc_res res;
86
87 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
88
89 if (ret_payload) {
90 ret_payload[0] = lower_32_bits(res.a0);
91 ret_payload[1] = upper_32_bits(res.a0);
92 ret_payload[2] = lower_32_bits(res.a1);
93 ret_payload[3] = upper_32_bits(res.a1);
94 }
95
96 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
97 }
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111
112 static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
113 u32 *ret_payload)
114 {
115 struct arm_smccc_res res;
116
117 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
118
119 if (ret_payload) {
120 ret_payload[0] = lower_32_bits(res.a0);
121 ret_payload[1] = upper_32_bits(res.a0);
122 ret_payload[2] = lower_32_bits(res.a1);
123 ret_payload[3] = upper_32_bits(res.a1);
124 }
125
126 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
127 }
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154 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
155 u32 arg2, u32 arg3, u32 *ret_payload)
156 {
157
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160
161 u64 smc_arg[4];
162
163 smc_arg[0] = PM_SIP_SVC | pm_api_id;
164 smc_arg[1] = ((u64)arg1 << 32) | arg0;
165 smc_arg[2] = ((u64)arg3 << 32) | arg2;
166
167 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload);
168 }
169
170 static u32 pm_api_version;
171 static u32 pm_tz_version;
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178
179 static int zynqmp_pm_get_api_version(u32 *version)
180 {
181 u32 ret_payload[PAYLOAD_ARG_CNT];
182 int ret;
183
184 if (!version)
185 return -EINVAL;
186
187
188 if (pm_api_version > 0) {
189 *version = pm_api_version;
190 return 0;
191 }
192 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload);
193 *version = ret_payload[1];
194
195 return ret;
196 }
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205
206 static int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
207 {
208 u32 ret_payload[PAYLOAD_ARG_CNT];
209 int ret;
210
211 if (!idcode || !version)
212 return -EINVAL;
213
214 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
215 *idcode = ret_payload[1];
216 *version = ret_payload[2];
217
218 return ret;
219 }
220
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226
227 static int zynqmp_pm_get_trustzone_version(u32 *version)
228 {
229 u32 ret_payload[PAYLOAD_ARG_CNT];
230 int ret;
231
232 if (!version)
233 return -EINVAL;
234
235
236 if (pm_tz_version > 0) {
237 *version = pm_tz_version;
238 return 0;
239 }
240 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0,
241 0, 0, ret_payload);
242 *version = ret_payload[1];
243
244 return ret;
245 }
246
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254
255 static int get_set_conduit_method(struct device_node *np)
256 {
257 const char *method;
258
259 if (of_property_read_string(np, "method", &method)) {
260 pr_warn("%s missing \"method\" property\n", __func__);
261 return -ENXIO;
262 }
263
264 if (!strcmp("hvc", method)) {
265 do_fw_call = do_fw_call_hvc;
266 } else if (!strcmp("smc", method)) {
267 do_fw_call = do_fw_call_smc;
268 } else {
269 pr_warn("%s Invalid \"method\" property: %s\n",
270 __func__, method);
271 return -EINVAL;
272 }
273
274 return 0;
275 }
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283
284 static int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
285 {
286 int ret;
287
288 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1,
289 qdata.arg2, qdata.arg3, out);
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296 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
297 }
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308 static int zynqmp_pm_clock_enable(u32 clock_id)
309 {
310 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL);
311 }
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322 static int zynqmp_pm_clock_disable(u32 clock_id)
323 {
324 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL);
325 }
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337 static int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
338 {
339 u32 ret_payload[PAYLOAD_ARG_CNT];
340 int ret;
341
342 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0,
343 0, 0, ret_payload);
344 *state = ret_payload[1];
345
346 return ret;
347 }
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359 static int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
360 {
361 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider,
362 0, 0, NULL);
363 }
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375 static int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
376 {
377 u32 ret_payload[PAYLOAD_ARG_CNT];
378 int ret;
379
380 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0,
381 0, 0, ret_payload);
382 *divider = ret_payload[1];
383
384 return ret;
385 }
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396 static int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
397 {
398 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
399 lower_32_bits(rate),
400 upper_32_bits(rate),
401 0, NULL);
402 }
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414 static int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
415 {
416 u32 ret_payload[PAYLOAD_ARG_CNT];
417 int ret;
418
419 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0,
420 0, 0, ret_payload);
421 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
422
423 return ret;
424 }
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434
435 static int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
436 {
437 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
438 parent_id, 0, 0, NULL);
439 }
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450
451 static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
452 {
453 u32 ret_payload[PAYLOAD_ARG_CNT];
454 int ret;
455
456 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0,
457 0, 0, ret_payload);
458 *parent_id = ret_payload[1];
459
460 return ret;
461 }
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468
469 static inline int zynqmp_is_valid_ioctl(u32 ioctl_id)
470 {
471 switch (ioctl_id) {
472 case IOCTL_SET_PLL_FRAC_MODE:
473 case IOCTL_GET_PLL_FRAC_MODE:
474 case IOCTL_SET_PLL_FRAC_DATA:
475 case IOCTL_GET_PLL_FRAC_DATA:
476 return 1;
477 default:
478 return 0;
479 }
480 }
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494 static int zynqmp_pm_ioctl(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2,
495 u32 *out)
496 {
497 if (!zynqmp_is_valid_ioctl(ioctl_id))
498 return -EINVAL;
499
500 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, ioctl_id,
501 arg1, arg2, out);
502 }
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512 static int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
513 const enum zynqmp_pm_reset_action assert_flag)
514 {
515 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag,
516 0, 0, NULL);
517 }
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526 static int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset,
527 u32 *status)
528 {
529 u32 ret_payload[PAYLOAD_ARG_CNT];
530 int ret;
531
532 if (!status)
533 return -EINVAL;
534
535 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0,
536 0, 0, ret_payload);
537 *status = ret_payload[1];
538
539 return ret;
540 }
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554
555 static int zynqmp_pm_fpga_load(const u64 address, const u32 size,
556 const u32 flags)
557 {
558 return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
559 upper_32_bits(address), size, flags, NULL);
560 }
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570
571 static int zynqmp_pm_fpga_get_status(u32 *value)
572 {
573 u32 ret_payload[PAYLOAD_ARG_CNT];
574 int ret;
575
576 if (!value)
577 return -EINVAL;
578
579 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
580 *value = ret_payload[1];
581
582 return ret;
583 }
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594 static int zynqmp_pm_init_finalize(void)
595 {
596 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL);
597 }
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607 static int zynqmp_pm_set_suspend_mode(u32 mode)
608 {
609 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL);
610 }
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624 static int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
625 const u32 qos,
626 const enum zynqmp_pm_request_ack ack)
627 {
628 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities,
629 qos, ack, NULL);
630 }
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642 static int zynqmp_pm_release_node(const u32 node)
643 {
644 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL);
645 }
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659 static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
660 const u32 qos,
661 const enum zynqmp_pm_request_ack ack)
662 {
663 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
664 qos, ack, NULL);
665 }
666
667 static const struct zynqmp_eemi_ops eemi_ops = {
668 .get_api_version = zynqmp_pm_get_api_version,
669 .get_chipid = zynqmp_pm_get_chipid,
670 .query_data = zynqmp_pm_query_data,
671 .clock_enable = zynqmp_pm_clock_enable,
672 .clock_disable = zynqmp_pm_clock_disable,
673 .clock_getstate = zynqmp_pm_clock_getstate,
674 .clock_setdivider = zynqmp_pm_clock_setdivider,
675 .clock_getdivider = zynqmp_pm_clock_getdivider,
676 .clock_setrate = zynqmp_pm_clock_setrate,
677 .clock_getrate = zynqmp_pm_clock_getrate,
678 .clock_setparent = zynqmp_pm_clock_setparent,
679 .clock_getparent = zynqmp_pm_clock_getparent,
680 .ioctl = zynqmp_pm_ioctl,
681 .reset_assert = zynqmp_pm_reset_assert,
682 .reset_get_status = zynqmp_pm_reset_get_status,
683 .init_finalize = zynqmp_pm_init_finalize,
684 .set_suspend_mode = zynqmp_pm_set_suspend_mode,
685 .request_node = zynqmp_pm_request_node,
686 .release_node = zynqmp_pm_release_node,
687 .set_requirement = zynqmp_pm_set_requirement,
688 .fpga_load = zynqmp_pm_fpga_load,
689 .fpga_get_status = zynqmp_pm_fpga_get_status,
690 };
691
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696
697 const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
698 {
699 if (eemi_ops_tbl)
700 return eemi_ops_tbl;
701 else
702 return ERR_PTR(-EPROBE_DEFER);
703
704 }
705 EXPORT_SYMBOL_GPL(zynqmp_pm_get_eemi_ops);
706
707 static int zynqmp_firmware_probe(struct platform_device *pdev)
708 {
709 struct device *dev = &pdev->dev;
710 struct device_node *np;
711 int ret;
712
713 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp");
714 if (!np)
715 return 0;
716 of_node_put(np);
717
718 ret = get_set_conduit_method(dev->of_node);
719 if (ret)
720 return ret;
721
722
723 zynqmp_pm_get_api_version(&pm_api_version);
724 if (pm_api_version < ZYNQMP_PM_VERSION) {
725 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
726 __func__,
727 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
728 pm_api_version >> 16, pm_api_version & 0xFFFF);
729 }
730
731 pr_info("%s Platform Management API v%d.%d\n", __func__,
732 pm_api_version >> 16, pm_api_version & 0xFFFF);
733
734
735 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
736 if (ret)
737 panic("Legacy trustzone found without version support\n");
738
739 if (pm_tz_version < ZYNQMP_TZ_VERSION)
740 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
741 __func__,
742 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
743 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
744
745 pr_info("%s Trustzone version v%d.%d\n", __func__,
746 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
747
748
749 eemi_ops_tbl = &eemi_ops;
750
751 zynqmp_pm_api_debugfs_init();
752
753 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
754 ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
755 if (ret) {
756 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
757 return ret;
758 }
759
760 return of_platform_populate(dev->of_node, NULL, NULL, dev);
761 }
762
763 static int zynqmp_firmware_remove(struct platform_device *pdev)
764 {
765 mfd_remove_devices(&pdev->dev);
766 zynqmp_pm_api_debugfs_exit();
767
768 return 0;
769 }
770
771 static const struct of_device_id zynqmp_firmware_of_match[] = {
772 {.compatible = "xlnx,zynqmp-firmware"},
773 {},
774 };
775 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
776
777 static struct platform_driver zynqmp_firmware_driver = {
778 .driver = {
779 .name = "zynqmp_firmware",
780 .of_match_table = zynqmp_firmware_of_match,
781 },
782 .probe = zynqmp_firmware_probe,
783 .remove = zynqmp_firmware_remove,
784 };
785 module_platform_driver(zynqmp_firmware_driver);