1
2 #ifndef _EDAC_MCE_AMD_H
3 #define _EDAC_MCE_AMD_H
4
5 #include <linux/notifier.h>
6
7 #include <asm/mce.h>
8
9 #define EC(x) ((x) & 0xffff)
10 #define XEC(x, mask) (((x) >> 16) & mask)
11
12 #define LOW_SYNDROME(x) (((x) >> 15) & 0xff)
13 #define HIGH_SYNDROME(x) (((x) >> 24) & 0xff)
14
15 #define TLB_ERROR(x) (((x) & 0xFFF0) == 0x0010)
16 #define MEM_ERROR(x) (((x) & 0xFF00) == 0x0100)
17 #define BUS_ERROR(x) (((x) & 0xF800) == 0x0800)
18 #define INT_ERROR(x) (((x) & 0xF4FF) == 0x0400)
19
20 #define TT(x) (((x) >> 2) & 0x3)
21 #define TT_MSG(x) tt_msgs[TT(x)]
22 #define II(x) (((x) >> 2) & 0x3)
23 #define II_MSG(x) ii_msgs[II(x)]
24 #define LL(x) ((x) & 0x3)
25 #define LL_MSG(x) ll_msgs[LL(x)]
26 #define TO(x) (((x) >> 8) & 0x1)
27 #define TO_MSG(x) to_msgs[TO(x)]
28 #define PP(x) (((x) >> 9) & 0x3)
29 #define PP_MSG(x) pp_msgs[PP(x)]
30 #define UU(x) (((x) >> 8) & 0x3)
31 #define UU_MSG(x) uu_msgs[UU(x)]
32
33 #define R4(x) (((x) >> 4) & 0xf)
34 #define R4_MSG(x) ((R4(x) < 9) ? rrrr_msgs[R4(x)] : "Wrong R4!")
35
36 extern const char * const pp_msgs[];
37
38 enum tt_ids {
39 TT_INSTR = 0,
40 TT_DATA,
41 TT_GEN,
42 TT_RESV,
43 };
44
45 enum ll_ids {
46 LL_RESV = 0,
47 LL_L1,
48 LL_L2,
49 LL_LG,
50 };
51
52 enum ii_ids {
53 II_MEM = 0,
54 II_RESV,
55 II_IO,
56 II_GEN,
57 };
58
59 enum rrrr_ids {
60 R4_GEN = 0,
61 R4_RD,
62 R4_WR,
63 R4_DRD,
64 R4_DWR,
65 R4_IRD,
66 R4_PREF,
67 R4_EVICT,
68 R4_SNOOP,
69 };
70
71
72
73
74 struct amd_decoder_ops {
75 bool (*mc0_mce)(u16, u8);
76 bool (*mc1_mce)(u16, u8);
77 bool (*mc2_mce)(u16, u8);
78 };
79
80 void amd_report_gart_errors(bool);
81 void amd_register_ecc_decoder(void (*f)(int, struct mce *));
82 void amd_unregister_ecc_decoder(void (*f)(int, struct mce *));
83
84 #endif