drivers/cpufreq/speedstep-ich.c

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This source file includes following definitions.
speedstep_find_register
speedstep_set_state
_speedstep_set_state
speedstep_activate
speedstep_detect_chipset
get_freq_data
speedstep_get
speedstep_target
get_freqs_on_cpu
speedstep_cpu_init
speedstep_init
speedstep_exit
   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * (C) 2001  Dave Jones, Arjan van de ven.
   4  * (C) 2002 - 2003  Dominik Brodowski <linux@brodo.de>
   5  *
   6  *  Based upon reverse engineered information, and on Intel documentation
   7  *  for chipsets ICH2-M and ICH3-M.
   8  *
   9  *  Many thanks to Ducrot Bruno for finding and fixing the last
  10  *  "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
  11  *  for extensive testing.
  12  *
  13  *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  14  */
  15 
  16 
  17 /*********************************************************************
  18  *                        SPEEDSTEP - DEFINITIONS                    *
  19  *********************************************************************/
  20 
  21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22 
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/init.h>
  26 #include <linux/cpufreq.h>
  27 #include <linux/pci.h>
  28 #include <linux/sched.h>
  29 
  30 #include <asm/cpu_device_id.h>
  31 
  32 #include "speedstep-lib.h"
  33 
  34 
  35 /* speedstep_chipset:
  36  *   It is necessary to know which chipset is used. As accesses to
  37  * this device occur at various places in this module, we need a
  38  * static struct pci_dev * pointing to that device.
  39  */
  40 static struct pci_dev *speedstep_chipset_dev;
  41 
  42 
  43 /* speedstep_processor
  44  */
  45 static enum speedstep_processor speedstep_processor;
  46 
  47 static u32 pmbase;
  48 
  49 /*
  50  *   There are only two frequency states for each processor. Values
  51  * are in kHz for the time being.
  52  */
  53 static struct cpufreq_frequency_table speedstep_freqs[] = {
  54         {0, SPEEDSTEP_HIGH,     0},
  55         {0, SPEEDSTEP_LOW,      0},
  56         {0, 0,                  CPUFREQ_TABLE_END},
  57 };
  58 
  59 
  60 /**
  61  * speedstep_find_register - read the PMBASE address
  62  *
  63  * Returns: -ENODEV if no register could be found
  64  */
  65 static int speedstep_find_register(void)
  66 {
  67         if (!speedstep_chipset_dev)
  68                 return -ENODEV;
  69 
  70         /* get PMBASE */
  71         pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
  72         if (!(pmbase & 0x01)) {
  73                 pr_err("could not find speedstep register\n");
  74                 return -ENODEV;
  75         }
  76 
  77         pmbase &= 0xFFFFFFFE;
  78         if (!pmbase) {
  79                 pr_err("could not find speedstep register\n");
  80                 return -ENODEV;
  81         }
  82 
  83         pr_debug("pmbase is 0x%x\n", pmbase);
  84         return 0;
  85 }
  86 
  87 /**
  88  * speedstep_set_state - set the SpeedStep state
  89  * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  90  *
  91  *   Tries to change the SpeedStep state.  Can be called from
  92  *   smp_call_function_single.
  93  */
  94 static void speedstep_set_state(unsigned int state)
  95 {
  96         u8 pm2_blk;
  97         u8 value;
  98         unsigned long flags;
  99 
 100         if (state > 0x1)
 101                 return;
 102 
 103         /* Disable IRQs */
 104         local_irq_save(flags);
 105 
 106         /* read state */
 107         value = inb(pmbase + 0x50);
 108 
 109         pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 110 
 111         /* write new state */
 112         value &= 0xFE;
 113         value |= state;
 114 
 115         pr_debug("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
 116 
 117         /* Disable bus master arbitration */
 118         pm2_blk = inb(pmbase + 0x20);
 119         pm2_blk |= 0x01;
 120         outb(pm2_blk, (pmbase + 0x20));
 121 
 122         /* Actual transition */
 123         outb(value, (pmbase + 0x50));
 124 
 125         /* Restore bus master arbitration */
 126         pm2_blk &= 0xfe;
 127         outb(pm2_blk, (pmbase + 0x20));
 128 
 129         /* check if transition was successful */
 130         value = inb(pmbase + 0x50);
 131 
 132         /* Enable IRQs */
 133         local_irq_restore(flags);
 134 
 135         pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 136 
 137         if (state == (value & 0x1))
 138                 pr_debug("change to %u MHz succeeded\n",
 139                         speedstep_get_frequency(speedstep_processor) / 1000);
 140         else
 141                 pr_err("change failed - I/O error\n");
 142 
 143         return;
 144 }
 145 
 146 /* Wrapper for smp_call_function_single. */
 147 static void _speedstep_set_state(void *_state)
 148 {
 149         speedstep_set_state(*(unsigned int *)_state);
 150 }
 151 
 152 /**
 153  * speedstep_activate - activate SpeedStep control in the chipset
 154  *
 155  *   Tries to activate the SpeedStep status and control registers.
 156  * Returns -EINVAL on an unsupported chipset, and zero on success.
 157  */
 158 static int speedstep_activate(void)
 159 {
 160         u16 value = 0;
 161 
 162         if (!speedstep_chipset_dev)
 163                 return -EINVAL;
 164 
 165         pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
 166         if (!(value & 0x08)) {
 167                 value |= 0x08;
 168                 pr_debug("activating SpeedStep (TM) registers\n");
 169                 pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
 170         }
 171 
 172         return 0;
 173 }
 174 
 175 
 176 /**
 177  * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
 178  *
 179  *   Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
 180  * the LPC bridge / PM module which contains all power-management
 181  * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
 182  * chipset, or zero on failure.
 183  */
 184 static unsigned int speedstep_detect_chipset(void)
 185 {
 186         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 187                               PCI_DEVICE_ID_INTEL_82801DB_12,
 188                               PCI_ANY_ID, PCI_ANY_ID,
 189                               NULL);
 190         if (speedstep_chipset_dev)
 191                 return 4; /* 4-M */
 192 
 193         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 194                               PCI_DEVICE_ID_INTEL_82801CA_12,
 195                               PCI_ANY_ID, PCI_ANY_ID,
 196                               NULL);
 197         if (speedstep_chipset_dev)
 198                 return 3; /* 3-M */
 199 
 200 
 201         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 202                               PCI_DEVICE_ID_INTEL_82801BA_10,
 203                               PCI_ANY_ID, PCI_ANY_ID,
 204                               NULL);
 205         if (speedstep_chipset_dev) {
 206                 /* speedstep.c causes lockups on Dell Inspirons 8000 and
 207                  * 8100 which use a pretty old revision of the 82815
 208                  * host bridge. Abort on these systems.
 209                  */
 210                 struct pci_dev *hostbridge;
 211 
 212                 hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
 213                               PCI_DEVICE_ID_INTEL_82815_MC,
 214                               PCI_ANY_ID, PCI_ANY_ID,
 215                               NULL);
 216 
 217                 if (!hostbridge)
 218                         return 2; /* 2-M */
 219 
 220                 if (hostbridge->revision < 5) {
 221                         pr_debug("hostbridge does not support speedstep\n");
 222                         speedstep_chipset_dev = NULL;
 223                         pci_dev_put(hostbridge);
 224                         return 0;
 225                 }
 226 
 227                 pci_dev_put(hostbridge);
 228                 return 2; /* 2-M */
 229         }
 230 
 231         return 0;
 232 }
 233 
 234 static void get_freq_data(void *_speed)
 235 {
 236         unsigned int *speed = _speed;
 237 
 238         *speed = speedstep_get_frequency(speedstep_processor);
 239 }
 240 
 241 static unsigned int speedstep_get(unsigned int cpu)
 242 {
 243         unsigned int speed;
 244 
 245         /* You're supposed to ensure CPU is online. */
 246         BUG_ON(smp_call_function_single(cpu, get_freq_data, &speed, 1));
 247 
 248         pr_debug("detected %u kHz as current frequency\n", speed);
 249         return speed;
 250 }
 251 
 252 /**
 253  * speedstep_target - set a new CPUFreq policy
 254  * @policy: new policy
 255  * @index: index of target frequency
 256  *
 257  * Sets a new CPUFreq policy.
 258  */
 259 static int speedstep_target(struct cpufreq_policy *policy, unsigned int index)
 260 {
 261         unsigned int policy_cpu;
 262 
 263         policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
 264 
 265         smp_call_function_single(policy_cpu, _speedstep_set_state, &index,
 266                                  true);
 267 
 268         return 0;
 269 }
 270 
 271 
 272 struct get_freqs {
 273         struct cpufreq_policy *policy;
 274         int ret;
 275 };
 276 
 277 static void get_freqs_on_cpu(void *_get_freqs)
 278 {
 279         struct get_freqs *get_freqs = _get_freqs;
 280 
 281         get_freqs->ret =
 282                 speedstep_get_freqs(speedstep_processor,
 283                             &speedstep_freqs[SPEEDSTEP_LOW].frequency,
 284                             &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
 285                             &get_freqs->policy->cpuinfo.transition_latency,
 286                             &speedstep_set_state);
 287 }
 288 
 289 static int speedstep_cpu_init(struct cpufreq_policy *policy)
 290 {
 291         unsigned int policy_cpu;
 292         struct get_freqs gf;
 293 
 294         /* only run on CPU to be set, or on its sibling */
 295 #ifdef CONFIG_SMP
 296         cpumask_copy(policy->cpus, topology_sibling_cpumask(policy->cpu));
 297 #endif
 298         policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
 299 
 300         /* detect low and high frequency and transition latency */
 301         gf.policy = policy;
 302         smp_call_function_single(policy_cpu, get_freqs_on_cpu, &gf, 1);
 303         if (gf.ret)
 304                 return gf.ret;
 305 
 306         policy->freq_table = speedstep_freqs;
 307 
 308         return 0;
 309 }
 310 
 311 
 312 static struct cpufreq_driver speedstep_driver = {
 313         .name   = "speedstep-ich",
 314         .verify = cpufreq_generic_frequency_table_verify,
 315         .target_index = speedstep_target,
 316         .init   = speedstep_cpu_init,
 317         .get    = speedstep_get,
 318         .attr   = cpufreq_generic_attr,
 319 };
 320 
 321 static const struct x86_cpu_id ss_smi_ids[] = {
 322         { X86_VENDOR_INTEL, 6, 0xb, },
 323         { X86_VENDOR_INTEL, 6, 0x8, },
 324         { X86_VENDOR_INTEL, 15, 2 },
 325         {}
 326 };
 327 #if 0
 328 /* Autoload or not? Do not for now. */
 329 MODULE_DEVICE_TABLE(x86cpu, ss_smi_ids);
 330 #endif
 331 
 332 /**
 333  * speedstep_init - initializes the SpeedStep CPUFreq driver
 334  *
 335  *   Initializes the SpeedStep support. Returns -ENODEV on unsupported
 336  * devices, -EINVAL on problems during initiatization, and zero on
 337  * success.
 338  */
 339 static int __init speedstep_init(void)
 340 {
 341         if (!x86_match_cpu(ss_smi_ids))
 342                 return -ENODEV;
 343 
 344         /* detect processor */
 345         speedstep_processor = speedstep_detect_processor();
 346         if (!speedstep_processor) {
 347                 pr_debug("Intel(R) SpeedStep(TM) capable processor "
 348                                 "not found\n");
 349                 return -ENODEV;
 350         }
 351 
 352         /* detect chipset */
 353         if (!speedstep_detect_chipset()) {
 354                 pr_debug("Intel(R) SpeedStep(TM) for this chipset not "
 355                                 "(yet) available.\n");
 356                 return -ENODEV;
 357         }
 358 
 359         /* activate speedstep support */
 360         if (speedstep_activate()) {
 361                 pci_dev_put(speedstep_chipset_dev);
 362                 return -EINVAL;
 363         }
 364 
 365         if (speedstep_find_register())
 366                 return -ENODEV;
 367 
 368         return cpufreq_register_driver(&speedstep_driver);
 369 }
 370 
 371 
 372 /**
 373  * speedstep_exit - unregisters SpeedStep support
 374  *
 375  *   Unregisters SpeedStep support.
 376  */
 377 static void __exit speedstep_exit(void)
 378 {
 379         pci_dev_put(speedstep_chipset_dev);
 380         cpufreq_unregister_driver(&speedstep_driver);
 381 }
 382 
 383 
 384 MODULE_AUTHOR("Dave Jones, Dominik Brodowski <linux@brodo.de>");
 385 MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
 386                 "with ICH-M southbridges.");
 387 MODULE_LICENSE("GPL");
 388 
 389 module_init(speedstep_init);
 390 module_exit(speedstep_exit);
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/cpufreq/speedstep-ich.c

DEFINITIONS
