root/arch/microblaze/lib/divsi3.S

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #include <linux/linkage.h>
   3 
   4 /*
   5 * Divide operation for 32 bit integers.
   6 *       Input : Dividend in Reg r5
   7 *               Divisor in Reg r6
   8 *       Output: Result in Reg r3
   9 */
  10         .text
  11         .globl  __divsi3
  12         .type __divsi3, @function
  13         .ent __divsi3
  14 __divsi3:
  15         .frame  r1, 0, r15
  16 
  17         addik   r1, r1, -16
  18         swi     r28, r1, 0
  19         swi     r29, r1, 4
  20         swi     r30, r1, 8
  21         swi     r31, r1, 12
  22 
  23         beqi    r6, div_by_zero /* div_by_zero - division error */
  24         beqi    r5, result_is_zero /* result is zero */
  25         bgeid   r5, r5_pos
  26         xor     r28, r5, r6 /* get the sign of the result */
  27         rsubi   r5, r5, 0 /* make r5 positive */
  28 r5_pos:
  29         bgei    r6, r6_pos
  30         rsubi   r6, r6, 0 /* make r6 positive */
  31 r6_pos:
  32         addik   r30, r0, 0 /* clear mod */
  33         addik   r3, r0, 0 /* clear div */
  34         addik   r29, r0, 32 /* initialize the loop count */
  35 
  36         /* first part try to find the first '1' in the r5 */
  37 div0:
  38         blti    r5, div2 /* this traps r5 == 0x80000000 */
  39 div1:
  40         add     r5, r5, r5 /* left shift logical r5 */
  41         bgtid   r5, div1
  42         addik   r29, r29, -1
  43 div2:
  44         /* left shift logical r5 get the '1' into the carry */
  45         add     r5, r5, r5
  46         addc    r30, r30, r30 /* move that bit into the mod register */
  47         rsub    r31, r6, r30 /* try to subtract (r30 a r6) */
  48         blti    r31, mod_too_small
  49         /* move the r31 to mod since the result was positive */
  50         or      r30, r0, r31
  51         addik   r3, r3, 1
  52 mod_too_small:
  53         addik   r29, r29, -1
  54         beqi    r29, loop_end
  55         add     r3, r3, r3 /* shift in the '1' into div */
  56         bri     div2 /* div2 */
  57 loop_end:
  58         bgei    r28, return_here
  59         brid    return_here
  60         rsubi   r3, r3, 0 /* negate the result */
  61 div_by_zero:
  62 result_is_zero:
  63         or      r3, r0, r0 /* set result to 0 */
  64 return_here:
  65 /* restore values of csrs and that of r3 and the divisor and the dividend */
  66         lwi     r28, r1, 0
  67         lwi     r29, r1, 4
  68         lwi     r30, r1, 8
  69         lwi     r31, r1, 12
  70         rtsd    r15, 8
  71         addik   r1, r1, 16
  72 
  73 .size __divsi3, . - __divsi3
  74 .end __divsi3