root/drivers/mfd/tps80031.c

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DEFINITIONS

This source file includes following definitions.
  1. tps80031_ext_power_req_config
  2. tps80031_power_off
  3. tps80031_pupd_init
  4. tps80031_init_ext_control
  5. tps80031_irq_init
  6. rd_wr_reg_id0
  7. rd_wr_reg_id1
  8. is_volatile_reg_id1
  9. rd_wr_reg_id2
  10. rd_wr_reg_id3
  11. tps80031_probe
  12. tps80031_init

   1 /*
   2  * tps80031.c -- TI TPS80031/TPS80032 mfd core driver.
   3  *
   4  * MFD core driver for TI TPS80031/TPS80032 Fully Integrated
   5  * Power Management with Power Path and Battery Charger
   6  *
   7  * Copyright (c) 2012, NVIDIA Corporation.
   8  *
   9  * Author: Laxman Dewangan <ldewangan@nvidia.com>
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License as
  13  * published by the Free Software Foundation version 2.
  14  *
  15  * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
  16  * whether express or implied; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  23  * 02111-1307, USA
  24  */
  25 
  26 #include <linux/err.h>
  27 #include <linux/i2c.h>
  28 #include <linux/init.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/irq.h>
  31 #include <linux/mfd/core.h>
  32 #include <linux/mfd/tps80031.h>
  33 #include <linux/pm.h>
  34 #include <linux/regmap.h>
  35 #include <linux/slab.h>
  36 
  37 static struct resource tps80031_rtc_resources[] = {
  38         {
  39                 .start = TPS80031_INT_RTC_ALARM,
  40                 .end = TPS80031_INT_RTC_ALARM,
  41                 .flags = IORESOURCE_IRQ,
  42         },
  43 };
  44 
  45 /* TPS80031 sub mfd devices */
  46 static const struct mfd_cell tps80031_cell[] = {
  47         {
  48                 .name = "tps80031-pmic",
  49         },
  50         {
  51                 .name = "tps80031-clock",
  52         },
  53         {
  54                 .name = "tps80031-rtc",
  55                 .num_resources = ARRAY_SIZE(tps80031_rtc_resources),
  56                 .resources = tps80031_rtc_resources,
  57         },
  58         {
  59                 .name = "tps80031-gpadc",
  60         },
  61         {
  62                 .name = "tps80031-fuel-gauge",
  63         },
  64         {
  65                 .name = "tps80031-charger",
  66         },
  67 };
  68 
  69 static int tps80031_slave_address[TPS80031_NUM_SLAVES] = {
  70         TPS80031_I2C_ID0_ADDR,
  71         TPS80031_I2C_ID1_ADDR,
  72         TPS80031_I2C_ID2_ADDR,
  73         TPS80031_I2C_ID3_ADDR,
  74 };
  75 
  76 struct tps80031_pupd_data {
  77         u8      reg;
  78         u8      pullup_bit;
  79         u8      pulldown_bit;
  80 };
  81 
  82 #define TPS80031_IRQ(_reg, _mask)                       \
  83         {                                                       \
  84                 .reg_offset = (TPS80031_INT_MSK_LINE_##_reg) -  \
  85                                 TPS80031_INT_MSK_LINE_A,        \
  86                 .mask = BIT(_mask),                             \
  87         }
  88 
  89 static const struct regmap_irq tps80031_main_irqs[] = {
  90         [TPS80031_INT_PWRON]            = TPS80031_IRQ(A, 0),
  91         [TPS80031_INT_RPWRON]           = TPS80031_IRQ(A, 1),
  92         [TPS80031_INT_SYS_VLOW]         = TPS80031_IRQ(A, 2),
  93         [TPS80031_INT_RTC_ALARM]        = TPS80031_IRQ(A, 3),
  94         [TPS80031_INT_RTC_PERIOD]       = TPS80031_IRQ(A, 4),
  95         [TPS80031_INT_HOT_DIE]          = TPS80031_IRQ(A, 5),
  96         [TPS80031_INT_VXX_SHORT]        = TPS80031_IRQ(A, 6),
  97         [TPS80031_INT_SPDURATION]       = TPS80031_IRQ(A, 7),
  98         [TPS80031_INT_WATCHDOG]         = TPS80031_IRQ(B, 0),
  99         [TPS80031_INT_BAT]              = TPS80031_IRQ(B, 1),
 100         [TPS80031_INT_SIM]              = TPS80031_IRQ(B, 2),
 101         [TPS80031_INT_MMC]              = TPS80031_IRQ(B, 3),
 102         [TPS80031_INT_RES]              = TPS80031_IRQ(B, 4),
 103         [TPS80031_INT_GPADC_RT]         = TPS80031_IRQ(B, 5),
 104         [TPS80031_INT_GPADC_SW2_EOC]    = TPS80031_IRQ(B, 6),
 105         [TPS80031_INT_CC_AUTOCAL]       = TPS80031_IRQ(B, 7),
 106         [TPS80031_INT_ID_WKUP]          = TPS80031_IRQ(C, 0),
 107         [TPS80031_INT_VBUSS_WKUP]       = TPS80031_IRQ(C, 1),
 108         [TPS80031_INT_ID]               = TPS80031_IRQ(C, 2),
 109         [TPS80031_INT_VBUS]             = TPS80031_IRQ(C, 3),
 110         [TPS80031_INT_CHRG_CTRL]        = TPS80031_IRQ(C, 4),
 111         [TPS80031_INT_EXT_CHRG]         = TPS80031_IRQ(C, 5),
 112         [TPS80031_INT_INT_CHRG]         = TPS80031_IRQ(C, 6),
 113         [TPS80031_INT_RES2]             = TPS80031_IRQ(C, 7),
 114 };
 115 
 116 static struct regmap_irq_chip tps80031_irq_chip = {
 117         .name = "tps80031",
 118         .irqs = tps80031_main_irqs,
 119         .num_irqs = ARRAY_SIZE(tps80031_main_irqs),
 120         .num_regs = 3,
 121         .status_base = TPS80031_INT_STS_A,
 122         .mask_base = TPS80031_INT_MSK_LINE_A,
 123 };
 124 
 125 #define PUPD_DATA(_reg, _pulldown_bit, _pullup_bit)     \
 126         {                                               \
 127                 .reg = TPS80031_CFG_INPUT_PUPD##_reg,   \
 128                 .pulldown_bit = _pulldown_bit,          \
 129                 .pullup_bit = _pullup_bit,              \
 130         }
 131 
 132 static const struct tps80031_pupd_data tps80031_pupds[] = {
 133         [TPS80031_PREQ1]                = PUPD_DATA(1, BIT(0),  BIT(1)),
 134         [TPS80031_PREQ2A]               = PUPD_DATA(1, BIT(2),  BIT(3)),
 135         [TPS80031_PREQ2B]               = PUPD_DATA(1, BIT(4),  BIT(5)),
 136         [TPS80031_PREQ2C]               = PUPD_DATA(1, BIT(6),  BIT(7)),
 137         [TPS80031_PREQ3]                = PUPD_DATA(2, BIT(0),  BIT(1)),
 138         [TPS80031_NRES_WARM]            = PUPD_DATA(2, 0,       BIT(2)),
 139         [TPS80031_PWM_FORCE]            = PUPD_DATA(2, BIT(5),  0),
 140         [TPS80031_CHRG_EXT_CHRG_STATZ]  = PUPD_DATA(2, 0,       BIT(6)),
 141         [TPS80031_SIM]                  = PUPD_DATA(3, BIT(0),  BIT(1)),
 142         [TPS80031_MMC]                  = PUPD_DATA(3, BIT(2),  BIT(3)),
 143         [TPS80031_GPADC_START]          = PUPD_DATA(3, BIT(4),  0),
 144         [TPS80031_DVSI2C_SCL]           = PUPD_DATA(4, 0,       BIT(0)),
 145         [TPS80031_DVSI2C_SDA]           = PUPD_DATA(4, 0,       BIT(1)),
 146         [TPS80031_CTLI2C_SCL]           = PUPD_DATA(4, 0,       BIT(2)),
 147         [TPS80031_CTLI2C_SDA]           = PUPD_DATA(4, 0,       BIT(3)),
 148 };
 149 static struct tps80031 *tps80031_power_off_dev;
 150 
 151 int tps80031_ext_power_req_config(struct device *dev,
 152                 unsigned long ext_ctrl_flag, int preq_bit,
 153                 int state_reg_add, int trans_reg_add)
 154 {
 155         u8 res_ass_reg = 0;
 156         int preq_mask_bit = 0;
 157         int ret;
 158 
 159         if (!(ext_ctrl_flag & TPS80031_EXT_PWR_REQ))
 160                 return 0;
 161 
 162         if (ext_ctrl_flag & TPS80031_PWR_REQ_INPUT_PREQ1) {
 163                 res_ass_reg = TPS80031_PREQ1_RES_ASS_A + (preq_bit >> 3);
 164                 preq_mask_bit = 5;
 165         } else if (ext_ctrl_flag & TPS80031_PWR_REQ_INPUT_PREQ2) {
 166                 res_ass_reg = TPS80031_PREQ2_RES_ASS_A + (preq_bit >> 3);
 167                 preq_mask_bit = 6;
 168         } else if (ext_ctrl_flag & TPS80031_PWR_REQ_INPUT_PREQ3) {
 169                 res_ass_reg = TPS80031_PREQ3_RES_ASS_A + (preq_bit >> 3);
 170                 preq_mask_bit = 7;
 171         }
 172 
 173         /* Configure REQ_ASS registers */
 174         ret = tps80031_set_bits(dev, TPS80031_SLAVE_ID1, res_ass_reg,
 175                                         BIT(preq_bit & 0x7));
 176         if (ret < 0) {
 177                 dev_err(dev, "reg 0x%02x setbit failed, err = %d\n",
 178                                 res_ass_reg, ret);
 179                 return ret;
 180         }
 181 
 182         /* Unmask the PREQ */
 183         ret = tps80031_clr_bits(dev, TPS80031_SLAVE_ID1,
 184                         TPS80031_PHOENIX_MSK_TRANSITION, BIT(preq_mask_bit));
 185         if (ret < 0) {
 186                 dev_err(dev, "reg 0x%02x clrbit failed, err = %d\n",
 187                         TPS80031_PHOENIX_MSK_TRANSITION, ret);
 188                 return ret;
 189         }
 190 
 191         /* Switch regulator control to resource now */
 192         if (ext_ctrl_flag & (TPS80031_PWR_REQ_INPUT_PREQ2 |
 193                                         TPS80031_PWR_REQ_INPUT_PREQ3)) {
 194                 ret = tps80031_update(dev, TPS80031_SLAVE_ID1, state_reg_add,
 195                                                 0x0, TPS80031_STATE_MASK);
 196                 if (ret < 0)
 197                         dev_err(dev, "reg 0x%02x update failed, err = %d\n",
 198                                 state_reg_add, ret);
 199         } else {
 200                 ret = tps80031_update(dev, TPS80031_SLAVE_ID1, trans_reg_add,
 201                                 TPS80031_TRANS_SLEEP_OFF,
 202                                 TPS80031_TRANS_SLEEP_MASK);
 203                 if (ret < 0)
 204                         dev_err(dev, "reg 0x%02x update failed, err = %d\n",
 205                                 trans_reg_add, ret);
 206         }
 207         return ret;
 208 }
 209 EXPORT_SYMBOL_GPL(tps80031_ext_power_req_config);
 210 
 211 static void tps80031_power_off(void)
 212 {
 213         dev_info(tps80031_power_off_dev->dev, "switching off PMU\n");
 214         tps80031_write(tps80031_power_off_dev->dev, TPS80031_SLAVE_ID1,
 215                                 TPS80031_PHOENIX_DEV_ON, TPS80031_DEVOFF);
 216 }
 217 
 218 static void tps80031_pupd_init(struct tps80031 *tps80031,
 219                                struct tps80031_platform_data *pdata)
 220 {
 221         struct tps80031_pupd_init_data *pupd_init_data = pdata->pupd_init_data;
 222         int data_size = pdata->pupd_init_data_size;
 223         int i;
 224 
 225         for (i = 0; i < data_size; ++i) {
 226                 struct tps80031_pupd_init_data *pupd_init = &pupd_init_data[i];
 227                 const struct tps80031_pupd_data *pupd =
 228                         &tps80031_pupds[pupd_init->input_pin];
 229                 u8 update_value = 0;
 230                 u8 update_mask = pupd->pulldown_bit | pupd->pullup_bit;
 231 
 232                 if (pupd_init->setting == TPS80031_PUPD_PULLDOWN)
 233                         update_value = pupd->pulldown_bit;
 234                 else if (pupd_init->setting == TPS80031_PUPD_PULLUP)
 235                         update_value = pupd->pullup_bit;
 236 
 237                 tps80031_update(tps80031->dev, TPS80031_SLAVE_ID1, pupd->reg,
 238                                 update_value, update_mask);
 239         }
 240 }
 241 
 242 static int tps80031_init_ext_control(struct tps80031 *tps80031,
 243                         struct tps80031_platform_data *pdata)
 244 {
 245         struct device *dev = tps80031->dev;
 246         int ret;
 247         int i;
 248 
 249         /* Clear all external control for this rail */
 250         for (i = 0; i < 9; ++i) {
 251                 ret = tps80031_write(dev, TPS80031_SLAVE_ID1,
 252                                 TPS80031_PREQ1_RES_ASS_A + i, 0);
 253                 if (ret < 0) {
 254                         dev_err(dev, "reg 0x%02x write failed, err = %d\n",
 255                                 TPS80031_PREQ1_RES_ASS_A + i, ret);
 256                         return ret;
 257                 }
 258         }
 259 
 260         /* Mask the PREQ */
 261         ret = tps80031_set_bits(dev, TPS80031_SLAVE_ID1,
 262                         TPS80031_PHOENIX_MSK_TRANSITION, 0x7 << 5);
 263         if (ret < 0) {
 264                 dev_err(dev, "reg 0x%02x set_bits failed, err = %d\n",
 265                         TPS80031_PHOENIX_MSK_TRANSITION, ret);
 266                 return ret;
 267         }
 268         return ret;
 269 }
 270 
 271 static int tps80031_irq_init(struct tps80031 *tps80031, int irq, int irq_base)
 272 {
 273         struct device *dev = tps80031->dev;
 274         int i, ret;
 275 
 276         /*
 277          * The MASK register used for updating status register when
 278          * interrupt occurs and LINE register used to pass the status
 279          * to actual interrupt line.  As per datasheet:
 280          * When INT_MSK_LINE [i] is set to 1, the associated interrupt
 281          * number i is INT line masked, which means that no interrupt is
 282          * generated on the INT line.
 283          * When INT_MSK_LINE [i] is set to 0, the associated interrupt
 284          * number i is  line enabled: An interrupt is generated on the
 285          * INT line.
 286          * In any case, the INT_STS [i] status bit may or may not be updated,
 287          * only linked to the INT_MSK_STS [i] configuration register bit.
 288          *
 289          * When INT_MSK_STS [i] is set to 1, the associated interrupt number
 290          * i is status masked, which means that no interrupt is stored in
 291          * the INT_STS[i] status bit. Note that no interrupt number i is
 292          * generated on the INT line, even if the INT_MSK_LINE [i] register
 293          * bit is set to 0.
 294          * When INT_MSK_STS [i] is set to 0, the associated interrupt number i
 295          * is status enabled: An interrupt status is updated in the INT_STS [i]
 296          * register. The interrupt may or may not be generated on the INT line,
 297          * depending on the INT_MSK_LINE [i] configuration register bit.
 298          */
 299         for (i = 0; i < 3; i++)
 300                 tps80031_write(dev, TPS80031_SLAVE_ID2,
 301                                 TPS80031_INT_MSK_STS_A + i, 0x00);
 302 
 303         ret = regmap_add_irq_chip(tps80031->regmap[TPS80031_SLAVE_ID2], irq,
 304                         IRQF_ONESHOT, irq_base,
 305                         &tps80031_irq_chip, &tps80031->irq_data);
 306         if (ret < 0) {
 307                 dev_err(dev, "add irq failed, err = %d\n", ret);
 308                 return ret;
 309         }
 310         return ret;
 311 }
 312 
 313 static bool rd_wr_reg_id0(struct device *dev, unsigned int reg)
 314 {
 315         switch (reg) {
 316         case TPS80031_SMPS1_CFG_FORCE ... TPS80031_SMPS2_CFG_VOLTAGE:
 317                 return true;
 318         default:
 319                 return false;
 320         }
 321 }
 322 
 323 static bool rd_wr_reg_id1(struct device *dev, unsigned int reg)
 324 {
 325         switch (reg) {
 326         case TPS80031_SECONDS_REG ... TPS80031_RTC_RESET_STATUS_REG:
 327         case TPS80031_VALIDITY0 ... TPS80031_VALIDITY7:
 328         case TPS80031_PHOENIX_START_CONDITION ... TPS80031_KEY_PRESS_DUR_CFG:
 329         case TPS80031_SMPS4_CFG_TRANS ... TPS80031_SMPS3_CFG_VOLTAGE:
 330         case TPS80031_BROADCAST_ADDR_ALL ... TPS80031_BROADCAST_ADDR_CLK_RST:
 331         case TPS80031_VANA_CFG_TRANS ... TPS80031_LDO7_CFG_VOLTAGE:
 332         case TPS80031_REGEN1_CFG_TRANS ... TPS80031_TMP_CFG_STATE:
 333         case TPS80031_PREQ1_RES_ASS_A ... TPS80031_PREQ3_RES_ASS_C:
 334         case TPS80031_SMPS_OFFSET ... TPS80031_BATDEBOUNCING:
 335         case TPS80031_CFG_INPUT_PUPD1 ... TPS80031_CFG_SMPS_PD:
 336         case TPS80031_BACKUP_REG:
 337                 return true;
 338         default:
 339                 return false;
 340         }
 341 }
 342 
 343 static bool is_volatile_reg_id1(struct device *dev, unsigned int reg)
 344 {
 345         switch (reg) {
 346         case TPS80031_SMPS4_CFG_TRANS ... TPS80031_SMPS3_CFG_VOLTAGE:
 347         case TPS80031_VANA_CFG_TRANS ... TPS80031_LDO7_CFG_VOLTAGE:
 348         case TPS80031_REGEN1_CFG_TRANS ... TPS80031_TMP_CFG_STATE:
 349         case TPS80031_PREQ1_RES_ASS_A ... TPS80031_PREQ3_RES_ASS_C:
 350         case TPS80031_SMPS_OFFSET ... TPS80031_BATDEBOUNCING:
 351         case TPS80031_CFG_INPUT_PUPD1 ... TPS80031_CFG_SMPS_PD:
 352                 return true;
 353         default:
 354                 return false;
 355         }
 356 }
 357 
 358 static bool rd_wr_reg_id2(struct device *dev, unsigned int reg)
 359 {
 360         switch (reg) {
 361         case TPS80031_USB_VENDOR_ID_LSB ... TPS80031_USB_OTG_REVISION:
 362         case TPS80031_GPADC_CTRL ... TPS80031_CTRL_P1:
 363         case TPS80031_RTCH0_LSB ... TPS80031_GPCH0_MSB:
 364         case TPS80031_TOGGLE1 ... TPS80031_VIBMODE:
 365         case TPS80031_PWM1ON ... TPS80031_PWM2OFF:
 366         case TPS80031_FG_REG_00 ... TPS80031_FG_REG_11:
 367         case TPS80031_INT_STS_A ... TPS80031_INT_MSK_STS_C:
 368         case TPS80031_CONTROLLER_CTRL2 ... TPS80031_LED_PWM_CTRL2:
 369                 return true;
 370         default:
 371                 return false;
 372         }
 373 }
 374 
 375 static bool rd_wr_reg_id3(struct device *dev, unsigned int reg)
 376 {
 377         switch (reg) {
 378         case TPS80031_GPADC_TRIM0 ... TPS80031_GPADC_TRIM18:
 379                 return true;
 380         default:
 381                 return false;
 382         }
 383 }
 384 
 385 static const struct regmap_config tps80031_regmap_configs[] = {
 386         {
 387                 .reg_bits = 8,
 388                 .val_bits = 8,
 389                 .writeable_reg = rd_wr_reg_id0,
 390                 .readable_reg = rd_wr_reg_id0,
 391                 .max_register = TPS80031_MAX_REGISTER,
 392         },
 393         {
 394                 .reg_bits = 8,
 395                 .val_bits = 8,
 396                 .writeable_reg = rd_wr_reg_id1,
 397                 .readable_reg = rd_wr_reg_id1,
 398                 .volatile_reg = is_volatile_reg_id1,
 399                 .max_register = TPS80031_MAX_REGISTER,
 400         },
 401         {
 402                 .reg_bits = 8,
 403                 .val_bits = 8,
 404                 .writeable_reg = rd_wr_reg_id2,
 405                 .readable_reg = rd_wr_reg_id2,
 406                 .max_register = TPS80031_MAX_REGISTER,
 407         },
 408         {
 409                 .reg_bits = 8,
 410                 .val_bits = 8,
 411                 .writeable_reg = rd_wr_reg_id3,
 412                 .readable_reg = rd_wr_reg_id3,
 413                 .max_register = TPS80031_MAX_REGISTER,
 414         },
 415 };
 416 
 417 static int tps80031_probe(struct i2c_client *client,
 418                           const struct i2c_device_id *id)
 419 {
 420         struct tps80031_platform_data *pdata = dev_get_platdata(&client->dev);
 421         struct tps80031 *tps80031;
 422         int ret;
 423         uint8_t es_version;
 424         uint8_t ep_ver;
 425         int i;
 426 
 427         if (!pdata) {
 428                 dev_err(&client->dev, "tps80031 requires platform data\n");
 429                 return -EINVAL;
 430         }
 431 
 432         tps80031 = devm_kzalloc(&client->dev, sizeof(*tps80031), GFP_KERNEL);
 433         if (!tps80031)
 434                 return -ENOMEM;
 435 
 436         for (i = 0; i < TPS80031_NUM_SLAVES; i++) {
 437                 if (tps80031_slave_address[i] == client->addr)
 438                         tps80031->clients[i] = client;
 439                 else
 440                         tps80031->clients[i] = devm_i2c_new_dummy_device(&client->dev,
 441                                                 client->adapter, tps80031_slave_address[i]);
 442                 if (IS_ERR(tps80031->clients[i])) {
 443                         dev_err(&client->dev, "can't attach client %d\n", i);
 444                         return PTR_ERR(tps80031->clients[i]);
 445                 }
 446 
 447                 i2c_set_clientdata(tps80031->clients[i], tps80031);
 448                 tps80031->regmap[i] = devm_regmap_init_i2c(tps80031->clients[i],
 449                                         &tps80031_regmap_configs[i]);
 450                 if (IS_ERR(tps80031->regmap[i])) {
 451                         ret = PTR_ERR(tps80031->regmap[i]);
 452                         dev_err(&client->dev,
 453                                 "regmap %d init failed, err %d\n", i, ret);
 454                         return ret;
 455                 }
 456         }
 457 
 458         ret = tps80031_read(&client->dev, TPS80031_SLAVE_ID3,
 459                         TPS80031_JTAGVERNUM, &es_version);
 460         if (ret < 0) {
 461                 dev_err(&client->dev,
 462                         "Silicon version number read failed: %d\n", ret);
 463                 return ret;
 464         }
 465 
 466         ret = tps80031_read(&client->dev, TPS80031_SLAVE_ID3,
 467                         TPS80031_EPROM_REV, &ep_ver);
 468         if (ret < 0) {
 469                 dev_err(&client->dev,
 470                         "Silicon eeprom version read failed: %d\n", ret);
 471                 return ret;
 472         }
 473 
 474         dev_info(&client->dev, "ES version 0x%02x and EPROM version 0x%02x\n",
 475                                         es_version, ep_ver);
 476         tps80031->es_version = es_version;
 477         tps80031->dev = &client->dev;
 478         i2c_set_clientdata(client, tps80031);
 479         tps80031->chip_info = id->driver_data;
 480 
 481         ret = tps80031_irq_init(tps80031, client->irq, pdata->irq_base);
 482         if (ret) {
 483                 dev_err(&client->dev, "IRQ init failed: %d\n", ret);
 484                 return ret;
 485         }
 486 
 487         tps80031_pupd_init(tps80031, pdata);
 488 
 489         tps80031_init_ext_control(tps80031, pdata);
 490 
 491         ret = mfd_add_devices(tps80031->dev, -1,
 492                         tps80031_cell, ARRAY_SIZE(tps80031_cell),
 493                         NULL, 0,
 494                         regmap_irq_get_domain(tps80031->irq_data));
 495         if (ret < 0) {
 496                 dev_err(&client->dev, "mfd_add_devices failed: %d\n", ret);
 497                 goto fail_mfd_add;
 498         }
 499 
 500         if (pdata->use_power_off && !pm_power_off) {
 501                 tps80031_power_off_dev = tps80031;
 502                 pm_power_off = tps80031_power_off;
 503         }
 504         return 0;
 505 
 506 fail_mfd_add:
 507         regmap_del_irq_chip(client->irq, tps80031->irq_data);
 508         return ret;
 509 }
 510 
 511 static const struct i2c_device_id tps80031_id_table[] = {
 512         { "tps80031", TPS80031 },
 513         { "tps80032", TPS80032 },
 514         { }
 515 };
 516 
 517 static struct i2c_driver tps80031_driver = {
 518         .driver = {
 519                 .name                   = "tps80031",
 520                 .suppress_bind_attrs    = true,
 521         },
 522         .probe          = tps80031_probe,
 523         .id_table       = tps80031_id_table,
 524 };
 525 
 526 static int __init tps80031_init(void)
 527 {
 528         return i2c_add_driver(&tps80031_driver);
 529 }
 530 subsys_initcall(tps80031_init);

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