1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Driver for EIP97 cryptographic accelerator.
4 *
5 * Copyright (c) 2016 Ryder Lee <ryder.lee@mediatek.com>
6 */
7
8 #ifndef __MTK_PLATFORM_H_
9 #define __MTK_PLATFORM_H_
10
11 #include <crypto/algapi.h>
12 #include <crypto/internal/aead.h>
13 #include <crypto/internal/hash.h>
14 #include <crypto/scatterwalk.h>
15 #include <crypto/skcipher.h>
16 #include <linux/crypto.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/interrupt.h>
19 #include <linux/scatterlist.h>
20 #include "mtk-regs.h"
21
22 #define MTK_RDR_PROC_THRESH BIT(0)
23 #define MTK_RDR_PROC_MODE BIT(23)
24 #define MTK_CNT_RST BIT(31)
25 #define MTK_IRQ_RDR0 BIT(1)
26 #define MTK_IRQ_RDR1 BIT(3)
27 #define MTK_IRQ_RDR2 BIT(5)
28 #define MTK_IRQ_RDR3 BIT(7)
29
30 #define SIZE_IN_WORDS(x) ((x) >> 2)
31
32 /**
33 * Ring 0/1 are used by AES encrypt and decrypt.
34 * Ring 2/3 are used by SHA.
35 */
36 enum {
37 MTK_RING0,
38 MTK_RING1,
39 MTK_RING2,
40 MTK_RING3,
41 MTK_RING_MAX
42 };
43
44 #define MTK_REC_NUM (MTK_RING_MAX / 2)
45 #define MTK_IRQ_NUM 5
46
47 /**
48 * struct mtk_desc - DMA descriptor
49 * @hdr: the descriptor control header
50 * @buf: DMA address of input buffer segment
51 * @ct: DMA address of command token that control operation flow
52 * @ct_hdr: the command token control header
53 * @tag: the user-defined field
54 * @tfm: DMA address of transform state
55 * @bound: align descriptors offset boundary
56 *
57 * Structure passed to the crypto engine to describe where source
58 * data needs to be fetched and how it needs to be processed.
59 */
60 struct mtk_desc {
61 __le32 hdr;
62 __le32 buf;
63 __le32 ct;
64 __le32 ct_hdr;
65 __le32 tag;
66 __le32 tfm;
67 __le32 bound[2];
68 };
69
70 #define MTK_DESC_NUM 512
71 #define MTK_DESC_OFF SIZE_IN_WORDS(sizeof(struct mtk_desc))
72 #define MTK_DESC_SZ (MTK_DESC_OFF - 2)
73 #define MTK_DESC_RING_SZ ((sizeof(struct mtk_desc) * MTK_DESC_NUM))
74 #define MTK_DESC_CNT(x) ((MTK_DESC_OFF * (x)) << 2)
75 #define MTK_DESC_LAST cpu_to_le32(BIT(22))
76 #define MTK_DESC_FIRST cpu_to_le32(BIT(23))
77 #define MTK_DESC_BUF_LEN(x) cpu_to_le32(x)
78 #define MTK_DESC_CT_LEN(x) cpu_to_le32((x) << 24)
79
80 /**
81 * struct mtk_ring - Descriptor ring
82 * @cmd_base: pointer to command descriptor ring base
83 * @cmd_next: pointer to the next command descriptor
84 * @cmd_dma: DMA address of command descriptor ring
85 * @res_base: pointer to result descriptor ring base
86 * @res_next: pointer to the next result descriptor
87 * @res_prev: pointer to the previous result descriptor
88 * @res_dma: DMA address of result descriptor ring
89 *
90 * A descriptor ring is a circular buffer that is used to manage
91 * one or more descriptors. There are two type of descriptor rings;
92 * the command descriptor ring and result descriptor ring.
93 */
94 struct mtk_ring {
95 struct mtk_desc *cmd_base;
96 struct mtk_desc *cmd_next;
97 dma_addr_t cmd_dma;
98 struct mtk_desc *res_base;
99 struct mtk_desc *res_next;
100 struct mtk_desc *res_prev;
101 dma_addr_t res_dma;
102 };
103
104 /**
105 * struct mtk_aes_dma - Structure that holds sg list info
106 * @sg: pointer to scatter-gather list
107 * @nents: number of entries in the sg list
108 * @remainder: remainder of sg list
109 * @sg_len: number of entries in the sg mapped list
110 */
111 struct mtk_aes_dma {
112 struct scatterlist *sg;
113 int nents;
114 u32 remainder;
115 u32 sg_len;
116 };
117
118 struct mtk_aes_base_ctx;
119 struct mtk_aes_rec;
120 struct mtk_cryp;
121
122 typedef int (*mtk_aes_fn)(struct mtk_cryp *cryp, struct mtk_aes_rec *aes);
123
124 /**
125 * struct mtk_aes_rec - AES operation record
126 * @cryp: pointer to Cryptographic device
127 * @queue: crypto request queue
128 * @areq: pointer to async request
129 * @done_task: the tasklet is use in AES interrupt
130 * @queue_task: the tasklet is used to dequeue request
131 * @ctx: pointer to current context
132 * @src: the structure that holds source sg list info
133 * @dst: the structure that holds destination sg list info
134 * @aligned_sg: the scatter list is use to alignment
135 * @real_dst: pointer to the destination sg list
136 * @resume: pointer to resume function
137 * @total: request buffer length
138 * @buf: pointer to page buffer
139 * @id: the current use of ring
140 * @flags: it's describing AES operation state
141 * @lock: the async queue lock
142 *
143 * Structure used to record AES execution state.
144 */
145 struct mtk_aes_rec {
146 struct mtk_cryp *cryp;
147 struct crypto_queue queue;
148 struct crypto_async_request *areq;
149 struct tasklet_struct done_task;
150 struct tasklet_struct queue_task;
151 struct mtk_aes_base_ctx *ctx;
152 struct mtk_aes_dma src;
153 struct mtk_aes_dma dst;
154
155 struct scatterlist aligned_sg;
156 struct scatterlist *real_dst;
157
158 mtk_aes_fn resume;
159
160 size_t total;
161 void *buf;
162
163 u8 id;
164 unsigned long flags;
165 /* queue lock */
166 spinlock_t lock;
167 };
168
169 /**
170 * struct mtk_sha_rec - SHA operation record
171 * @cryp: pointer to Cryptographic device
172 * @queue: crypto request queue
173 * @req: pointer to ahash request
174 * @done_task: the tasklet is use in SHA interrupt
175 * @queue_task: the tasklet is used to dequeue request
176 * @id: the current use of ring
177 * @flags: it's describing SHA operation state
178 * @lock: the async queue lock
179 *
180 * Structure used to record SHA execution state.
181 */
182 struct mtk_sha_rec {
183 struct mtk_cryp *cryp;
184 struct crypto_queue queue;
185 struct ahash_request *req;
186 struct tasklet_struct done_task;
187 struct tasklet_struct queue_task;
188
189 u8 id;
190 unsigned long flags;
191 /* queue lock */
192 spinlock_t lock;
193 };
194
195 /**
196 * struct mtk_cryp - Cryptographic device
197 * @base: pointer to mapped register I/O base
198 * @dev: pointer to device
199 * @clk_cryp: pointer to crypto clock
200 * @irq: global system and rings IRQ
201 * @ring: pointer to descriptor rings
202 * @aes: pointer to operation record of AES
203 * @sha: pointer to operation record of SHA
204 * @aes_list: device list of AES
205 * @sha_list: device list of SHA
206 * @rec: it's used to select SHA record for tfm
207 *
208 * Structure storing cryptographic device information.
209 */
210 struct mtk_cryp {
211 void __iomem *base;
212 struct device *dev;
213 struct clk *clk_cryp;
214 int irq[MTK_IRQ_NUM];
215
216 struct mtk_ring *ring[MTK_RING_MAX];
217 struct mtk_aes_rec *aes[MTK_REC_NUM];
218 struct mtk_sha_rec *sha[MTK_REC_NUM];
219
220 struct list_head aes_list;
221 struct list_head sha_list;
222
223 bool rec;
224 };
225
226 int mtk_cipher_alg_register(struct mtk_cryp *cryp);
227 void mtk_cipher_alg_release(struct mtk_cryp *cryp);
228 int mtk_hash_alg_register(struct mtk_cryp *cryp);
229 void mtk_hash_alg_release(struct mtk_cryp *cryp);
230
231 #endif /* __MTK_PLATFORM_H_ */