This source file includes following definitions.
- xstore
- via_rng_data_present
- via_rng_data_read
- via_rng_init
- mod_init
- mod_exit
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27 #include <crypto/padlock.h>
28 #include <linux/module.h>
29 #include <linux/kernel.h>
30 #include <linux/hw_random.h>
31 #include <linux/delay.h>
32 #include <asm/cpu_device_id.h>
33 #include <asm/io.h>
34 #include <asm/msr.h>
35 #include <asm/cpufeature.h>
36 #include <asm/fpu/api.h>
37
38
39
40
41 enum {
42 VIA_STRFILT_CNT_SHIFT = 16,
43 VIA_STRFILT_FAIL = (1 << 15),
44 VIA_STRFILT_ENABLE = (1 << 14),
45 VIA_RAWBITS_ENABLE = (1 << 13),
46 VIA_RNG_ENABLE = (1 << 6),
47 VIA_NOISESRC1 = (1 << 8),
48 VIA_NOISESRC2 = (1 << 9),
49 VIA_XSTORE_CNT_MASK = 0x0F,
50
51 VIA_RNG_CHUNK_8 = 0x00,
52 VIA_RNG_CHUNK_4 = 0x01,
53 VIA_RNG_CHUNK_4_MASK = 0xFFFFFFFF,
54 VIA_RNG_CHUNK_2 = 0x02,
55 VIA_RNG_CHUNK_2_MASK = 0xFFFF,
56 VIA_RNG_CHUNK_1 = 0x03,
57 VIA_RNG_CHUNK_1_MASK = 0xFF,
58 };
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77 static inline u32 xstore(u32 *addr, u32 edx_in)
78 {
79 u32 eax_out;
80
81 asm(".byte 0x0F,0xA7,0xC0 /* xstore %%edi (addr=%0) */"
82 : "=m" (*addr), "=a" (eax_out), "+d" (edx_in), "+D" (addr));
83
84 return eax_out;
85 }
86
87 static int via_rng_data_present(struct hwrng *rng, int wait)
88 {
89 char buf[16 + PADLOCK_ALIGNMENT - STACK_ALIGN] __attribute__
90 ((aligned(STACK_ALIGN)));
91 u32 *via_rng_datum = (u32 *)PTR_ALIGN(&buf[0], PADLOCK_ALIGNMENT);
92 u32 bytes_out;
93 int i;
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108 for (i = 0; i < 20; i++) {
109 *via_rng_datum = 0;
110 bytes_out = xstore(via_rng_datum, VIA_RNG_CHUNK_1);
111 bytes_out &= VIA_XSTORE_CNT_MASK;
112 if (bytes_out || !wait)
113 break;
114 udelay(10);
115 }
116 rng->priv = *via_rng_datum;
117 return bytes_out ? 1 : 0;
118 }
119
120 static int via_rng_data_read(struct hwrng *rng, u32 *data)
121 {
122 u32 via_rng_datum = (u32)rng->priv;
123
124 *data = via_rng_datum;
125
126 return 1;
127 }
128
129 static int via_rng_init(struct hwrng *rng)
130 {
131 struct cpuinfo_x86 *c = &cpu_data(0);
132 u32 lo, hi, old_lo;
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137
138 if (((c->x86 == 6) && (c->x86_model >= 0x0f)) || (c->x86 > 6)){
139 if (!boot_cpu_has(X86_FEATURE_XSTORE_EN)) {
140 pr_err(PFX "can't enable hardware RNG "
141 "if XSTORE is not enabled\n");
142 return -ENODEV;
143 }
144 return 0;
145 }
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153 rdmsr(MSR_VIA_RNG, lo, hi);
154
155 old_lo = lo;
156 lo &= ~(0x7f << VIA_STRFILT_CNT_SHIFT);
157 lo &= ~VIA_XSTORE_CNT_MASK;
158 lo &= ~(VIA_STRFILT_ENABLE | VIA_STRFILT_FAIL | VIA_RAWBITS_ENABLE);
159 lo |= VIA_RNG_ENABLE;
160 lo |= VIA_NOISESRC1;
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164
165 if ((c->x86_model == 9) && (c->x86_stepping > 7))
166 lo |= VIA_NOISESRC2;
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169 if (c->x86_model >= 10)
170 lo |= VIA_NOISESRC2;
171
172 if (lo != old_lo)
173 wrmsr(MSR_VIA_RNG, lo, hi);
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177 rdmsr(MSR_VIA_RNG, lo, hi);
178 if ((lo & VIA_RNG_ENABLE) == 0) {
179 pr_err(PFX "cannot enable VIA C3 RNG, aborting\n");
180 return -ENODEV;
181 }
182
183 return 0;
184 }
185
186
187 static struct hwrng via_rng = {
188 .name = "via",
189 .init = via_rng_init,
190 .data_present = via_rng_data_present,
191 .data_read = via_rng_data_read,
192 };
193
194
195 static int __init mod_init(void)
196 {
197 int err;
198
199 if (!boot_cpu_has(X86_FEATURE_XSTORE))
200 return -ENODEV;
201
202 pr_info("VIA RNG detected\n");
203 err = hwrng_register(&via_rng);
204 if (err) {
205 pr_err(PFX "RNG registering failed (%d)\n",
206 err);
207 goto out;
208 }
209 out:
210 return err;
211 }
212
213 static void __exit mod_exit(void)
214 {
215 hwrng_unregister(&via_rng);
216 }
217
218 module_init(mod_init);
219 module_exit(mod_exit);
220
221 static struct x86_cpu_id __maybe_unused via_rng_cpu_id[] = {
222 X86_FEATURE_MATCH(X86_FEATURE_XSTORE),
223 {}
224 };
225
226 MODULE_DESCRIPTION("H/W RNG driver for VIA CPU with PadLock");
227 MODULE_LICENSE("GPL");
228 MODULE_DEVICE_TABLE(x86cpu, via_rng_cpu_id);