root/drivers/char/hw_random/timeriomem-rng.c

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DEFINITIONS

This source file includes following definitions.
  1. timeriomem_rng_read
  2. timeriomem_rng_trigger
  3. timeriomem_rng_probe
  4. timeriomem_rng_remove

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * drivers/char/hw_random/timeriomem-rng.c
   4  *
   5  * Copyright (C) 2009 Alexander Clouter <alex@digriz.org.uk>
   6  *
   7  * Derived from drivers/char/hw_random/omap-rng.c
   8  *   Copyright 2005 (c) MontaVista Software, Inc.
   9  *   Author: Deepak Saxena <dsaxena@plexity.net>
  10  *
  11  * Overview:
  12  *   This driver is useful for platforms that have an IO range that provides
  13  *   periodic random data from a single IO memory address.  All the platform
  14  *   has to do is provide the address and 'wait time' that new data becomes
  15  *   available.
  16  *
  17  * TODO: add support for reading sizes other than 32bits and masking
  18  */
  19 
  20 #include <linux/completion.h>
  21 #include <linux/delay.h>
  22 #include <linux/hrtimer.h>
  23 #include <linux/hw_random.h>
  24 #include <linux/io.h>
  25 #include <linux/ktime.h>
  26 #include <linux/module.h>
  27 #include <linux/of.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/slab.h>
  30 #include <linux/time.h>
  31 #include <linux/timeriomem-rng.h>
  32 
  33 struct timeriomem_rng_private {
  34         void __iomem            *io_base;
  35         ktime_t                 period;
  36         unsigned int            present:1;
  37 
  38         struct hrtimer          timer;
  39         struct completion       completion;
  40 
  41         struct hwrng            rng_ops;
  42 };
  43 
  44 static int timeriomem_rng_read(struct hwrng *hwrng, void *data,
  45                                 size_t max, bool wait)
  46 {
  47         struct timeriomem_rng_private *priv =
  48                 container_of(hwrng, struct timeriomem_rng_private, rng_ops);
  49         int retval = 0;
  50         int period_us = ktime_to_us(priv->period);
  51 
  52         /*
  53          * There may not have been enough time for new data to be generated
  54          * since the last request.  If the caller doesn't want to wait, let them
  55          * bail out.  Otherwise, wait for the completion.  If the new data has
  56          * already been generated, the completion should already be available.
  57          */
  58         if (!wait && !priv->present)
  59                 return 0;
  60 
  61         wait_for_completion(&priv->completion);
  62 
  63         do {
  64                 /*
  65                  * After the first read, all additional reads will need to wait
  66                  * for the RNG to generate new data.  Since the period can have
  67                  * a wide range of values (1us to 1s have been observed), allow
  68                  * for 1% tolerance in the sleep time rather than a fixed value.
  69                  */
  70                 if (retval > 0)
  71                         usleep_range(period_us,
  72                                         period_us + min(1, period_us / 100));
  73 
  74                 *(u32 *)data = readl(priv->io_base);
  75                 retval += sizeof(u32);
  76                 data += sizeof(u32);
  77                 max -= sizeof(u32);
  78         } while (wait && max > sizeof(u32));
  79 
  80         /*
  81          * Block any new callers until the RNG has had time to generate new
  82          * data.
  83          */
  84         priv->present = 0;
  85         reinit_completion(&priv->completion);
  86         hrtimer_forward_now(&priv->timer, priv->period);
  87         hrtimer_restart(&priv->timer);
  88 
  89         return retval;
  90 }
  91 
  92 static enum hrtimer_restart timeriomem_rng_trigger(struct hrtimer *timer)
  93 {
  94         struct timeriomem_rng_private *priv
  95                 = container_of(timer, struct timeriomem_rng_private, timer);
  96 
  97         priv->present = 1;
  98         complete(&priv->completion);
  99 
 100         return HRTIMER_NORESTART;
 101 }
 102 
 103 static int timeriomem_rng_probe(struct platform_device *pdev)
 104 {
 105         struct timeriomem_rng_data *pdata = pdev->dev.platform_data;
 106         struct timeriomem_rng_private *priv;
 107         struct resource *res;
 108         int err = 0;
 109         int period;
 110 
 111         if (!pdev->dev.of_node && !pdata) {
 112                 dev_err(&pdev->dev, "timeriomem_rng_data is missing\n");
 113                 return -EINVAL;
 114         }
 115 
 116         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 117         if (!res)
 118                 return -ENXIO;
 119 
 120         if (res->start % 4 != 0 || resource_size(res) < 4) {
 121                 dev_err(&pdev->dev,
 122                         "address must be at least four bytes wide and 32-bit aligned\n");
 123                 return -EINVAL;
 124         }
 125 
 126         /* Allocate memory for the device structure (and zero it) */
 127         priv = devm_kzalloc(&pdev->dev,
 128                         sizeof(struct timeriomem_rng_private), GFP_KERNEL);
 129         if (!priv)
 130                 return -ENOMEM;
 131 
 132         platform_set_drvdata(pdev, priv);
 133 
 134         if (pdev->dev.of_node) {
 135                 int i;
 136 
 137                 if (!of_property_read_u32(pdev->dev.of_node,
 138                                                 "period", &i))
 139                         period = i;
 140                 else {
 141                         dev_err(&pdev->dev, "missing period\n");
 142                         return -EINVAL;
 143                 }
 144 
 145                 if (!of_property_read_u32(pdev->dev.of_node,
 146                                                 "quality", &i))
 147                         priv->rng_ops.quality = i;
 148                 else
 149                         priv->rng_ops.quality = 0;
 150         } else {
 151                 period = pdata->period;
 152                 priv->rng_ops.quality = pdata->quality;
 153         }
 154 
 155         priv->period = ns_to_ktime(period * NSEC_PER_USEC);
 156         init_completion(&priv->completion);
 157         hrtimer_init(&priv->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 158         priv->timer.function = timeriomem_rng_trigger;
 159 
 160         priv->rng_ops.name = dev_name(&pdev->dev);
 161         priv->rng_ops.read = timeriomem_rng_read;
 162 
 163         priv->io_base = devm_ioremap_resource(&pdev->dev, res);
 164         if (IS_ERR(priv->io_base)) {
 165                 return PTR_ERR(priv->io_base);
 166         }
 167 
 168         /* Assume random data is already available. */
 169         priv->present = 1;
 170         complete(&priv->completion);
 171 
 172         err = hwrng_register(&priv->rng_ops);
 173         if (err) {
 174                 dev_err(&pdev->dev, "problem registering\n");
 175                 return err;
 176         }
 177 
 178         dev_info(&pdev->dev, "32bits from 0x%p @ %dus\n",
 179                         priv->io_base, period);
 180 
 181         return 0;
 182 }
 183 
 184 static int timeriomem_rng_remove(struct platform_device *pdev)
 185 {
 186         struct timeriomem_rng_private *priv = platform_get_drvdata(pdev);
 187 
 188         hwrng_unregister(&priv->rng_ops);
 189         hrtimer_cancel(&priv->timer);
 190 
 191         return 0;
 192 }
 193 
 194 static const struct of_device_id timeriomem_rng_match[] = {
 195         { .compatible = "timeriomem_rng" },
 196         {},
 197 };
 198 MODULE_DEVICE_TABLE(of, timeriomem_rng_match);
 199 
 200 static struct platform_driver timeriomem_rng_driver = {
 201         .driver = {
 202                 .name           = "timeriomem_rng",
 203                 .of_match_table = timeriomem_rng_match,
 204         },
 205         .probe          = timeriomem_rng_probe,
 206         .remove         = timeriomem_rng_remove,
 207 };
 208 
 209 module_platform_driver(timeriomem_rng_driver);
 210 
 211 MODULE_LICENSE("GPL");
 212 MODULE_AUTHOR("Alexander Clouter <alex@digriz.org.uk>");
 213 MODULE_DESCRIPTION("Timer IOMEM H/W RNG driver");

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