This source file includes following definitions.
- nsp32_message
- nsp32_dmessage
- nsp32_build_identify
- nsp32_build_sdtr
- nsp32_build_nop
- nsp32_build_reject
- nsp32_start_timer
- nsp32_selection_autopara
- nsp32_selection_autoscsi
- nsp32_arbitration
- nsp32_reselection
- nsp32_setup_sg_table
- nsp32_queuecommand_lck
- DEF_SCSI_QCMD
- do_nsp32_isr
- nsp32_show_info
- nsp32_scsi_done
- nsp32_busfree_occur
- nsp32_adjust_busfree
- nsp32_msgout_occur
- nsp32_restart_autoscsi
- nsp32_msgin_occur
- nsp32_analyze_sdtr
- nsp32_search_period_entry
- nsp32_set_async
- nsp32_set_max_sync
- nsp32_set_sync_entry
- nsp32_wait_req
- nsp32_wait_sack
- nsp32_sack_assert
- nsp32_sack_negate
- nsp32_detect
- nsp32_release
- nsp32_info
- nsp32_eh_abort
- nsp32_do_bus_reset
- nsp32_eh_host_reset
- nsp32_getprom_param
- nsp32_getprom_at24
- nsp32_getprom_c16
- nsp32_prom_read
- nsp32_prom_set
- nsp32_prom_get
- nsp32_prom_start
- nsp32_prom_stop
- nsp32_prom_write_bit
- nsp32_prom_read_bit
- nsp32_suspend
- nsp32_resume
- nsp32_probe
- nsp32_remove
- init_nsp32
- exit_nsp32
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16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/timer.h>
21 #include <linux/ioport.h>
22 #include <linux/major.h>
23 #include <linux/blkdev.h>
24 #include <linux/interrupt.h>
25 #include <linux/pci.h>
26 #include <linux/delay.h>
27 #include <linux/ctype.h>
28 #include <linux/dma-mapping.h>
29
30 #include <asm/dma.h>
31 #include <asm/io.h>
32
33 #include <scsi/scsi.h>
34 #include <scsi/scsi_cmnd.h>
35 #include <scsi/scsi_device.h>
36 #include <scsi/scsi_host.h>
37 #include <scsi/scsi_ioctl.h>
38
39 #include "nsp32.h"
40
41
42
43
44
45 static int trans_mode = 0;
46 module_param (trans_mode, int, 0);
47 MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
48 #define ASYNC_MODE 1
49 #define ULTRA20M_MODE 2
50
51 static bool auto_param = 0;
52 module_param (auto_param, bool, 0);
53 MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
54
55 static bool disc_priv = 1;
56 module_param (disc_priv, bool, 0);
57 MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
58
59 MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
60 MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
61 MODULE_LICENSE("GPL");
62
63 static const char *nsp32_release_version = "1.2";
64
65
66
67
68
69 static struct pci_device_id nsp32_pci_table[] = {
70 {
71 .vendor = PCI_VENDOR_ID_IODATA,
72 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
73 .subvendor = PCI_ANY_ID,
74 .subdevice = PCI_ANY_ID,
75 .driver_data = MODEL_IODATA,
76 },
77 {
78 .vendor = PCI_VENDOR_ID_WORKBIT,
79 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
80 .subvendor = PCI_ANY_ID,
81 .subdevice = PCI_ANY_ID,
82 .driver_data = MODEL_KME,
83 },
84 {
85 .vendor = PCI_VENDOR_ID_WORKBIT,
86 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
87 .subvendor = PCI_ANY_ID,
88 .subdevice = PCI_ANY_ID,
89 .driver_data = MODEL_WORKBIT,
90 },
91 {
92 .vendor = PCI_VENDOR_ID_WORKBIT,
93 .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
94 .subvendor = PCI_ANY_ID,
95 .subdevice = PCI_ANY_ID,
96 .driver_data = MODEL_PCI_WORKBIT,
97 },
98 {
99 .vendor = PCI_VENDOR_ID_WORKBIT,
100 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
101 .subvendor = PCI_ANY_ID,
102 .subdevice = PCI_ANY_ID,
103 .driver_data = MODEL_LOGITEC,
104 },
105 {
106 .vendor = PCI_VENDOR_ID_WORKBIT,
107 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
108 .subvendor = PCI_ANY_ID,
109 .subdevice = PCI_ANY_ID,
110 .driver_data = MODEL_PCI_LOGITEC,
111 },
112 {
113 .vendor = PCI_VENDOR_ID_WORKBIT,
114 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
115 .subvendor = PCI_ANY_ID,
116 .subdevice = PCI_ANY_ID,
117 .driver_data = MODEL_PCI_MELCO,
118 },
119 {
120 .vendor = PCI_VENDOR_ID_WORKBIT,
121 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
122 .subvendor = PCI_ANY_ID,
123 .subdevice = PCI_ANY_ID,
124 .driver_data = MODEL_PCI_MELCO,
125 },
126 {0,0,},
127 };
128 MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
129
130 static nsp32_hw_data nsp32_data_base;
131
132
133
134
135
136
137
138 static nsp32_sync_table nsp32_sync_table_40M[] = {
139
140 {0x1, 0, 0x0c, 0x0c, SMPL_40M},
141 {0x2, 0, 0x0d, 0x18, SMPL_40M},
142 {0x3, 1, 0x19, 0x19, SMPL_40M},
143 {0x4, 1, 0x1a, 0x1f, SMPL_20M},
144 {0x5, 2, 0x20, 0x25, SMPL_20M},
145 {0x6, 2, 0x26, 0x31, SMPL_20M},
146 {0x7, 3, 0x32, 0x32, SMPL_20M},
147 {0x8, 3, 0x33, 0x38, SMPL_10M},
148 {0x9, 3, 0x39, 0x3e, SMPL_10M},
149 };
150
151 static nsp32_sync_table nsp32_sync_table_20M[] = {
152 {0x1, 0, 0x19, 0x19, SMPL_40M},
153 {0x2, 0, 0x1a, 0x25, SMPL_20M},
154 {0x3, 1, 0x26, 0x32, SMPL_20M},
155 {0x4, 1, 0x33, 0x3e, SMPL_10M},
156 {0x5, 2, 0x3f, 0x4b, SMPL_10M},
157 {0x6, 2, 0x4c, 0x57, SMPL_10M},
158 {0x7, 3, 0x58, 0x64, SMPL_10M},
159 {0x8, 3, 0x65, 0x70, SMPL_10M},
160 {0x9, 3, 0x71, 0x7d, SMPL_10M},
161 };
162
163 static nsp32_sync_table nsp32_sync_table_pci[] = {
164 {0x1, 0, 0x0c, 0x0f, SMPL_40M},
165 {0x2, 0, 0x10, 0x16, SMPL_40M},
166 {0x3, 1, 0x17, 0x1e, SMPL_20M},
167 {0x4, 1, 0x1f, 0x25, SMPL_20M},
168 {0x5, 2, 0x26, 0x2d, SMPL_20M},
169 {0x6, 2, 0x2e, 0x34, SMPL_10M},
170 {0x7, 3, 0x35, 0x3c, SMPL_10M},
171 {0x8, 3, 0x3d, 0x43, SMPL_10M},
172 {0x9, 3, 0x44, 0x4b, SMPL_10M},
173 };
174
175
176
177
178
179 static int nsp32_probe (struct pci_dev *, const struct pci_device_id *);
180 static void nsp32_remove(struct pci_dev *);
181 static int __init init_nsp32 (void);
182 static void __exit exit_nsp32 (void);
183
184
185 static int nsp32_show_info (struct seq_file *, struct Scsi_Host *);
186
187 static int nsp32_detect (struct pci_dev *pdev);
188 static int nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
189 static const char *nsp32_info (struct Scsi_Host *);
190 static int nsp32_release (struct Scsi_Host *);
191
192
193 static int nsp32_eh_abort (struct scsi_cmnd *);
194 static int nsp32_eh_host_reset(struct scsi_cmnd *);
195
196
197 static void nsp32_build_identify(struct scsi_cmnd *);
198 static void nsp32_build_nop (struct scsi_cmnd *);
199 static void nsp32_build_reject (struct scsi_cmnd *);
200 static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
201
202
203 static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
204 static void nsp32_msgout_occur (struct scsi_cmnd *);
205 static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
206
207 static int nsp32_setup_sg_table (struct scsi_cmnd *);
208 static int nsp32_selection_autopara(struct scsi_cmnd *);
209 static int nsp32_selection_autoscsi(struct scsi_cmnd *);
210 static void nsp32_scsi_done (struct scsi_cmnd *);
211 static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
212 static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
213 static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
214 static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
215
216
217 static void nsp32_analyze_sdtr (struct scsi_cmnd *);
218 static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
219 static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
220 static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
221 static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
222
223
224 static void nsp32_wait_req (nsp32_hw_data *, int);
225 static void nsp32_wait_sack (nsp32_hw_data *, int);
226 static void nsp32_sack_assert (nsp32_hw_data *);
227 static void nsp32_sack_negate (nsp32_hw_data *);
228 static void nsp32_do_bus_reset(nsp32_hw_data *);
229
230
231 static irqreturn_t do_nsp32_isr(int, void *);
232
233
234 static int nsp32hw_init(nsp32_hw_data *);
235
236
237 static int nsp32_getprom_param (nsp32_hw_data *);
238 static int nsp32_getprom_at24 (nsp32_hw_data *);
239 static int nsp32_getprom_c16 (nsp32_hw_data *);
240 static void nsp32_prom_start (nsp32_hw_data *);
241 static void nsp32_prom_stop (nsp32_hw_data *);
242 static int nsp32_prom_read (nsp32_hw_data *, int);
243 static int nsp32_prom_read_bit (nsp32_hw_data *);
244 static void nsp32_prom_write_bit(nsp32_hw_data *, int);
245 static void nsp32_prom_set (nsp32_hw_data *, int, int);
246 static int nsp32_prom_get (nsp32_hw_data *, int);
247
248
249 static void nsp32_message (const char *, int, char *, char *, ...);
250 #ifdef NSP32_DEBUG
251 static void nsp32_dmessage(const char *, int, int, char *, ...);
252 #endif
253
254
255
256
257 static struct scsi_host_template nsp32_template = {
258 .proc_name = "nsp32",
259 .name = "Workbit NinjaSCSI-32Bi/UDE",
260 .show_info = nsp32_show_info,
261 .info = nsp32_info,
262 .queuecommand = nsp32_queuecommand,
263 .can_queue = 1,
264 .sg_tablesize = NSP32_SG_SIZE,
265 .max_sectors = 128,
266 .this_id = NSP32_HOST_SCSIID,
267 .dma_boundary = PAGE_SIZE - 1,
268 .eh_abort_handler = nsp32_eh_abort,
269 .eh_host_reset_handler = nsp32_eh_host_reset,
270
271 };
272
273 #include "nsp32_io.h"
274
275
276
277
278 #ifndef NSP32_DEBUG
279 # define NSP32_DEBUG_MASK 0x000000
280 # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
281 # define nsp32_dbg(mask, args...)
282 #else
283 # define NSP32_DEBUG_MASK 0xffffff
284 # define nsp32_msg(type, args...) \
285 nsp32_message (__func__, __LINE__, (type), args)
286 # define nsp32_dbg(mask, args...) \
287 nsp32_dmessage(__func__, __LINE__, (mask), args)
288 #endif
289
290 #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
291 #define NSP32_DEBUG_REGISTER BIT(1)
292 #define NSP32_DEBUG_AUTOSCSI BIT(2)
293 #define NSP32_DEBUG_INTR BIT(3)
294 #define NSP32_DEBUG_SGLIST BIT(4)
295 #define NSP32_DEBUG_BUSFREE BIT(5)
296 #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
297 #define NSP32_DEBUG_RESELECTION BIT(7)
298 #define NSP32_DEBUG_MSGINOCCUR BIT(8)
299 #define NSP32_DEBUG_EEPROM BIT(9)
300 #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
301 #define NSP32_DEBUG_BUSRESET BIT(11)
302 #define NSP32_DEBUG_RESTART BIT(12)
303 #define NSP32_DEBUG_SYNC BIT(13)
304 #define NSP32_DEBUG_WAIT BIT(14)
305 #define NSP32_DEBUG_TARGETFLAG BIT(15)
306 #define NSP32_DEBUG_PROC BIT(16)
307 #define NSP32_DEBUG_INIT BIT(17)
308 #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
309
310 #define NSP32_DEBUG_BUF_LEN 100
311
312 static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
313 {
314 va_list args;
315 char buf[NSP32_DEBUG_BUF_LEN];
316
317 va_start(args, fmt);
318 vsnprintf(buf, sizeof(buf), fmt, args);
319 va_end(args);
320
321 #ifndef NSP32_DEBUG
322 printk("%snsp32: %s\n", type, buf);
323 #else
324 printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
325 #endif
326 }
327
328 #ifdef NSP32_DEBUG
329 static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
330 {
331 va_list args;
332 char buf[NSP32_DEBUG_BUF_LEN];
333
334 va_start(args, fmt);
335 vsnprintf(buf, sizeof(buf), fmt, args);
336 va_end(args);
337
338 if (mask & NSP32_DEBUG_MASK) {
339 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
340 }
341 }
342 #endif
343
344 #ifdef NSP32_DEBUG
345 # include "nsp32_debug.c"
346 #else
347 # define show_command(arg)
348 # define show_busphase(arg)
349 # define show_autophase(arg)
350 #endif
351
352
353
354
355 static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
356 {
357 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
358 int pos = data->msgout_len;
359 int mode = FALSE;
360
361
362 if (disc_priv == 0) {
363
364 }
365
366 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
367
368 data->msgout_len = pos;
369 }
370
371
372
373
374 static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
375 unsigned char period,
376 unsigned char offset)
377 {
378 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
379 int pos = data->msgout_len;
380
381 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
382 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
383 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
384 data->msgoutbuf[pos] = period; pos++;
385 data->msgoutbuf[pos] = offset; pos++;
386
387 data->msgout_len = pos;
388 }
389
390
391
392
393 static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
394 {
395 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
396 int pos = data->msgout_len;
397
398 if (pos != 0) {
399 nsp32_msg(KERN_WARNING,
400 "Some messages are already contained!");
401 return;
402 }
403
404 data->msgoutbuf[pos] = NOP; pos++;
405 data->msgout_len = pos;
406 }
407
408
409
410
411 static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
412 {
413 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
414 int pos = data->msgout_len;
415
416 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
417 data->msgout_len = pos;
418 }
419
420
421
422
423 #if 0
424 static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
425 {
426 unsigned int base = SCpnt->host->io_port;
427
428 nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
429
430 if (time & (~TIMER_CNT_MASK)) {
431 nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
432 }
433
434 nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
435 }
436 #endif
437
438
439
440
441
442 static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
443 {
444 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
445 unsigned int base = SCpnt->device->host->io_port;
446 unsigned int host_id = SCpnt->device->host->this_id;
447 unsigned char target = scmd_id(SCpnt);
448 nsp32_autoparam *param = data->autoparam;
449 unsigned char phase;
450 int i, ret;
451 unsigned int msgout;
452 u16_le s;
453
454 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
455
456
457
458
459 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
460 if (phase != BUSMON_BUS_FREE) {
461 nsp32_msg(KERN_WARNING, "bus busy");
462 show_busphase(phase & BUSMON_PHASE_MASK);
463 SCpnt->result = DID_BUS_BUSY << 16;
464 return FALSE;
465 }
466
467
468
469
470
471
472
473 if (data->msgout_len == 0) {
474 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
475 SCpnt->result = DID_ERROR << 16;
476 return FALSE;
477 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
478 msgout = 0;
479 for (i = 0; i < data->msgout_len; i++) {
480
481
482
483
484
485
486 msgout >>= 8;
487 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
488 }
489 msgout |= MV_VALID;
490 msgout |= (unsigned int)data->msgout_len;
491 } else {
492
493 msgout = 0;
494 }
495
496
497
498
499
500
501
502 memset(param, 0, sizeof(nsp32_autoparam));
503
504
505 for (i = 0; i < SCpnt->cmd_len; i++) {
506 param->cdb[4 * i] = SCpnt->cmnd[i];
507 }
508
509
510 param->msgout = cpu_to_le32(msgout);
511
512
513 param->syncreg = data->cur_target->syncreg;
514 param->ackwidth = data->cur_target->ackwidth;
515 param->target_id = BIT(host_id) | BIT(target);
516 param->sample_reg = data->cur_target->sample_reg;
517
518
519
520
521 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
522 AUTOSCSI_START |
523 AUTO_MSGIN_00_OR_04 |
524 AUTO_MSGIN_02 |
525 AUTO_ATN );
526
527
528
529 s = 0;
530 switch (data->trans_method) {
531 case NSP32_TRANSFER_BUSMASTER:
532 s |= BM_START;
533 break;
534 case NSP32_TRANSFER_MMIO:
535 s |= CB_MMIO_MODE;
536 break;
537 case NSP32_TRANSFER_PIO:
538 s |= CB_IO_MODE;
539 break;
540 default:
541 nsp32_msg(KERN_ERR, "unknown trans_method");
542 break;
543 }
544
545
546
547
548 s |= (TRANSFER_GO | ALL_COUNTER_CLR);
549 param->transfer_control = cpu_to_le16(s);
550
551
552 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
553
554
555
556
557 nsp32_write4(base, SGT_ADR, data->auto_paddr);
558 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
559 AUTO_PARAMETER );
560
561
562
563
564 ret = nsp32_arbitration(SCpnt, base);
565
566 return ret;
567 }
568
569
570
571
572
573 static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
574 {
575 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
576 unsigned int base = SCpnt->device->host->io_port;
577 unsigned int host_id = SCpnt->device->host->this_id;
578 unsigned char target = scmd_id(SCpnt);
579 unsigned char phase;
580 int status;
581 unsigned short command = 0;
582 unsigned int msgout = 0;
583 unsigned short execph;
584 int i;
585
586 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
587
588
589
590
591 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
592
593
594
595
596 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
597 if ((phase & BUSMON_BSY) || (phase & BUSMON_SEL)) {
598 nsp32_msg(KERN_WARNING, "bus busy");
599 SCpnt->result = DID_BUS_BUSY << 16;
600 status = 1;
601 goto out;
602 }
603
604
605
606
607 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
608
609
610
611
612 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
613
614
615
616
617 for (i = 0; i < SCpnt->cmd_len; i++) {
618 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
619 }
620 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
621
622
623
624
625 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
626
627
628
629
630
631
632
633 if (data->msgout_len == 0) {
634 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
635 SCpnt->result = DID_ERROR << 16;
636 status = 1;
637 goto out;
638 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
639 msgout = 0;
640 for (i = 0; i < data->msgout_len; i++) {
641
642
643
644
645
646
647 msgout >>= 8;
648 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
649 }
650 msgout |= MV_VALID;
651 msgout |= (unsigned int)data->msgout_len;
652 nsp32_write4(base, SCSI_MSG_OUT, msgout);
653 } else {
654
655 nsp32_write4(base, SCSI_MSG_OUT, 0);
656 }
657
658
659
660
661 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
662
663
664
665
666
667
668
669 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
670
671
672
673
674 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
675
676
677
678
679
680 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
681
682
683
684
685 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
686
687 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
688 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
689 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
690 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
691 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
692 data->msgout_len, msgout);
693
694
695
696
697 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
698
699
700
701
702 command = 0;
703 command |= (TRANSFER_GO | ALL_COUNTER_CLR);
704 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
705 if (scsi_bufflen(SCpnt) > 0) {
706 command |= BM_START;
707 }
708 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
709 command |= CB_MMIO_MODE;
710 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
711 command |= CB_IO_MODE;
712 }
713 nsp32_write2(base, TRANSFER_CONTROL, command);
714
715
716
717
718 command = (CLEAR_CDB_FIFO_POINTER |
719 AUTOSCSI_START |
720 AUTO_MSGIN_00_OR_04 |
721 AUTO_MSGIN_02 |
722 AUTO_ATN );
723 nsp32_write2(base, COMMAND_CONTROL, command);
724
725
726
727
728 status = nsp32_arbitration(SCpnt, base);
729
730 out:
731
732
733
734 nsp32_write2(base, IRQ_CONTROL, 0);
735
736 return status;
737 }
738
739
740
741
742
743
744
745
746
747
748 static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
749 {
750 unsigned char arbit;
751 int status = TRUE;
752 int time = 0;
753
754 do {
755 arbit = nsp32_read1(base, ARBIT_STATUS);
756 time++;
757 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
758 (time <= ARBIT_TIMEOUT_TIME));
759
760 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
761 "arbit: 0x%x, delay time: %d", arbit, time);
762
763 if (arbit & ARBIT_WIN) {
764
765 SCpnt->result = DID_OK << 16;
766 nsp32_index_write1(base, EXT_PORT, LED_ON);
767 } else if (arbit & ARBIT_FAIL) {
768
769 SCpnt->result = DID_BUS_BUSY << 16;
770 status = FALSE;
771 } else {
772
773
774
775
776 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
777 SCpnt->result = DID_NO_CONNECT << 16;
778 status = FALSE;
779 }
780
781
782
783
784 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
785
786 return status;
787 }
788
789
790
791
792
793
794
795
796
797 static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
798 {
799 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
800 unsigned int host_id = SCpnt->device->host->this_id;
801 unsigned int base = SCpnt->device->host->io_port;
802 unsigned char tmpid, newid;
803
804 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
805
806
807
808
809 tmpid = nsp32_read1(base, RESELECT_ID);
810 tmpid &= (~BIT(host_id));
811 newid = 0;
812 while (tmpid) {
813 if (tmpid & 1) {
814 break;
815 }
816 tmpid >>= 1;
817 newid++;
818 }
819
820
821
822
823
824
825 if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
826 nsp32_msg(KERN_WARNING, "unknown id/lun");
827 return FALSE;
828 } else if(data->lunt[newid][newlun].SCpnt == NULL) {
829 nsp32_msg(KERN_WARNING, "no SCSI command is processing");
830 return FALSE;
831 }
832
833 data->cur_id = newid;
834 data->cur_lun = newlun;
835 data->cur_target = &(data->target[newid]);
836 data->cur_lunt = &(data->lunt[newid][newlun]);
837
838
839 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
840
841 return TRUE;
842 }
843
844
845
846
847
848
849
850
851 static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
852 {
853 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
854 struct scatterlist *sg;
855 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
856 int num, i;
857 u32_le l;
858
859 if (sgt == NULL) {
860 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
861 return FALSE;
862 }
863
864 num = scsi_dma_map(SCpnt);
865 if (!num)
866 return TRUE;
867 else if (num < 0)
868 return FALSE;
869 else {
870 scsi_for_each_sg(SCpnt, sg, num, i) {
871
872
873
874 sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
875 sgt[i].len = cpu_to_le32(sg_dma_len(sg));
876
877 if (le32_to_cpu(sgt[i].len) > 0x10000) {
878 nsp32_msg(KERN_ERR,
879 "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
880 return FALSE;
881 }
882 nsp32_dbg(NSP32_DEBUG_SGLIST,
883 "num 0x%x : addr 0x%lx len 0x%lx",
884 i,
885 le32_to_cpu(sgt[i].addr),
886 le32_to_cpu(sgt[i].len ));
887 }
888
889
890 l = le32_to_cpu(sgt[num-1].len);
891 sgt[num-1].len = cpu_to_le32(l | SGTEND);
892 }
893
894 return TRUE;
895 }
896
897 static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
898 {
899 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
900 nsp32_target *target;
901 nsp32_lunt *cur_lunt;
902 int ret;
903
904 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
905 "enter. target: 0x%x LUN: 0x%llx cmnd: 0x%x cmndlen: 0x%x "
906 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
907 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
908 scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
909
910 if (data->CurrentSC != NULL) {
911 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
912 data->CurrentSC = NULL;
913 SCpnt->result = DID_NO_CONNECT << 16;
914 done(SCpnt);
915 return 0;
916 }
917
918
919 if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
920 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "target==host???");
921 SCpnt->result = DID_BAD_TARGET << 16;
922 done(SCpnt);
923 return 0;
924 }
925
926
927 if (SCpnt->device->lun >= MAX_LUN) {
928 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
929 SCpnt->result = DID_BAD_TARGET << 16;
930 done(SCpnt);
931 return 0;
932 }
933
934 show_command(SCpnt);
935
936 SCpnt->scsi_done = done;
937 data->CurrentSC = SCpnt;
938 SCpnt->SCp.Status = CHECK_CONDITION;
939 SCpnt->SCp.Message = 0;
940 scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
941
942 SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
943 SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
944 SCpnt->SCp.buffer = NULL;
945 SCpnt->SCp.buffers_residual = 0;
946
947
948 data->msgout_len = 0;
949 data->msgin_len = 0;
950 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
951 cur_lunt->SCpnt = SCpnt;
952 cur_lunt->save_datp = 0;
953 cur_lunt->msgin03 = FALSE;
954 data->cur_lunt = cur_lunt;
955 data->cur_id = SCpnt->device->id;
956 data->cur_lun = SCpnt->device->lun;
957
958 ret = nsp32_setup_sg_table(SCpnt);
959 if (ret == FALSE) {
960 nsp32_msg(KERN_ERR, "SGT fail");
961 SCpnt->result = DID_ERROR << 16;
962 nsp32_scsi_done(SCpnt);
963 return 0;
964 }
965
966
967 nsp32_build_identify(SCpnt);
968
969
970
971
972
973
974 target = &data->target[scmd_id(SCpnt)];
975 data->cur_target = target;
976
977 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
978 unsigned char period, offset;
979
980 if (trans_mode != ASYNC_MODE) {
981 nsp32_set_max_sync(data, target, &period, &offset);
982 nsp32_build_sdtr(SCpnt, period, offset);
983 target->sync_flag |= SDTR_INITIATOR;
984 } else {
985 nsp32_set_async(data, target);
986 target->sync_flag |= SDTR_DONE;
987 }
988
989 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
990 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
991 target->limit_entry, period, offset);
992 } else if (target->sync_flag & SDTR_INITIATOR) {
993
994
995
996
997
998 nsp32_set_async(data, target);
999 target->sync_flag &= ~SDTR_INITIATOR;
1000 target->sync_flag |= SDTR_DONE;
1001
1002 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1003 "SDTR_INITIATOR: fall back to async");
1004 } else if (target->sync_flag & SDTR_TARGET) {
1005
1006
1007
1008
1009
1010 nsp32_set_async(data, target);
1011 target->sync_flag &= ~SDTR_TARGET;
1012 target->sync_flag |= SDTR_DONE;
1013
1014 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1015 "Unknown SDTR from target is reached, fall back to async.");
1016 }
1017
1018 nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
1019 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1020 SCpnt->device->id, target->sync_flag, target->syncreg,
1021 target->ackwidth);
1022
1023
1024 if (auto_param == 0) {
1025 ret = nsp32_selection_autopara(SCpnt);
1026 } else {
1027 ret = nsp32_selection_autoscsi(SCpnt);
1028 }
1029
1030 if (ret != TRUE) {
1031 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
1032 nsp32_scsi_done(SCpnt);
1033 }
1034
1035 return 0;
1036 }
1037
1038 static DEF_SCSI_QCMD(nsp32_queuecommand)
1039
1040
1041 static int nsp32hw_init(nsp32_hw_data *data)
1042 {
1043 unsigned int base = data->BaseAddress;
1044 unsigned short irq_stat;
1045 unsigned long lc_reg;
1046 unsigned char power;
1047
1048 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1049 if ((lc_reg & 0xff00) == 0) {
1050 lc_reg |= (0x20 << 8);
1051 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1052 }
1053
1054 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1055 nsp32_write2(base, TRANSFER_CONTROL, 0);
1056 nsp32_write4(base, BM_CNT, 0);
1057 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1058
1059 do {
1060 irq_stat = nsp32_read2(base, IRQ_STATUS);
1061 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
1062 } while (irq_stat & IRQSTATUS_ANY_IRQ);
1063
1064
1065
1066
1067
1068 if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1069 (data->trans_method & NSP32_TRANSFER_MMIO)) {
1070 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
1071 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1072 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1073 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
1074 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1075 } else {
1076 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
1077 }
1078
1079 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
1080 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1081 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1082
1083 nsp32_index_write1(base, CLOCK_DIV, data->clock);
1084 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1085 nsp32_write1(base, PARITY_CONTROL, 0);
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102 nsp32_index_write2(base, MISC_WR,
1103 (SCSI_DIRECTION_DETECTOR_SELECT |
1104 DELAYED_BMSTART |
1105 MASTER_TERMINATION_SELECT |
1106 BMREQ_NEGATE_TIMING_SEL |
1107 AUTOSEL_TIMING_SEL |
1108 BMSTOP_CHANGE2_NONDATA_PHASE));
1109
1110 nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1111 power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1112 if (!(power & SENSE)) {
1113 nsp32_msg(KERN_INFO, "term power on");
1114 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1115 }
1116
1117 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1118 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1119
1120 nsp32_write1(base, SYNC_REG, 0);
1121 nsp32_write1(base, ACK_WIDTH, 0);
1122 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1123
1124
1125
1126
1127
1128 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
1129 IRQSELECT_SCSIRESET_IRQ |
1130 IRQSELECT_FIFO_SHLD_IRQ |
1131 IRQSELECT_RESELECT_IRQ |
1132 IRQSELECT_PHASE_CHANGE_IRQ |
1133 IRQSELECT_AUTO_SCSI_SEQ_IRQ |
1134
1135 IRQSELECT_TARGET_ABORT_IRQ |
1136 IRQSELECT_MASTER_ABORT_IRQ );
1137 nsp32_write2(base, IRQ_CONTROL, 0);
1138
1139
1140 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1141 nsp32_index_write1(base, EXT_PORT, LED_OFF);
1142
1143 return TRUE;
1144 }
1145
1146
1147
1148 static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
1149 {
1150 nsp32_hw_data *data = dev_id;
1151 unsigned int base = data->BaseAddress;
1152 struct scsi_cmnd *SCpnt = data->CurrentSC;
1153 unsigned short auto_stat, irq_stat, trans_stat;
1154 unsigned char busmon, busphase;
1155 unsigned long flags;
1156 int ret;
1157 int handled = 0;
1158 struct Scsi_Host *host = data->Host;
1159
1160 spin_lock_irqsave(host->host_lock, flags);
1161
1162
1163
1164
1165 irq_stat = nsp32_read2(base, IRQ_STATUS);
1166 nsp32_dbg(NSP32_DEBUG_INTR,
1167 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
1168
1169 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
1170 nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
1171 goto out2;
1172 }
1173 handled = 1;
1174 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1175
1176 busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1177 busphase = busmon & BUSMON_PHASE_MASK;
1178
1179 trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1180 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
1181 nsp32_msg(KERN_INFO, "card disconnect");
1182 if (data->CurrentSC != NULL) {
1183 nsp32_msg(KERN_INFO, "clean up current SCSI command");
1184 SCpnt->result = DID_BAD_TARGET << 16;
1185 nsp32_scsi_done(SCpnt);
1186 }
1187 goto out;
1188 }
1189
1190
1191 if (irq_stat & IRQSTATUS_TIMER_IRQ) {
1192 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
1193 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1194 goto out;
1195 }
1196
1197
1198 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
1199 nsp32_msg(KERN_INFO, "detected someone do bus reset");
1200 nsp32_do_bus_reset(data);
1201 if (SCpnt != NULL) {
1202 SCpnt->result = DID_RESET << 16;
1203 nsp32_scsi_done(SCpnt);
1204 }
1205 goto out;
1206 }
1207
1208 if (SCpnt == NULL) {
1209 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
1210 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1211 goto out;
1212 }
1213
1214
1215
1216
1217
1218
1219
1220 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
1221
1222 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1223 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1224
1225
1226 if (auto_stat & SELECTION_TIMEOUT) {
1227 nsp32_dbg(NSP32_DEBUG_INTR,
1228 "selection timeout occurred");
1229
1230 SCpnt->result = DID_TIME_OUT << 16;
1231 nsp32_scsi_done(SCpnt);
1232 goto out;
1233 }
1234
1235 if (auto_stat & MSGOUT_PHASE) {
1236
1237
1238
1239
1240
1241
1242
1243 if (!(auto_stat & MSG_IN_OCCUER) &&
1244 (data->msgout_len <= 3)) {
1245
1246
1247
1248
1249 data->msgout_len = 0;
1250 };
1251
1252 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
1253 }
1254
1255 if ((auto_stat & DATA_IN_PHASE) &&
1256 (scsi_get_resid(SCpnt) > 0) &&
1257 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1258 printk( "auto+fifo\n");
1259
1260 }
1261
1262 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
1263
1264 nsp32_dbg(NSP32_DEBUG_INTR,
1265 "Data in/out phase processed");
1266
1267
1268 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
1269 nsp32_read4(base, BM_CNT));
1270 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
1271 nsp32_read4(base, SGT_ADR));
1272 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
1273 nsp32_read4(base, SACK_CNT));
1274 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
1275 nsp32_read4(base, SAVED_SACK_CNT));
1276
1277 scsi_set_resid(SCpnt, 0);
1278 }
1279
1280
1281
1282
1283 if (auto_stat & MSG_IN_OCCUER) {
1284 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
1285 }
1286
1287
1288
1289
1290 if (auto_stat & MSG_OUT_OCCUER) {
1291 nsp32_msgout_occur(SCpnt);
1292 }
1293
1294
1295
1296
1297 if (auto_stat & BUS_FREE_OCCUER) {
1298 ret = nsp32_busfree_occur(SCpnt, auto_stat);
1299 if (ret == TRUE) {
1300 goto out;
1301 }
1302 }
1303
1304 if (auto_stat & STATUS_PHASE) {
1305
1306
1307
1308
1309
1310
1311
1312 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1313 }
1314
1315 if (auto_stat & ILLEGAL_PHASE) {
1316
1317 nsp32_msg(KERN_WARNING,
1318 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1319
1320
1321
1322
1323
1324
1325 nsp32_sack_assert(data);
1326 nsp32_wait_req(data, NEGATE);
1327 nsp32_sack_negate(data);
1328
1329 }
1330
1331 if (auto_stat & COMMAND_PHASE) {
1332
1333 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
1334 }
1335
1336 if (auto_stat & AUTOSCSI_BUSY) {
1337
1338 }
1339
1340 show_autophase(auto_stat);
1341 }
1342
1343
1344 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
1345 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
1346
1347 switch(busphase) {
1348 case BUSPHASE_DATA_OUT:
1349 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
1350
1351
1352
1353 break;
1354
1355 case BUSPHASE_DATA_IN:
1356 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
1357
1358
1359
1360 break;
1361
1362 case BUSPHASE_STATUS:
1363 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
1364
1365 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1366
1367 break;
1368 default:
1369 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
1370 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1371 show_busphase(busphase);
1372 break;
1373 }
1374
1375 goto out;
1376 }
1377
1378
1379 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
1380 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
1381
1382 switch(busphase) {
1383 case BUSPHASE_MESSAGE_IN:
1384 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
1385 nsp32_msgin_occur(SCpnt, irq_stat, 0);
1386 break;
1387 default:
1388 nsp32_msg(KERN_WARNING, "phase chg/other phase?");
1389 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
1390 irq_stat, trans_stat);
1391 show_busphase(busphase);
1392 break;
1393 }
1394 goto out;
1395 }
1396
1397
1398 if (irq_stat & IRQSTATUS_PCI_IRQ) {
1399 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
1400
1401 }
1402
1403
1404 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
1405 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
1406
1407
1408
1409
1410
1411 }
1412
1413 #if 0
1414 nsp32_dbg(NSP32_DEBUG_INTR,
1415 "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1416 show_busphase(busphase);
1417 #endif
1418
1419 out:
1420
1421 nsp32_write2(base, IRQ_CONTROL, 0);
1422
1423 out2:
1424 spin_unlock_irqrestore(host->host_lock, flags);
1425
1426 nsp32_dbg(NSP32_DEBUG_INTR, "exit");
1427
1428 return IRQ_RETVAL(handled);
1429 }
1430
1431
1432 static int nsp32_show_info(struct seq_file *m, struct Scsi_Host *host)
1433 {
1434 unsigned long flags;
1435 nsp32_hw_data *data;
1436 int hostno;
1437 unsigned int base;
1438 unsigned char mode_reg;
1439 int id, speed;
1440 long model;
1441
1442 hostno = host->host_no;
1443 data = (nsp32_hw_data *)host->hostdata;
1444 base = host->io_port;
1445
1446 seq_puts(m, "NinjaSCSI-32 status\n\n");
1447 seq_printf(m, "Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
1448 seq_printf(m, "SCSI host No.: %d\n", hostno);
1449 seq_printf(m, "IRQ: %d\n", host->irq);
1450 seq_printf(m, "IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
1451 seq_printf(m, "MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
1452 seq_printf(m, "sg_tablesize: %d\n", host->sg_tablesize);
1453 seq_printf(m, "Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1454
1455 mode_reg = nsp32_index_read1(base, CHIP_MODE);
1456 model = data->pci_devid->driver_data;
1457
1458 #ifdef CONFIG_PM
1459 seq_printf(m, "Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
1460 #endif
1461 seq_printf(m, "OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
1462
1463 spin_lock_irqsave(&(data->Lock), flags);
1464 seq_printf(m, "CurrentSC: 0x%p\n\n", data->CurrentSC);
1465 spin_unlock_irqrestore(&(data->Lock), flags);
1466
1467
1468 seq_puts(m, "SDTR status\n");
1469 for (id = 0; id < ARRAY_SIZE(data->target); id++) {
1470
1471 seq_printf(m, "id %d: ", id);
1472
1473 if (id == host->this_id) {
1474 seq_puts(m, "----- NinjaSCSI-32 host adapter\n");
1475 continue;
1476 }
1477
1478 if (data->target[id].sync_flag == SDTR_DONE) {
1479 if (data->target[id].period == 0 &&
1480 data->target[id].offset == ASYNC_OFFSET ) {
1481 seq_puts(m, "async");
1482 } else {
1483 seq_puts(m, " sync");
1484 }
1485 } else {
1486 seq_puts(m, " none");
1487 }
1488
1489 if (data->target[id].period != 0) {
1490
1491 speed = 1000000 / (data->target[id].period * 4);
1492
1493 seq_printf(m, " transfer %d.%dMB/s, offset %d",
1494 speed / 1000,
1495 speed % 1000,
1496 data->target[id].offset
1497 );
1498 }
1499 seq_putc(m, '\n');
1500 }
1501 return 0;
1502 }
1503
1504
1505
1506
1507
1508
1509
1510 static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
1511 {
1512 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1513 unsigned int base = SCpnt->device->host->io_port;
1514
1515 scsi_dma_unmap(SCpnt);
1516
1517
1518
1519
1520 nsp32_write2(base, TRANSFER_CONTROL, 0);
1521 nsp32_write4(base, BM_CNT, 0);
1522
1523
1524
1525
1526 (*SCpnt->scsi_done)(SCpnt);
1527
1528
1529
1530
1531 data->cur_lunt->SCpnt = NULL;
1532 data->cur_lunt = NULL;
1533 data->cur_target = NULL;
1534 data->CurrentSC = NULL;
1535 }
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548 static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
1549 {
1550 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1551 unsigned int base = SCpnt->device->host->io_port;
1552
1553 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
1554 show_autophase(execph);
1555
1556 nsp32_write4(base, BM_CNT, 0);
1557 nsp32_write2(base, TRANSFER_CONTROL, 0);
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570 if (execph & MSGIN_02_VALID) {
1571 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
1572
1573
1574
1575
1576
1577 if (!(execph & MSGIN_00_VALID) &&
1578 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
1579 unsigned int sacklen, s_sacklen;
1580
1581
1582
1583
1584 sacklen = nsp32_read4(base, SACK_CNT );
1585 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1586
1587
1588
1589
1590
1591 if (s_sacklen > 0) {
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603 if (sacklen != s_sacklen) {
1604 data->cur_lunt->msgin03 = FALSE;
1605 } else {
1606 data->cur_lunt->msgin03 = TRUE;
1607 }
1608
1609 nsp32_adjust_busfree(SCpnt, s_sacklen);
1610 }
1611 }
1612
1613
1614
1615 } else {
1616
1617
1618
1619 }
1620
1621 if (execph & MSGIN_03_VALID) {
1622
1623 }
1624
1625
1626
1627
1628 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1629
1630
1631
1632
1633 nsp32_set_async(data, data->cur_target);
1634 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1635 data->cur_target->sync_flag |= SDTR_DONE;
1636 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1637
1638
1639
1640
1641 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
1642
1643
1644
1645
1646 } else {
1647
1648
1649
1650
1651
1652 nsp32_set_async(data, data->cur_target);
1653 }
1654 data->cur_target->sync_flag &= ~SDTR_TARGET;
1655 data->cur_target->sync_flag |= SDTR_DONE;
1656 }
1657
1658
1659
1660
1661
1662
1663
1664 if (execph & MSGIN_00_VALID) {
1665
1666 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
1667
1668 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1669 SCpnt->SCp.Message = 0;
1670 nsp32_dbg(NSP32_DEBUG_BUSFREE,
1671 "normal end stat=0x%x resid=0x%x\n",
1672 SCpnt->SCp.Status, scsi_get_resid(SCpnt));
1673 SCpnt->result = (DID_OK << 16) |
1674 (SCpnt->SCp.Message << 8) |
1675 (SCpnt->SCp.Status << 0);
1676 nsp32_scsi_done(SCpnt);
1677
1678 return TRUE;
1679 } else if (execph & MSGIN_04_VALID) {
1680
1681 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1682 SCpnt->SCp.Message = 4;
1683
1684 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
1685 return TRUE;
1686 } else {
1687
1688 nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
1689
1690
1691
1692 SCpnt->result = DID_ERROR << 16;
1693 nsp32_scsi_done(SCpnt);
1694 return TRUE;
1695 }
1696 return FALSE;
1697 }
1698
1699
1700
1701
1702
1703
1704
1705
1706 static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
1707 {
1708 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1709 int old_entry = data->cur_entry;
1710 int new_entry;
1711 int sg_num = data->cur_lunt->sg_num;
1712 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1713 unsigned int restlen, sentlen;
1714 u32_le len, addr;
1715
1716 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
1717
1718
1719 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
1720
1721
1722
1723
1724
1725 sentlen = 0;
1726 for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
1727 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
1728 if (sentlen > s_sacklen) {
1729 break;
1730 }
1731 }
1732
1733
1734 if (new_entry == sg_num) {
1735 goto last;
1736 }
1737
1738 if (sentlen == s_sacklen) {
1739
1740
1741
1742 }
1743
1744
1745 restlen = sentlen - s_sacklen;
1746
1747
1748 len = le32_to_cpu(sgt[new_entry].len);
1749 addr = le32_to_cpu(sgt[new_entry].addr);
1750 addr += (len - restlen);
1751 sgt[new_entry].addr = cpu_to_le32(addr);
1752 sgt[new_entry].len = cpu_to_le32(restlen);
1753
1754
1755 data->cur_entry = new_entry;
1756
1757 return;
1758
1759 last:
1760 if (scsi_get_resid(SCpnt) < sentlen) {
1761 nsp32_msg(KERN_ERR, "resid underflow");
1762 }
1763
1764 scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
1765 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
1766
1767
1768
1769 return;
1770 }
1771
1772
1773
1774
1775
1776
1777
1778
1779 static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
1780 {
1781 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1782 unsigned int base = SCpnt->device->host->io_port;
1783
1784 long new_sgtp;
1785 int i;
1786
1787 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1788 "enter: msgout_len: 0x%x", data->msgout_len);
1789
1790
1791
1792
1793
1794 if (data->msgout_len == 0) {
1795 nsp32_build_nop(SCpnt);
1796 }
1797
1798
1799
1800
1801
1802
1803 new_sgtp = data->cur_lunt->sglun_paddr +
1804 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
1805
1806
1807
1808
1809 for (i = 0; i < data->msgout_len; i++) {
1810 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1811 "%d : 0x%x", i, data->msgoutbuf[i]);
1812
1813
1814
1815
1816 nsp32_wait_req(data, ASSERT);
1817
1818 if (i == (data->msgout_len - 1)) {
1819
1820
1821
1822
1823
1824
1825
1826 nsp32_write2(base, COMMAND_CONTROL,
1827 (CLEAR_CDB_FIFO_POINTER |
1828 AUTO_COMMAND_PHASE |
1829 AUTOSCSI_RESTART |
1830 AUTO_MSGIN_00_OR_04 |
1831 AUTO_MSGIN_02 ));
1832 }
1833
1834
1835
1836
1837 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1838 nsp32_wait_sack(data, NEGATE);
1839
1840 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
1841 nsp32_read1(base, SCSI_BUS_MONITOR));
1842 };
1843
1844 data->msgout_len = 0;
1845
1846 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
1847 }
1848
1849
1850
1851
1852
1853
1854
1855 static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
1856 {
1857 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1858 unsigned int base = data->BaseAddress;
1859 unsigned short transfer = 0;
1860
1861 nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
1862
1863 if (data->cur_target == NULL || data->cur_lunt == NULL) {
1864 nsp32_msg(KERN_ERR, "Target or Lun is invalid");
1865 }
1866
1867
1868
1869
1870
1871 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
1872
1873
1874
1875
1876 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
1877
1878
1879
1880
1881 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
1882
1883
1884
1885
1886 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
1887
1888
1889
1890
1891 transfer = 0;
1892 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
1893 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1894 if (scsi_bufflen(SCpnt) > 0) {
1895 transfer |= BM_START;
1896 }
1897 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
1898 transfer |= CB_MMIO_MODE;
1899 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
1900 transfer |= CB_IO_MODE;
1901 }
1902 nsp32_write2(base, TRANSFER_CONTROL, transfer);
1903
1904
1905
1906
1907
1908
1909 command |= (CLEAR_CDB_FIFO_POINTER |
1910 AUTO_COMMAND_PHASE |
1911 AUTOSCSI_RESTART );
1912 nsp32_write2(base, COMMAND_CONTROL, command);
1913
1914 nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
1915 }
1916
1917
1918
1919
1920
1921 static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
1922 unsigned long irq_status,
1923 unsigned short execph)
1924 {
1925 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1926 unsigned int base = SCpnt->device->host->io_port;
1927 unsigned char msg;
1928 unsigned char msgtype;
1929 unsigned char newlun;
1930 unsigned short command = 0;
1931 int msgclear = TRUE;
1932 long new_sgtp;
1933 int ret;
1934
1935
1936
1937
1938
1939
1940 msg = nsp32_read1(base, SCSI_DATA_IN);
1941 data->msginbuf[(unsigned char)data->msgin_len] = msg;
1942 msgtype = data->msginbuf[0];
1943 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
1944 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
1945 data->msgin_len, msg, msgtype);
1946
1947
1948
1949
1950
1951
1952
1953
1954 nsp32_sack_assert(data);
1955
1956
1957
1958
1959 if (msgtype & 0x80) {
1960 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
1961
1962 goto reject;
1963 }
1964
1965 newlun = msgtype & 0x1f;
1966 ret = nsp32_reselection(SCpnt, newlun);
1967 if (ret == TRUE) {
1968 goto restart;
1969 } else {
1970 goto reject;
1971 }
1972 }
1973
1974
1975
1976
1977
1978
1979 switch (msgtype) {
1980
1981
1982
1983 case COMMAND_COMPLETE:
1984 case DISCONNECT:
1985
1986
1987
1988
1989 nsp32_msg(KERN_WARNING,
1990 "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
1991 break;
1992
1993 case RESTORE_POINTERS:
1994
1995
1996
1997
1998 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
1999 unsigned int s_sacklen;
2000
2001 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2002 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
2003 nsp32_adjust_busfree(SCpnt, s_sacklen);
2004 } else {
2005
2006 }
2007 }
2008 data->cur_lunt->msgin03 = FALSE;
2009
2010
2011
2012
2013 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2014
2015
2016
2017
2018 new_sgtp = data->cur_lunt->sglun_paddr +
2019 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2020 nsp32_write4(base, SGT_ADR, new_sgtp);
2021
2022 break;
2023
2024 case SAVE_POINTERS:
2025
2026
2027
2028
2029 nsp32_msg (KERN_WARNING,
2030 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2031
2032 break;
2033
2034 case MESSAGE_REJECT:
2035
2036
2037 if (data->cur_target->sync_flag &
2038 (SDTR_INITIATOR | SDTR_TARGET)) {
2039
2040
2041
2042
2043
2044 nsp32_set_async(data, data->cur_target);
2045 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2046 data->cur_target->sync_flag |= SDTR_DONE;
2047
2048 }
2049 break;
2050
2051 case LINKED_CMD_COMPLETE:
2052 case LINKED_FLG_CMD_COMPLETE:
2053
2054 nsp32_msg (KERN_WARNING,
2055 "unsupported message: 0x%x", msgtype);
2056 break;
2057
2058 case INITIATE_RECOVERY:
2059
2060
2061
2062 goto reject;
2063
2064
2065
2066
2067 case SIMPLE_QUEUE_TAG:
2068 case 0x23:
2069
2070
2071
2072
2073 if (data->msgin_len >= 1) {
2074 goto reject;
2075 }
2076
2077
2078 msgclear = FALSE;
2079
2080 break;
2081
2082
2083
2084
2085 case EXTENDED_MESSAGE:
2086 if (data->msgin_len < 1) {
2087
2088
2089
2090
2091 msgclear = FALSE;
2092 break;
2093 }
2094
2095 if ((data->msginbuf[1] + 1) > data->msgin_len) {
2096
2097
2098
2099
2100
2101
2102 msgclear = FALSE;
2103 break;
2104 }
2105
2106
2107
2108
2109
2110 switch (data->msginbuf[2]) {
2111 case EXTENDED_MODIFY_DATA_POINTER:
2112
2113 goto reject;
2114 break;
2115
2116 case EXTENDED_SDTR:
2117
2118
2119
2120 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2121
2122
2123
2124 goto reject;
2125 break;
2126 }
2127
2128 nsp32_analyze_sdtr(SCpnt);
2129
2130 break;
2131
2132 case EXTENDED_EXTENDED_IDENTIFY:
2133
2134 goto reject;
2135
2136 break;
2137
2138 case EXTENDED_WDTR:
2139 goto reject;
2140
2141 break;
2142
2143 default:
2144 goto reject;
2145 }
2146 break;
2147
2148 default:
2149 goto reject;
2150 }
2151
2152 restart:
2153 if (msgclear == TRUE) {
2154 data->msgin_len = 0;
2155
2156
2157
2158
2159
2160
2161
2162
2163 if (data->msgout_len > 0) {
2164 nsp32_write4(base, SCSI_MSG_OUT, 0);
2165 command |= AUTO_ATN;
2166 }
2167
2168
2169
2170
2171
2172 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2173
2174
2175
2176
2177 if (data->cur_lunt->msgin03 == TRUE) {
2178 command |= AUTO_MSGIN_03;
2179 }
2180 data->cur_lunt->msgin03 = FALSE;
2181 } else {
2182 data->msgin_len++;
2183 }
2184
2185
2186
2187
2188 nsp32_restart_autoscsi(SCpnt, command);
2189
2190
2191
2192
2193 nsp32_wait_req(data, NEGATE);
2194
2195
2196
2197
2198 nsp32_sack_negate(data);
2199
2200 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2201
2202 return;
2203
2204 reject:
2205 nsp32_msg(KERN_WARNING,
2206 "invalid or unsupported MessageIn, rejected. "
2207 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2208 msg, data->msgin_len, msgtype);
2209 nsp32_build_reject(SCpnt);
2210 data->msgin_len = 0;
2211
2212 goto restart;
2213 }
2214
2215
2216
2217
2218 static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
2219 {
2220 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2221 nsp32_target *target = data->cur_target;
2222 nsp32_sync_table *synct;
2223 unsigned char get_period = data->msginbuf[3];
2224 unsigned char get_offset = data->msginbuf[4];
2225 int entry;
2226 int syncnum;
2227
2228 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
2229
2230 synct = data->synct;
2231 syncnum = data->syncnum;
2232
2233
2234
2235
2236
2237
2238
2239
2240 if (target->sync_flag & SDTR_INITIATOR) {
2241
2242
2243
2244
2245 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
2246
2247 target->sync_flag &= ~SDTR_INITIATOR;
2248 target->sync_flag |= SDTR_DONE;
2249
2250
2251
2252
2253 if (get_offset > SYNC_OFFSET) {
2254
2255
2256
2257
2258 goto reject;
2259 }
2260
2261 if (get_offset == ASYNC_OFFSET) {
2262
2263
2264
2265
2266 goto async;
2267 }
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279 if (get_period < data->synct[0].period_num) {
2280
2281
2282
2283
2284 goto reject;
2285 }
2286
2287 entry = nsp32_search_period_entry(data, target, get_period);
2288
2289 if (entry < 0) {
2290
2291
2292
2293
2294 goto reject;
2295 }
2296
2297
2298
2299
2300 nsp32_set_sync_entry(data, target, entry, get_offset);
2301 } else {
2302
2303 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
2304
2305 target->sync_flag |= SDTR_INITIATOR;
2306
2307
2308 if (get_offset > SYNC_OFFSET) {
2309
2310 get_offset = SYNC_OFFSET;
2311 }
2312
2313
2314 if (get_period < data->synct[0].period_num) {
2315 get_period = data->synct[0].period_num;
2316 }
2317
2318 entry = nsp32_search_period_entry(data, target, get_period);
2319
2320 if (get_offset == ASYNC_OFFSET || entry < 0) {
2321 nsp32_set_async(data, target);
2322 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
2323 } else {
2324 nsp32_set_sync_entry(data, target, entry, get_offset);
2325 nsp32_build_sdtr(SCpnt, get_period, get_offset);
2326 }
2327 }
2328
2329 target->period = get_period;
2330 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2331 return;
2332
2333 reject:
2334
2335
2336
2337
2338 nsp32_build_reject(SCpnt);
2339
2340 async:
2341 nsp32_set_async(data, target);
2342
2343 target->period = 0;
2344 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
2345 return;
2346 }
2347
2348
2349
2350
2351
2352
2353 static int nsp32_search_period_entry(nsp32_hw_data *data,
2354 nsp32_target *target,
2355 unsigned char period)
2356 {
2357 int i;
2358
2359 if (target->limit_entry >= data->syncnum) {
2360 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
2361 target->limit_entry = 0;
2362 }
2363
2364 for (i = target->limit_entry; i < data->syncnum; i++) {
2365 if (period >= data->synct[i].start_period &&
2366 period <= data->synct[i].end_period) {
2367 break;
2368 }
2369 }
2370
2371
2372
2373
2374
2375 if (i == data->syncnum) {
2376 i = -1;
2377 }
2378
2379 return i;
2380 }
2381
2382
2383
2384
2385
2386 static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2387 {
2388 unsigned char period = data->synct[target->limit_entry].period_num;
2389
2390 target->offset = ASYNC_OFFSET;
2391 target->period = 0;
2392 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
2393 target->ackwidth = 0;
2394 target->sample_reg = 0;
2395
2396 nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
2397 }
2398
2399
2400
2401
2402
2403 static void nsp32_set_max_sync(nsp32_hw_data *data,
2404 nsp32_target *target,
2405 unsigned char *period,
2406 unsigned char *offset)
2407 {
2408 unsigned char period_num, ackwidth;
2409
2410 period_num = data->synct[target->limit_entry].period_num;
2411 *period = data->synct[target->limit_entry].start_period;
2412 ackwidth = data->synct[target->limit_entry].ackwidth;
2413 *offset = SYNC_OFFSET;
2414
2415 target->syncreg = TO_SYNCREG(period_num, *offset);
2416 target->ackwidth = ackwidth;
2417 target->offset = *offset;
2418 target->sample_reg = 0;
2419 }
2420
2421
2422
2423
2424
2425 static void nsp32_set_sync_entry(nsp32_hw_data *data,
2426 nsp32_target *target,
2427 int entry,
2428 unsigned char offset)
2429 {
2430 unsigned char period, ackwidth, sample_rate;
2431
2432 period = data->synct[entry].period_num;
2433 ackwidth = data->synct[entry].ackwidth;
2434 sample_rate = data->synct[entry].sample_rate;
2435
2436 target->syncreg = TO_SYNCREG(period, offset);
2437 target->ackwidth = ackwidth;
2438 target->offset = offset;
2439 target->sample_reg = sample_rate | SAMPLING_ENABLE;
2440
2441 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
2442 }
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453 static void nsp32_wait_req(nsp32_hw_data *data, int state)
2454 {
2455 unsigned int base = data->BaseAddress;
2456 int wait_time = 0;
2457 unsigned char bus, req_bit;
2458
2459 if (!((state == ASSERT) || (state == NEGATE))) {
2460 nsp32_msg(KERN_ERR, "unknown state designation");
2461 }
2462
2463 req_bit = (state == ASSERT ? BUSMON_REQ : 0);
2464
2465 do {
2466 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2467 if ((bus & BUSMON_REQ) == req_bit) {
2468 nsp32_dbg(NSP32_DEBUG_WAIT,
2469 "wait_time: %d", wait_time);
2470 return;
2471 }
2472 udelay(1);
2473 wait_time++;
2474 } while (wait_time < REQSACK_TIMEOUT_TIME);
2475
2476 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
2477 }
2478
2479
2480
2481
2482 static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2483 {
2484 unsigned int base = data->BaseAddress;
2485 int wait_time = 0;
2486 unsigned char bus, ack_bit;
2487
2488 if (!((state == ASSERT) || (state == NEGATE))) {
2489 nsp32_msg(KERN_ERR, "unknown state designation");
2490 }
2491
2492 ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
2493
2494 do {
2495 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2496 if ((bus & BUSMON_ACK) == ack_bit) {
2497 nsp32_dbg(NSP32_DEBUG_WAIT,
2498 "wait_time: %d", wait_time);
2499 return;
2500 }
2501 udelay(1);
2502 wait_time++;
2503 } while (wait_time < REQSACK_TIMEOUT_TIME);
2504
2505 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
2506 }
2507
2508
2509
2510
2511
2512
2513 static void nsp32_sack_assert(nsp32_hw_data *data)
2514 {
2515 unsigned int base = data->BaseAddress;
2516 unsigned char busctrl;
2517
2518 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2519 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
2520 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2521 }
2522
2523
2524
2525
2526 static void nsp32_sack_negate(nsp32_hw_data *data)
2527 {
2528 unsigned int base = data->BaseAddress;
2529 unsigned char busctrl;
2530
2531 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2532 busctrl &= ~BUSCTL_ACK;
2533 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2534 }
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545 static int nsp32_detect(struct pci_dev *pdev)
2546 {
2547 struct Scsi_Host *host;
2548 struct resource *res;
2549 nsp32_hw_data *data;
2550 int ret;
2551 int i, j;
2552
2553 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
2554
2555
2556
2557
2558 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
2559 if (host == NULL) {
2560 nsp32_msg (KERN_ERR, "failed to scsi register");
2561 goto err;
2562 }
2563
2564
2565
2566
2567 data = (nsp32_hw_data *)host->hostdata;
2568
2569 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
2570
2571 host->irq = data->IrqNumber;
2572 host->io_port = data->BaseAddress;
2573 host->unique_id = data->BaseAddress;
2574 host->n_io_port = data->NumAddress;
2575 host->base = (unsigned long)data->MmioAddress;
2576
2577 data->Host = host;
2578 spin_lock_init(&(data->Lock));
2579
2580 data->cur_lunt = NULL;
2581 data->cur_target = NULL;
2582
2583
2584
2585
2586 data->trans_method = NSP32_TRANSFER_BUSMASTER;
2587
2588
2589
2590
2591
2592
2593 data->clock = CLOCK_4;
2594
2595
2596
2597
2598 switch (data->clock) {
2599 case CLOCK_4:
2600
2601 data->synct = nsp32_sync_table_40M;
2602 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2603 break;
2604 case CLOCK_2:
2605
2606 data->synct = nsp32_sync_table_20M;
2607 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
2608 break;
2609 case PCICLK:
2610
2611 data->synct = nsp32_sync_table_pci;
2612 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
2613 break;
2614 default:
2615 nsp32_msg(KERN_WARNING,
2616 "Invalid clock div is selected, set CLOCK_4.");
2617
2618 data->clock = CLOCK_4;
2619 data->synct = nsp32_sync_table_40M;
2620 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2621 }
2622
2623
2624
2625
2626
2627
2628
2629
2630 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
2631 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
2632 goto scsi_unregister;
2633 }
2634
2635
2636
2637
2638 data->autoparam = dma_alloc_coherent(&pdev->dev,
2639 sizeof(nsp32_autoparam), &(data->auto_paddr),
2640 GFP_KERNEL);
2641 if (data->autoparam == NULL) {
2642 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2643 goto scsi_unregister;
2644 }
2645
2646
2647
2648
2649 data->sg_list = dma_alloc_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2650 &data->sg_paddr, GFP_KERNEL);
2651 if (data->sg_list == NULL) {
2652 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2653 goto free_autoparam;
2654 }
2655
2656 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
2657 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
2658 int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
2659 nsp32_lunt tmp = {
2660 .SCpnt = NULL,
2661 .save_datp = 0,
2662 .msgin03 = FALSE,
2663 .sg_num = 0,
2664 .cur_entry = 0,
2665 .sglun = &(data->sg_list[offset]),
2666 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
2667 };
2668
2669 data->lunt[i][j] = tmp;
2670 }
2671 }
2672
2673
2674
2675
2676 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2677 nsp32_target *target = &(data->target[i]);
2678
2679 target->limit_entry = 0;
2680 target->sync_flag = 0;
2681 nsp32_set_async(data, target);
2682 }
2683
2684
2685
2686
2687 ret = nsp32_getprom_param(data);
2688 if (ret == FALSE) {
2689 data->resettime = 3;
2690 }
2691
2692
2693
2694
2695 nsp32hw_init(data);
2696
2697 snprintf(data->info_str, sizeof(data->info_str),
2698 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
2699 host->irq, host->io_port, host->n_io_port);
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719 nsp32_do_bus_reset(data);
2720
2721 ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
2722 if (ret < 0) {
2723 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
2724 "SCSI PCI controller. Interrupt: %d", host->irq);
2725 goto free_sg_list;
2726 }
2727
2728
2729
2730
2731 res = request_region(host->io_port, host->n_io_port, "nsp32");
2732 if (res == NULL) {
2733 nsp32_msg(KERN_ERR,
2734 "I/O region 0x%lx+0x%lx is already used",
2735 data->BaseAddress, data->NumAddress);
2736 goto free_irq;
2737 }
2738
2739 ret = scsi_add_host(host, &pdev->dev);
2740 if (ret) {
2741 nsp32_msg(KERN_ERR, "failed to add scsi host");
2742 goto free_region;
2743 }
2744 scsi_scan_host(host);
2745 pci_set_drvdata(pdev, host);
2746 return 0;
2747
2748 free_region:
2749 release_region(host->io_port, host->n_io_port);
2750
2751 free_irq:
2752 free_irq(host->irq, data);
2753
2754 free_sg_list:
2755 dma_free_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2756 data->sg_list, data->sg_paddr);
2757
2758 free_autoparam:
2759 dma_free_coherent(&pdev->dev, sizeof(nsp32_autoparam),
2760 data->autoparam, data->auto_paddr);
2761
2762 scsi_unregister:
2763 scsi_host_put(host);
2764
2765 err:
2766 return 1;
2767 }
2768
2769 static int nsp32_release(struct Scsi_Host *host)
2770 {
2771 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2772
2773 if (data->autoparam) {
2774 dma_free_coherent(&data->Pci->dev, sizeof(nsp32_autoparam),
2775 data->autoparam, data->auto_paddr);
2776 }
2777
2778 if (data->sg_list) {
2779 dma_free_coherent(&data->Pci->dev, NSP32_SG_TABLE_SIZE,
2780 data->sg_list, data->sg_paddr);
2781 }
2782
2783 if (host->irq) {
2784 free_irq(host->irq, data);
2785 }
2786
2787 if (host->io_port && host->n_io_port) {
2788 release_region(host->io_port, host->n_io_port);
2789 }
2790
2791 if (data->MmioAddress) {
2792 iounmap(data->MmioAddress);
2793 }
2794
2795 return 0;
2796 }
2797
2798 static const char *nsp32_info(struct Scsi_Host *shpnt)
2799 {
2800 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2801
2802 return data->info_str;
2803 }
2804
2805
2806
2807
2808
2809 static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
2810 {
2811 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2812 unsigned int base = SCpnt->device->host->io_port;
2813
2814 nsp32_msg(KERN_WARNING, "abort");
2815
2816 if (data->cur_lunt->SCpnt == NULL) {
2817 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
2818 return FAILED;
2819 }
2820
2821 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2822
2823 data->cur_target->sync_flag = 0;
2824 nsp32_set_async(data, data->cur_target);
2825 }
2826
2827 nsp32_write2(base, TRANSFER_CONTROL, 0);
2828 nsp32_write2(base, BM_CNT, 0);
2829
2830 SCpnt->result = DID_ABORT << 16;
2831 nsp32_scsi_done(SCpnt);
2832
2833 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
2834 return SUCCESS;
2835 }
2836
2837 static void nsp32_do_bus_reset(nsp32_hw_data *data)
2838 {
2839 unsigned int base = data->BaseAddress;
2840 unsigned short intrdat;
2841 int i;
2842
2843 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
2844
2845
2846
2847
2848
2849
2850 nsp32_write2(base, TRANSFER_CONTROL, 0);
2851 nsp32_write4(base, BM_CNT, 0);
2852 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2853
2854
2855
2856
2857
2858 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2859 nsp32_target *target = &data->target[i];
2860
2861 target->sync_flag = 0;
2862 nsp32_set_async(data, target);
2863 }
2864
2865
2866
2867
2868 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
2869 mdelay(RESET_HOLD_TIME / 1000);
2870 nsp32_write1(base, SCSI_BUS_CONTROL, 0);
2871 for(i = 0; i < 5; i++) {
2872 intrdat = nsp32_read2(base, IRQ_STATUS);
2873 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
2874 }
2875
2876 data->CurrentSC = NULL;
2877 }
2878
2879 static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
2880 {
2881 struct Scsi_Host *host = SCpnt->device->host;
2882 unsigned int base = SCpnt->device->host->io_port;
2883 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2884
2885 nsp32_msg(KERN_INFO, "Host Reset");
2886 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
2887
2888 spin_lock_irq(SCpnt->device->host->host_lock);
2889
2890 nsp32hw_init(data);
2891 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
2892 nsp32_do_bus_reset(data);
2893 nsp32_write2(base, IRQ_CONTROL, 0);
2894
2895 spin_unlock_irq(SCpnt->device->host->host_lock);
2896 return SUCCESS;
2897 }
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907 static int nsp32_getprom_param(nsp32_hw_data *data)
2908 {
2909 int vendor = data->pci_devid->vendor;
2910 int device = data->pci_devid->device;
2911 int ret, val, i;
2912
2913
2914
2915
2916 ret = nsp32_prom_read(data, 0x7e);
2917 if (ret != 0x55) {
2918 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
2919 return FALSE;
2920 }
2921 ret = nsp32_prom_read(data, 0x7f);
2922 if (ret != 0xaa) {
2923 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
2924 return FALSE;
2925 }
2926
2927
2928
2929
2930 if (vendor == PCI_VENDOR_ID_WORKBIT &&
2931 device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
2932 ret = nsp32_getprom_c16(data);
2933 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2934 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
2935 ret = nsp32_getprom_at24(data);
2936 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2937 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
2938 ret = nsp32_getprom_at24(data);
2939 } else {
2940 nsp32_msg(KERN_WARNING, "Unknown EEPROM");
2941 ret = FALSE;
2942 }
2943
2944
2945 for (i = 0; i <= 0x1f; i++) {
2946 val = nsp32_prom_read(data, i);
2947 nsp32_dbg(NSP32_DEBUG_EEPROM,
2948 "rom address 0x%x : 0x%x", i, val);
2949 }
2950
2951 return ret;
2952 }
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982 static int nsp32_getprom_at24(nsp32_hw_data *data)
2983 {
2984 int ret, i;
2985 int auto_sync;
2986 nsp32_target *target;
2987 int entry;
2988
2989
2990
2991
2992
2993
2994 data->resettime = nsp32_prom_read(data, 0x12);
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009 ret = nsp32_prom_read(data, 0x07);
3010 switch (ret) {
3011 case 0:
3012 auto_sync = TRUE;
3013 break;
3014 case 1:
3015 auto_sync = FALSE;
3016 break;
3017 default:
3018 nsp32_msg(KERN_WARNING,
3019 "Unsupported Auto Sync mode. Fall back to manual mode.");
3020 auto_sync = TRUE;
3021 }
3022
3023 if (trans_mode == ULTRA20M_MODE) {
3024 auto_sync = TRUE;
3025 }
3026
3027
3028
3029
3030 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3031 target = &data->target[i];
3032 if (auto_sync == TRUE) {
3033 target->limit_entry = 0;
3034 } else {
3035 ret = nsp32_prom_read(data, i);
3036 entry = nsp32_search_period_entry(data, target, ret);
3037 if (entry < 0) {
3038
3039 entry = 0;
3040 }
3041 target->limit_entry = entry;
3042 }
3043 }
3044
3045 return TRUE;
3046 }
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069 static int nsp32_getprom_c16(nsp32_hw_data *data)
3070 {
3071 int ret, i;
3072 nsp32_target *target;
3073 int entry, val;
3074
3075
3076
3077
3078
3079
3080 data->resettime = nsp32_prom_read(data, 0x11);
3081
3082
3083
3084
3085 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3086 target = &data->target[i];
3087 ret = nsp32_prom_read(data, i);
3088 switch (ret) {
3089 case 0:
3090 val = 0x0c;
3091 break;
3092 case 1:
3093 val = 0x19;
3094 break;
3095 case 2:
3096 val = 0x32;
3097 break;
3098 case 3:
3099 val = 0x00;
3100 break;
3101 default:
3102 val = 0x0c;
3103 break;
3104 }
3105 entry = nsp32_search_period_entry(data, target, val);
3106 if (entry < 0 || trans_mode == ULTRA20M_MODE) {
3107
3108 entry = 0;
3109 }
3110 target->limit_entry = entry;
3111 }
3112
3113 return TRUE;
3114 }
3115
3116
3117
3118
3119
3120 static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3121 {
3122 int i, val;
3123
3124
3125 nsp32_prom_start(data);
3126
3127
3128 nsp32_prom_write_bit(data, 1);
3129 nsp32_prom_write_bit(data, 0);
3130 nsp32_prom_write_bit(data, 1);
3131 nsp32_prom_write_bit(data, 0);
3132 nsp32_prom_write_bit(data, 0);
3133 nsp32_prom_write_bit(data, 0);
3134 nsp32_prom_write_bit(data, 0);
3135
3136
3137 nsp32_prom_write_bit(data, 0);
3138
3139
3140 nsp32_prom_write_bit(data, 0);
3141
3142
3143 for (i = 7; i >= 0; i--) {
3144 nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3145 }
3146
3147
3148 nsp32_prom_write_bit(data, 0);
3149
3150
3151 nsp32_prom_start(data);
3152
3153
3154 nsp32_prom_write_bit(data, 1);
3155 nsp32_prom_write_bit(data, 0);
3156 nsp32_prom_write_bit(data, 1);
3157 nsp32_prom_write_bit(data, 0);
3158 nsp32_prom_write_bit(data, 0);
3159 nsp32_prom_write_bit(data, 0);
3160 nsp32_prom_write_bit(data, 0);
3161
3162
3163 nsp32_prom_write_bit(data, 1);
3164
3165
3166 nsp32_prom_write_bit(data, 0);
3167
3168
3169 val = 0;
3170 for (i = 7; i >= 0; i--) {
3171 val += (nsp32_prom_read_bit(data) << i);
3172 }
3173
3174
3175 nsp32_prom_write_bit(data, 1);
3176
3177
3178 nsp32_prom_stop(data);
3179
3180 return val;
3181 }
3182
3183 static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3184 {
3185 int base = data->BaseAddress;
3186 int tmp;
3187
3188 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3189
3190 if (val == 0) {
3191 tmp &= ~bit;
3192 } else {
3193 tmp |= bit;
3194 }
3195
3196 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3197
3198 udelay(10);
3199 }
3200
3201 static int nsp32_prom_get(nsp32_hw_data *data, int bit)
3202 {
3203 int base = data->BaseAddress;
3204 int tmp, ret;
3205
3206 if (bit != SDA) {
3207 nsp32_msg(KERN_ERR, "return value is not appropriate");
3208 return 0;
3209 }
3210
3211
3212 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
3213
3214 if (tmp == 0) {
3215 ret = 0;
3216 } else {
3217 ret = 1;
3218 }
3219
3220 udelay(10);
3221
3222 return ret;
3223 }
3224
3225 static void nsp32_prom_start (nsp32_hw_data *data)
3226 {
3227
3228 nsp32_prom_set(data, SCL, 1);
3229 nsp32_prom_set(data, SDA, 1);
3230 nsp32_prom_set(data, ENA, 1);
3231 nsp32_prom_set(data, SDA, 0);
3232
3233 nsp32_prom_set(data, SCL, 0);
3234 }
3235
3236 static void nsp32_prom_stop (nsp32_hw_data *data)
3237 {
3238
3239 nsp32_prom_set(data, SCL, 1);
3240 nsp32_prom_set(data, SDA, 0);
3241 nsp32_prom_set(data, ENA, 1);
3242 nsp32_prom_set(data, SDA, 1);
3243 nsp32_prom_set(data, SCL, 0);
3244 }
3245
3246 static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3247 {
3248
3249 nsp32_prom_set(data, SDA, val);
3250 nsp32_prom_set(data, SCL, 1 );
3251 nsp32_prom_set(data, SCL, 0 );
3252 }
3253
3254 static int nsp32_prom_read_bit(nsp32_hw_data *data)
3255 {
3256 int val;
3257
3258
3259 nsp32_prom_set(data, ENA, 0);
3260 nsp32_prom_set(data, SCL, 1);
3261
3262 val = nsp32_prom_get(data, SDA);
3263
3264 nsp32_prom_set(data, SCL, 0);
3265 nsp32_prom_set(data, ENA, 1);
3266
3267 return val;
3268 }
3269
3270
3271
3272
3273
3274 #ifdef CONFIG_PM
3275
3276
3277 static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
3278 {
3279 struct Scsi_Host *host = pci_get_drvdata(pdev);
3280
3281 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
3282
3283 pci_save_state (pdev);
3284 pci_disable_device (pdev);
3285 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3286
3287 return 0;
3288 }
3289
3290
3291 static int nsp32_resume(struct pci_dev *pdev)
3292 {
3293 struct Scsi_Host *host = pci_get_drvdata(pdev);
3294 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3295 unsigned short reg;
3296
3297 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
3298
3299 pci_set_power_state(pdev, PCI_D0);
3300 pci_enable_wake (pdev, PCI_D0, 0);
3301 pci_restore_state (pdev);
3302
3303 reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3304
3305 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3306
3307 if (reg == 0xffff) {
3308 nsp32_msg(KERN_INFO, "missing device. abort resume.");
3309 return 0;
3310 }
3311
3312 nsp32hw_init (data);
3313 nsp32_do_bus_reset(data);
3314
3315 nsp32_msg(KERN_INFO, "resume success");
3316
3317 return 0;
3318 }
3319
3320 #endif
3321
3322
3323
3324
3325 static int nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3326 {
3327 int ret;
3328 nsp32_hw_data *data = &nsp32_data_base;
3329
3330 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3331
3332 ret = pci_enable_device(pdev);
3333 if (ret) {
3334 nsp32_msg(KERN_ERR, "failed to enable pci device");
3335 return ret;
3336 }
3337
3338 data->Pci = pdev;
3339 data->pci_devid = id;
3340 data->IrqNumber = pdev->irq;
3341 data->BaseAddress = pci_resource_start(pdev, 0);
3342 data->NumAddress = pci_resource_len (pdev, 0);
3343 data->MmioAddress = pci_ioremap_bar(pdev, 1);
3344 data->MmioLength = pci_resource_len (pdev, 1);
3345
3346 pci_set_master(pdev);
3347
3348 ret = nsp32_detect(pdev);
3349
3350 nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
3351 pdev->irq,
3352 data->MmioAddress, data->MmioLength,
3353 pci_name(pdev),
3354 nsp32_model[id->driver_data]);
3355
3356 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
3357
3358 return ret;
3359 }
3360
3361 static void nsp32_remove(struct pci_dev *pdev)
3362 {
3363 struct Scsi_Host *host = pci_get_drvdata(pdev);
3364
3365 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3366
3367 scsi_remove_host(host);
3368
3369 nsp32_release(host);
3370
3371 scsi_host_put(host);
3372 }
3373
3374 static struct pci_driver nsp32_driver = {
3375 .name = "nsp32",
3376 .id_table = nsp32_pci_table,
3377 .probe = nsp32_probe,
3378 .remove = nsp32_remove,
3379 #ifdef CONFIG_PM
3380 .suspend = nsp32_suspend,
3381 .resume = nsp32_resume,
3382 #endif
3383 };
3384
3385
3386
3387
3388 static int __init init_nsp32(void) {
3389 nsp32_msg(KERN_INFO, "loading...");
3390 return pci_register_driver(&nsp32_driver);
3391 }
3392
3393 static void __exit exit_nsp32(void) {
3394 nsp32_msg(KERN_INFO, "unloading...");
3395 pci_unregister_driver(&nsp32_driver);
3396 }
3397
3398 module_init(init_nsp32);
3399 module_exit(exit_nsp32);
3400
3401