This source file includes following definitions.
- pmcraid_slave_alloc
- pmcraid_slave_configure
- pmcraid_slave_destroy
- pmcraid_change_queue_depth
- pmcraid_init_cmdblk
- pmcraid_reinit_cmdblk
- pmcraid_get_free_cmd
- pmcraid_return_cmd
- pmcraid_read_interrupts
- pmcraid_disable_interrupts
- pmcraid_enable_interrupts
- pmcraid_clr_trans_op
- pmcraid_reset_type
- pmcraid_bist_done
- pmcraid_start_bist
- pmcraid_reset_alert_done
- pmcraid_reset_alert
- pmcraid_timeout_handler
- pmcraid_internal_done
- pmcraid_reinit_cfgtable_done
- pmcraid_erp_done
- _pmcraid_fire_command
- pmcraid_send_cmd
- pmcraid_ioa_shutdown_done
- pmcraid_ioa_shutdown
- pmcraid_get_fwversion_done
- pmcraid_get_fwversion
- pmcraid_identify_hrrq
- pmcraid_send_hcam_cmd
- pmcraid_send_hcam
- pmcraid_prepare_cancel_cmd
- pmcraid_cancel_hcam
- pmcraid_cancel_ccn
- pmcraid_cancel_ldn
- pmcraid_expose_resource
- pmcraid_netlink_init
- pmcraid_netlink_release
- pmcraid_notify_aen
- pmcraid_notify_ccn
- pmcraid_notify_ldn
- pmcraid_notify_ioastate
- pmcraid_handle_config_change
- pmcraid_get_error_info
- pmcraid_ioasc_logger
- pmcraid_handle_error_log
- pmcraid_process_ccn
- pmcraid_process_ldn
- pmcraid_register_hcams
- pmcraid_unregister_hcams
- pmcraid_reset_enable_ioa
- pmcraid_soft_reset
- pmcraid_get_dump
- pmcraid_fail_outstanding_cmds
- pmcraid_ioa_reset
- pmcraid_initiate_reset
- pmcraid_reset_reload
- pmcraid_reset_bringdown
- pmcraid_reset_bringup
- pmcraid_request_sense
- pmcraid_cancel_all
- pmcraid_frame_auto_sense
- pmcraid_error_handler
- pmcraid_reset_device
- _pmcraid_io_done
- pmcraid_io_done
- pmcraid_abort_cmd
- pmcraid_abort_complete
- pmcraid_eh_abort_handler
- pmcraid_eh_device_reset_handler
- pmcraid_eh_bus_reset_handler
- pmcraid_eh_target_reset_handler
- pmcraid_eh_host_reset_handler
- pmcraid_init_ioadls
- pmcraid_build_ioadl
- pmcraid_free_sglist
- pmcraid_alloc_sglist
- pmcraid_copy_sglist
- pmcraid_queuecommand_lck
- DEF_SCSI_QCMD
- pmcraid_chr_fasync
- pmcraid_build_passthrough_ioadls
- pmcraid_release_passthrough_ioadls
- pmcraid_ioctl_passthrough
- pmcraid_ioctl_driver
- pmcraid_check_ioctl_buffer
- pmcraid_chr_ioctl
- pmcraid_show_log_level
- pmcraid_store_log_level
- pmcraid_show_drv_version
- pmcraid_show_adapter_id
- pmcraid_isr_msix
- pmcraid_isr
- pmcraid_worker_function
- pmcraid_tasklet_function
- pmcraid_unregister_interrupt_handler
- pmcraid_register_interrupt_handler
- pmcraid_release_cmd_blocks
- pmcraid_release_control_blocks
- pmcraid_allocate_cmd_blocks
- pmcraid_allocate_control_blocks
- pmcraid_release_host_rrqs
- pmcraid_allocate_host_rrqs
- pmcraid_release_hcams
- pmcraid_allocate_hcams
- pmcraid_release_config_buffers
- pmcraid_allocate_config_buffers
- pmcraid_init_tasklets
- pmcraid_kill_tasklets
- pmcraid_release_buffers
- pmcraid_init_buffers
- pmcraid_reinit_buffers
- pmcraid_init_instance
- pmcraid_shutdown
- pmcraid_get_minor
- pmcraid_release_minor
- pmcraid_setup_chrdev
- pmcraid_release_chrdev
- pmcraid_remove
- pmcraid_suspend
- pmcraid_resume
- pmcraid_complete_ioa_reset
- pmcraid_set_supported_devs
- pmcraid_set_timestamp
- pmcraid_init_res_table
- pmcraid_querycfg
- pmcraid_probe
- pmcraid_init
- pmcraid_exit
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9
10 #include <linux/fs.h>
11 #include <linux/init.h>
12 #include <linux/types.h>
13 #include <linux/errno.h>
14 #include <linux/kernel.h>
15 #include <linux/ioport.h>
16 #include <linux/delay.h>
17 #include <linux/pci.h>
18 #include <linux/wait.h>
19 #include <linux/spinlock.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/blkdev.h>
23 #include <linux/firmware.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/hdreg.h>
27 #include <linux/io.h>
28 #include <linux/slab.h>
29 #include <asm/irq.h>
30 #include <asm/processor.h>
31 #include <linux/libata.h>
32 #include <linux/mutex.h>
33 #include <linux/ktime.h>
34 #include <scsi/scsi.h>
35 #include <scsi/scsi_host.h>
36 #include <scsi/scsi_device.h>
37 #include <scsi/scsi_tcq.h>
38 #include <scsi/scsi_eh.h>
39 #include <scsi/scsi_cmnd.h>
40 #include <scsi/scsicam.h>
41
42 #include "pmcraid.h"
43
44
45
46
47 static unsigned int pmcraid_debug_log;
48 static unsigned int pmcraid_disable_aen;
49 static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
50 static unsigned int pmcraid_enable_msix;
51
52
53
54
55
56 static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
57
58
59
60
61
62
63 static unsigned int pmcraid_major;
64 static struct class *pmcraid_class;
65 static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
66
67
68
69
70 MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
71 MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
72 MODULE_LICENSE("GPL");
73 MODULE_VERSION(PMCRAID_DRIVER_VERSION);
74
75 module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
76 MODULE_PARM_DESC(log_level,
77 "Enables firmware error code logging, default :1 high-severity"
78 " errors, 2: all errors including high-severity errors,"
79 " 0: disables logging");
80
81 module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
82 MODULE_PARM_DESC(debug,
83 "Enable driver verbose message logging. Set 1 to enable."
84 "(default: 0)");
85
86 module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
87 MODULE_PARM_DESC(disable_aen,
88 "Disable driver aen notifications to apps. Set 1 to disable."
89 "(default: 0)");
90
91
92
93
94 static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
95 {
96 .ioastatus = 0x0,
97 .ioarrin = 0x00040,
98 .mailbox = 0x7FC30,
99 .global_intr_mask = 0x00034,
100 .ioa_host_intr = 0x0009C,
101 .ioa_host_intr_clr = 0x000A0,
102 .ioa_host_msix_intr = 0x7FC40,
103 .ioa_host_mask = 0x7FC28,
104 .ioa_host_mask_clr = 0x7FC28,
105 .host_ioa_intr = 0x00020,
106 .host_ioa_intr_clr = 0x00020,
107 .transop_timeout = 300
108 }
109 };
110
111
112
113
114 static struct pci_device_id pmcraid_pci_table[] = {
115 { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
116 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
117 },
118 {}
119 };
120
121 MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
122
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135
136
137 static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
138 {
139 struct pmcraid_resource_entry *temp, *res = NULL;
140 struct pmcraid_instance *pinstance;
141 u8 target, bus, lun;
142 unsigned long lock_flags;
143 int rc = -ENXIO;
144 u16 fw_version;
145
146 pinstance = shost_priv(scsi_dev->host);
147
148 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
149
150
151
152
153
154
155 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
156 list_for_each_entry(temp, &pinstance->used_res_q, queue) {
157
158
159 if (RES_IS_VSET(temp->cfg_entry)) {
160 if (fw_version <= PMCRAID_FW_VERSION_1)
161 target = temp->cfg_entry.unique_flags1;
162 else
163 target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF;
164
165 if (target > PMCRAID_MAX_VSET_TARGETS)
166 continue;
167 bus = PMCRAID_VSET_BUS_ID;
168 lun = 0;
169 } else if (RES_IS_GSCSI(temp->cfg_entry)) {
170 target = RES_TARGET(temp->cfg_entry.resource_address);
171 bus = PMCRAID_PHYS_BUS_ID;
172 lun = RES_LUN(temp->cfg_entry.resource_address);
173 } else {
174 continue;
175 }
176
177 if (bus == scsi_dev->channel &&
178 target == scsi_dev->id &&
179 lun == scsi_dev->lun) {
180 res = temp;
181 break;
182 }
183 }
184
185 if (res) {
186 res->scsi_dev = scsi_dev;
187 scsi_dev->hostdata = res;
188 res->change_detected = 0;
189 atomic_set(&res->read_failures, 0);
190 atomic_set(&res->write_failures, 0);
191 rc = 0;
192 }
193 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
194 return rc;
195 }
196
197
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208
209
210 static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
211 {
212 struct pmcraid_resource_entry *res = scsi_dev->hostdata;
213
214 if (!res)
215 return 0;
216
217
218 if (RES_IS_GSCSI(res->cfg_entry) &&
219 scsi_dev->type != TYPE_ENCLOSURE)
220 return -ENXIO;
221
222 pmcraid_info("configuring %x:%x:%x:%x\n",
223 scsi_dev->host->unique_id,
224 scsi_dev->channel,
225 scsi_dev->id,
226 (u8)scsi_dev->lun);
227
228 if (RES_IS_GSCSI(res->cfg_entry)) {
229 scsi_dev->allow_restart = 1;
230 } else if (RES_IS_VSET(res->cfg_entry)) {
231 scsi_dev->allow_restart = 1;
232 blk_queue_rq_timeout(scsi_dev->request_queue,
233 PMCRAID_VSET_IO_TIMEOUT);
234 blk_queue_max_hw_sectors(scsi_dev->request_queue,
235 PMCRAID_VSET_MAX_SECTORS);
236 }
237
238
239
240
241 if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
242 scsi_dev->tagged_supported = 0;
243
244 return 0;
245 }
246
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256
257
258 static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
259 {
260 struct pmcraid_resource_entry *res;
261
262 res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
263
264 if (res)
265 res->scsi_dev = NULL;
266
267 scsi_dev->hostdata = NULL;
268 }
269
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276
277
278 static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
279 {
280 if (depth > PMCRAID_MAX_CMD_PER_LUN)
281 depth = PMCRAID_MAX_CMD_PER_LUN;
282 return scsi_change_queue_depth(scsi_dev, depth);
283 }
284
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292
293
294 static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
295 {
296 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
297 dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
298
299 if (index >= 0) {
300
301 u32 ioasa_offset =
302 offsetof(struct pmcraid_control_block, ioasa);
303
304 cmd->index = index;
305 ioarcb->response_handle = cpu_to_le32(index << 2);
306 ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
307 ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
308 ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
309 } else {
310
311
312
313 memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
314 ioarcb->hrrq_id = 0;
315 ioarcb->request_flags0 = 0;
316 ioarcb->request_flags1 = 0;
317 ioarcb->cmd_timeout = 0;
318 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
319 ioarcb->ioadl_bus_addr = 0;
320 ioarcb->ioadl_length = 0;
321 ioarcb->data_transfer_length = 0;
322 ioarcb->add_cmd_param_length = 0;
323 ioarcb->add_cmd_param_offset = 0;
324 cmd->ioa_cb->ioasa.ioasc = 0;
325 cmd->ioa_cb->ioasa.residual_data_length = 0;
326 cmd->time_left = 0;
327 }
328
329 cmd->cmd_done = NULL;
330 cmd->scsi_cmd = NULL;
331 cmd->release = 0;
332 cmd->completion_req = 0;
333 cmd->sense_buffer = NULL;
334 cmd->sense_buffer_dma = 0;
335 cmd->dma_handle = 0;
336 timer_setup(&cmd->timer, NULL, 0);
337 }
338
339
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345
346
347 static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
348 {
349 pmcraid_init_cmdblk(cmd, -1);
350 }
351
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355
356
357
358
359 static struct pmcraid_cmd *pmcraid_get_free_cmd(
360 struct pmcraid_instance *pinstance
361 )
362 {
363 struct pmcraid_cmd *cmd = NULL;
364 unsigned long lock_flags;
365
366
367 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
368
369 if (!list_empty(&pinstance->free_cmd_pool)) {
370 cmd = list_entry(pinstance->free_cmd_pool.next,
371 struct pmcraid_cmd, free_list);
372 list_del(&cmd->free_list);
373 }
374 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
375
376
377 if (cmd != NULL)
378 pmcraid_reinit_cmdblk(cmd);
379 return cmd;
380 }
381
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387
388
389 static void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
390 {
391 struct pmcraid_instance *pinstance = cmd->drv_inst;
392 unsigned long lock_flags;
393
394 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
395 list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
396 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
397 }
398
399
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402
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405
406
407 static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
408 {
409 return (pinstance->interrupt_mode) ?
410 ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
411 ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
412 }
413
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418
419
420
421
422
423 static void pmcraid_disable_interrupts(
424 struct pmcraid_instance *pinstance,
425 u32 intrs
426 )
427 {
428 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
429 u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
430
431 iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
432 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
433 ioread32(pinstance->int_regs.global_interrupt_mask_reg);
434
435 if (!pinstance->interrupt_mode) {
436 iowrite32(intrs,
437 pinstance->int_regs.ioa_host_interrupt_mask_reg);
438 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
439 }
440 }
441
442
443
444
445
446
447
448
449
450
451 static void pmcraid_enable_interrupts(
452 struct pmcraid_instance *pinstance,
453 u32 intrs
454 )
455 {
456 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
457 u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
458
459 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
460
461 if (!pinstance->interrupt_mode) {
462 iowrite32(~intrs,
463 pinstance->int_regs.ioa_host_interrupt_mask_reg);
464 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
465 }
466
467 pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
468 ioread32(pinstance->int_regs.global_interrupt_mask_reg),
469 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
470 }
471
472
473
474
475
476
477
478
479
480 static void pmcraid_clr_trans_op(
481 struct pmcraid_instance *pinstance
482 )
483 {
484 unsigned long lock_flags;
485
486 if (!pinstance->interrupt_mode) {
487 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
488 pinstance->int_regs.ioa_host_interrupt_mask_reg);
489 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
490 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
491 pinstance->int_regs.ioa_host_interrupt_clr_reg);
492 ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
493 }
494
495 if (pinstance->reset_cmd != NULL) {
496 del_timer(&pinstance->reset_cmd->timer);
497 spin_lock_irqsave(
498 pinstance->host->host_lock, lock_flags);
499 pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
500 spin_unlock_irqrestore(
501 pinstance->host->host_lock, lock_flags);
502 }
503 }
504
505
506
507
508
509
510
511
512
513
514 static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
515 {
516 u32 mask;
517 u32 intrs;
518 u32 alerts;
519
520 mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
521 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
522 alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
523
524 if ((mask & INTRS_HRRQ_VALID) == 0 ||
525 (alerts & DOORBELL_IOA_RESET_ALERT) ||
526 (intrs & PMCRAID_ERROR_INTERRUPTS)) {
527 pmcraid_info("IOA requires hard reset\n");
528 pinstance->ioa_hard_reset = 1;
529 }
530
531
532 if (intrs & INTRS_IOA_UNIT_CHECK)
533 pinstance->ioa_unit_check = 1;
534 }
535
536
537
538
539
540
541
542
543 static void pmcraid_ioa_reset(struct pmcraid_cmd *);
544
545 static void pmcraid_bist_done(struct timer_list *t)
546 {
547 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
548 struct pmcraid_instance *pinstance = cmd->drv_inst;
549 unsigned long lock_flags;
550 int rc;
551 u16 pci_reg;
552
553 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
554
555
556 if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
557 cmd->time_left > 0) {
558 pmcraid_info("BIST not complete, waiting another 2 secs\n");
559 cmd->timer.expires = jiffies + cmd->time_left;
560 cmd->time_left = 0;
561 add_timer(&cmd->timer);
562 } else {
563 cmd->time_left = 0;
564 pmcraid_info("BIST is complete, proceeding with reset\n");
565 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
566 pmcraid_ioa_reset(cmd);
567 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
568 }
569 }
570
571
572
573
574
575
576
577 static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
578 {
579 struct pmcraid_instance *pinstance = cmd->drv_inst;
580 u32 doorbells, intrs;
581
582
583 iowrite32(DOORBELL_IOA_START_BIST,
584 pinstance->int_regs.host_ioa_interrupt_reg);
585 doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
586 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
587 pmcraid_info("doorbells after start bist: %x intrs: %x\n",
588 doorbells, intrs);
589
590 cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
591 cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
592 cmd->timer.function = pmcraid_bist_done;
593 add_timer(&cmd->timer);
594 }
595
596
597
598
599
600
601
602 static void pmcraid_reset_alert_done(struct timer_list *t)
603 {
604 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
605 struct pmcraid_instance *pinstance = cmd->drv_inst;
606 u32 status = ioread32(pinstance->ioa_status);
607 unsigned long lock_flags;
608
609
610
611
612
613 if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
614 cmd->time_left <= 0) {
615 pmcraid_info("critical op is reset proceeding with reset\n");
616 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
617 pmcraid_ioa_reset(cmd);
618 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
619 } else {
620 pmcraid_info("critical op is not yet reset waiting again\n");
621
622 cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
623 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
624 cmd->timer.function = pmcraid_reset_alert_done;
625 add_timer(&cmd->timer);
626 }
627 }
628
629
630
631
632
633
634
635
636
637
638 static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
639 static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
640 {
641 struct pmcraid_instance *pinstance = cmd->drv_inst;
642 u32 doorbells;
643 int rc;
644 u16 pci_reg;
645
646
647
648
649
650
651 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
652 if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
653
654
655
656
657
658
659 cmd->time_left = PMCRAID_RESET_TIMEOUT;
660 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
661 cmd->timer.function = pmcraid_reset_alert_done;
662 add_timer(&cmd->timer);
663
664 iowrite32(DOORBELL_IOA_RESET_ALERT,
665 pinstance->int_regs.host_ioa_interrupt_reg);
666 doorbells =
667 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
668 pmcraid_info("doorbells after reset alert: %x\n", doorbells);
669 } else {
670 pmcraid_info("PCI config is not accessible starting BIST\n");
671 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
672 pmcraid_start_bist(cmd);
673 }
674 }
675
676
677
678
679
680
681
682
683
684
685
686 static void pmcraid_timeout_handler(struct timer_list *t)
687 {
688 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer);
689 struct pmcraid_instance *pinstance = cmd->drv_inst;
690 unsigned long lock_flags;
691
692 dev_info(&pinstance->pdev->dev,
693 "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
694 cmd->ioa_cb->ioarcb.cdb[0]);
695
696
697
698
699
700
701
702 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
703 if (!pinstance->ioa_reset_in_progress) {
704 pinstance->ioa_reset_attempts = 0;
705 cmd = pmcraid_get_free_cmd(pinstance);
706
707
708
709
710 if (cmd == NULL) {
711 spin_unlock_irqrestore(pinstance->host->host_lock,
712 lock_flags);
713 pmcraid_err("no free cmnd block for timeout handler\n");
714 return;
715 }
716
717 pinstance->reset_cmd = cmd;
718 pinstance->ioa_reset_in_progress = 1;
719 } else {
720 pmcraid_info("reset is already in progress\n");
721
722 if (pinstance->reset_cmd != cmd) {
723
724
725
726
727 pmcraid_err("cmd is pending but reset in progress\n");
728 }
729
730
731
732
733
734
735 if (cmd == pinstance->reset_cmd)
736 cmd->cmd_done = pmcraid_ioa_reset;
737 }
738
739
740 if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
741 pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
742 pmcraid_notify_ioastate(pinstance,
743 PMC_DEVICE_EVENT_RESET_START);
744
745 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
746 scsi_block_requests(pinstance->host);
747 pmcraid_reset_alert(cmd);
748 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
749 }
750
751
752
753
754
755
756
757
758
759 static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
760 {
761 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
762 cmd->ioa_cb->ioarcb.cdb[0],
763 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
764
765
766
767
768
769
770 if (cmd->completion_req) {
771 cmd->completion_req = 0;
772 complete(&cmd->wait_for_completion);
773 }
774
775
776
777
778
779 if (cmd->release) {
780 cmd->release = 0;
781 pmcraid_return_cmd(cmd);
782 }
783 }
784
785
786
787
788
789
790
791
792
793
794
795
796
797 static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
798 {
799 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
800 cmd->ioa_cb->ioarcb.cdb[0],
801 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
802
803 if (cmd->release) {
804 cmd->release = 0;
805 pmcraid_return_cmd(cmd);
806 }
807 pmcraid_info("scheduling worker for config table reinitialization\n");
808 schedule_work(&cmd->drv_inst->worker_q);
809 }
810
811
812
813
814
815
816
817
818
819
820
821 static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
822 {
823 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
824 struct pmcraid_instance *pinstance = cmd->drv_inst;
825 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
826
827 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
828 scsi_cmd->result |= (DID_ERROR << 16);
829 scmd_printk(KERN_INFO, scsi_cmd,
830 "command CDB[0] = %x failed with IOASC: 0x%08X\n",
831 cmd->ioa_cb->ioarcb.cdb[0], ioasc);
832 }
833
834 if (cmd->sense_buffer) {
835 dma_unmap_single(&pinstance->pdev->dev, cmd->sense_buffer_dma,
836 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
837 cmd->sense_buffer = NULL;
838 cmd->sense_buffer_dma = 0;
839 }
840
841 scsi_dma_unmap(scsi_cmd);
842 pmcraid_return_cmd(cmd);
843 scsi_cmd->scsi_done(scsi_cmd);
844 }
845
846
847
848
849
850
851
852
853
854
855
856
857 static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
858 {
859 struct pmcraid_instance *pinstance = cmd->drv_inst;
860 unsigned long lock_flags;
861
862
863
864
865
866
867 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
868 list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
869 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
870 atomic_inc(&pinstance->outstanding_cmds);
871
872
873 mb();
874 iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin);
875 }
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891 static void pmcraid_send_cmd(
892 struct pmcraid_cmd *cmd,
893 void (*cmd_done) (struct pmcraid_cmd *),
894 unsigned long timeout,
895 void (*timeout_func) (struct timer_list *)
896 )
897 {
898
899 cmd->cmd_done = cmd_done;
900
901 if (timeout_func) {
902
903 cmd->timer.expires = jiffies + timeout;
904 cmd->timer.function = timeout_func;
905 add_timer(&cmd->timer);
906 }
907
908
909 _pmcraid_fire_command(cmd);
910 }
911
912
913
914
915
916
917
918
919 static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
920 {
921 struct pmcraid_instance *pinstance = cmd->drv_inst;
922 unsigned long lock_flags;
923
924 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
925 pmcraid_ioa_reset(cmd);
926 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
927 }
928
929
930
931
932
933
934
935
936
937 static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
938 {
939 pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
940 cmd->ioa_cb->ioarcb.cdb[0],
941 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
942
943
944
945
946 pmcraid_reinit_cmdblk(cmd);
947 cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
948 cmd->ioa_cb->ioarcb.resource_handle =
949 cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
950 cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
951 cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
952
953
954 pmcraid_info("firing normal shutdown command (%d) to IOA\n",
955 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
956
957 pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
958
959 pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
960 PMCRAID_SHUTDOWN_TIMEOUT,
961 pmcraid_timeout_handler);
962 }
963
964
965
966
967
968
969
970
971
972 static void pmcraid_querycfg(struct pmcraid_cmd *);
973
974 static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
975 {
976 struct pmcraid_instance *pinstance = cmd->drv_inst;
977 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
978 unsigned long lock_flags;
979
980
981
982
983
984 if (ioasc) {
985 pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
986 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
987 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
988 pmcraid_reset_alert(cmd);
989 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
990 } else {
991 pmcraid_querycfg(cmd);
992 }
993 }
994
995
996
997
998
999
1000
1001
1002
1003 static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
1004 {
1005 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1006 struct pmcraid_ioadl_desc *ioadl;
1007 struct pmcraid_instance *pinstance = cmd->drv_inst;
1008 u16 data_size = sizeof(struct pmcraid_inquiry_data);
1009
1010 pmcraid_reinit_cmdblk(cmd);
1011 ioarcb->request_type = REQ_TYPE_SCSI;
1012 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1013 ioarcb->cdb[0] = INQUIRY;
1014 ioarcb->cdb[1] = 1;
1015 ioarcb->cdb[2] = 0xD0;
1016 ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
1017 ioarcb->cdb[4] = data_size & 0xFF;
1018
1019
1020
1021 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1022 offsetof(struct pmcraid_ioarcb,
1023 add_data.u.ioadl[0]));
1024 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1025 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
1026
1027 ioarcb->request_flags0 |= NO_LINK_DESCS;
1028 ioarcb->data_transfer_length = cpu_to_le32(data_size);
1029 ioadl = &(ioarcb->add_data.u.ioadl[0]);
1030 ioadl->flags = IOADL_FLAGS_LAST_DESC;
1031 ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
1032 ioadl->data_len = cpu_to_le32(data_size);
1033
1034 pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
1035 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
1036 }
1037
1038
1039
1040
1041
1042
1043
1044
1045 static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
1046 {
1047 struct pmcraid_instance *pinstance = cmd->drv_inst;
1048 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1049 int index = cmd->hrrq_index;
1050 __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
1051 __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
1052 void (*done_function)(struct pmcraid_cmd *);
1053
1054 pmcraid_reinit_cmdblk(cmd);
1055 cmd->hrrq_index = index + 1;
1056
1057 if (cmd->hrrq_index < pinstance->num_hrrq) {
1058 done_function = pmcraid_identify_hrrq;
1059 } else {
1060 cmd->hrrq_index = 0;
1061 done_function = pmcraid_get_fwversion;
1062 }
1063
1064
1065 ioarcb->request_type = REQ_TYPE_IOACMD;
1066 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1067
1068
1069 ioarcb->hrrq_id = index;
1070 ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
1071 ioarcb->cdb[1] = index;
1072
1073
1074
1075
1076 pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
1077 hrrq_addr, ioarcb->ioarcb_bus_addr, index);
1078
1079 memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
1080 memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
1081
1082
1083
1084
1085
1086 pmcraid_send_cmd(cmd, done_function,
1087 PMCRAID_INTERNAL_TIMEOUT,
1088 pmcraid_timeout_handler);
1089 }
1090
1091 static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
1092 static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102 static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
1103 {
1104 if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
1105 atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
1106 else
1107 atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
1108
1109 pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
1110 }
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121 static struct pmcraid_cmd *pmcraid_init_hcam
1122 (
1123 struct pmcraid_instance *pinstance,
1124 u8 type
1125 )
1126 {
1127 struct pmcraid_cmd *cmd;
1128 struct pmcraid_ioarcb *ioarcb;
1129 struct pmcraid_ioadl_desc *ioadl;
1130 struct pmcraid_hostrcb *hcam;
1131 void (*cmd_done) (struct pmcraid_cmd *);
1132 dma_addr_t dma;
1133 int rcb_size;
1134
1135 cmd = pmcraid_get_free_cmd(pinstance);
1136
1137 if (!cmd) {
1138 pmcraid_err("no free command blocks for hcam\n");
1139 return cmd;
1140 }
1141
1142 if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
1143 rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
1144 cmd_done = pmcraid_process_ccn;
1145 dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
1146 hcam = &pinstance->ccn;
1147 } else {
1148 rcb_size = sizeof(struct pmcraid_hcam_ldn);
1149 cmd_done = pmcraid_process_ldn;
1150 dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
1151 hcam = &pinstance->ldn;
1152 }
1153
1154
1155 hcam->cmd = cmd;
1156
1157 ioarcb = &cmd->ioa_cb->ioarcb;
1158 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1159 offsetof(struct pmcraid_ioarcb,
1160 add_data.u.ioadl[0]));
1161 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1162 ioadl = ioarcb->add_data.u.ioadl;
1163
1164
1165 ioarcb->request_type = REQ_TYPE_HCAM;
1166 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1167 ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
1168 ioarcb->cdb[1] = type;
1169 ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
1170 ioarcb->cdb[8] = (rcb_size) & 0xFF;
1171
1172 ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
1173
1174 ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
1175 ioadl[0].data_len = cpu_to_le32(rcb_size);
1176 ioadl[0].address = cpu_to_le64(dma);
1177
1178 cmd->cmd_done = cmd_done;
1179 return cmd;
1180 }
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192 static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
1193 {
1194 struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
1195 pmcraid_send_hcam_cmd(cmd);
1196 }
1197
1198
1199
1200
1201
1202
1203
1204
1205 static void pmcraid_prepare_cancel_cmd(
1206 struct pmcraid_cmd *cmd,
1207 struct pmcraid_cmd *cmd_to_cancel
1208 )
1209 {
1210 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1211 __be64 ioarcb_addr;
1212
1213
1214
1215
1216
1217 ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr));
1218
1219
1220
1221
1222 ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
1223 ioarcb->request_type = REQ_TYPE_IOACMD;
1224 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
1225 ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
1226
1227 memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
1228 }
1229
1230
1231
1232
1233
1234
1235
1236
1237 static void pmcraid_cancel_hcam(
1238 struct pmcraid_cmd *cmd,
1239 u8 type,
1240 void (*cmd_done) (struct pmcraid_cmd *)
1241 )
1242 {
1243 struct pmcraid_instance *pinstance;
1244 struct pmcraid_hostrcb *hcam;
1245
1246 pinstance = cmd->drv_inst;
1247 hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
1248 &pinstance->ldn : &pinstance->ccn;
1249
1250
1251
1252
1253 if (hcam->cmd == NULL)
1254 return;
1255
1256 pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
1257
1258
1259
1260
1261 pmcraid_send_cmd(cmd, cmd_done,
1262 PMCRAID_INTERNAL_TIMEOUT,
1263 pmcraid_timeout_handler);
1264 }
1265
1266
1267
1268
1269
1270
1271 static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
1272 {
1273 pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
1274 cmd->ioa_cb->ioarcb.cdb[0],
1275 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
1276
1277 pmcraid_reinit_cmdblk(cmd);
1278
1279 pmcraid_cancel_hcam(cmd,
1280 PMCRAID_HCAM_CODE_CONFIG_CHANGE,
1281 pmcraid_ioa_shutdown);
1282 }
1283
1284
1285
1286
1287
1288
1289 static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
1290 {
1291 pmcraid_cancel_hcam(cmd,
1292 PMCRAID_HCAM_CODE_LOG_DATA,
1293 pmcraid_cancel_ccn);
1294 }
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305 static int pmcraid_expose_resource(u16 fw_version,
1306 struct pmcraid_config_table_entry *cfgte)
1307 {
1308 int retval = 0;
1309
1310 if (cfgte->resource_type == RES_TYPE_VSET) {
1311 if (fw_version <= PMCRAID_FW_VERSION_1)
1312 retval = ((cfgte->unique_flags1 & 0x80) == 0);
1313 else
1314 retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
1315 (cfgte->unique_flags1 & 0x80) == 0);
1316
1317 } else if (cfgte->resource_type == RES_TYPE_GSCSI)
1318 retval = (RES_BUS(cfgte->resource_address) !=
1319 PMCRAID_VIRTUAL_ENCL_BUS_ID);
1320 return retval;
1321 }
1322
1323
1324 enum {
1325 PMCRAID_AEN_ATTR_UNSPEC,
1326 PMCRAID_AEN_ATTR_EVENT,
1327 __PMCRAID_AEN_ATTR_MAX,
1328 };
1329 #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
1330
1331
1332 enum {
1333 PMCRAID_AEN_CMD_UNSPEC,
1334 PMCRAID_AEN_CMD_EVENT,
1335 __PMCRAID_AEN_CMD_MAX,
1336 };
1337 #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
1338
1339 static struct genl_multicast_group pmcraid_mcgrps[] = {
1340 { .name = "events", },
1341 };
1342
1343 static struct genl_family pmcraid_event_family __ro_after_init = {
1344 .module = THIS_MODULE,
1345 .name = "pmcraid",
1346 .version = 1,
1347 .maxattr = PMCRAID_AEN_ATTR_MAX,
1348 .mcgrps = pmcraid_mcgrps,
1349 .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
1350 };
1351
1352
1353
1354
1355
1356
1357
1358
1359 static int __init pmcraid_netlink_init(void)
1360 {
1361 int result;
1362
1363 result = genl_register_family(&pmcraid_event_family);
1364
1365 if (result)
1366 return result;
1367
1368 pmcraid_info("registered NETLINK GENERIC group: %d\n",
1369 pmcraid_event_family.id);
1370
1371 return result;
1372 }
1373
1374
1375
1376
1377
1378
1379
1380 static void pmcraid_netlink_release(void)
1381 {
1382 genl_unregister_family(&pmcraid_event_family);
1383 }
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393 static int pmcraid_notify_aen(
1394 struct pmcraid_instance *pinstance,
1395 struct pmcraid_aen_msg *aen_msg,
1396 u32 data_size
1397 )
1398 {
1399 struct sk_buff *skb;
1400 void *msg_header;
1401 u32 total_size, nla_genl_hdr_total_size;
1402 int result;
1403
1404 aen_msg->hostno = (pinstance->host->unique_id << 16 |
1405 MINOR(pinstance->cdev.dev));
1406 aen_msg->length = data_size;
1407
1408 data_size += sizeof(*aen_msg);
1409
1410 total_size = nla_total_size(data_size);
1411
1412 nla_genl_hdr_total_size =
1413 (total_size + (GENL_HDRLEN +
1414 ((struct genl_family *)&pmcraid_event_family)->hdrsize)
1415 + NLMSG_HDRLEN);
1416 skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
1417
1418
1419 if (!skb) {
1420 pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
1421 total_size);
1422 return -ENOMEM;
1423 }
1424
1425
1426 msg_header = genlmsg_put(skb, 0, 0,
1427 &pmcraid_event_family, 0,
1428 PMCRAID_AEN_CMD_EVENT);
1429 if (!msg_header) {
1430 pmcraid_err("failed to copy command details\n");
1431 nlmsg_free(skb);
1432 return -ENOMEM;
1433 }
1434
1435 result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
1436
1437 if (result) {
1438 pmcraid_err("failed to copy AEN attribute data\n");
1439 nlmsg_free(skb);
1440 return -EINVAL;
1441 }
1442
1443
1444 genlmsg_end(skb, msg_header);
1445
1446 result = genlmsg_multicast(&pmcraid_event_family, skb,
1447 0, 0, GFP_ATOMIC);
1448
1449
1450
1451
1452 if (result)
1453 pmcraid_info("error (%x) sending aen event message\n", result);
1454 return result;
1455 }
1456
1457
1458
1459
1460
1461
1462
1463
1464 static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
1465 {
1466 return pmcraid_notify_aen(pinstance,
1467 pinstance->ccn.msg,
1468 le32_to_cpu(pinstance->ccn.hcam->data_len) +
1469 sizeof(struct pmcraid_hcam_hdr));
1470 }
1471
1472
1473
1474
1475
1476
1477
1478
1479 static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
1480 {
1481 return pmcraid_notify_aen(pinstance,
1482 pinstance->ldn.msg,
1483 le32_to_cpu(pinstance->ldn.hcam->data_len) +
1484 sizeof(struct pmcraid_hcam_hdr));
1485 }
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495 static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
1496 {
1497 pinstance->scn.ioa_state = evt;
1498 pmcraid_notify_aen(pinstance,
1499 &pinstance->scn.msg,
1500 sizeof(u32));
1501 }
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511 static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1512 {
1513 struct pmcraid_config_table_entry *cfg_entry;
1514 struct pmcraid_hcam_ccn *ccn_hcam;
1515 struct pmcraid_cmd *cmd;
1516 struct pmcraid_cmd *cfgcmd;
1517 struct pmcraid_resource_entry *res = NULL;
1518 unsigned long lock_flags;
1519 unsigned long host_lock_flags;
1520 u32 new_entry = 1;
1521 u32 hidden_entry = 0;
1522 u16 fw_version;
1523 int rc;
1524
1525 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
1526 cfg_entry = &ccn_hcam->cfg_entry;
1527 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
1528
1529 pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
1530 res: %x:%x:%x:%x\n",
1531 le32_to_cpu(pinstance->ccn.hcam->ilid),
1532 pinstance->ccn.hcam->op_code,
1533 (le32_to_cpu(pinstance->ccn.hcam->timestamp1) |
1534 ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)),
1535 pinstance->ccn.hcam->notification_type,
1536 pinstance->ccn.hcam->notification_lost,
1537 pinstance->ccn.hcam->flags,
1538 pinstance->host->unique_id,
1539 RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
1540 (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
1541 RES_BUS(cfg_entry->resource_address)),
1542 RES_IS_VSET(*cfg_entry) ?
1543 (fw_version <= PMCRAID_FW_VERSION_1 ?
1544 cfg_entry->unique_flags1 :
1545 le16_to_cpu(cfg_entry->array_id) & 0xFF) :
1546 RES_TARGET(cfg_entry->resource_address),
1547 RES_LUN(cfg_entry->resource_address));
1548
1549
1550
1551 if (pinstance->ccn.hcam->notification_lost) {
1552 cfgcmd = pmcraid_get_free_cmd(pinstance);
1553 if (cfgcmd) {
1554 pmcraid_info("lost CCN, reading config table\b");
1555 pinstance->reinit_cfg_table = 1;
1556 pmcraid_querycfg(cfgcmd);
1557 } else {
1558 pmcraid_err("lost CCN, no free cmd for querycfg\n");
1559 }
1560 goto out_notify_apps;
1561 }
1562
1563
1564
1565
1566
1567 if (pinstance->ccn.hcam->notification_type ==
1568 NOTIFICATION_TYPE_ENTRY_CHANGED &&
1569 cfg_entry->resource_type == RES_TYPE_VSET) {
1570 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
1571 } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
1572 goto out_notify_apps;
1573 }
1574
1575 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
1576 list_for_each_entry(res, &pinstance->used_res_q, queue) {
1577 rc = memcmp(&res->cfg_entry.resource_address,
1578 &cfg_entry->resource_address,
1579 sizeof(cfg_entry->resource_address));
1580 if (!rc) {
1581 new_entry = 0;
1582 break;
1583 }
1584 }
1585
1586 if (new_entry) {
1587
1588 if (hidden_entry) {
1589 spin_unlock_irqrestore(&pinstance->resource_lock,
1590 lock_flags);
1591 goto out_notify_apps;
1592 }
1593
1594
1595
1596
1597
1598 if (list_empty(&pinstance->free_res_q)) {
1599 spin_unlock_irqrestore(&pinstance->resource_lock,
1600 lock_flags);
1601 pmcraid_err("too many resources attached\n");
1602 spin_lock_irqsave(pinstance->host->host_lock,
1603 host_lock_flags);
1604 pmcraid_send_hcam(pinstance,
1605 PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1606 spin_unlock_irqrestore(pinstance->host->host_lock,
1607 host_lock_flags);
1608 return;
1609 }
1610
1611 res = list_entry(pinstance->free_res_q.next,
1612 struct pmcraid_resource_entry, queue);
1613
1614 list_del(&res->queue);
1615 res->scsi_dev = NULL;
1616 res->reset_progress = 0;
1617 list_add_tail(&res->queue, &pinstance->used_res_q);
1618 }
1619
1620 memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
1621
1622 if (pinstance->ccn.hcam->notification_type ==
1623 NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
1624 if (res->scsi_dev) {
1625 if (fw_version <= PMCRAID_FW_VERSION_1)
1626 res->cfg_entry.unique_flags1 &= 0x7F;
1627 else
1628 res->cfg_entry.array_id &= cpu_to_le16(0xFF);
1629 res->change_detected = RES_CHANGE_DEL;
1630 res->cfg_entry.resource_handle =
1631 PMCRAID_INVALID_RES_HANDLE;
1632 schedule_work(&pinstance->worker_q);
1633 } else {
1634
1635 list_move_tail(&res->queue, &pinstance->free_res_q);
1636 }
1637 } else if (!res->scsi_dev) {
1638 res->change_detected = RES_CHANGE_ADD;
1639 schedule_work(&pinstance->worker_q);
1640 }
1641 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
1642
1643 out_notify_apps:
1644
1645
1646 if (!pmcraid_disable_aen)
1647 pmcraid_notify_ccn(pinstance);
1648
1649 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1650 if (cmd)
1651 pmcraid_send_hcam_cmd(cmd);
1652 }
1653
1654
1655
1656
1657
1658
1659
1660 static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
1661 {
1662 int i;
1663 for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
1664 if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
1665 return &pmcraid_ioasc_error_table[i];
1666 }
1667 return NULL;
1668 }
1669
1670
1671
1672
1673
1674
1675 static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
1676 {
1677 struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
1678
1679 if (error_info == NULL ||
1680 cmd->drv_inst->current_log_level < error_info->log_level)
1681 return;
1682
1683
1684 pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
1685 cmd->ioa_cb->ioarcb.cdb[0],
1686 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
1687 ioasc, error_info->error_string);
1688 }
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698 static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
1699 {
1700 struct pmcraid_hcam_ldn *hcam_ldn;
1701 u32 ioasc;
1702
1703 hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1704
1705 pmcraid_info
1706 ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
1707 pinstance->ldn.hcam->ilid,
1708 pinstance->ldn.hcam->op_code,
1709 pinstance->ldn.hcam->notification_type,
1710 pinstance->ldn.hcam->notification_lost,
1711 pinstance->ldn.hcam->flags,
1712 pinstance->ldn.hcam->overlay_id);
1713
1714
1715 if (pinstance->ldn.hcam->notification_type !=
1716 NOTIFICATION_TYPE_ERROR_LOG)
1717 return;
1718
1719 if (pinstance->ldn.hcam->notification_lost ==
1720 HOSTRCB_NOTIFICATIONS_LOST)
1721 dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
1722
1723 ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
1724
1725 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
1726 ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
1727 dev_info(&pinstance->pdev->dev,
1728 "UnitAttention due to IOA Bus Reset\n");
1729 scsi_report_bus_reset(
1730 pinstance->host,
1731 RES_BUS(hcam_ldn->error_log.fd_ra));
1732 }
1733
1734 return;
1735 }
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747 static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
1748 {
1749 struct pmcraid_instance *pinstance = cmd->drv_inst;
1750 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1751 unsigned long lock_flags;
1752
1753 pinstance->ccn.cmd = NULL;
1754 pmcraid_return_cmd(cmd);
1755
1756
1757
1758
1759
1760 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1761 atomic_read(&pinstance->ccn.ignore) == 1) {
1762 return;
1763 } else if (ioasc) {
1764 dev_info(&pinstance->pdev->dev,
1765 "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
1766 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1767 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1768 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1769 } else {
1770 pmcraid_handle_config_change(pinstance);
1771 }
1772 }
1773
1774
1775
1776
1777
1778
1779
1780
1781 static void pmcraid_initiate_reset(struct pmcraid_instance *);
1782 static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
1783
1784 static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
1785 {
1786 struct pmcraid_instance *pinstance = cmd->drv_inst;
1787 struct pmcraid_hcam_ldn *ldn_hcam =
1788 (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1789 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1790 u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
1791 unsigned long lock_flags;
1792
1793
1794 pinstance->ldn.cmd = NULL;
1795 pmcraid_return_cmd(cmd);
1796
1797
1798
1799
1800
1801 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1802 atomic_read(&pinstance->ccn.ignore) == 1) {
1803 return;
1804 } else if (!ioasc) {
1805 pmcraid_handle_error_log(pinstance);
1806 if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
1807 spin_lock_irqsave(pinstance->host->host_lock,
1808 lock_flags);
1809 pmcraid_initiate_reset(pinstance);
1810 spin_unlock_irqrestore(pinstance->host->host_lock,
1811 lock_flags);
1812 return;
1813 }
1814 if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
1815 pinstance->timestamp_error = 1;
1816 pmcraid_set_timestamp(cmd);
1817 }
1818 } else {
1819 dev_info(&pinstance->pdev->dev,
1820 "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
1821 }
1822
1823 if (!pmcraid_disable_aen)
1824 pmcraid_notify_ldn(pinstance);
1825
1826 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1827 if (cmd)
1828 pmcraid_send_hcam_cmd(cmd);
1829 }
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839 static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
1840 {
1841 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1842 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1843 }
1844
1845
1846
1847
1848
1849 static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
1850 {
1851 struct pmcraid_instance *pinstance = cmd->drv_inst;
1852
1853
1854
1855
1856
1857
1858 atomic_set(&pinstance->ccn.ignore, 1);
1859 atomic_set(&pinstance->ldn.ignore, 1);
1860
1861
1862
1863
1864
1865 if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
1866 pinstance->ioa_unit_check) {
1867 pinstance->force_ioa_reset = 0;
1868 pinstance->ioa_unit_check = 0;
1869 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1870 pmcraid_reset_alert(cmd);
1871 return;
1872 }
1873
1874
1875
1876
1877
1878 pmcraid_cancel_ldn(cmd);
1879 }
1880
1881
1882
1883
1884
1885
1886
1887 static void pmcraid_reinit_buffers(struct pmcraid_instance *);
1888
1889 static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
1890 {
1891 u32 intrs;
1892
1893 pmcraid_reinit_buffers(pinstance);
1894 intrs = pmcraid_read_interrupts(pinstance);
1895
1896 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
1897
1898 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
1899 if (!pinstance->interrupt_mode) {
1900 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1901 pinstance->int_regs.
1902 ioa_host_interrupt_mask_reg);
1903 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1904 pinstance->int_regs.ioa_host_interrupt_clr_reg);
1905 }
1906 return 1;
1907 } else {
1908 return 0;
1909 }
1910 }
1911
1912
1913
1914
1915
1916
1917
1918
1919 static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
1920 {
1921 struct pmcraid_instance *pinstance = cmd->drv_inst;
1922 u32 int_reg;
1923 u32 doorbell;
1924
1925
1926
1927
1928
1929 cmd->cmd_done = pmcraid_ioa_reset;
1930 cmd->timer.expires = jiffies +
1931 msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
1932 cmd->timer.function = pmcraid_timeout_handler;
1933
1934 if (!timer_pending(&cmd->timer))
1935 add_timer(&cmd->timer);
1936
1937
1938
1939
1940 doorbell = DOORBELL_RUNTIME_RESET |
1941 DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
1942
1943
1944
1945
1946 if (pinstance->interrupt_mode) {
1947 iowrite32(DOORBELL_INTR_MODE_MSIX,
1948 pinstance->int_regs.host_ioa_interrupt_reg);
1949 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
1950 }
1951
1952 iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
1953 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
1954 int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
1955
1956 pmcraid_info("Waiting for IOA to become operational %x:%x\n",
1957 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
1958 int_reg);
1959 }
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969 static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
1970 {
1971 pmcraid_info("%s is not yet implemented\n", __func__);
1972 }
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986 static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
1987 {
1988 struct pmcraid_cmd *cmd, *temp;
1989 unsigned long lock_flags;
1990
1991
1992
1993
1994 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
1995 list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
1996 free_list) {
1997 list_del(&cmd->free_list);
1998 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
1999 lock_flags);
2000 cmd->ioa_cb->ioasa.ioasc =
2001 cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
2002 cmd->ioa_cb->ioasa.ilid =
2003 cpu_to_le32(PMCRAID_DRIVER_ILID);
2004
2005
2006 del_timer(&cmd->timer);
2007
2008
2009
2010
2011
2012
2013 if (cmd->scsi_cmd) {
2014
2015 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2016 __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
2017
2018 scsi_cmd->result |= DID_ERROR << 16;
2019
2020 scsi_dma_unmap(scsi_cmd);
2021 pmcraid_return_cmd(cmd);
2022
2023 pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
2024 le32_to_cpu(resp) >> 2,
2025 cmd->ioa_cb->ioarcb.cdb[0],
2026 scsi_cmd->result);
2027 scsi_cmd->scsi_done(scsi_cmd);
2028 } else if (cmd->cmd_done == pmcraid_internal_done ||
2029 cmd->cmd_done == pmcraid_erp_done) {
2030 cmd->cmd_done(cmd);
2031 } else if (cmd->cmd_done != pmcraid_ioa_reset &&
2032 cmd->cmd_done != pmcraid_ioa_shutdown_done) {
2033 pmcraid_return_cmd(cmd);
2034 }
2035
2036 atomic_dec(&pinstance->outstanding_cmds);
2037 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2038 }
2039
2040 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
2041 }
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058 static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
2059 {
2060 struct pmcraid_instance *pinstance = cmd->drv_inst;
2061 u8 reset_complete = 0;
2062
2063 pinstance->ioa_reset_in_progress = 1;
2064
2065 if (pinstance->reset_cmd != cmd) {
2066 pmcraid_err("reset is called with different command block\n");
2067 pinstance->reset_cmd = cmd;
2068 }
2069
2070 pmcraid_info("reset_engine: state = %d, command = %p\n",
2071 pinstance->ioa_state, cmd);
2072
2073 switch (pinstance->ioa_state) {
2074
2075 case IOA_STATE_DEAD:
2076
2077
2078
2079
2080 pmcraid_err("IOA is offline no reset is possible\n");
2081 reset_complete = 1;
2082 break;
2083
2084 case IOA_STATE_IN_BRINGDOWN:
2085
2086
2087
2088
2089 pmcraid_disable_interrupts(pinstance, ~0);
2090 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2091 pmcraid_reset_alert(cmd);
2092 break;
2093
2094 case IOA_STATE_UNKNOWN:
2095
2096
2097
2098 scsi_block_requests(pinstance->host);
2099
2100
2101
2102
2103
2104 if (pinstance->ioa_hard_reset == 0) {
2105 if (ioread32(pinstance->ioa_status) &
2106 INTRS_TRANSITION_TO_OPERATIONAL) {
2107 pmcraid_info("sticky bit set, bring-up\n");
2108 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2109 pmcraid_reinit_cmdblk(cmd);
2110 pmcraid_identify_hrrq(cmd);
2111 } else {
2112 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2113 pmcraid_soft_reset(cmd);
2114 }
2115 } else {
2116
2117
2118
2119 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2120 pmcraid_reset_alert(cmd);
2121 }
2122 break;
2123
2124 case IOA_STATE_IN_RESET_ALERT:
2125
2126
2127
2128
2129
2130 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
2131 pmcraid_start_bist(cmd);
2132 break;
2133
2134 case IOA_STATE_IN_HARD_RESET:
2135 pinstance->ioa_reset_attempts++;
2136
2137
2138 if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
2139 pinstance->ioa_reset_attempts = 0;
2140 pmcraid_err("IOA didn't respond marking it as dead\n");
2141 pinstance->ioa_state = IOA_STATE_DEAD;
2142
2143 if (pinstance->ioa_bringdown)
2144 pmcraid_notify_ioastate(pinstance,
2145 PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
2146 else
2147 pmcraid_notify_ioastate(pinstance,
2148 PMC_DEVICE_EVENT_RESET_FAILED);
2149 reset_complete = 1;
2150 break;
2151 }
2152
2153
2154
2155
2156 pci_restore_state(pinstance->pdev);
2157
2158
2159 pmcraid_fail_outstanding_cmds(pinstance);
2160
2161
2162 if (pinstance->ioa_unit_check) {
2163 pmcraid_info("unit check is active\n");
2164 pinstance->ioa_unit_check = 0;
2165 pmcraid_get_dump(pinstance);
2166 pinstance->ioa_reset_attempts--;
2167 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2168 pmcraid_reset_alert(cmd);
2169 break;
2170 }
2171
2172
2173
2174
2175
2176 if (pinstance->ioa_bringdown) {
2177 pmcraid_info("bringing down the adapter\n");
2178 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2179 pinstance->ioa_bringdown = 0;
2180 pinstance->ioa_state = IOA_STATE_UNKNOWN;
2181 pmcraid_notify_ioastate(pinstance,
2182 PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
2183 reset_complete = 1;
2184 } else {
2185
2186
2187
2188
2189 if (pmcraid_reset_enable_ioa(pinstance)) {
2190 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2191 pmcraid_info("bringing up the adapter\n");
2192 pmcraid_reinit_cmdblk(cmd);
2193 pmcraid_identify_hrrq(cmd);
2194 } else {
2195 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2196 pmcraid_soft_reset(cmd);
2197 }
2198 }
2199 break;
2200
2201 case IOA_STATE_IN_SOFT_RESET:
2202
2203
2204
2205 pmcraid_info("In softreset proceeding with bring-up\n");
2206 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2207
2208
2209
2210
2211
2212 pmcraid_identify_hrrq(cmd);
2213 break;
2214
2215 case IOA_STATE_IN_BRINGUP:
2216
2217
2218
2219 pinstance->ioa_state = IOA_STATE_OPERATIONAL;
2220 reset_complete = 1;
2221 break;
2222
2223 case IOA_STATE_OPERATIONAL:
2224 default:
2225
2226
2227
2228
2229
2230 if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
2231 pinstance->force_ioa_reset == 0) {
2232 pmcraid_notify_ioastate(pinstance,
2233 PMC_DEVICE_EVENT_RESET_SUCCESS);
2234 reset_complete = 1;
2235 } else {
2236 if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
2237 pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
2238 pmcraid_reinit_cmdblk(cmd);
2239 pmcraid_unregister_hcams(cmd);
2240 }
2241 break;
2242 }
2243
2244
2245
2246
2247
2248
2249 if (reset_complete) {
2250 pinstance->ioa_reset_in_progress = 0;
2251 pinstance->ioa_reset_attempts = 0;
2252 pinstance->reset_cmd = NULL;
2253 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2254 pinstance->ioa_bringdown = 0;
2255 pmcraid_return_cmd(cmd);
2256
2257
2258
2259
2260 if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
2261 pmcraid_register_hcams(pinstance);
2262
2263 wake_up_all(&pinstance->reset_wait_q);
2264 }
2265
2266 return;
2267 }
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280 static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
2281 {
2282 struct pmcraid_cmd *cmd;
2283
2284
2285
2286
2287 if (!pinstance->ioa_reset_in_progress) {
2288 scsi_block_requests(pinstance->host);
2289 cmd = pmcraid_get_free_cmd(pinstance);
2290
2291 if (cmd == NULL) {
2292 pmcraid_err("no cmnd blocks for initiate_reset\n");
2293 return;
2294 }
2295
2296 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2297 pinstance->reset_cmd = cmd;
2298 pinstance->force_ioa_reset = 1;
2299 pmcraid_notify_ioastate(pinstance,
2300 PMC_DEVICE_EVENT_RESET_START);
2301 pmcraid_ioa_reset(cmd);
2302 }
2303 }
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319 static int pmcraid_reset_reload(
2320 struct pmcraid_instance *pinstance,
2321 u8 shutdown_type,
2322 u8 target_state
2323 )
2324 {
2325 struct pmcraid_cmd *reset_cmd = NULL;
2326 unsigned long lock_flags;
2327 int reset = 1;
2328
2329 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2330
2331 if (pinstance->ioa_reset_in_progress) {
2332 pmcraid_info("reset_reload: reset is already in progress\n");
2333
2334 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2335
2336 wait_event(pinstance->reset_wait_q,
2337 !pinstance->ioa_reset_in_progress);
2338
2339 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2340
2341 if (pinstance->ioa_state == IOA_STATE_DEAD) {
2342 pmcraid_info("reset_reload: IOA is dead\n");
2343 goto out_unlock;
2344 }
2345
2346 if (pinstance->ioa_state == target_state) {
2347 reset = 0;
2348 goto out_unlock;
2349 }
2350 }
2351
2352 pmcraid_info("reset_reload: proceeding with reset\n");
2353 scsi_block_requests(pinstance->host);
2354 reset_cmd = pmcraid_get_free_cmd(pinstance);
2355 if (reset_cmd == NULL) {
2356 pmcraid_err("no free cmnd for reset_reload\n");
2357 goto out_unlock;
2358 }
2359
2360 if (shutdown_type == SHUTDOWN_NORMAL)
2361 pinstance->ioa_bringdown = 1;
2362
2363 pinstance->ioa_shutdown_type = shutdown_type;
2364 pinstance->reset_cmd = reset_cmd;
2365 pinstance->force_ioa_reset = reset;
2366 pmcraid_info("reset_reload: initiating reset\n");
2367 pmcraid_ioa_reset(reset_cmd);
2368 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2369 pmcraid_info("reset_reload: waiting for reset to complete\n");
2370 wait_event(pinstance->reset_wait_q,
2371 !pinstance->ioa_reset_in_progress);
2372
2373 pmcraid_info("reset_reload: reset is complete !!\n");
2374 scsi_unblock_requests(pinstance->host);
2375 return pinstance->ioa_state != target_state;
2376
2377 out_unlock:
2378 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2379 return reset;
2380 }
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390 static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
2391 {
2392 return pmcraid_reset_reload(pinstance,
2393 SHUTDOWN_NORMAL,
2394 IOA_STATE_UNKNOWN);
2395 }
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405 static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
2406 {
2407 pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
2408
2409 return pmcraid_reset_reload(pinstance,
2410 SHUTDOWN_NONE,
2411 IOA_STATE_OPERATIONAL);
2412 }
2413
2414
2415
2416
2417
2418
2419
2420
2421 static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
2422 {
2423 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2424 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
2425 struct device *dev = &cmd->drv_inst->pdev->dev;
2426
2427 cmd->sense_buffer = cmd->scsi_cmd->sense_buffer;
2428 cmd->sense_buffer_dma = dma_map_single(dev, cmd->sense_buffer,
2429 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
2430 if (dma_mapping_error(dev, cmd->sense_buffer_dma)) {
2431 pmcraid_err
2432 ("couldn't allocate sense buffer for request sense\n");
2433 pmcraid_erp_done(cmd);
2434 return;
2435 }
2436
2437
2438 memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
2439 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2440 ioarcb->request_flags0 = (SYNC_COMPLETE |
2441 NO_LINK_DESCS |
2442 INHIBIT_UL_CHECK);
2443 ioarcb->request_type = REQ_TYPE_SCSI;
2444 ioarcb->cdb[0] = REQUEST_SENSE;
2445 ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2446
2447 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
2448 offsetof(struct pmcraid_ioarcb,
2449 add_data.u.ioadl[0]));
2450 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
2451
2452 ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2453
2454 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
2455 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2456 ioadl->flags = IOADL_FLAGS_LAST_DESC;
2457
2458
2459
2460
2461
2462
2463 pmcraid_send_cmd(cmd, pmcraid_erp_done,
2464 PMCRAID_REQUEST_SENSE_TIMEOUT,
2465 pmcraid_timeout_handler);
2466 }
2467
2468
2469
2470
2471
2472
2473
2474
2475 static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, bool need_sense)
2476 {
2477 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2478 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2479 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2480
2481 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2482 ioarcb->request_flags0 = SYNC_OVERRIDE;
2483 ioarcb->request_type = REQ_TYPE_IOACMD;
2484 ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
2485
2486 if (RES_IS_GSCSI(res->cfg_entry))
2487 ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
2488
2489 ioarcb->ioadl_bus_addr = 0;
2490 ioarcb->ioadl_length = 0;
2491 ioarcb->data_transfer_length = 0;
2492 ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL));
2493
2494
2495
2496
2497 pmcraid_send_cmd(cmd, need_sense ?
2498 pmcraid_erp_done : pmcraid_request_sense,
2499 PMCRAID_REQUEST_SENSE_TIMEOUT,
2500 pmcraid_timeout_handler);
2501 }
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511 static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
2512 {
2513 u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
2514 struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
2515 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2516 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2517 u32 failing_lba = 0;
2518
2519 memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
2520 cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
2521
2522 if (RES_IS_VSET(res->cfg_entry) &&
2523 ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
2524 ioasa->u.vset.failing_lba_hi != 0) {
2525
2526 sense_buf[0] = 0x72;
2527 sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2528 sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2529 sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2530
2531 sense_buf[7] = 12;
2532 sense_buf[8] = 0;
2533 sense_buf[9] = 0x0A;
2534 sense_buf[10] = 0x80;
2535
2536 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
2537
2538 sense_buf[12] = (failing_lba & 0xff000000) >> 24;
2539 sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
2540 sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
2541 sense_buf[15] = failing_lba & 0x000000ff;
2542
2543 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
2544
2545 sense_buf[16] = (failing_lba & 0xff000000) >> 24;
2546 sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
2547 sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
2548 sense_buf[19] = failing_lba & 0x000000ff;
2549 } else {
2550 sense_buf[0] = 0x70;
2551 sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2552 sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2553 sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2554
2555 if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
2556 if (RES_IS_VSET(res->cfg_entry))
2557 failing_lba =
2558 le32_to_cpu(ioasa->u.
2559 vset.failing_lba_lo);
2560 sense_buf[0] |= 0x80;
2561 sense_buf[3] = (failing_lba >> 24) & 0xff;
2562 sense_buf[4] = (failing_lba >> 16) & 0xff;
2563 sense_buf[5] = (failing_lba >> 8) & 0xff;
2564 sense_buf[6] = failing_lba & 0xff;
2565 }
2566
2567 sense_buf[7] = 6;
2568 }
2569 }
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583 static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
2584 {
2585 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2586 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2587 struct pmcraid_instance *pinstance = cmd->drv_inst;
2588 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2589 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2590 u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
2591 bool sense_copied = false;
2592
2593 if (!res) {
2594 pmcraid_info("resource pointer is NULL\n");
2595 return 0;
2596 }
2597
2598
2599 if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
2600 atomic_inc(&res->read_failures);
2601 else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
2602 atomic_inc(&res->write_failures);
2603
2604 if (!RES_IS_GSCSI(res->cfg_entry) &&
2605 masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
2606 pmcraid_frame_auto_sense(cmd);
2607 }
2608
2609
2610 pmcraid_ioasc_logger(ioasc, cmd);
2611
2612 switch (masked_ioasc) {
2613
2614 case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
2615 scsi_cmd->result |= (DID_ABORT << 16);
2616 break;
2617
2618 case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
2619 case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
2620 scsi_cmd->result |= (DID_NO_CONNECT << 16);
2621 break;
2622
2623 case PMCRAID_IOASC_NR_SYNC_REQUIRED:
2624 res->sync_reqd = 1;
2625 scsi_cmd->result |= (DID_IMM_RETRY << 16);
2626 break;
2627
2628 case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
2629 scsi_cmd->result |= (DID_PASSTHROUGH << 16);
2630 break;
2631
2632 case PMCRAID_IOASC_UA_BUS_WAS_RESET:
2633 case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
2634 if (!res->reset_progress)
2635 scsi_report_bus_reset(pinstance->host,
2636 scsi_cmd->device->channel);
2637 scsi_cmd->result |= (DID_ERROR << 16);
2638 break;
2639
2640 case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
2641 scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
2642 res->sync_reqd = 1;
2643
2644
2645
2646
2647 if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
2648 SAM_STAT_CHECK_CONDITION &&
2649 PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
2650 return 0;
2651
2652
2653
2654
2655 if (ioasa->auto_sense_length != 0) {
2656 short sense_len = le16_to_cpu(ioasa->auto_sense_length);
2657 int data_size = min_t(u16, sense_len,
2658 SCSI_SENSE_BUFFERSIZE);
2659
2660 memcpy(scsi_cmd->sense_buffer,
2661 ioasa->sense_data,
2662 data_size);
2663 sense_copied = true;
2664 }
2665
2666 if (RES_IS_GSCSI(res->cfg_entry))
2667 pmcraid_cancel_all(cmd, sense_copied);
2668 else if (sense_copied)
2669 pmcraid_erp_done(cmd);
2670 else
2671 pmcraid_request_sense(cmd);
2672
2673 return 1;
2674
2675 case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
2676 break;
2677
2678 default:
2679 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
2680 scsi_cmd->result |= (DID_ERROR << 16);
2681 break;
2682 }
2683 return 0;
2684 }
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699 static int pmcraid_reset_device(
2700 struct scsi_cmnd *scsi_cmd,
2701 unsigned long timeout,
2702 u8 modifier
2703 )
2704 {
2705 struct pmcraid_cmd *cmd;
2706 struct pmcraid_instance *pinstance;
2707 struct pmcraid_resource_entry *res;
2708 struct pmcraid_ioarcb *ioarcb;
2709 unsigned long lock_flags;
2710 u32 ioasc;
2711
2712 pinstance =
2713 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2714 res = scsi_cmd->device->hostdata;
2715
2716 if (!res) {
2717 sdev_printk(KERN_ERR, scsi_cmd->device,
2718 "reset_device: NULL resource pointer\n");
2719 return FAILED;
2720 }
2721
2722
2723
2724
2725
2726 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2727 if (pinstance->ioa_reset_in_progress ||
2728 pinstance->ioa_state == IOA_STATE_DEAD) {
2729 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2730 return FAILED;
2731 }
2732
2733 res->reset_progress = 1;
2734 pmcraid_info("Resetting %s resource with addr %x\n",
2735 ((modifier & RESET_DEVICE_LUN) ? "LUN" :
2736 ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
2737 le32_to_cpu(res->cfg_entry.resource_address));
2738
2739
2740 cmd = pmcraid_get_free_cmd(pinstance);
2741
2742 if (cmd == NULL) {
2743 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2744 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2745 return FAILED;
2746 }
2747
2748 ioarcb = &cmd->ioa_cb->ioarcb;
2749 ioarcb->resource_handle = res->cfg_entry.resource_handle;
2750 ioarcb->request_type = REQ_TYPE_IOACMD;
2751 ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
2752
2753
2754 if (modifier)
2755 modifier = ENABLE_RESET_MODIFIER | modifier;
2756
2757 ioarcb->cdb[1] = modifier;
2758
2759 init_completion(&cmd->wait_for_completion);
2760 cmd->completion_req = 1;
2761
2762 pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
2763 cmd->ioa_cb->ioarcb.cdb[0],
2764 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
2765 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2766
2767 pmcraid_send_cmd(cmd,
2768 pmcraid_internal_done,
2769 timeout,
2770 pmcraid_timeout_handler);
2771
2772 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2773
2774
2775
2776
2777
2778 wait_for_completion(&cmd->wait_for_completion);
2779
2780
2781
2782
2783 pmcraid_return_cmd(cmd);
2784 res->reset_progress = 0;
2785 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2786
2787
2788 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2789 }
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807 static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
2808 {
2809 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2810 int rc = 0;
2811
2812 scsi_set_resid(scsi_cmd, reslen);
2813
2814 pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
2815 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
2816 cmd->ioa_cb->ioarcb.cdb[0],
2817 ioasc, scsi_cmd->result);
2818
2819 if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
2820 rc = pmcraid_error_handler(cmd);
2821
2822 if (rc == 0) {
2823 scsi_dma_unmap(scsi_cmd);
2824 scsi_cmd->scsi_done(scsi_cmd);
2825 }
2826
2827 return rc;
2828 }
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842 static void pmcraid_io_done(struct pmcraid_cmd *cmd)
2843 {
2844 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2845 u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
2846
2847 if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
2848 pmcraid_return_cmd(cmd);
2849 }
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859 static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
2860 {
2861 struct pmcraid_cmd *cancel_cmd;
2862 struct pmcraid_instance *pinstance;
2863 struct pmcraid_resource_entry *res;
2864
2865 pinstance = (struct pmcraid_instance *)cmd->drv_inst;
2866 res = cmd->scsi_cmd->device->hostdata;
2867
2868 cancel_cmd = pmcraid_get_free_cmd(pinstance);
2869
2870 if (cancel_cmd == NULL) {
2871 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2872 return NULL;
2873 }
2874
2875 pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
2876
2877 pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
2878 cmd->ioa_cb->ioarcb.cdb[0],
2879 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2880
2881 init_completion(&cancel_cmd->wait_for_completion);
2882 cancel_cmd->completion_req = 1;
2883
2884 pmcraid_info("command (%d) CDB[0] = %x for %x\n",
2885 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
2886 cancel_cmd->ioa_cb->ioarcb.cdb[0],
2887 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
2888
2889 pmcraid_send_cmd(cancel_cmd,
2890 pmcraid_internal_done,
2891 PMCRAID_INTERNAL_TIMEOUT,
2892 pmcraid_timeout_handler);
2893 return cancel_cmd;
2894 }
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905 static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
2906 {
2907 struct pmcraid_resource_entry *res;
2908 u32 ioasc;
2909
2910 wait_for_completion(&cancel_cmd->wait_for_completion);
2911 res = cancel_cmd->res;
2912 cancel_cmd->res = NULL;
2913 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
2914
2915
2916
2917
2918
2919
2920 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
2921 ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
2922 if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
2923 res->sync_reqd = 1;
2924 ioasc = 0;
2925 }
2926
2927
2928 pmcraid_return_cmd(cancel_cmd);
2929 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2930 }
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942 static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
2943 {
2944 struct pmcraid_instance *pinstance;
2945 struct pmcraid_cmd *cmd;
2946 struct pmcraid_resource_entry *res;
2947 unsigned long host_lock_flags;
2948 unsigned long pending_lock_flags;
2949 struct pmcraid_cmd *cancel_cmd = NULL;
2950 int cmd_found = 0;
2951 int rc = FAILED;
2952
2953 pinstance =
2954 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2955
2956 scmd_printk(KERN_INFO, scsi_cmd,
2957 "I/O command timed out, aborting it.\n");
2958
2959 res = scsi_cmd->device->hostdata;
2960
2961 if (res == NULL)
2962 return rc;
2963
2964
2965
2966
2967
2968
2969 spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
2970
2971 if (pinstance->ioa_reset_in_progress ||
2972 pinstance->ioa_state == IOA_STATE_DEAD) {
2973 spin_unlock_irqrestore(pinstance->host->host_lock,
2974 host_lock_flags);
2975 return rc;
2976 }
2977
2978
2979
2980
2981
2982
2983 spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
2984 list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
2985
2986 if (cmd->scsi_cmd == scsi_cmd) {
2987 cmd_found = 1;
2988 break;
2989 }
2990 }
2991
2992 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
2993 pending_lock_flags);
2994
2995
2996
2997
2998 if (cmd_found)
2999 cancel_cmd = pmcraid_abort_cmd(cmd);
3000
3001 spin_unlock_irqrestore(pinstance->host->host_lock,
3002 host_lock_flags);
3003
3004 if (cancel_cmd) {
3005 cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
3006 rc = pmcraid_abort_complete(cancel_cmd);
3007 }
3008
3009 return cmd_found ? rc : SUCCESS;
3010 }
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026 static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
3027 {
3028 scmd_printk(KERN_INFO, scmd,
3029 "resetting device due to an I/O command timeout.\n");
3030 return pmcraid_reset_device(scmd,
3031 PMCRAID_INTERNAL_TIMEOUT,
3032 RESET_DEVICE_LUN);
3033 }
3034
3035 static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
3036 {
3037 scmd_printk(KERN_INFO, scmd,
3038 "Doing bus reset due to an I/O command timeout.\n");
3039 return pmcraid_reset_device(scmd,
3040 PMCRAID_RESET_BUS_TIMEOUT,
3041 RESET_DEVICE_BUS);
3042 }
3043
3044 static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
3045 {
3046 scmd_printk(KERN_INFO, scmd,
3047 "Doing target reset due to an I/O command timeout.\n");
3048 return pmcraid_reset_device(scmd,
3049 PMCRAID_INTERNAL_TIMEOUT,
3050 RESET_DEVICE_TARGET);
3051 }
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063 static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
3064 {
3065 unsigned long interval = 10000;
3066 int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
3067 struct pmcraid_instance *pinstance =
3068 (struct pmcraid_instance *)(scmd->device->host->hostdata);
3069
3070
3071
3072
3073
3074
3075 while (waits--) {
3076 if (atomic_read(&pinstance->outstanding_cmds) <=
3077 PMCRAID_MAX_HCAM_CMD)
3078 return SUCCESS;
3079 msleep(interval);
3080 }
3081
3082 dev_err(&pinstance->pdev->dev,
3083 "Adapter being reset due to an I/O command timeout.\n");
3084 return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
3085 }
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096 static struct pmcraid_ioadl_desc *
3097 pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
3098 {
3099 struct pmcraid_ioadl_desc *ioadl;
3100 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3101 int ioadl_count = 0;
3102
3103 if (ioarcb->add_cmd_param_length)
3104 ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16);
3105 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount);
3106
3107 if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
3108
3109
3110
3111
3112
3113 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
3114 ioarcb->ioadl_bus_addr =
3115 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3116 offsetof(struct pmcraid_ioarcb,
3117 add_data.u.ioadl[3]));
3118 ioadl = &ioarcb->add_data.u.ioadl[3];
3119 } else {
3120 ioarcb->ioadl_bus_addr =
3121 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3122 offsetof(struct pmcraid_ioarcb,
3123 add_data.u.ioadl[ioadl_count]));
3124
3125 ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
3126 ioarcb->ioarcb_bus_addr |=
3127 cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8));
3128 }
3129
3130 return ioadl;
3131 }
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144 static int pmcraid_build_ioadl(
3145 struct pmcraid_instance *pinstance,
3146 struct pmcraid_cmd *cmd
3147 )
3148 {
3149 int i, nseg;
3150 struct scatterlist *sglist;
3151
3152 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
3153 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
3154 struct pmcraid_ioadl_desc *ioadl;
3155
3156 u32 length = scsi_bufflen(scsi_cmd);
3157
3158 if (!length)
3159 return 0;
3160
3161 nseg = scsi_dma_map(scsi_cmd);
3162
3163 if (nseg < 0) {
3164 scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
3165 return -1;
3166 } else if (nseg > PMCRAID_MAX_IOADLS) {
3167 scsi_dma_unmap(scsi_cmd);
3168 scmd_printk(KERN_ERR, scsi_cmd,
3169 "sg count is (%d) more than allowed!\n", nseg);
3170 return -1;
3171 }
3172
3173
3174 if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
3175 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
3176
3177 ioarcb->request_flags0 |= NO_LINK_DESCS;
3178 ioarcb->data_transfer_length = cpu_to_le32(length);
3179 ioadl = pmcraid_init_ioadls(cmd, nseg);
3180
3181
3182 scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
3183 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
3184 ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
3185 ioadl[i].flags = 0;
3186 }
3187
3188 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3189
3190 return 0;
3191 }
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202 static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
3203 {
3204 sgl_free_order(sglist->scatterlist, sglist->order);
3205 kfree(sglist);
3206 }
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218 static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
3219 {
3220 struct pmcraid_sglist *sglist;
3221 int sg_size;
3222 int order;
3223
3224 sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
3225 order = (sg_size > 0) ? get_order(sg_size) : 0;
3226
3227
3228 sglist = kzalloc(sizeof(struct pmcraid_sglist), GFP_KERNEL);
3229 if (sglist == NULL)
3230 return NULL;
3231
3232 sglist->order = order;
3233 sgl_alloc_order(buflen, order, false,
3234 GFP_KERNEL | GFP_DMA | __GFP_ZERO, &sglist->num_sg);
3235
3236 return sglist;
3237 }
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251 static int pmcraid_copy_sglist(
3252 struct pmcraid_sglist *sglist,
3253 void __user *buffer,
3254 u32 len,
3255 int direction
3256 )
3257 {
3258 struct scatterlist *sg;
3259 void *kaddr;
3260 int bsize_elem;
3261 int i;
3262 int rc = 0;
3263
3264
3265 bsize_elem = PAGE_SIZE * (1 << sglist->order);
3266
3267 sg = sglist->scatterlist;
3268
3269 for (i = 0; i < (len / bsize_elem); i++, sg = sg_next(sg), buffer += bsize_elem) {
3270 struct page *page = sg_page(sg);
3271
3272 kaddr = kmap(page);
3273 if (direction == DMA_TO_DEVICE)
3274 rc = copy_from_user(kaddr, buffer, bsize_elem);
3275 else
3276 rc = copy_to_user(buffer, kaddr, bsize_elem);
3277
3278 kunmap(page);
3279
3280 if (rc) {
3281 pmcraid_err("failed to copy user data into sg list\n");
3282 return -EFAULT;
3283 }
3284
3285 sg->length = bsize_elem;
3286 }
3287
3288 if (len % bsize_elem) {
3289 struct page *page = sg_page(sg);
3290
3291 kaddr = kmap(page);
3292
3293 if (direction == DMA_TO_DEVICE)
3294 rc = copy_from_user(kaddr, buffer, len % bsize_elem);
3295 else
3296 rc = copy_to_user(buffer, kaddr, len % bsize_elem);
3297
3298 kunmap(page);
3299
3300 sg->length = len % bsize_elem;
3301 }
3302
3303 if (rc) {
3304 pmcraid_err("failed to copy user data into sg list\n");
3305 rc = -EFAULT;
3306 }
3307
3308 return rc;
3309 }
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325 static int pmcraid_queuecommand_lck(
3326 struct scsi_cmnd *scsi_cmd,
3327 void (*done) (struct scsi_cmnd *)
3328 )
3329 {
3330 struct pmcraid_instance *pinstance;
3331 struct pmcraid_resource_entry *res;
3332 struct pmcraid_ioarcb *ioarcb;
3333 struct pmcraid_cmd *cmd;
3334 u32 fw_version;
3335 int rc = 0;
3336
3337 pinstance =
3338 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
3339 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
3340 scsi_cmd->scsi_done = done;
3341 res = scsi_cmd->device->hostdata;
3342 scsi_cmd->result = (DID_OK << 16);
3343
3344
3345
3346
3347 if (pinstance->ioa_state == IOA_STATE_DEAD) {
3348 pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
3349 scsi_cmd->result = (DID_NO_CONNECT << 16);
3350 scsi_cmd->scsi_done(scsi_cmd);
3351 return 0;
3352 }
3353
3354
3355 if (pinstance->ioa_reset_in_progress)
3356 return SCSI_MLQUEUE_HOST_BUSY;
3357
3358
3359
3360
3361 if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
3362 pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
3363 scsi_cmd->scsi_done(scsi_cmd);
3364 return 0;
3365 }
3366
3367
3368 cmd = pmcraid_get_free_cmd(pinstance);
3369
3370 if (cmd == NULL) {
3371 pmcraid_err("free command block is not available\n");
3372 return SCSI_MLQUEUE_HOST_BUSY;
3373 }
3374
3375 cmd->scsi_cmd = scsi_cmd;
3376 ioarcb = &(cmd->ioa_cb->ioarcb);
3377 memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
3378 ioarcb->resource_handle = res->cfg_entry.resource_handle;
3379 ioarcb->request_type = REQ_TYPE_SCSI;
3380
3381
3382
3383
3384
3385
3386 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3387 pinstance->num_hrrq;
3388 cmd->cmd_done = pmcraid_io_done;
3389
3390 if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
3391 if (scsi_cmd->underflow == 0)
3392 ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
3393
3394 if (res->sync_reqd) {
3395 ioarcb->request_flags0 |= SYNC_COMPLETE;
3396 res->sync_reqd = 0;
3397 }
3398
3399 ioarcb->request_flags0 |= NO_LINK_DESCS;
3400
3401 if (scsi_cmd->flags & SCMD_TAGGED)
3402 ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
3403
3404 if (RES_IS_GSCSI(res->cfg_entry))
3405 ioarcb->request_flags1 |= DELAY_AFTER_RESET;
3406 }
3407
3408 rc = pmcraid_build_ioadl(pinstance, cmd);
3409
3410 pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
3411 le32_to_cpu(ioarcb->response_handle) >> 2,
3412 scsi_cmd->cmnd[0], pinstance->host->unique_id,
3413 RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
3414 PMCRAID_PHYS_BUS_ID,
3415 RES_IS_VSET(res->cfg_entry) ?
3416 (fw_version <= PMCRAID_FW_VERSION_1 ?
3417 res->cfg_entry.unique_flags1 :
3418 le16_to_cpu(res->cfg_entry.array_id) & 0xFF) :
3419 RES_TARGET(res->cfg_entry.resource_address),
3420 RES_LUN(res->cfg_entry.resource_address));
3421
3422 if (likely(rc == 0)) {
3423 _pmcraid_fire_command(cmd);
3424 } else {
3425 pmcraid_err("queuecommand could not build ioadl\n");
3426 pmcraid_return_cmd(cmd);
3427 rc = SCSI_MLQUEUE_HOST_BUSY;
3428 }
3429
3430 return rc;
3431 }
3432
3433 static DEF_SCSI_QCMD(pmcraid_queuecommand)
3434
3435
3436
3437
3438 static int pmcraid_chr_open(struct inode *inode, struct file *filep)
3439 {
3440 struct pmcraid_instance *pinstance;
3441
3442 if (!capable(CAP_SYS_ADMIN))
3443 return -EACCES;
3444
3445
3446 pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
3447 filep->private_data = pinstance;
3448
3449 return 0;
3450 }
3451
3452
3453
3454
3455
3456
3457
3458 static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
3459 {
3460 struct pmcraid_instance *pinstance;
3461 int rc;
3462
3463 pinstance = filep->private_data;
3464 mutex_lock(&pinstance->aen_queue_lock);
3465 rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
3466 mutex_unlock(&pinstance->aen_queue_lock);
3467
3468 return rc;
3469 }
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483 static int pmcraid_build_passthrough_ioadls(
3484 struct pmcraid_cmd *cmd,
3485 int buflen,
3486 int direction
3487 )
3488 {
3489 struct pmcraid_sglist *sglist = NULL;
3490 struct scatterlist *sg = NULL;
3491 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3492 struct pmcraid_ioadl_desc *ioadl;
3493 int i;
3494
3495 sglist = pmcraid_alloc_sglist(buflen);
3496
3497 if (!sglist) {
3498 pmcraid_err("can't allocate memory for passthrough SGls\n");
3499 return -ENOMEM;
3500 }
3501
3502 sglist->num_dma_sg = dma_map_sg(&cmd->drv_inst->pdev->dev,
3503 sglist->scatterlist,
3504 sglist->num_sg, direction);
3505
3506 if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
3507 dev_err(&cmd->drv_inst->pdev->dev,
3508 "Failed to map passthrough buffer!\n");
3509 pmcraid_free_sglist(sglist);
3510 return -EIO;
3511 }
3512
3513 cmd->sglist = sglist;
3514 ioarcb->request_flags0 |= NO_LINK_DESCS;
3515
3516 ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
3517
3518
3519 for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
3520 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
3521 ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
3522 ioadl[i].flags = 0;
3523 }
3524
3525
3526 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3527
3528 return 0;
3529 }
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542 static void pmcraid_release_passthrough_ioadls(
3543 struct pmcraid_cmd *cmd,
3544 int buflen,
3545 int direction
3546 )
3547 {
3548 struct pmcraid_sglist *sglist = cmd->sglist;
3549
3550 if (buflen > 0) {
3551 dma_unmap_sg(&cmd->drv_inst->pdev->dev,
3552 sglist->scatterlist,
3553 sglist->num_sg,
3554 direction);
3555 pmcraid_free_sglist(sglist);
3556 cmd->sglist = NULL;
3557 }
3558 }
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570 static long pmcraid_ioctl_passthrough(
3571 struct pmcraid_instance *pinstance,
3572 unsigned int ioctl_cmd,
3573 unsigned int buflen,
3574 void __user *arg
3575 )
3576 {
3577 struct pmcraid_passthrough_ioctl_buffer *buffer;
3578 struct pmcraid_ioarcb *ioarcb;
3579 struct pmcraid_cmd *cmd;
3580 struct pmcraid_cmd *cancel_cmd;
3581 void __user *request_buffer;
3582 unsigned long request_offset;
3583 unsigned long lock_flags;
3584 void __user *ioasa;
3585 u32 ioasc;
3586 int request_size;
3587 int buffer_size;
3588 u8 direction;
3589 int rc = 0;
3590
3591
3592 if (pinstance->ioa_reset_in_progress) {
3593 rc = wait_event_interruptible_timeout(
3594 pinstance->reset_wait_q,
3595 !pinstance->ioa_reset_in_progress,
3596 msecs_to_jiffies(10000));
3597
3598 if (!rc)
3599 return -ETIMEDOUT;
3600 else if (rc < 0)
3601 return -ERESTARTSYS;
3602 }
3603
3604
3605 if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
3606 pmcraid_err("IOA is not operational\n");
3607 return -ENOTTY;
3608 }
3609
3610 buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
3611 buffer = kmalloc(buffer_size, GFP_KERNEL);
3612
3613 if (!buffer) {
3614 pmcraid_err("no memory for passthrough buffer\n");
3615 return -ENOMEM;
3616 }
3617
3618 request_offset =
3619 offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
3620
3621 request_buffer = arg + request_offset;
3622
3623 rc = copy_from_user(buffer, arg,
3624 sizeof(struct pmcraid_passthrough_ioctl_buffer));
3625
3626 ioasa = arg + offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa);
3627
3628 if (rc) {
3629 pmcraid_err("ioctl: can't copy passthrough buffer\n");
3630 rc = -EFAULT;
3631 goto out_free_buffer;
3632 }
3633
3634 request_size = le32_to_cpu(buffer->ioarcb.data_transfer_length);
3635
3636 if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
3637 direction = DMA_TO_DEVICE;
3638 } else {
3639 direction = DMA_FROM_DEVICE;
3640 }
3641
3642 if (request_size < 0) {
3643 rc = -EINVAL;
3644 goto out_free_buffer;
3645 }
3646
3647
3648 if (le16_to_cpu(buffer->ioarcb.add_cmd_param_length)
3649 > PMCRAID_ADD_CMD_PARAM_LEN) {
3650 rc = -EINVAL;
3651 goto out_free_buffer;
3652 }
3653
3654 cmd = pmcraid_get_free_cmd(pinstance);
3655
3656 if (!cmd) {
3657 pmcraid_err("free command block is not available\n");
3658 rc = -ENOMEM;
3659 goto out_free_buffer;
3660 }
3661
3662 cmd->scsi_cmd = NULL;
3663 ioarcb = &(cmd->ioa_cb->ioarcb);
3664
3665
3666 ioarcb->resource_handle = buffer->ioarcb.resource_handle;
3667 ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
3668 ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
3669 ioarcb->request_type = buffer->ioarcb.request_type;
3670 ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
3671 ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
3672 memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
3673
3674 if (buffer->ioarcb.add_cmd_param_length) {
3675 ioarcb->add_cmd_param_length =
3676 buffer->ioarcb.add_cmd_param_length;
3677 ioarcb->add_cmd_param_offset =
3678 buffer->ioarcb.add_cmd_param_offset;
3679 memcpy(ioarcb->add_data.u.add_cmd_params,
3680 buffer->ioarcb.add_data.u.add_cmd_params,
3681 le16_to_cpu(buffer->ioarcb.add_cmd_param_length));
3682 }
3683
3684
3685
3686
3687
3688
3689 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3690 pinstance->num_hrrq;
3691
3692 if (request_size) {
3693 rc = pmcraid_build_passthrough_ioadls(cmd,
3694 request_size,
3695 direction);
3696 if (rc) {
3697 pmcraid_err("couldn't build passthrough ioadls\n");
3698 goto out_free_cmd;
3699 }
3700 }
3701
3702
3703
3704
3705 if (direction == DMA_TO_DEVICE && request_size > 0) {
3706 rc = pmcraid_copy_sglist(cmd->sglist,
3707 request_buffer,
3708 request_size,
3709 direction);
3710 if (rc) {
3711 pmcraid_err("failed to copy user buffer\n");
3712 goto out_free_sglist;
3713 }
3714 }
3715
3716
3717
3718
3719 cmd->cmd_done = pmcraid_internal_done;
3720 init_completion(&cmd->wait_for_completion);
3721 cmd->completion_req = 1;
3722
3723 pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
3724 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3725 cmd->ioa_cb->ioarcb.cdb[0],
3726 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
3727
3728 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3729 _pmcraid_fire_command(cmd);
3730 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3731
3732
3733
3734
3735
3736
3737
3738 buffer->ioarcb.cmd_timeout = 0;
3739
3740
3741
3742
3743
3744 if (buffer->ioarcb.cmd_timeout == 0) {
3745 wait_for_completion(&cmd->wait_for_completion);
3746 } else if (!wait_for_completion_timeout(
3747 &cmd->wait_for_completion,
3748 msecs_to_jiffies(le16_to_cpu(buffer->ioarcb.cmd_timeout) * 1000))) {
3749
3750 pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
3751 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3752 cmd->ioa_cb->ioarcb.cdb[0]);
3753
3754 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3755 cancel_cmd = pmcraid_abort_cmd(cmd);
3756 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3757
3758 if (cancel_cmd) {
3759 wait_for_completion(&cancel_cmd->wait_for_completion);
3760 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
3761 pmcraid_return_cmd(cancel_cmd);
3762
3763
3764
3765
3766
3767
3768
3769 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
3770 PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
3771 if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
3772 rc = -ETIMEDOUT;
3773 goto out_handle_response;
3774 }
3775 }
3776
3777
3778
3779
3780
3781 if (!wait_for_completion_timeout(
3782 &cmd->wait_for_completion,
3783 msecs_to_jiffies(150 * 1000))) {
3784 pmcraid_reset_bringup(cmd->drv_inst);
3785 rc = -ETIMEDOUT;
3786 }
3787 }
3788
3789 out_handle_response:
3790
3791
3792
3793
3794 if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
3795 sizeof(struct pmcraid_ioasa))) {
3796 pmcraid_err("failed to copy ioasa buffer to user\n");
3797 rc = -EFAULT;
3798 }
3799
3800
3801
3802
3803 else if (direction == DMA_FROM_DEVICE && request_size > 0) {
3804 rc = pmcraid_copy_sglist(cmd->sglist,
3805 request_buffer,
3806 request_size,
3807 direction);
3808 if (rc) {
3809 pmcraid_err("failed to copy user buffer\n");
3810 rc = -EFAULT;
3811 }
3812 }
3813
3814 out_free_sglist:
3815 pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
3816
3817 out_free_cmd:
3818 pmcraid_return_cmd(cmd);
3819
3820 out_free_buffer:
3821 kfree(buffer);
3822
3823 return rc;
3824 }
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840 static long pmcraid_ioctl_driver(
3841 struct pmcraid_instance *pinstance,
3842 unsigned int cmd,
3843 unsigned int buflen,
3844 void __user *user_buffer
3845 )
3846 {
3847 int rc = -ENOSYS;
3848
3849 switch (cmd) {
3850 case PMCRAID_IOCTL_RESET_ADAPTER:
3851 pmcraid_reset_bringup(pinstance);
3852 rc = 0;
3853 break;
3854
3855 default:
3856 break;
3857 }
3858
3859 return rc;
3860 }
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874 static int pmcraid_check_ioctl_buffer(
3875 int cmd,
3876 void __user *arg,
3877 struct pmcraid_ioctl_header *hdr
3878 )
3879 {
3880 int rc;
3881
3882 if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
3883 pmcraid_err("couldn't copy ioctl header from user buffer\n");
3884 return -EFAULT;
3885 }
3886
3887
3888 rc = memcmp(hdr->signature,
3889 PMCRAID_IOCTL_SIGNATURE,
3890 sizeof(hdr->signature));
3891 if (rc) {
3892 pmcraid_err("signature verification failed\n");
3893 return -EINVAL;
3894 }
3895
3896 return 0;
3897 }
3898
3899
3900
3901
3902 static long pmcraid_chr_ioctl(
3903 struct file *filep,
3904 unsigned int cmd,
3905 unsigned long arg
3906 )
3907 {
3908 struct pmcraid_instance *pinstance = NULL;
3909 struct pmcraid_ioctl_header *hdr = NULL;
3910 void __user *argp = (void __user *)arg;
3911 int retval = -ENOTTY;
3912
3913 hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL);
3914
3915 if (!hdr) {
3916 pmcraid_err("failed to allocate memory for ioctl header\n");
3917 return -ENOMEM;
3918 }
3919
3920 retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr);
3921
3922 if (retval) {
3923 pmcraid_info("chr_ioctl: header check failed\n");
3924 kfree(hdr);
3925 return retval;
3926 }
3927
3928 pinstance = filep->private_data;
3929
3930 if (!pinstance) {
3931 pmcraid_info("adapter instance is not found\n");
3932 kfree(hdr);
3933 return -ENOTTY;
3934 }
3935
3936 switch (_IOC_TYPE(cmd)) {
3937
3938 case PMCRAID_PASSTHROUGH_IOCTL:
3939
3940
3941
3942 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
3943 scsi_block_requests(pinstance->host);
3944
3945 retval = pmcraid_ioctl_passthrough(pinstance, cmd,
3946 hdr->buffer_length, argp);
3947
3948 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
3949 scsi_unblock_requests(pinstance->host);
3950 break;
3951
3952 case PMCRAID_DRIVER_IOCTL:
3953 arg += sizeof(struct pmcraid_ioctl_header);
3954 retval = pmcraid_ioctl_driver(pinstance, cmd,
3955 hdr->buffer_length, argp);
3956 break;
3957
3958 default:
3959 retval = -ENOTTY;
3960 break;
3961 }
3962
3963 kfree(hdr);
3964
3965 return retval;
3966 }
3967
3968
3969
3970
3971 static const struct file_operations pmcraid_fops = {
3972 .owner = THIS_MODULE,
3973 .open = pmcraid_chr_open,
3974 .fasync = pmcraid_chr_fasync,
3975 .unlocked_ioctl = pmcraid_chr_ioctl,
3976 #ifdef CONFIG_COMPAT
3977 .compat_ioctl = pmcraid_chr_ioctl,
3978 #endif
3979 .llseek = noop_llseek,
3980 };
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993 static ssize_t pmcraid_show_log_level(
3994 struct device *dev,
3995 struct device_attribute *attr,
3996 char *buf)
3997 {
3998 struct Scsi_Host *shost = class_to_shost(dev);
3999 struct pmcraid_instance *pinstance =
4000 (struct pmcraid_instance *)shost->hostdata;
4001 return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
4002 }
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013 static ssize_t pmcraid_store_log_level(
4014 struct device *dev,
4015 struct device_attribute *attr,
4016 const char *buf,
4017 size_t count
4018 )
4019 {
4020 struct Scsi_Host *shost;
4021 struct pmcraid_instance *pinstance;
4022 u8 val;
4023
4024 if (kstrtou8(buf, 10, &val))
4025 return -EINVAL;
4026
4027 if (val > 2)
4028 return -EINVAL;
4029
4030 shost = class_to_shost(dev);
4031 pinstance = (struct pmcraid_instance *)shost->hostdata;
4032 pinstance->current_log_level = val;
4033
4034 return strlen(buf);
4035 }
4036
4037 static struct device_attribute pmcraid_log_level_attr = {
4038 .attr = {
4039 .name = "log_level",
4040 .mode = S_IRUGO | S_IWUSR,
4041 },
4042 .show = pmcraid_show_log_level,
4043 .store = pmcraid_store_log_level,
4044 };
4045
4046
4047
4048
4049
4050
4051
4052
4053
4054 static ssize_t pmcraid_show_drv_version(
4055 struct device *dev,
4056 struct device_attribute *attr,
4057 char *buf
4058 )
4059 {
4060 return snprintf(buf, PAGE_SIZE, "version: %s\n",
4061 PMCRAID_DRIVER_VERSION);
4062 }
4063
4064 static struct device_attribute pmcraid_driver_version_attr = {
4065 .attr = {
4066 .name = "drv_version",
4067 .mode = S_IRUGO,
4068 },
4069 .show = pmcraid_show_drv_version,
4070 };
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080 static ssize_t pmcraid_show_adapter_id(
4081 struct device *dev,
4082 struct device_attribute *attr,
4083 char *buf
4084 )
4085 {
4086 struct Scsi_Host *shost = class_to_shost(dev);
4087 struct pmcraid_instance *pinstance =
4088 (struct pmcraid_instance *)shost->hostdata;
4089 u32 adapter_id = (pinstance->pdev->bus->number << 8) |
4090 pinstance->pdev->devfn;
4091 u32 aen_group = pmcraid_event_family.id;
4092
4093 return snprintf(buf, PAGE_SIZE,
4094 "adapter id: %d\nminor: %d\naen group: %d\n",
4095 adapter_id, MINOR(pinstance->cdev.dev), aen_group);
4096 }
4097
4098 static struct device_attribute pmcraid_adapter_id_attr = {
4099 .attr = {
4100 .name = "adapter_id",
4101 .mode = S_IRUGO,
4102 },
4103 .show = pmcraid_show_adapter_id,
4104 };
4105
4106 static struct device_attribute *pmcraid_host_attrs[] = {
4107 &pmcraid_log_level_attr,
4108 &pmcraid_driver_version_attr,
4109 &pmcraid_adapter_id_attr,
4110 NULL,
4111 };
4112
4113
4114
4115 static struct scsi_host_template pmcraid_host_template = {
4116 .module = THIS_MODULE,
4117 .name = PMCRAID_DRIVER_NAME,
4118 .queuecommand = pmcraid_queuecommand,
4119 .eh_abort_handler = pmcraid_eh_abort_handler,
4120 .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
4121 .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
4122 .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
4123 .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
4124
4125 .slave_alloc = pmcraid_slave_alloc,
4126 .slave_configure = pmcraid_slave_configure,
4127 .slave_destroy = pmcraid_slave_destroy,
4128 .change_queue_depth = pmcraid_change_queue_depth,
4129 .can_queue = PMCRAID_MAX_IO_CMD,
4130 .this_id = -1,
4131 .sg_tablesize = PMCRAID_MAX_IOADLS,
4132 .max_sectors = PMCRAID_IOA_MAX_SECTORS,
4133 .no_write_same = 1,
4134 .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
4135 .shost_attrs = pmcraid_host_attrs,
4136 .proc_name = PMCRAID_DRIVER_NAME,
4137 };
4138
4139
4140
4141
4142
4143
4144
4145
4146
4147
4148 static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
4149 {
4150 struct pmcraid_isr_param *hrrq_vector;
4151 struct pmcraid_instance *pinstance;
4152 unsigned long lock_flags;
4153 u32 intrs_val;
4154 int hrrq_id;
4155
4156 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4157 hrrq_id = hrrq_vector->hrrq_id;
4158 pinstance = hrrq_vector->drv_inst;
4159
4160 if (!hrrq_id) {
4161
4162 intrs_val = pmcraid_read_interrupts(pinstance);
4163 if (intrs_val &&
4164 ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
4165 & DOORBELL_INTR_MSIX_CLR) == 0)) {
4166
4167
4168
4169
4170
4171 if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
4172 if (intrs_val & INTRS_IOA_UNIT_CHECK)
4173 pinstance->ioa_unit_check = 1;
4174
4175 pmcraid_err("ISR: error interrupts: %x \
4176 initiating reset\n", intrs_val);
4177 spin_lock_irqsave(pinstance->host->host_lock,
4178 lock_flags);
4179 pmcraid_initiate_reset(pinstance);
4180 spin_unlock_irqrestore(
4181 pinstance->host->host_lock,
4182 lock_flags);
4183 }
4184
4185
4186
4187
4188 if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
4189 pmcraid_clr_trans_op(pinstance);
4190
4191
4192
4193
4194
4195 iowrite32(DOORBELL_INTR_MSIX_CLR,
4196 pinstance->int_regs.host_ioa_interrupt_reg);
4197 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4198
4199
4200 }
4201 }
4202
4203 tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
4204
4205 return IRQ_HANDLED;
4206 }
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216
4217 static irqreturn_t pmcraid_isr(int irq, void *dev_id)
4218 {
4219 struct pmcraid_isr_param *hrrq_vector;
4220 struct pmcraid_instance *pinstance;
4221 u32 intrs;
4222 unsigned long lock_flags;
4223 int hrrq_id = 0;
4224
4225
4226
4227
4228 if (!dev_id) {
4229 printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
4230 return IRQ_NONE;
4231 }
4232 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4233 pinstance = hrrq_vector->drv_inst;
4234
4235 intrs = pmcraid_read_interrupts(pinstance);
4236
4237 if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
4238 return IRQ_NONE;
4239
4240
4241
4242
4243
4244 if (intrs & PMCRAID_ERROR_INTERRUPTS) {
4245
4246 if (intrs & INTRS_IOA_UNIT_CHECK)
4247 pinstance->ioa_unit_check = 1;
4248
4249 iowrite32(intrs,
4250 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4251 pmcraid_err("ISR: error interrupts: %x initiating reset\n",
4252 intrs);
4253 intrs = ioread32(
4254 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4255 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
4256 pmcraid_initiate_reset(pinstance);
4257 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
4258 } else {
4259
4260
4261
4262
4263 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
4264 pmcraid_clr_trans_op(pinstance);
4265 } else {
4266 iowrite32(intrs,
4267 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4268 ioread32(
4269 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4270
4271 tasklet_schedule(
4272 &(pinstance->isr_tasklet[hrrq_id]));
4273 }
4274 }
4275
4276 return IRQ_HANDLED;
4277 }
4278
4279
4280
4281
4282
4283
4284
4285
4286
4287
4288
4289 static void pmcraid_worker_function(struct work_struct *workp)
4290 {
4291 struct pmcraid_instance *pinstance;
4292 struct pmcraid_resource_entry *res;
4293 struct pmcraid_resource_entry *temp;
4294 struct scsi_device *sdev;
4295 unsigned long lock_flags;
4296 unsigned long host_lock_flags;
4297 u16 fw_version;
4298 u8 bus, target, lun;
4299
4300 pinstance = container_of(workp, struct pmcraid_instance, worker_q);
4301
4302 if (!atomic_read(&pinstance->expose_resources))
4303 return;
4304
4305 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
4306
4307 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
4308 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
4309
4310 if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
4311 sdev = res->scsi_dev;
4312
4313
4314
4315
4316 spin_lock_irqsave(pinstance->host->host_lock,
4317 host_lock_flags);
4318 if (!scsi_device_get(sdev)) {
4319 spin_unlock_irqrestore(
4320 pinstance->host->host_lock,
4321 host_lock_flags);
4322 pmcraid_info("deleting %x from midlayer\n",
4323 res->cfg_entry.resource_address);
4324 list_move_tail(&res->queue,
4325 &pinstance->free_res_q);
4326 spin_unlock_irqrestore(
4327 &pinstance->resource_lock,
4328 lock_flags);
4329 scsi_remove_device(sdev);
4330 scsi_device_put(sdev);
4331 spin_lock_irqsave(&pinstance->resource_lock,
4332 lock_flags);
4333 res->change_detected = 0;
4334 } else {
4335 spin_unlock_irqrestore(
4336 pinstance->host->host_lock,
4337 host_lock_flags);
4338 }
4339 }
4340 }
4341
4342 list_for_each_entry(res, &pinstance->used_res_q, queue) {
4343
4344 if (res->change_detected == RES_CHANGE_ADD) {
4345
4346 if (!pmcraid_expose_resource(fw_version,
4347 &res->cfg_entry))
4348 continue;
4349
4350 if (RES_IS_VSET(res->cfg_entry)) {
4351 bus = PMCRAID_VSET_BUS_ID;
4352 if (fw_version <= PMCRAID_FW_VERSION_1)
4353 target = res->cfg_entry.unique_flags1;
4354 else
4355 target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF;
4356 lun = PMCRAID_VSET_LUN_ID;
4357 } else {
4358 bus = PMCRAID_PHYS_BUS_ID;
4359 target =
4360 RES_TARGET(
4361 res->cfg_entry.resource_address);
4362 lun = RES_LUN(res->cfg_entry.resource_address);
4363 }
4364
4365 res->change_detected = 0;
4366 spin_unlock_irqrestore(&pinstance->resource_lock,
4367 lock_flags);
4368 scsi_add_device(pinstance->host, bus, target, lun);
4369 spin_lock_irqsave(&pinstance->resource_lock,
4370 lock_flags);
4371 }
4372 }
4373
4374 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
4375 }
4376
4377
4378
4379
4380
4381
4382
4383
4384
4385 static void pmcraid_tasklet_function(unsigned long instance)
4386 {
4387 struct pmcraid_isr_param *hrrq_vector;
4388 struct pmcraid_instance *pinstance;
4389 unsigned long hrrq_lock_flags;
4390 unsigned long pending_lock_flags;
4391 unsigned long host_lock_flags;
4392 spinlock_t *lockp;
4393 int id;
4394 u32 resp;
4395
4396 hrrq_vector = (struct pmcraid_isr_param *)instance;
4397 pinstance = hrrq_vector->drv_inst;
4398 id = hrrq_vector->hrrq_id;
4399 lockp = &(pinstance->hrrq_lock[id]);
4400
4401
4402
4403
4404
4405
4406
4407 spin_lock_irqsave(lockp, hrrq_lock_flags);
4408
4409 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4410
4411 while ((resp & HRRQ_TOGGLE_BIT) ==
4412 pinstance->host_toggle_bit[id]) {
4413
4414 int cmd_index = resp >> 2;
4415 struct pmcraid_cmd *cmd = NULL;
4416
4417 if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
4418 pinstance->hrrq_curr[id]++;
4419 } else {
4420 pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
4421 pinstance->host_toggle_bit[id] ^= 1u;
4422 }
4423
4424 if (cmd_index >= PMCRAID_MAX_CMD) {
4425
4426 pmcraid_err("Invalid response handle %d\n", cmd_index);
4427 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4428 continue;
4429 }
4430
4431 cmd = pinstance->cmd_list[cmd_index];
4432 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4433
4434 spin_lock_irqsave(&pinstance->pending_pool_lock,
4435 pending_lock_flags);
4436 list_del(&cmd->free_list);
4437 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
4438 pending_lock_flags);
4439 del_timer(&cmd->timer);
4440 atomic_dec(&pinstance->outstanding_cmds);
4441
4442 if (cmd->cmd_done == pmcraid_ioa_reset) {
4443 spin_lock_irqsave(pinstance->host->host_lock,
4444 host_lock_flags);
4445 cmd->cmd_done(cmd);
4446 spin_unlock_irqrestore(pinstance->host->host_lock,
4447 host_lock_flags);
4448 } else if (cmd->cmd_done != NULL) {
4449 cmd->cmd_done(cmd);
4450 }
4451
4452 spin_lock_irqsave(lockp, hrrq_lock_flags);
4453 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4454 }
4455
4456 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4457 }
4458
4459
4460
4461
4462
4463
4464
4465
4466
4467
4468
4469 static
4470 void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
4471 {
4472 struct pci_dev *pdev = pinstance->pdev;
4473 int i;
4474
4475 for (i = 0; i < pinstance->num_hrrq; i++)
4476 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
4477
4478 pinstance->interrupt_mode = 0;
4479 pci_free_irq_vectors(pdev);
4480 }
4481
4482
4483
4484
4485
4486
4487
4488
4489 static int
4490 pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
4491 {
4492 struct pci_dev *pdev = pinstance->pdev;
4493 unsigned int irq_flag = PCI_IRQ_LEGACY, flag;
4494 int num_hrrq, rc, i;
4495 irq_handler_t isr;
4496
4497 if (pmcraid_enable_msix)
4498 irq_flag |= PCI_IRQ_MSIX;
4499
4500 num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS,
4501 irq_flag);
4502 if (num_hrrq < 0)
4503 return num_hrrq;
4504
4505 if (pdev->msix_enabled) {
4506 flag = 0;
4507 isr = pmcraid_isr_msix;
4508 } else {
4509 flag = IRQF_SHARED;
4510 isr = pmcraid_isr;
4511 }
4512
4513 for (i = 0; i < num_hrrq; i++) {
4514 struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i];
4515
4516 vec->hrrq_id = i;
4517 vec->drv_inst = pinstance;
4518 rc = request_irq(pci_irq_vector(pdev, i), isr, flag,
4519 PMCRAID_DRIVER_NAME, vec);
4520 if (rc)
4521 goto out_unwind;
4522 }
4523
4524 pinstance->num_hrrq = num_hrrq;
4525 if (pdev->msix_enabled) {
4526 pinstance->interrupt_mode = 1;
4527 iowrite32(DOORBELL_INTR_MODE_MSIX,
4528 pinstance->int_regs.host_ioa_interrupt_reg);
4529 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4530 }
4531
4532 return 0;
4533
4534 out_unwind:
4535 while (--i > 0)
4536 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]);
4537 pci_free_irq_vectors(pdev);
4538 return rc;
4539 }
4540
4541
4542
4543
4544
4545
4546
4547
4548
4549 static void
4550 pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
4551 {
4552 int i;
4553 for (i = 0; i < max_index; i++) {
4554 kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
4555 pinstance->cmd_list[i] = NULL;
4556 }
4557 kmem_cache_destroy(pinstance->cmd_cachep);
4558 pinstance->cmd_cachep = NULL;
4559 }
4560
4561
4562
4563
4564
4565
4566
4567
4568
4569
4570
4571
4572 static void
4573 pmcraid_release_control_blocks(
4574 struct pmcraid_instance *pinstance,
4575 int max_index
4576 )
4577 {
4578 int i;
4579
4580 if (pinstance->control_pool == NULL)
4581 return;
4582
4583 for (i = 0; i < max_index; i++) {
4584 dma_pool_free(pinstance->control_pool,
4585 pinstance->cmd_list[i]->ioa_cb,
4586 pinstance->cmd_list[i]->ioa_cb_bus_addr);
4587 pinstance->cmd_list[i]->ioa_cb = NULL;
4588 pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
4589 }
4590 dma_pool_destroy(pinstance->control_pool);
4591 pinstance->control_pool = NULL;
4592 }
4593
4594
4595
4596
4597
4598
4599
4600
4601
4602
4603 static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
4604 {
4605 int i;
4606
4607 sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
4608 pinstance->host->unique_id);
4609
4610
4611 pinstance->cmd_cachep = kmem_cache_create(
4612 pinstance->cmd_pool_name,
4613 sizeof(struct pmcraid_cmd), 0,
4614 SLAB_HWCACHE_ALIGN, NULL);
4615 if (!pinstance->cmd_cachep)
4616 return -ENOMEM;
4617
4618 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4619 pinstance->cmd_list[i] =
4620 kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
4621 if (!pinstance->cmd_list[i]) {
4622 pmcraid_release_cmd_blocks(pinstance, i);
4623 return -ENOMEM;
4624 }
4625 }
4626 return 0;
4627 }
4628
4629
4630
4631
4632
4633
4634
4635
4636
4637
4638
4639 static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
4640 {
4641 int i;
4642
4643 sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
4644 pinstance->host->unique_id);
4645
4646 pinstance->control_pool =
4647 dma_pool_create(pinstance->ctl_pool_name,
4648 &pinstance->pdev->dev,
4649 sizeof(struct pmcraid_control_block),
4650 PMCRAID_IOARCB_ALIGNMENT, 0);
4651
4652 if (!pinstance->control_pool)
4653 return -ENOMEM;
4654
4655 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4656 pinstance->cmd_list[i]->ioa_cb =
4657 dma_pool_alloc(
4658 pinstance->control_pool,
4659 GFP_KERNEL,
4660 &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
4661
4662 if (!pinstance->cmd_list[i]->ioa_cb) {
4663 pmcraid_release_control_blocks(pinstance, i);
4664 return -ENOMEM;
4665 }
4666 memset(pinstance->cmd_list[i]->ioa_cb, 0,
4667 sizeof(struct pmcraid_control_block));
4668 }
4669 return 0;
4670 }
4671
4672
4673
4674
4675
4676
4677
4678
4679
4680 static void
4681 pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
4682 {
4683 int i;
4684
4685 for (i = 0; i < maxindex; i++) {
4686 dma_free_coherent(&pinstance->pdev->dev,
4687 HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
4688 pinstance->hrrq_start[i],
4689 pinstance->hrrq_start_bus_addr[i]);
4690
4691
4692 pinstance->hrrq_start[i] = NULL;
4693 pinstance->hrrq_start_bus_addr[i] = 0;
4694 pinstance->host_toggle_bit[i] = 0;
4695 }
4696 }
4697
4698
4699
4700
4701
4702
4703
4704
4705 static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
4706 {
4707 int i, buffer_size;
4708
4709 buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
4710
4711 for (i = 0; i < pinstance->num_hrrq; i++) {
4712 pinstance->hrrq_start[i] =
4713 dma_alloc_coherent(&pinstance->pdev->dev, buffer_size,
4714 &pinstance->hrrq_start_bus_addr[i],
4715 GFP_KERNEL);
4716 if (!pinstance->hrrq_start[i]) {
4717 pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
4718 i);
4719 pmcraid_release_host_rrqs(pinstance, i);
4720 return -ENOMEM;
4721 }
4722
4723 memset(pinstance->hrrq_start[i], 0, buffer_size);
4724 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
4725 pinstance->hrrq_end[i] =
4726 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
4727 pinstance->host_toggle_bit[i] = 1;
4728 spin_lock_init(&pinstance->hrrq_lock[i]);
4729 }
4730 return 0;
4731 }
4732
4733
4734
4735
4736
4737
4738
4739
4740
4741 static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
4742 {
4743 if (pinstance->ccn.msg != NULL) {
4744 dma_free_coherent(&pinstance->pdev->dev,
4745 PMCRAID_AEN_HDR_SIZE +
4746 sizeof(struct pmcraid_hcam_ccn_ext),
4747 pinstance->ccn.msg,
4748 pinstance->ccn.baddr);
4749
4750 pinstance->ccn.msg = NULL;
4751 pinstance->ccn.hcam = NULL;
4752 pinstance->ccn.baddr = 0;
4753 }
4754
4755 if (pinstance->ldn.msg != NULL) {
4756 dma_free_coherent(&pinstance->pdev->dev,
4757 PMCRAID_AEN_HDR_SIZE +
4758 sizeof(struct pmcraid_hcam_ldn),
4759 pinstance->ldn.msg,
4760 pinstance->ldn.baddr);
4761
4762 pinstance->ldn.msg = NULL;
4763 pinstance->ldn.hcam = NULL;
4764 pinstance->ldn.baddr = 0;
4765 }
4766 }
4767
4768
4769
4770
4771
4772
4773
4774
4775 static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
4776 {
4777 pinstance->ccn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
4778 PMCRAID_AEN_HDR_SIZE +
4779 sizeof(struct pmcraid_hcam_ccn_ext),
4780 &pinstance->ccn.baddr, GFP_KERNEL);
4781
4782 pinstance->ldn.msg = dma_alloc_coherent(&pinstance->pdev->dev,
4783 PMCRAID_AEN_HDR_SIZE +
4784 sizeof(struct pmcraid_hcam_ldn),
4785 &pinstance->ldn.baddr, GFP_KERNEL);
4786
4787 if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
4788 pmcraid_release_hcams(pinstance);
4789 } else {
4790 pinstance->ccn.hcam =
4791 (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
4792 pinstance->ldn.hcam =
4793 (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
4794
4795 atomic_set(&pinstance->ccn.ignore, 0);
4796 atomic_set(&pinstance->ldn.ignore, 0);
4797 }
4798
4799 return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
4800 }
4801
4802
4803
4804
4805
4806
4807
4808
4809 static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
4810 {
4811 if (pinstance->cfg_table != NULL &&
4812 pinstance->cfg_table_bus_addr != 0) {
4813 dma_free_coherent(&pinstance->pdev->dev,
4814 sizeof(struct pmcraid_config_table),
4815 pinstance->cfg_table,
4816 pinstance->cfg_table_bus_addr);
4817 pinstance->cfg_table = NULL;
4818 pinstance->cfg_table_bus_addr = 0;
4819 }
4820
4821 if (pinstance->res_entries != NULL) {
4822 int i;
4823
4824 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4825 list_del(&pinstance->res_entries[i].queue);
4826 kfree(pinstance->res_entries);
4827 pinstance->res_entries = NULL;
4828 }
4829
4830 pmcraid_release_hcams(pinstance);
4831 }
4832
4833
4834
4835
4836
4837
4838
4839
4840 static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
4841 {
4842 int i;
4843
4844 pinstance->res_entries =
4845 kcalloc(PMCRAID_MAX_RESOURCES,
4846 sizeof(struct pmcraid_resource_entry),
4847 GFP_KERNEL);
4848
4849 if (NULL == pinstance->res_entries) {
4850 pmcraid_err("failed to allocate memory for resource table\n");
4851 return -ENOMEM;
4852 }
4853
4854 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4855 list_add_tail(&pinstance->res_entries[i].queue,
4856 &pinstance->free_res_q);
4857
4858 pinstance->cfg_table = dma_alloc_coherent(&pinstance->pdev->dev,
4859 sizeof(struct pmcraid_config_table),
4860 &pinstance->cfg_table_bus_addr,
4861 GFP_KERNEL);
4862
4863 if (NULL == pinstance->cfg_table) {
4864 pmcraid_err("couldn't alloc DMA memory for config table\n");
4865 pmcraid_release_config_buffers(pinstance);
4866 return -ENOMEM;
4867 }
4868
4869 if (pmcraid_allocate_hcams(pinstance)) {
4870 pmcraid_err("could not alloc DMA memory for HCAMS\n");
4871 pmcraid_release_config_buffers(pinstance);
4872 return -ENOMEM;
4873 }
4874
4875 return 0;
4876 }
4877
4878
4879
4880
4881
4882
4883
4884
4885
4886 static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
4887 {
4888 int i;
4889 for (i = 0; i < pinstance->num_hrrq; i++)
4890 tasklet_init(&pinstance->isr_tasklet[i],
4891 pmcraid_tasklet_function,
4892 (unsigned long)&pinstance->hrrq_vector[i]);
4893 }
4894
4895
4896
4897
4898
4899
4900
4901
4902
4903 static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
4904 {
4905 int i;
4906 for (i = 0; i < pinstance->num_hrrq; i++)
4907 tasklet_kill(&pinstance->isr_tasklet[i]);
4908 }
4909
4910
4911
4912
4913
4914
4915
4916
4917
4918 static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
4919 {
4920 pmcraid_release_config_buffers(pinstance);
4921 pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
4922 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
4923 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4924
4925 if (pinstance->inq_data != NULL) {
4926 dma_free_coherent(&pinstance->pdev->dev,
4927 sizeof(struct pmcraid_inquiry_data),
4928 pinstance->inq_data,
4929 pinstance->inq_data_baddr);
4930
4931 pinstance->inq_data = NULL;
4932 pinstance->inq_data_baddr = 0;
4933 }
4934
4935 if (pinstance->timestamp_data != NULL) {
4936 dma_free_coherent(&pinstance->pdev->dev,
4937 sizeof(struct pmcraid_timestamp_data),
4938 pinstance->timestamp_data,
4939 pinstance->timestamp_data_baddr);
4940
4941 pinstance->timestamp_data = NULL;
4942 pinstance->timestamp_data_baddr = 0;
4943 }
4944 }
4945
4946
4947
4948
4949
4950
4951
4952
4953
4954
4955
4956
4957
4958
4959 static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
4960 {
4961 int i;
4962
4963 if (pmcraid_allocate_host_rrqs(pinstance)) {
4964 pmcraid_err("couldn't allocate memory for %d host rrqs\n",
4965 pinstance->num_hrrq);
4966 return -ENOMEM;
4967 }
4968
4969 if (pmcraid_allocate_config_buffers(pinstance)) {
4970 pmcraid_err("couldn't allocate memory for config buffers\n");
4971 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4972 return -ENOMEM;
4973 }
4974
4975 if (pmcraid_allocate_cmd_blocks(pinstance)) {
4976 pmcraid_err("couldn't allocate memory for cmd blocks\n");
4977 pmcraid_release_config_buffers(pinstance);
4978 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4979 return -ENOMEM;
4980 }
4981
4982 if (pmcraid_allocate_control_blocks(pinstance)) {
4983 pmcraid_err("couldn't allocate memory control blocks\n");
4984 pmcraid_release_config_buffers(pinstance);
4985 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
4986 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
4987 return -ENOMEM;
4988 }
4989
4990
4991 pinstance->inq_data = dma_alloc_coherent(&pinstance->pdev->dev,
4992 sizeof(struct pmcraid_inquiry_data),
4993 &pinstance->inq_data_baddr, GFP_KERNEL);
4994 if (pinstance->inq_data == NULL) {
4995 pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
4996 pmcraid_release_buffers(pinstance);
4997 return -ENOMEM;
4998 }
4999
5000
5001 pinstance->timestamp_data = dma_alloc_coherent(&pinstance->pdev->dev,
5002 sizeof(struct pmcraid_timestamp_data),
5003 &pinstance->timestamp_data_baddr,
5004 GFP_KERNEL);
5005 if (pinstance->timestamp_data == NULL) {
5006 pmcraid_err("couldn't allocate DMA memory for \
5007 set time_stamp \n");
5008 pmcraid_release_buffers(pinstance);
5009 return -ENOMEM;
5010 }
5011
5012
5013
5014
5015
5016
5017 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
5018 struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
5019 pmcraid_init_cmdblk(cmdp, i);
5020 cmdp->drv_inst = pinstance;
5021 list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
5022 }
5023
5024 return 0;
5025 }
5026
5027
5028
5029
5030
5031
5032
5033 static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
5034 {
5035 int i;
5036 int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
5037
5038 for (i = 0; i < pinstance->num_hrrq; i++) {
5039 memset(pinstance->hrrq_start[i], 0, buffer_size);
5040 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
5041 pinstance->hrrq_end[i] =
5042 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
5043 pinstance->host_toggle_bit[i] = 1;
5044 }
5045 }
5046
5047
5048
5049
5050
5051
5052
5053
5054
5055
5056 static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
5057 void __iomem *mapped_pci_addr)
5058 {
5059 struct pmcraid_instance *pinstance =
5060 (struct pmcraid_instance *)host->hostdata;
5061
5062 pinstance->host = host;
5063 pinstance->pdev = pdev;
5064
5065
5066 pinstance->mapped_dma_addr = mapped_pci_addr;
5067
5068
5069 {
5070 struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
5071 struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
5072
5073 pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
5074
5075 pint_regs->ioa_host_interrupt_reg =
5076 mapped_pci_addr + chip_cfg->ioa_host_intr;
5077 pint_regs->ioa_host_interrupt_clr_reg =
5078 mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
5079 pint_regs->ioa_host_msix_interrupt_reg =
5080 mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
5081 pint_regs->host_ioa_interrupt_reg =
5082 mapped_pci_addr + chip_cfg->host_ioa_intr;
5083 pint_regs->host_ioa_interrupt_clr_reg =
5084 mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
5085
5086
5087
5088
5089 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
5090 pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
5091 pint_regs->ioa_host_interrupt_mask_reg =
5092 mapped_pci_addr + chip_cfg->ioa_host_mask;
5093 pint_regs->ioa_host_interrupt_mask_clr_reg =
5094 mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
5095 pint_regs->global_interrupt_mask_reg =
5096 mapped_pci_addr + chip_cfg->global_intr_mask;
5097 };
5098
5099 pinstance->ioa_reset_attempts = 0;
5100 init_waitqueue_head(&pinstance->reset_wait_q);
5101
5102 atomic_set(&pinstance->outstanding_cmds, 0);
5103 atomic_set(&pinstance->last_message_id, 0);
5104 atomic_set(&pinstance->expose_resources, 0);
5105
5106 INIT_LIST_HEAD(&pinstance->free_res_q);
5107 INIT_LIST_HEAD(&pinstance->used_res_q);
5108 INIT_LIST_HEAD(&pinstance->free_cmd_pool);
5109 INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
5110
5111 spin_lock_init(&pinstance->free_pool_lock);
5112 spin_lock_init(&pinstance->pending_pool_lock);
5113 spin_lock_init(&pinstance->resource_lock);
5114 mutex_init(&pinstance->aen_queue_lock);
5115
5116
5117 INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
5118
5119
5120 pinstance->current_log_level = pmcraid_log_level;
5121
5122
5123 pinstance->ioa_state = IOA_STATE_UNKNOWN;
5124 pinstance->reset_cmd = NULL;
5125 return 0;
5126 }
5127
5128
5129
5130
5131
5132
5133
5134
5135
5136
5137 static void pmcraid_shutdown(struct pci_dev *pdev)
5138 {
5139 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5140 pmcraid_reset_bringdown(pinstance);
5141 }
5142
5143
5144
5145
5146
5147 static unsigned short pmcraid_get_minor(void)
5148 {
5149 int minor;
5150
5151 minor = find_first_zero_bit(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
5152 __set_bit(minor, pmcraid_minor);
5153 return minor;
5154 }
5155
5156
5157
5158
5159 static void pmcraid_release_minor(unsigned short minor)
5160 {
5161 __clear_bit(minor, pmcraid_minor);
5162 }
5163
5164
5165
5166
5167
5168
5169
5170
5171
5172 static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
5173 {
5174 int minor;
5175 int error;
5176
5177 minor = pmcraid_get_minor();
5178 cdev_init(&pinstance->cdev, &pmcraid_fops);
5179 pinstance->cdev.owner = THIS_MODULE;
5180
5181 error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
5182
5183 if (error)
5184 pmcraid_release_minor(minor);
5185 else
5186 device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
5187 NULL, "%s%u", PMCRAID_DEVFILE, minor);
5188 return error;
5189 }
5190
5191
5192
5193
5194
5195
5196
5197
5198
5199 static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
5200 {
5201 pmcraid_release_minor(MINOR(pinstance->cdev.dev));
5202 device_destroy(pmcraid_class,
5203 MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
5204 cdev_del(&pinstance->cdev);
5205 }
5206
5207
5208
5209
5210
5211
5212
5213
5214 static void pmcraid_remove(struct pci_dev *pdev)
5215 {
5216 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5217
5218
5219 pmcraid_release_chrdev(pinstance);
5220
5221
5222 scsi_remove_host(pinstance->host);
5223
5224
5225 scsi_block_requests(pinstance->host);
5226
5227
5228 pmcraid_shutdown(pdev);
5229
5230 pmcraid_disable_interrupts(pinstance, ~0);
5231 flush_work(&pinstance->worker_q);
5232
5233 pmcraid_kill_tasklets(pinstance);
5234 pmcraid_unregister_interrupt_handler(pinstance);
5235 pmcraid_release_buffers(pinstance);
5236 iounmap(pinstance->mapped_dma_addr);
5237 pci_release_regions(pdev);
5238 scsi_host_put(pinstance->host);
5239 pci_disable_device(pdev);
5240
5241 return;
5242 }
5243
5244 #ifdef CONFIG_PM
5245
5246
5247
5248
5249
5250
5251
5252 static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
5253 {
5254 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5255
5256 pmcraid_shutdown(pdev);
5257 pmcraid_disable_interrupts(pinstance, ~0);
5258 pmcraid_kill_tasklets(pinstance);
5259 pci_set_drvdata(pinstance->pdev, pinstance);
5260 pmcraid_unregister_interrupt_handler(pinstance);
5261 pci_save_state(pdev);
5262 pci_disable_device(pdev);
5263 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5264
5265 return 0;
5266 }
5267
5268
5269
5270
5271
5272
5273
5274 static int pmcraid_resume(struct pci_dev *pdev)
5275 {
5276 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5277 struct Scsi_Host *host = pinstance->host;
5278 int rc;
5279
5280 pci_set_power_state(pdev, PCI_D0);
5281 pci_enable_wake(pdev, PCI_D0, 0);
5282 pci_restore_state(pdev);
5283
5284 rc = pci_enable_device(pdev);
5285
5286 if (rc) {
5287 dev_err(&pdev->dev, "resume: Enable device failed\n");
5288 return rc;
5289 }
5290
5291 pci_set_master(pdev);
5292
5293 if (sizeof(dma_addr_t) == 4 ||
5294 dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
5295 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
5296
5297 if (rc == 0)
5298 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
5299
5300 if (rc != 0) {
5301 dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
5302 goto disable_device;
5303 }
5304
5305 pmcraid_disable_interrupts(pinstance, ~0);
5306 atomic_set(&pinstance->outstanding_cmds, 0);
5307 rc = pmcraid_register_interrupt_handler(pinstance);
5308
5309 if (rc) {
5310 dev_err(&pdev->dev,
5311 "resume: couldn't register interrupt handlers\n");
5312 rc = -ENODEV;
5313 goto release_host;
5314 }
5315
5316 pmcraid_init_tasklets(pinstance);
5317 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5318
5319
5320
5321
5322 pinstance->ioa_hard_reset = 1;
5323
5324
5325
5326
5327 if (pmcraid_reset_bringup(pinstance)) {
5328 dev_err(&pdev->dev, "couldn't initialize IOA\n");
5329 rc = -ENODEV;
5330 goto release_tasklets;
5331 }
5332
5333 return 0;
5334
5335 release_tasklets:
5336 pmcraid_disable_interrupts(pinstance, ~0);
5337 pmcraid_kill_tasklets(pinstance);
5338 pmcraid_unregister_interrupt_handler(pinstance);
5339
5340 release_host:
5341 scsi_host_put(host);
5342
5343 disable_device:
5344 pci_disable_device(pdev);
5345
5346 return rc;
5347 }
5348
5349 #else
5350
5351 #define pmcraid_suspend NULL
5352 #define pmcraid_resume NULL
5353
5354 #endif
5355
5356
5357
5358
5359
5360
5361 static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
5362 {
5363 struct pmcraid_instance *pinstance = cmd->drv_inst;
5364 unsigned long flags;
5365
5366 spin_lock_irqsave(pinstance->host->host_lock, flags);
5367 pmcraid_ioa_reset(cmd);
5368 spin_unlock_irqrestore(pinstance->host->host_lock, flags);
5369 scsi_unblock_requests(pinstance->host);
5370 schedule_work(&pinstance->worker_q);
5371 }
5372
5373
5374
5375
5376
5377
5378
5379
5380
5381 static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
5382 {
5383 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5384 void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
5385
5386 pmcraid_reinit_cmdblk(cmd);
5387
5388 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5389 ioarcb->request_type = REQ_TYPE_IOACMD;
5390 ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
5391 ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
5392
5393
5394
5395
5396
5397 if (cmd->drv_inst->reinit_cfg_table) {
5398 cmd->drv_inst->reinit_cfg_table = 0;
5399 cmd->release = 1;
5400 cmd_done = pmcraid_reinit_cfgtable_done;
5401 }
5402
5403
5404
5405
5406
5407 pmcraid_send_cmd(cmd,
5408 cmd_done,
5409 PMCRAID_SET_SUP_DEV_TIMEOUT,
5410 pmcraid_timeout_handler);
5411 return;
5412 }
5413
5414
5415
5416
5417
5418
5419
5420
5421
5422 static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
5423 {
5424 struct pmcraid_instance *pinstance = cmd->drv_inst;
5425 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5426 __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
5427 struct pmcraid_ioadl_desc *ioadl;
5428 u64 timestamp;
5429
5430 timestamp = ktime_get_real_seconds() * 1000;
5431
5432 pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
5433 pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
5434 pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
5435 pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
5436 pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
5437 pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
5438
5439 pmcraid_reinit_cmdblk(cmd);
5440 ioarcb->request_type = REQ_TYPE_SCSI;
5441 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5442 ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
5443 ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
5444 memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
5445
5446 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5447 offsetof(struct pmcraid_ioarcb,
5448 add_data.u.ioadl[0]));
5449 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
5450 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL));
5451
5452 ioarcb->request_flags0 |= NO_LINK_DESCS;
5453 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
5454 ioarcb->data_transfer_length =
5455 cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5456 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5457 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5458 ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
5459 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5460
5461 if (!pinstance->timestamp_error) {
5462 pinstance->timestamp_error = 0;
5463 pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
5464 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5465 } else {
5466 pmcraid_send_cmd(cmd, pmcraid_return_cmd,
5467 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5468 return;
5469 }
5470 }
5471
5472
5473
5474
5475
5476
5477
5478
5479
5480
5481
5482
5483
5484
5485 static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
5486 {
5487 struct pmcraid_instance *pinstance = cmd->drv_inst;
5488 struct pmcraid_resource_entry *res, *temp;
5489 struct pmcraid_config_table_entry *cfgte;
5490 unsigned long lock_flags;
5491 int found, rc, i;
5492 u16 fw_version;
5493 LIST_HEAD(old_res);
5494
5495 if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
5496 pmcraid_err("IOA requires microcode download\n");
5497
5498 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
5499
5500
5501
5502
5503
5504 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
5505
5506 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
5507 list_move_tail(&res->queue, &old_res);
5508
5509 for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) {
5510 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5511 PMCRAID_FW_VERSION_1)
5512 cfgte = &pinstance->cfg_table->entries[i];
5513 else
5514 cfgte = (struct pmcraid_config_table_entry *)
5515 &pinstance->cfg_table->entries_ext[i];
5516
5517 if (!pmcraid_expose_resource(fw_version, cfgte))
5518 continue;
5519
5520 found = 0;
5521
5522
5523 list_for_each_entry_safe(res, temp, &old_res, queue) {
5524
5525 rc = memcmp(&res->cfg_entry.resource_address,
5526 &cfgte->resource_address,
5527 sizeof(cfgte->resource_address));
5528 if (!rc) {
5529 list_move_tail(&res->queue,
5530 &pinstance->used_res_q);
5531 found = 1;
5532 break;
5533 }
5534 }
5535
5536
5537 if (!found) {
5538
5539 if (list_empty(&pinstance->free_res_q)) {
5540 pmcraid_err("Too many devices attached\n");
5541 break;
5542 }
5543
5544 found = 1;
5545 res = list_entry(pinstance->free_res_q.next,
5546 struct pmcraid_resource_entry, queue);
5547
5548 res->scsi_dev = NULL;
5549 res->change_detected = RES_CHANGE_ADD;
5550 res->reset_progress = 0;
5551 list_move_tail(&res->queue, &pinstance->used_res_q);
5552 }
5553
5554
5555
5556
5557 if (found) {
5558 memcpy(&res->cfg_entry, cfgte,
5559 pinstance->config_table_entry_size);
5560 pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
5561 res->cfg_entry.resource_type,
5562 (fw_version <= PMCRAID_FW_VERSION_1 ?
5563 res->cfg_entry.unique_flags1 :
5564 le16_to_cpu(res->cfg_entry.array_id) & 0xFF),
5565 le32_to_cpu(res->cfg_entry.resource_address));
5566 }
5567 }
5568
5569
5570 list_for_each_entry_safe(res, temp, &old_res, queue) {
5571
5572 if (res->scsi_dev) {
5573 res->change_detected = RES_CHANGE_DEL;
5574 res->cfg_entry.resource_handle =
5575 PMCRAID_INVALID_RES_HANDLE;
5576 list_move_tail(&res->queue, &pinstance->used_res_q);
5577 } else {
5578 list_move_tail(&res->queue, &pinstance->free_res_q);
5579 }
5580 }
5581
5582
5583 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
5584 pmcraid_set_timestamp(cmd);
5585 }
5586
5587
5588
5589
5590
5591
5592
5593
5594
5595
5596
5597 static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
5598 {
5599 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5600 struct pmcraid_ioadl_desc *ioadl;
5601 struct pmcraid_instance *pinstance = cmd->drv_inst;
5602 __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
5603
5604 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5605 PMCRAID_FW_VERSION_1)
5606 pinstance->config_table_entry_size =
5607 sizeof(struct pmcraid_config_table_entry);
5608 else
5609 pinstance->config_table_entry_size =
5610 sizeof(struct pmcraid_config_table_entry_ext);
5611
5612 ioarcb->request_type = REQ_TYPE_IOACMD;
5613 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5614
5615 ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
5616
5617
5618 memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
5619
5620
5621
5622
5623 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5624 offsetof(struct pmcraid_ioarcb,
5625 add_data.u.ioadl[0]));
5626 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
5627 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL);
5628
5629 ioarcb->request_flags0 |= NO_LINK_DESCS;
5630 ioarcb->data_transfer_length =
5631 cpu_to_le32(sizeof(struct pmcraid_config_table));
5632
5633 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5634 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5635 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
5636 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
5637
5638 pmcraid_send_cmd(cmd, pmcraid_init_res_table,
5639 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5640 }
5641
5642
5643
5644
5645
5646
5647
5648
5649
5650
5651
5652 static int pmcraid_probe(struct pci_dev *pdev,
5653 const struct pci_device_id *dev_id)
5654 {
5655 struct pmcraid_instance *pinstance;
5656 struct Scsi_Host *host;
5657 void __iomem *mapped_pci_addr;
5658 int rc = PCIBIOS_SUCCESSFUL;
5659
5660 if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
5661 pmcraid_err
5662 ("maximum number(%d) of supported adapters reached\n",
5663 atomic_read(&pmcraid_adapter_count));
5664 return -ENOMEM;
5665 }
5666
5667 atomic_inc(&pmcraid_adapter_count);
5668 rc = pci_enable_device(pdev);
5669
5670 if (rc) {
5671 dev_err(&pdev->dev, "Cannot enable adapter\n");
5672 atomic_dec(&pmcraid_adapter_count);
5673 return rc;
5674 }
5675
5676 dev_info(&pdev->dev,
5677 "Found new IOA(%x:%x), Total IOA count: %d\n",
5678 pdev->vendor, pdev->device,
5679 atomic_read(&pmcraid_adapter_count));
5680
5681 rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
5682
5683 if (rc < 0) {
5684 dev_err(&pdev->dev,
5685 "Couldn't register memory range of registers\n");
5686 goto out_disable_device;
5687 }
5688
5689 mapped_pci_addr = pci_iomap(pdev, 0, 0);
5690
5691 if (!mapped_pci_addr) {
5692 dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
5693 rc = -ENOMEM;
5694 goto out_release_regions;
5695 }
5696
5697 pci_set_master(pdev);
5698
5699
5700
5701
5702
5703
5704
5705
5706 if (sizeof(dma_addr_t) == 4 ||
5707 dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)))
5708 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
5709
5710
5711
5712
5713 if (rc == 0)
5714 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
5715
5716 if (rc != 0) {
5717 dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
5718 goto cleanup_nomem;
5719 }
5720
5721 host = scsi_host_alloc(&pmcraid_host_template,
5722 sizeof(struct pmcraid_instance));
5723
5724 if (!host) {
5725 dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
5726 rc = -ENOMEM;
5727 goto cleanup_nomem;
5728 }
5729
5730 host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
5731 host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
5732 host->unique_id = host->host_no;
5733 host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
5734 host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
5735
5736
5737 pinstance = (struct pmcraid_instance *)host->hostdata;
5738 memset(pinstance, 0, sizeof(*pinstance));
5739
5740 pinstance->chip_cfg =
5741 (struct pmcraid_chip_details *)(dev_id->driver_data);
5742
5743 rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
5744
5745 if (rc < 0) {
5746 dev_err(&pdev->dev, "failed to initialize adapter instance\n");
5747 goto out_scsi_host_put;
5748 }
5749
5750 pci_set_drvdata(pdev, pinstance);
5751
5752
5753 rc = pci_save_state(pinstance->pdev);
5754
5755 if (rc != 0) {
5756 dev_err(&pdev->dev, "Failed to save PCI config space\n");
5757 goto out_scsi_host_put;
5758 }
5759
5760 pmcraid_disable_interrupts(pinstance, ~0);
5761
5762 rc = pmcraid_register_interrupt_handler(pinstance);
5763
5764 if (rc) {
5765 dev_err(&pdev->dev, "couldn't register interrupt handler\n");
5766 goto out_scsi_host_put;
5767 }
5768
5769 pmcraid_init_tasklets(pinstance);
5770
5771
5772 rc = pmcraid_init_buffers(pinstance);
5773
5774 if (rc) {
5775 pmcraid_err("couldn't allocate memory blocks\n");
5776 goto out_unregister_isr;
5777 }
5778
5779
5780 pmcraid_reset_type(pinstance);
5781
5782 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5783
5784
5785
5786
5787 pmcraid_info("starting IOA initialization sequence\n");
5788 if (pmcraid_reset_bringup(pinstance)) {
5789 dev_err(&pdev->dev, "couldn't initialize IOA\n");
5790 rc = 1;
5791 goto out_release_bufs;
5792 }
5793
5794
5795 rc = scsi_add_host(pinstance->host, &pdev->dev);
5796 if (rc != 0) {
5797 pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
5798 goto out_release_bufs;
5799 }
5800
5801 scsi_scan_host(pinstance->host);
5802
5803 rc = pmcraid_setup_chrdev(pinstance);
5804
5805 if (rc != 0) {
5806 pmcraid_err("couldn't create mgmt interface, error: %x\n",
5807 rc);
5808 goto out_remove_host;
5809 }
5810
5811
5812
5813
5814 atomic_set(&pinstance->expose_resources, 1);
5815 schedule_work(&pinstance->worker_q);
5816 return rc;
5817
5818 out_remove_host:
5819 scsi_remove_host(host);
5820
5821 out_release_bufs:
5822 pmcraid_release_buffers(pinstance);
5823
5824 out_unregister_isr:
5825 pmcraid_kill_tasklets(pinstance);
5826 pmcraid_unregister_interrupt_handler(pinstance);
5827
5828 out_scsi_host_put:
5829 scsi_host_put(host);
5830
5831 cleanup_nomem:
5832 iounmap(mapped_pci_addr);
5833
5834 out_release_regions:
5835 pci_release_regions(pdev);
5836
5837 out_disable_device:
5838 atomic_dec(&pmcraid_adapter_count);
5839 pci_disable_device(pdev);
5840 return -ENODEV;
5841 }
5842
5843
5844
5845
5846 static struct pci_driver pmcraid_driver = {
5847 .name = PMCRAID_DRIVER_NAME,
5848 .id_table = pmcraid_pci_table,
5849 .probe = pmcraid_probe,
5850 .remove = pmcraid_remove,
5851 .suspend = pmcraid_suspend,
5852 .resume = pmcraid_resume,
5853 .shutdown = pmcraid_shutdown
5854 };
5855
5856
5857
5858
5859 static int __init pmcraid_init(void)
5860 {
5861 dev_t dev;
5862 int error;
5863
5864 pmcraid_info("%s Device Driver version: %s\n",
5865 PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
5866
5867 error = alloc_chrdev_region(&dev, 0,
5868 PMCRAID_MAX_ADAPTERS,
5869 PMCRAID_DEVFILE);
5870
5871 if (error) {
5872 pmcraid_err("failed to get a major number for adapters\n");
5873 goto out_init;
5874 }
5875
5876 pmcraid_major = MAJOR(dev);
5877 pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
5878
5879 if (IS_ERR(pmcraid_class)) {
5880 error = PTR_ERR(pmcraid_class);
5881 pmcraid_err("failed to register with sysfs, error = %x\n",
5882 error);
5883 goto out_unreg_chrdev;
5884 }
5885
5886 error = pmcraid_netlink_init();
5887
5888 if (error) {
5889 class_destroy(pmcraid_class);
5890 goto out_unreg_chrdev;
5891 }
5892
5893 error = pci_register_driver(&pmcraid_driver);
5894
5895 if (error == 0)
5896 goto out_init;
5897
5898 pmcraid_err("failed to register pmcraid driver, error = %x\n",
5899 error);
5900 class_destroy(pmcraid_class);
5901 pmcraid_netlink_release();
5902
5903 out_unreg_chrdev:
5904 unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
5905
5906 out_init:
5907 return error;
5908 }
5909
5910
5911
5912
5913 static void __exit pmcraid_exit(void)
5914 {
5915 pmcraid_netlink_release();
5916 unregister_chrdev_region(MKDEV(pmcraid_major, 0),
5917 PMCRAID_MAX_ADAPTERS);
5918 pci_unregister_driver(&pmcraid_driver);
5919 class_destroy(pmcraid_class);
5920 }
5921
5922 module_init(pmcraid_init);
5923 module_exit(pmcraid_exit);