root/drivers/scsi/lpfc/lpfc_sli4.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. lpfc_sli4_qe

   1 /*******************************************************************
   2  * This file is part of the Emulex Linux Device Driver for         *
   3  * Fibre Channel Host Bus Adapters.                                *
   4  * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
   5  * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.     *
   6  * Copyright (C) 2009-2016 Emulex.  All rights reserved.           *
   7  * EMULEX and SLI are trademarks of Emulex.                        *
   8  * www.broadcom.com                                                *
   9  *                                                                 *
  10  * This program is free software; you can redistribute it and/or   *
  11  * modify it under the terms of version 2 of the GNU General       *
  12  * Public License as published by the Free Software Foundation.    *
  13  * This program is distributed in the hope that it will be useful. *
  14  * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *
  15  * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *
  16  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *
  17  * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  18  * TO BE LEGALLY INVALID.  See the GNU General Public License for  *
  19  * more details, a copy of which can be found in the file COPYING  *
  20  * included with this package.                                     *
  21  *******************************************************************/
  22 
  23 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
  24 #define CONFIG_SCSI_LPFC_DEBUG_FS
  25 #endif
  26 
  27 #define LPFC_ACTIVE_MBOX_WAIT_CNT               100
  28 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO             10000
  29 #define LPFC_XRI_EXCH_BUSY_WAIT_T1              10
  30 #define LPFC_XRI_EXCH_BUSY_WAIT_T2              30000
  31 #define LPFC_RPI_LOW_WATER_MARK                 10
  32 
  33 #define LPFC_UNREG_FCF                          1
  34 #define LPFC_SKIP_UNREG_FCF                     0
  35 
  36 /* Amount of time in seconds for waiting FCF rediscovery to complete */
  37 #define LPFC_FCF_REDISCOVER_WAIT_TMO            2000 /* msec */
  38 
  39 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
  40 #define LPFC_NEMBED_MBOX_SGL_CNT                254
  41 
  42 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */
  43 #define LPFC_HBA_HDWQ_MIN       0
  44 #define LPFC_HBA_HDWQ_MAX       128
  45 #define LPFC_HBA_HDWQ_DEF       0
  46 
  47 /* FCP MQ queue count limiting */
  48 #define LPFC_FCP_MQ_THRESHOLD_MIN       0
  49 #define LPFC_FCP_MQ_THRESHOLD_MAX       256
  50 #define LPFC_FCP_MQ_THRESHOLD_DEF       8
  51 
  52 /*
  53  * Provide the default FCF Record attributes used by the driver
  54  * when nonFIP mode is configured and there is no other default
  55  * FCF Record attributes.
  56  */
  57 #define LPFC_FCOE_FCF_DEF_INDEX 0
  58 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF
  59 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF
  60 
  61 #define LPFC_FCOE_NULL_VID      0xFFF
  62 #define LPFC_FCOE_IGNORE_VID    0xFFFF
  63 
  64 /* First 3 bytes of default FCF MAC is specified by FC_MAP */
  65 #define LPFC_FCOE_FCF_MAC3      0xFF
  66 #define LPFC_FCOE_FCF_MAC4      0xFF
  67 #define LPFC_FCOE_FCF_MAC5      0xFE
  68 #define LPFC_FCOE_FCF_MAP0      0x0E
  69 #define LPFC_FCOE_FCF_MAP1      0xFC
  70 #define LPFC_FCOE_FCF_MAP2      0x00
  71 #define LPFC_FCOE_MAX_RCV_SIZE  0x800
  72 #define LPFC_FCOE_FKA_ADV_PER   0
  73 #define LPFC_FCOE_FIP_PRIORITY  0x80
  74 
  75 #define sli4_sid_from_fc_hdr(fc_hdr)  \
  76         ((fc_hdr)->fh_s_id[0] << 16 | \
  77          (fc_hdr)->fh_s_id[1] <<  8 | \
  78          (fc_hdr)->fh_s_id[2])
  79 
  80 #define sli4_did_from_fc_hdr(fc_hdr)  \
  81         ((fc_hdr)->fh_d_id[0] << 16 | \
  82          (fc_hdr)->fh_d_id[1] <<  8 | \
  83          (fc_hdr)->fh_d_id[2])
  84 
  85 #define sli4_fctl_from_fc_hdr(fc_hdr)  \
  86         ((fc_hdr)->fh_f_ctl[0] << 16 | \
  87          (fc_hdr)->fh_f_ctl[1] <<  8 | \
  88          (fc_hdr)->fh_f_ctl[2])
  89 
  90 #define sli4_type_from_fc_hdr(fc_hdr)  \
  91         ((fc_hdr)->fh_type)
  92 
  93 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000
  94 
  95 #define INT_FW_UPGRADE  0
  96 #define RUN_FW_UPGRADE  1
  97 
  98 enum lpfc_sli4_queue_type {
  99         LPFC_EQ,
 100         LPFC_GCQ,
 101         LPFC_MCQ,
 102         LPFC_WCQ,
 103         LPFC_RCQ,
 104         LPFC_MQ,
 105         LPFC_WQ,
 106         LPFC_HRQ,
 107         LPFC_DRQ
 108 };
 109 
 110 /* The queue sub-type defines the functional purpose of the queue */
 111 enum lpfc_sli4_queue_subtype {
 112         LPFC_NONE,
 113         LPFC_MBOX,
 114         LPFC_IO,
 115         LPFC_ELS,
 116         LPFC_NVMET,
 117         LPFC_NVME_LS,
 118         LPFC_USOL
 119 };
 120 
 121 /* RQ buffer list */
 122 struct lpfc_rqb {
 123         uint16_t entry_count;     /* Current number of RQ slots */
 124         uint16_t buffer_count;    /* Current number of buffers posted */
 125         struct list_head rqb_buffer_list;  /* buffers assigned to this HBQ */
 126                                   /* Callback for HBQ buffer allocation */
 127         struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *);
 128                                   /* Callback for HBQ buffer free */
 129         void               (*rqb_free_buffer)(struct lpfc_hba *,
 130                                                struct rqb_dmabuf *);
 131 };
 132 
 133 struct lpfc_queue {
 134         struct list_head list;
 135         struct list_head wq_list;
 136 
 137         /*
 138          * If interrupts are in effect on _all_ the eq's the footprint
 139          * of polling code is zero (except mode). This memory is chec-
 140          * ked for every io to see if the io needs to be polled and
 141          * while completion to check if the eq's needs to be rearmed.
 142          * Keep in same cacheline as the queue ptr to avoid cpu fetch
 143          * stalls. Using 1B memory will leave us with 7B hole. Fill
 144          * it with other frequently used members.
 145          */
 146         uint16_t last_cpu;      /* most recent cpu */
 147         uint16_t hdwq;
 148         uint8_t  qe_valid;
 149         uint8_t  mode;  /* interrupt or polling */
 150 #define LPFC_EQ_INTERRUPT       0
 151 #define LPFC_EQ_POLL            1
 152 
 153         struct list_head wqfull_list;
 154         enum lpfc_sli4_queue_type type;
 155         enum lpfc_sli4_queue_subtype subtype;
 156         struct lpfc_hba *phba;
 157         struct list_head child_list;
 158         struct list_head page_list;
 159         struct list_head sgl_list;
 160         struct list_head cpu_list;
 161         uint32_t entry_count;   /* Number of entries to support on the queue */
 162         uint32_t entry_size;    /* Size of each queue entry. */
 163         uint32_t entry_cnt_per_pg;
 164         uint32_t notify_interval; /* Queue Notification Interval
 165                                    * For chip->host queues (EQ, CQ, RQ):
 166                                    *  specifies the interval (number of
 167                                    *  entries) where the doorbell is rung to
 168                                    *  notify the chip of entry consumption.
 169                                    * For host->chip queues (WQ):
 170                                    *  specifies the interval (number of
 171                                    *  entries) where consumption CQE is
 172                                    *  requested to indicate WQ entries
 173                                    *  consumed by the chip.
 174                                    * Not used on an MQ.
 175                                    */
 176 #define LPFC_EQ_NOTIFY_INTRVL   16
 177 #define LPFC_CQ_NOTIFY_INTRVL   16
 178 #define LPFC_WQ_NOTIFY_INTRVL   16
 179 #define LPFC_RQ_NOTIFY_INTRVL   16
 180         uint32_t max_proc_limit; /* Queue Processing Limit
 181                                   * For chip->host queues (EQ, CQ):
 182                                   *  specifies the maximum number of
 183                                   *  entries to be consumed in one
 184                                   *  processing iteration sequence. Queue
 185                                   *  will be rearmed after each iteration.
 186                                   * Not used on an MQ, RQ or WQ.
 187                                   */
 188 #define LPFC_EQ_MAX_PROC_LIMIT          256
 189 #define LPFC_CQ_MIN_PROC_LIMIT          64
 190 #define LPFC_CQ_MAX_PROC_LIMIT          LPFC_CQE_EXP_COUNT      // 4096
 191 #define LPFC_CQ_DEF_MAX_PROC_LIMIT      LPFC_CQE_DEF_COUNT      // 1024
 192 #define LPFC_CQ_MIN_THRESHOLD_TO_POLL   64
 193 #define LPFC_CQ_MAX_THRESHOLD_TO_POLL   LPFC_CQ_DEF_MAX_PROC_LIMIT
 194 #define LPFC_CQ_DEF_THRESHOLD_TO_POLL   LPFC_CQ_DEF_MAX_PROC_LIMIT
 195         uint32_t queue_claimed; /* indicates queue is being processed */
 196         uint32_t queue_id;      /* Queue ID assigned by the hardware */
 197         uint32_t assoc_qid;     /* Queue ID associated with, for CQ/WQ/MQ */
 198         uint32_t host_index;    /* The host's index for putting or getting */
 199         uint32_t hba_index;     /* The last known hba index for get or put */
 200         uint32_t q_mode;
 201 
 202         struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */
 203         struct lpfc_rqb *rqbp;  /* ptr to RQ buffers */
 204 
 205         uint16_t page_count;    /* Number of pages allocated for this queue */
 206         uint16_t page_size;     /* size of page allocated for this queue */
 207 #define LPFC_EXPANDED_PAGE_SIZE 16384
 208 #define LPFC_DEFAULT_PAGE_SIZE  4096
 209         uint16_t chann;         /* Hardware Queue association WQ/CQ */
 210                                 /* CPU affinity for EQ */
 211 #define LPFC_FIND_BY_EQ         0
 212 #define LPFC_FIND_BY_HDWQ       1
 213         uint8_t db_format;
 214 #define LPFC_DB_RING_FORMAT     0x01
 215 #define LPFC_DB_LIST_FORMAT     0x02
 216         uint8_t q_flag;
 217 #define HBA_NVMET_WQFULL        0x1 /* We hit WQ Full condition for NVMET */
 218 #define HBA_NVMET_CQ_NOTIFY     0x1 /* LPFC_NVMET_CQ_NOTIFY CQEs this EQE */
 219 #define LPFC_NVMET_CQ_NOTIFY    4
 220         void __iomem *db_regaddr;
 221         uint16_t dpp_enable;
 222         uint16_t dpp_id;
 223         void __iomem *dpp_regaddr;
 224 
 225         /* For q stats */
 226         uint32_t q_cnt_1;
 227         uint32_t q_cnt_2;
 228         uint32_t q_cnt_3;
 229         uint64_t q_cnt_4;
 230 /* defines for EQ stats */
 231 #define EQ_max_eqe              q_cnt_1
 232 #define EQ_no_entry             q_cnt_2
 233 #define EQ_cqe_cnt              q_cnt_3
 234 #define EQ_processed            q_cnt_4
 235 
 236 /* defines for CQ stats */
 237 #define CQ_mbox                 q_cnt_1
 238 #define CQ_max_cqe              q_cnt_1
 239 #define CQ_release_wqe          q_cnt_2
 240 #define CQ_xri_aborted          q_cnt_3
 241 #define CQ_wq                   q_cnt_4
 242 
 243 /* defines for WQ stats */
 244 #define WQ_overflow             q_cnt_1
 245 #define WQ_posted               q_cnt_4
 246 
 247 /* defines for RQ stats */
 248 #define RQ_no_posted_buf        q_cnt_1
 249 #define RQ_no_buf_found         q_cnt_2
 250 #define RQ_buf_posted           q_cnt_3
 251 #define RQ_rcv_buf              q_cnt_4
 252 
 253         struct work_struct      irqwork;
 254         struct work_struct      spwork;
 255         struct delayed_work     sched_irqwork;
 256         struct delayed_work     sched_spwork;
 257 
 258         uint64_t isr_timestamp;
 259         struct lpfc_queue *assoc_qp;
 260         struct list_head _poll_list;
 261         void **q_pgs;   /* array to index entries per page */
 262 };
 263 
 264 struct lpfc_sli4_link {
 265         uint32_t speed;
 266         uint8_t duplex;
 267         uint8_t status;
 268         uint8_t type;
 269         uint8_t number;
 270         uint8_t fault;
 271         uint32_t logical_speed;
 272         uint16_t topology;
 273 };
 274 
 275 struct lpfc_fcf_rec {
 276         uint8_t  fabric_name[8];
 277         uint8_t  switch_name[8];
 278         uint8_t  mac_addr[6];
 279         uint16_t fcf_indx;
 280         uint32_t priority;
 281         uint16_t vlan_id;
 282         uint32_t addr_mode;
 283         uint32_t flag;
 284 #define BOOT_ENABLE     0x01
 285 #define RECORD_VALID    0x02
 286 };
 287 
 288 struct lpfc_fcf_pri_rec {
 289         uint16_t fcf_index;
 290 #define LPFC_FCF_ON_PRI_LIST 0x0001
 291 #define LPFC_FCF_FLOGI_FAILED 0x0002
 292         uint16_t flag;
 293         uint32_t priority;
 294 };
 295 
 296 struct lpfc_fcf_pri {
 297         struct list_head list;
 298         struct lpfc_fcf_pri_rec fcf_rec;
 299 };
 300 
 301 /*
 302  * Maximum FCF table index, it is for driver internal book keeping, it
 303  * just needs to be no less than the supported HBA's FCF table size.
 304  */
 305 #define LPFC_SLI4_FCF_TBL_INDX_MAX      32
 306 
 307 struct lpfc_fcf {
 308         uint16_t fcfi;
 309         uint32_t fcf_flag;
 310 #define FCF_AVAILABLE   0x01 /* FCF available for discovery */
 311 #define FCF_REGISTERED  0x02 /* FCF registered with FW */
 312 #define FCF_SCAN_DONE   0x04 /* FCF table scan done */
 313 #define FCF_IN_USE      0x08 /* Atleast one discovery completed */
 314 #define FCF_INIT_DISC   0x10 /* Initial FCF discovery */
 315 #define FCF_DEAD_DISC   0x20 /* FCF DEAD fast FCF failover discovery */
 316 #define FCF_ACVL_DISC   0x40 /* All CVL fast FCF failover discovery */
 317 #define FCF_DISCOVERY   (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC)
 318 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */
 319 #define FCF_REDISC_EVT  0x100 /* FCF rediscovery event to worker thread */
 320 #define FCF_REDISC_FOV  0x200 /* Post FCF rediscovery fast failover */
 321 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT)
 322         uint16_t fcf_redisc_attempted;
 323         uint32_t addr_mode;
 324         uint32_t eligible_fcf_cnt;
 325         struct lpfc_fcf_rec current_rec;
 326         struct lpfc_fcf_rec failover_rec;
 327         struct list_head fcf_pri_list;
 328         struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX];
 329         uint32_t current_fcf_scan_pri;
 330         struct timer_list redisc_wait;
 331         unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */
 332 };
 333 
 334 
 335 #define LPFC_REGION23_SIGNATURE "RG23"
 336 #define LPFC_REGION23_VERSION   1
 337 #define LPFC_REGION23_LAST_REC  0xff
 338 #define DRIVER_SPECIFIC_TYPE    0xA2
 339 #define LINUX_DRIVER_ID         0x20
 340 #define PORT_STE_TYPE           0x1
 341 
 342 struct lpfc_fip_param_hdr {
 343         uint8_t type;
 344 #define FCOE_PARAM_TYPE         0xA0
 345         uint8_t length;
 346 #define FCOE_PARAM_LENGTH       2
 347         uint8_t parm_version;
 348 #define FIPP_VERSION            0x01
 349         uint8_t parm_flags;
 350 #define lpfc_fip_param_hdr_fipp_mode_SHIFT      6
 351 #define lpfc_fip_param_hdr_fipp_mode_MASK       0x3
 352 #define lpfc_fip_param_hdr_fipp_mode_WORD       parm_flags
 353 #define FIPP_MODE_ON                            0x1
 354 #define FIPP_MODE_OFF                           0x0
 355 #define FIPP_VLAN_VALID                         0x1
 356 };
 357 
 358 struct lpfc_fcoe_params {
 359         uint8_t fc_map[3];
 360         uint8_t reserved1;
 361         uint16_t vlan_tag;
 362         uint8_t reserved[2];
 363 };
 364 
 365 struct lpfc_fcf_conn_hdr {
 366         uint8_t type;
 367 #define FCOE_CONN_TBL_TYPE              0xA1
 368         uint8_t length;   /* words */
 369         uint8_t reserved[2];
 370 };
 371 
 372 struct lpfc_fcf_conn_rec {
 373         uint16_t flags;
 374 #define FCFCNCT_VALID           0x0001
 375 #define FCFCNCT_BOOT            0x0002
 376 #define FCFCNCT_PRIMARY         0x0004   /* if not set, Secondary */
 377 #define FCFCNCT_FBNM_VALID      0x0008
 378 #define FCFCNCT_SWNM_VALID      0x0010
 379 #define FCFCNCT_VLAN_VALID      0x0020
 380 #define FCFCNCT_AM_VALID        0x0040
 381 #define FCFCNCT_AM_PREFERRED    0x0080   /* if not set, AM Required */
 382 #define FCFCNCT_AM_SPMA         0x0100   /* if not set, FPMA */
 383 
 384         uint16_t vlan_tag;
 385         uint8_t fabric_name[8];
 386         uint8_t switch_name[8];
 387 };
 388 
 389 struct lpfc_fcf_conn_entry {
 390         struct list_head list;
 391         struct lpfc_fcf_conn_rec conn_rec;
 392 };
 393 
 394 /*
 395  * Define the host's bootstrap mailbox.  This structure contains
 396  * the member attributes needed to create, use, and destroy the
 397  * bootstrap mailbox region.
 398  *
 399  * The macro definitions for the bmbx data structure are defined
 400  * in lpfc_hw4.h with the register definition.
 401  */
 402 struct lpfc_bmbx {
 403         struct lpfc_dmabuf *dmabuf;
 404         struct dma_address dma_address;
 405         void *avirt;
 406         dma_addr_t aphys;
 407         uint32_t bmbx_size;
 408 };
 409 
 410 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4
 411 
 412 #define LPFC_EQE_SIZE_4B        4
 413 #define LPFC_EQE_SIZE_16B       16
 414 #define LPFC_CQE_SIZE           16
 415 #define LPFC_WQE_SIZE           64
 416 #define LPFC_WQE128_SIZE        128
 417 #define LPFC_MQE_SIZE           256
 418 #define LPFC_RQE_SIZE           8
 419 
 420 #define LPFC_EQE_DEF_COUNT      1024
 421 #define LPFC_CQE_DEF_COUNT      1024
 422 #define LPFC_CQE_EXP_COUNT      4096
 423 #define LPFC_WQE_DEF_COUNT      256
 424 #define LPFC_WQE_EXP_COUNT      1024
 425 #define LPFC_MQE_DEF_COUNT      16
 426 #define LPFC_RQE_DEF_COUNT      512
 427 
 428 #define LPFC_QUEUE_NOARM        false
 429 #define LPFC_QUEUE_REARM        true
 430 
 431 
 432 /*
 433  * SLI4 CT field defines
 434  */
 435 #define SLI4_CT_RPI 0
 436 #define SLI4_CT_VPI 1
 437 #define SLI4_CT_VFI 2
 438 #define SLI4_CT_FCFI 3
 439 
 440 /*
 441  * SLI4 specific data structures
 442  */
 443 struct lpfc_max_cfg_param {
 444         uint16_t max_xri;
 445         uint16_t xri_base;
 446         uint16_t xri_used;
 447         uint16_t max_rpi;
 448         uint16_t rpi_base;
 449         uint16_t rpi_used;
 450         uint16_t max_vpi;
 451         uint16_t vpi_base;
 452         uint16_t vpi_used;
 453         uint16_t max_vfi;
 454         uint16_t vfi_base;
 455         uint16_t vfi_used;
 456         uint16_t max_fcfi;
 457         uint16_t fcfi_used;
 458         uint16_t max_eq;
 459         uint16_t max_rq;
 460         uint16_t max_cq;
 461         uint16_t max_wq;
 462 };
 463 
 464 struct lpfc_hba;
 465 /* SLI4 HBA multi-fcp queue handler struct */
 466 #define LPFC_SLI4_HANDLER_NAME_SZ       16
 467 struct lpfc_hba_eq_hdl {
 468         uint32_t idx;
 469         char handler_name[LPFC_SLI4_HANDLER_NAME_SZ];
 470         struct lpfc_hba *phba;
 471         struct lpfc_queue *eq;
 472 };
 473 
 474 /*BB Credit recovery value*/
 475 struct lpfc_bbscn_params {
 476         uint32_t word0;
 477 #define lpfc_bbscn_min_SHIFT            0
 478 #define lpfc_bbscn_min_MASK             0x0000000F
 479 #define lpfc_bbscn_min_WORD             word0
 480 #define lpfc_bbscn_max_SHIFT            4
 481 #define lpfc_bbscn_max_MASK             0x0000000F
 482 #define lpfc_bbscn_max_WORD             word0
 483 #define lpfc_bbscn_def_SHIFT            8
 484 #define lpfc_bbscn_def_MASK             0x0000000F
 485 #define lpfc_bbscn_def_WORD             word0
 486 };
 487 
 488 /* Port Capabilities for SLI4 Parameters */
 489 struct lpfc_pc_sli4_params {
 490         uint32_t supported;
 491         uint32_t if_type;
 492         uint32_t sli_rev;
 493         uint32_t sli_family;
 494         uint32_t featurelevel_1;
 495         uint32_t featurelevel_2;
 496         uint32_t proto_types;
 497 #define LPFC_SLI4_PROTO_FCOE    0x0000001
 498 #define LPFC_SLI4_PROTO_FC      0x0000002
 499 #define LPFC_SLI4_PROTO_NIC     0x0000004
 500 #define LPFC_SLI4_PROTO_ISCSI   0x0000008
 501 #define LPFC_SLI4_PROTO_RDMA    0x0000010
 502         uint32_t sge_supp_len;
 503         uint32_t if_page_sz;
 504         uint32_t rq_db_window;
 505         uint32_t loopbk_scope;
 506         uint32_t oas_supported;
 507         uint32_t eq_pages_max;
 508         uint32_t eqe_size;
 509         uint32_t cq_pages_max;
 510         uint32_t cqe_size;
 511         uint32_t mq_pages_max;
 512         uint32_t mqe_size;
 513         uint32_t mq_elem_cnt;
 514         uint32_t wq_pages_max;
 515         uint32_t wqe_size;
 516         uint32_t rq_pages_max;
 517         uint32_t rqe_size;
 518         uint32_t hdr_pages_max;
 519         uint32_t hdr_size;
 520         uint32_t hdr_pp_align;
 521         uint32_t sgl_pages_max;
 522         uint32_t sgl_pp_align;
 523         uint8_t cqv;
 524         uint8_t mqv;
 525         uint8_t wqv;
 526         uint8_t rqv;
 527         uint8_t eqav;
 528         uint8_t cqav;
 529         uint8_t wqsize;
 530         uint8_t bv1s;
 531 #define LPFC_WQ_SZ64_SUPPORT    1
 532 #define LPFC_WQ_SZ128_SUPPORT   2
 533         uint8_t wqpcnt;
 534         uint8_t nvme;
 535 };
 536 
 537 #define LPFC_CQ_4K_PAGE_SZ      0x1
 538 #define LPFC_CQ_16K_PAGE_SZ     0x4
 539 #define LPFC_WQ_4K_PAGE_SZ      0x1
 540 #define LPFC_WQ_16K_PAGE_SZ     0x4
 541 
 542 struct lpfc_iov {
 543         uint32_t pf_number;
 544         uint32_t vf_number;
 545 };
 546 
 547 struct lpfc_sli4_lnk_info {
 548         uint8_t lnk_dv;
 549 #define LPFC_LNK_DAT_INVAL      0
 550 #define LPFC_LNK_DAT_VAL        1
 551         uint8_t lnk_tp;
 552 #define LPFC_LNK_GE             0x0 /* FCoE */
 553 #define LPFC_LNK_FC             0x1 /* FC */
 554 #define LPFC_LNK_FC_TRUNKED     0x2 /* FC_Trunked */
 555         uint8_t lnk_no;
 556         uint8_t optic_state;
 557 };
 558 
 559 #define LPFC_SLI4_HANDLER_CNT           (LPFC_HBA_IO_CHAN_MAX+ \
 560                                          LPFC_FOF_IO_CHAN_NUM)
 561 
 562 /* Used for IRQ vector to CPU mapping */
 563 struct lpfc_vector_map_info {
 564         uint16_t        phys_id;
 565         uint16_t        core_id;
 566         uint16_t        irq;
 567         uint16_t        eq;
 568         uint16_t        hdwq;
 569         uint16_t        flag;
 570 #define LPFC_CPU_MAP_HYPER      0x1
 571 #define LPFC_CPU_MAP_UNASSIGN   0x2
 572 #define LPFC_CPU_FIRST_IRQ      0x4
 573 };
 574 #define LPFC_VECTOR_MAP_EMPTY   0xffff
 575 
 576 /* Multi-XRI pool */
 577 #define XRI_BATCH               8
 578 
 579 struct lpfc_pbl_pool {
 580         struct list_head list;
 581         u32 count;
 582         spinlock_t lock;        /* lock for pbl_pool*/
 583 };
 584 
 585 struct lpfc_pvt_pool {
 586         u32 low_watermark;
 587         u32 high_watermark;
 588 
 589         struct list_head list;
 590         u32 count;
 591         spinlock_t lock;        /* lock for pvt_pool */
 592 };
 593 
 594 struct lpfc_multixri_pool {
 595         u32 xri_limit;
 596 
 597         /* Starting point when searching a pbl_pool with round-robin method */
 598         u32 rrb_next_hwqid;
 599 
 600         /* Used by lpfc_adjust_pvt_pool_count.
 601          * io_req_count is incremented by 1 during IO submission. The heartbeat
 602          * handler uses these two variables to determine if pvt_pool is idle or
 603          * busy.
 604          */
 605         u32 prev_io_req_count;
 606         u32 io_req_count;
 607 
 608         /* statistics */
 609         u32 pbl_empty_count;
 610 #ifdef LPFC_MXP_STAT
 611         u32 above_limit_count;
 612         u32 below_limit_count;
 613         u32 local_pbl_hit_count;
 614         u32 other_pbl_hit_count;
 615         u32 stat_max_hwm;
 616 
 617 #define LPFC_MXP_SNAPSHOT_TAKEN 3 /* snapshot is taken at 3rd heartbeats */
 618         u32 stat_pbl_count;
 619         u32 stat_pvt_count;
 620         u32 stat_busy_count;
 621         u32 stat_snapshot_taken;
 622 #endif
 623 
 624         /* TODO: Separate pvt_pool into get and put list */
 625         struct lpfc_pbl_pool pbl_pool;   /* Public free XRI pool */
 626         struct lpfc_pvt_pool pvt_pool;   /* Private free XRI pool */
 627 };
 628 
 629 struct lpfc_fc4_ctrl_stat {
 630         u32 input_requests;
 631         u32 output_requests;
 632         u32 control_requests;
 633         u32 io_cmpls;
 634 };
 635 
 636 #ifdef LPFC_HDWQ_LOCK_STAT
 637 struct lpfc_lock_stat {
 638         uint32_t alloc_xri_get;
 639         uint32_t alloc_xri_put;
 640         uint32_t free_xri;
 641         uint32_t wq_access;
 642         uint32_t alloc_pvt_pool;
 643         uint32_t mv_from_pvt_pool;
 644         uint32_t mv_to_pub_pool;
 645         uint32_t mv_to_pvt_pool;
 646         uint32_t free_pub_pool;
 647         uint32_t free_pvt_pool;
 648 };
 649 #endif
 650 
 651 struct lpfc_eq_intr_info {
 652         struct list_head list;
 653         uint32_t icnt;
 654 };
 655 
 656 /* SLI4 HBA data structure entries */
 657 struct lpfc_sli4_hdw_queue {
 658         /* Pointers to the constructed SLI4 queues */
 659         struct lpfc_queue *hba_eq;  /* Event queues for HBA */
 660         struct lpfc_queue *io_cq;   /* Fast-path FCP & NVME compl queue */
 661         struct lpfc_queue *io_wq;   /* Fast-path FCP & NVME work queue */
 662         uint16_t io_cq_map;
 663 
 664         /* Keep track of IO buffers for this hardware queue */
 665         spinlock_t io_buf_list_get_lock;  /* Common buf alloc list lock */
 666         struct list_head lpfc_io_buf_list_get;
 667         spinlock_t io_buf_list_put_lock;  /* Common buf free list lock */
 668         struct list_head lpfc_io_buf_list_put;
 669         spinlock_t abts_io_buf_list_lock; /* list of aborted IOs */
 670         struct list_head lpfc_abts_io_buf_list;
 671         uint32_t total_io_bufs;
 672         uint32_t get_io_bufs;
 673         uint32_t put_io_bufs;
 674         uint32_t empty_io_bufs;
 675         uint32_t abts_scsi_io_bufs;
 676         uint32_t abts_nvme_io_bufs;
 677 
 678         /* Multi-XRI pool per HWQ */
 679         struct lpfc_multixri_pool *p_multixri_pool;
 680 
 681         /* FC-4 Stats counters */
 682         struct lpfc_fc4_ctrl_stat nvme_cstat;
 683         struct lpfc_fc4_ctrl_stat scsi_cstat;
 684 #ifdef LPFC_HDWQ_LOCK_STAT
 685         struct lpfc_lock_stat lock_conflict;
 686 #endif
 687 
 688 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
 689 #define LPFC_CHECK_CPU_CNT    128
 690         uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT];
 691         uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT];
 692         uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT];
 693 #endif
 694 
 695         /* Per HDWQ pool resources */
 696         struct list_head sgl_list;
 697         struct list_head cmd_rsp_buf_list;
 698 
 699         /* Lock for syncing Per HDWQ pool resources */
 700         spinlock_t hdwq_lock;
 701 };
 702 
 703 #ifdef LPFC_HDWQ_LOCK_STAT
 704 /* compile time trylock stats */
 705 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \
 706         { \
 707         int only_once = 1; \
 708         while (spin_trylock_irqsave(lock, flag) == 0) { \
 709                 if (only_once) { \
 710                         only_once = 0; \
 711                         qp->lock_conflict.lstat++; \
 712                 } \
 713         } \
 714         }
 715 #define lpfc_qp_spin_lock(lock, qp, lstat) \
 716         { \
 717         int only_once = 1; \
 718         while (spin_trylock(lock) == 0) { \
 719                 if (only_once) { \
 720                         only_once = 0; \
 721                         qp->lock_conflict.lstat++; \
 722                 } \
 723         } \
 724         }
 725 #else
 726 #define lpfc_qp_spin_lock_irqsave(lock, flag, qp, lstat) \
 727         spin_lock_irqsave(lock, flag)
 728 #define lpfc_qp_spin_lock(lock, qp, lstat) spin_lock(lock)
 729 #endif
 730 
 731 struct lpfc_sli4_hba {
 732         void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
 733                                            * config space registers
 734                                            */
 735         void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for
 736                                            * control registers
 737                                            */
 738         void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for
 739                                            * doorbell registers
 740                                            */
 741         void __iomem *dpp_regs_memmap_p;  /* Kernel memory mapped address for
 742                                            * dpp registers
 743                                            */
 744         union {
 745                 struct {
 746                         /* IF Type 0, BAR 0 PCI cfg space reg mem map */
 747                         void __iomem *UERRLOregaddr;
 748                         void __iomem *UERRHIregaddr;
 749                         void __iomem *UEMASKLOregaddr;
 750                         void __iomem *UEMASKHIregaddr;
 751                 } if_type0;
 752                 struct {
 753                         /* IF Type 2, BAR 0 PCI cfg space reg mem map. */
 754                         void __iomem *STATUSregaddr;
 755                         void __iomem *CTRLregaddr;
 756                         void __iomem *ERR1regaddr;
 757 #define SLIPORT_ERR1_REG_ERR_CODE_1             0x1
 758 #define SLIPORT_ERR1_REG_ERR_CODE_2             0x2
 759                         void __iomem *ERR2regaddr;
 760 #define SLIPORT_ERR2_REG_FW_RESTART             0x0
 761 #define SLIPORT_ERR2_REG_FUNC_PROVISON          0x1
 762 #define SLIPORT_ERR2_REG_FORCED_DUMP            0x2
 763 #define SLIPORT_ERR2_REG_FAILURE_EQ             0x3
 764 #define SLIPORT_ERR2_REG_FAILURE_CQ             0x4
 765 #define SLIPORT_ERR2_REG_FAILURE_BUS            0x5
 766 #define SLIPORT_ERR2_REG_FAILURE_RQ             0x6
 767                         void __iomem *EQDregaddr;
 768                 } if_type2;
 769         } u;
 770 
 771         /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */
 772         void __iomem *PSMPHRregaddr;
 773 
 774         /* Well-known SLI INTF register memory map. */
 775         void __iomem *SLIINTFregaddr;
 776 
 777         /* IF type 0, BAR 1 function CSR register memory map */
 778         void __iomem *ISRregaddr;       /* HST_ISR register */
 779         void __iomem *IMRregaddr;       /* HST_IMR register */
 780         void __iomem *ISCRregaddr;      /* HST_ISCR register */
 781         /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */
 782         void __iomem *RQDBregaddr;      /* RQ_DOORBELL register */
 783         void __iomem *WQDBregaddr;      /* WQ_DOORBELL register */
 784         void __iomem *CQDBregaddr;      /* CQ_DOORBELL register */
 785         void __iomem *EQDBregaddr;      /* EQ_DOORBELL register */
 786         void __iomem *MQDBregaddr;      /* MQ_DOORBELL register */
 787         void __iomem *BMBXregaddr;      /* BootStrap MBX register */
 788 
 789         uint32_t ue_mask_lo;
 790         uint32_t ue_mask_hi;
 791         uint32_t ue_to_sr;
 792         uint32_t ue_to_rp;
 793         struct lpfc_register sli_intf;
 794         struct lpfc_pc_sli4_params pc_sli4_params;
 795         struct lpfc_bbscn_params bbscn_params;
 796         struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */
 797 
 798         void (*sli4_eq_clr_intr)(struct lpfc_queue *q);
 799         void (*sli4_write_eq_db)(struct lpfc_hba *phba, struct lpfc_queue *eq,
 800                                 uint32_t count, bool arm);
 801         void (*sli4_write_cq_db)(struct lpfc_hba *phba, struct lpfc_queue *cq,
 802                                 uint32_t count, bool arm);
 803 
 804         /* Pointers to the constructed SLI4 queues */
 805         struct lpfc_sli4_hdw_queue *hdwq;
 806         struct list_head lpfc_wq_list;
 807 
 808         /* Pointers to the constructed SLI4 queues for NVMET */
 809         struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */
 810         struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */
 811         struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */
 812 
 813         struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */
 814         struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */
 815         struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */
 816         struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */
 817         struct lpfc_queue *els_wq; /* Slow-path ELS work queue */
 818         struct lpfc_queue *nvmels_wq; /* NVME LS work queue */
 819         struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */
 820         struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */
 821 
 822         struct lpfc_name wwnn;
 823         struct lpfc_name wwpn;
 824 
 825         uint32_t fw_func_mode;  /* FW function protocol mode */
 826         uint32_t ulp0_mode;     /* ULP0 protocol mode */
 827         uint32_t ulp1_mode;     /* ULP1 protocol mode */
 828 
 829         /* Optimized Access Storage specific queues/structures */
 830         uint64_t oas_next_lun;
 831         uint8_t oas_next_tgt_wwpn[8];
 832         uint8_t oas_next_vpt_wwpn[8];
 833 
 834         /* Setup information for various queue parameters */
 835         int eq_esize;
 836         int eq_ecount;
 837         int cq_esize;
 838         int cq_ecount;
 839         int wq_esize;
 840         int wq_ecount;
 841         int mq_esize;
 842         int mq_ecount;
 843         int rq_esize;
 844         int rq_ecount;
 845 #define LPFC_SP_EQ_MAX_INTR_SEC         10000
 846 #define LPFC_FP_EQ_MAX_INTR_SEC         10000
 847 
 848         uint32_t intr_enable;
 849         struct lpfc_bmbx bmbx;
 850         struct lpfc_max_cfg_param max_cfg_param;
 851         uint16_t extents_in_use; /* must allocate resource extents. */
 852         uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */
 853         uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
 854         uint16_t next_rpi;
 855         uint16_t io_xri_max;
 856         uint16_t io_xri_cnt;
 857         uint16_t io_xri_start;
 858         uint16_t els_xri_cnt;
 859         uint16_t nvmet_xri_cnt;
 860         uint16_t nvmet_io_wait_cnt;
 861         uint16_t nvmet_io_wait_total;
 862         uint16_t cq_max;
 863         struct lpfc_queue **cq_lookup;
 864         struct list_head lpfc_els_sgl_list;
 865         struct list_head lpfc_abts_els_sgl_list;
 866         spinlock_t abts_io_buf_list_lock; /* list of aborted SCSI IOs */
 867         struct list_head lpfc_abts_io_buf_list;
 868         struct list_head lpfc_nvmet_sgl_list;
 869         spinlock_t abts_nvmet_buf_list_lock; /* list of aborted NVMET IOs */
 870         struct list_head lpfc_abts_nvmet_ctx_list;
 871         spinlock_t t_active_list_lock; /* list of active NVMET IOs */
 872         struct list_head t_active_ctx_list;
 873         struct list_head lpfc_nvmet_io_wait_list;
 874         struct lpfc_nvmet_ctx_info *nvmet_ctx_info;
 875         struct lpfc_sglq **lpfc_sglq_active_list;
 876         struct list_head lpfc_rpi_hdr_list;
 877         unsigned long *rpi_bmask;
 878         uint16_t *rpi_ids;
 879         uint16_t rpi_count;
 880         struct list_head lpfc_rpi_blk_list;
 881         unsigned long *xri_bmask;
 882         uint16_t *xri_ids;
 883         struct list_head lpfc_xri_blk_list;
 884         unsigned long *vfi_bmask;
 885         uint16_t *vfi_ids;
 886         uint16_t vfi_count;
 887         struct list_head lpfc_vfi_blk_list;
 888         struct lpfc_sli4_flags sli4_flags;
 889         struct list_head sp_queue_event;
 890         struct list_head sp_cqe_event_pool;
 891         struct list_head sp_asynce_work_queue;
 892         struct list_head sp_fcp_xri_aborted_work_queue;
 893         struct list_head sp_els_xri_aborted_work_queue;
 894         struct list_head sp_unsol_work_queue;
 895         struct lpfc_sli4_link link_state;
 896         struct lpfc_sli4_lnk_info lnk_info;
 897         uint32_t pport_name_sta;
 898 #define LPFC_SLI4_PPNAME_NON    0
 899 #define LPFC_SLI4_PPNAME_GET    1
 900         struct lpfc_iov iov;
 901         spinlock_t sgl_list_lock; /* list of aborted els IOs */
 902         spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */
 903         uint32_t physical_port;
 904 
 905         /* CPU to vector mapping information */
 906         struct lpfc_vector_map_info *cpu_map;
 907         uint16_t num_possible_cpu;
 908         uint16_t num_present_cpu;
 909         uint16_t curr_disp_cpu;
 910         struct lpfc_eq_intr_info __percpu *eq_info;
 911         uint32_t conf_trunk;
 912 #define lpfc_conf_trunk_port0_WORD      conf_trunk
 913 #define lpfc_conf_trunk_port0_SHIFT     0
 914 #define lpfc_conf_trunk_port0_MASK      0x1
 915 #define lpfc_conf_trunk_port1_WORD      conf_trunk
 916 #define lpfc_conf_trunk_port1_SHIFT     1
 917 #define lpfc_conf_trunk_port1_MASK      0x1
 918 #define lpfc_conf_trunk_port2_WORD      conf_trunk
 919 #define lpfc_conf_trunk_port2_SHIFT     2
 920 #define lpfc_conf_trunk_port2_MASK      0x1
 921 #define lpfc_conf_trunk_port3_WORD      conf_trunk
 922 #define lpfc_conf_trunk_port3_SHIFT     3
 923 #define lpfc_conf_trunk_port3_MASK      0x1
 924 #define lpfc_conf_trunk_port0_nd_WORD   conf_trunk
 925 #define lpfc_conf_trunk_port0_nd_SHIFT  4
 926 #define lpfc_conf_trunk_port0_nd_MASK   0x1
 927 #define lpfc_conf_trunk_port1_nd_WORD   conf_trunk
 928 #define lpfc_conf_trunk_port1_nd_SHIFT  5
 929 #define lpfc_conf_trunk_port1_nd_MASK   0x1
 930 #define lpfc_conf_trunk_port2_nd_WORD   conf_trunk
 931 #define lpfc_conf_trunk_port2_nd_SHIFT  6
 932 #define lpfc_conf_trunk_port2_nd_MASK   0x1
 933 #define lpfc_conf_trunk_port3_nd_WORD   conf_trunk
 934 #define lpfc_conf_trunk_port3_nd_SHIFT  7
 935 #define lpfc_conf_trunk_port3_nd_MASK   0x1
 936 };
 937 
 938 enum lpfc_sge_type {
 939         GEN_BUFF_TYPE,
 940         SCSI_BUFF_TYPE,
 941         NVMET_BUFF_TYPE
 942 };
 943 
 944 enum lpfc_sgl_state {
 945         SGL_FREED,
 946         SGL_ALLOCATED,
 947         SGL_XRI_ABORTED
 948 };
 949 
 950 struct lpfc_sglq {
 951         /* lpfc_sglqs are used in double linked lists */
 952         struct list_head list;
 953         struct list_head clist;
 954         enum lpfc_sge_type buff_type; /* is this a scsi sgl */
 955         enum lpfc_sgl_state state;
 956         struct lpfc_nodelist *ndlp; /* ndlp associated with IO */
 957         uint16_t iotag;         /* pre-assigned IO tag */
 958         uint16_t sli4_lxritag;  /* logical pre-assigned xri. */
 959         uint16_t sli4_xritag;   /* pre-assigned XRI, (OXID) tag. */
 960         struct sli4_sge *sgl;   /* pre-assigned SGL */
 961         void *virt;             /* virtual address. */
 962         dma_addr_t phys;        /* physical address */
 963 };
 964 
 965 struct lpfc_rpi_hdr {
 966         struct list_head list;
 967         uint32_t len;
 968         struct lpfc_dmabuf *dmabuf;
 969         uint32_t page_count;
 970         uint32_t start_rpi;
 971         uint16_t next_rpi;
 972 };
 973 
 974 struct lpfc_rsrc_blks {
 975         struct list_head list;
 976         uint16_t rsrc_start;
 977         uint16_t rsrc_size;
 978         uint16_t rsrc_used;
 979 };
 980 
 981 struct lpfc_rdp_context {
 982         struct lpfc_nodelist *ndlp;
 983         uint16_t ox_id;
 984         uint16_t rx_id;
 985         READ_LNK_VAR link_stat;
 986         uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE];
 987         uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE];
 988         void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int);
 989 };
 990 
 991 struct lpfc_lcb_context {
 992         uint8_t  sub_command;
 993         uint8_t  type;
 994         uint8_t  capability;
 995         uint8_t  frequency;
 996         uint16_t  duration;
 997         uint16_t ox_id;
 998         uint16_t rx_id;
 999         struct lpfc_nodelist *ndlp;
1000 };
1001 
1002 
1003 /*
1004  * SLI4 specific function prototypes
1005  */
1006 int lpfc_pci_function_reset(struct lpfc_hba *);
1007 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *);
1008 int lpfc_sli4_hba_setup(struct lpfc_hba *);
1009 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
1010                      uint8_t, uint32_t, bool);
1011 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
1012 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
1013 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
1014                            struct lpfc_mbx_sge *);
1015 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *,
1016                                uint16_t);
1017 
1018 void lpfc_sli4_hba_reset(struct lpfc_hba *);
1019 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *phba,
1020                                          uint32_t page_size,
1021                                          uint32_t entry_size,
1022                                          uint32_t entry_count, int cpu);
1023 void lpfc_sli4_queue_free(struct lpfc_queue *);
1024 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t);
1025 void lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
1026                              uint32_t numq, uint32_t usdelay);
1027 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
1028                         struct lpfc_queue *, uint32_t, uint32_t);
1029 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
1030                         struct lpfc_sli4_hdw_queue *hdwq, uint32_t type,
1031                         uint32_t subtype);
1032 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
1033                        struct lpfc_queue *, uint32_t);
1034 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *,
1035                         struct lpfc_queue *, uint32_t);
1036 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *,
1037                         struct lpfc_queue *, struct lpfc_queue *, uint32_t);
1038 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
1039                         struct lpfc_queue **drqp, struct lpfc_queue **cqp,
1040                         uint32_t subtype);
1041 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *);
1042 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *);
1043 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *);
1044 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *);
1045 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *,
1046                          struct lpfc_queue *);
1047 int lpfc_sli4_queue_setup(struct lpfc_hba *);
1048 void lpfc_sli4_queue_unset(struct lpfc_hba *);
1049 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
1050 int lpfc_repost_io_sgl_list(struct lpfc_hba *phba);
1051 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
1052 void lpfc_sli4_free_xri(struct lpfc_hba *, int);
1053 int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
1054 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
1055 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
1056 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
1057 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
1058 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
1059 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *);
1060 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
1061 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *);
1062 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
1063 int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
1064 void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
1065 void lpfc_sli4_remove_rpis(struct lpfc_hba *);
1066 void lpfc_sli4_async_event_proc(struct lpfc_hba *);
1067 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
1068 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *,
1069                         void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *);
1070 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
1071 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
1072 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba,
1073                                 struct sli4_wcqe_xri_aborted *axri,
1074                                 struct lpfc_io_buf *lpfc_ncmd);
1075 void lpfc_sli4_io_xri_aborted(struct lpfc_hba *phba,
1076                               struct sli4_wcqe_xri_aborted *axri, int idx);
1077 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba,
1078                                  struct sli4_wcqe_xri_aborted *axri);
1079 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
1080                                struct sli4_wcqe_xri_aborted *);
1081 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *);
1082 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *);
1083 int lpfc_sli4_brdreset(struct lpfc_hba *);
1084 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *);
1085 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
1086 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
1087 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba);
1088 int lpfc_sli4_init_vpi(struct lpfc_vport *);
1089 void lpfc_sli4_eq_clr_intr(struct lpfc_queue *);
1090 void lpfc_sli4_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
1091                            uint32_t count, bool arm);
1092 void lpfc_sli4_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
1093                            uint32_t count, bool arm);
1094 void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q);
1095 void lpfc_sli4_if6_write_cq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
1096                                uint32_t count, bool arm);
1097 void lpfc_sli4_if6_write_eq_db(struct lpfc_hba *phba, struct lpfc_queue *q,
1098                                uint32_t count, bool arm);
1099 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
1100 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
1101 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);
1102 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t);
1103 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
1104 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
1105 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
1106 int lpfc_sli4_unregister_fcf(struct lpfc_hba *);
1107 int lpfc_sli4_post_status_check(struct lpfc_hba *);
1108 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
1109 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
1110 void lpfc_sli4_ras_dma_free(struct lpfc_hba *phba);
1111 struct sli4_hybrid_sgl *lpfc_get_sgl_per_hdwq(struct lpfc_hba *phba,
1112                                               struct lpfc_io_buf *buf);
1113 struct fcp_cmd_rsp_buf *lpfc_get_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
1114                                                       struct lpfc_io_buf *buf);
1115 int lpfc_put_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *buf);
1116 int lpfc_put_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
1117                                   struct lpfc_io_buf *buf);
1118 void lpfc_free_sgl_per_hdwq(struct lpfc_hba *phba,
1119                             struct lpfc_sli4_hdw_queue *hdwq);
1120 void lpfc_free_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba,
1121                                     struct lpfc_sli4_hdw_queue *hdwq);
1122 static inline void *lpfc_sli4_qe(struct lpfc_queue *q, uint16_t idx)
1123 {
1124         return q->q_pgs[idx / q->entry_cnt_per_pg] +
1125                 (q->entry_size * (idx % q->entry_cnt_per_pg));
1126 }

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