1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * NCR 5380 generic driver routines. These should make it *trivial*
4 * to implement 5380 SCSI drivers under Linux with a non-trantor
5 * architecture.
6 *
7 * Note that these routines also work with NR53c400 family chips.
8 *
9 * Copyright 1993, Drew Eckhardt
10 * Visionary Computing
11 * (Unix and Linux consulting and custom programming)
12 * drew@colorado.edu
13 * +1 (303) 666-5836
14 *
15 * For more information, please consult
16 *
17 * NCR 5380 Family
18 * SCSI Protocol Controller
19 * Databook
20 *
21 * NCR Microelectronics
22 * 1635 Aeroplaza Drive
23 * Colorado Springs, CO 80916
24 * 1+ (719) 578-3400
25 * 1+ (800) 334-5454
26 */
27
28 /*
29 * With contributions from Ray Van Tassle, Ingmar Baumgart,
30 * Ronald van Cuijlenborg, Alan Cox and others.
31 */
32
33 /* Ported to Atari by Roman Hodek and others. */
34
35 /* Adapted for the Sun 3 by Sam Creasey. */
36
37 /*
38 * Design
39 *
40 * This is a generic 5380 driver. To use it on a different platform,
41 * one simply writes appropriate system specific macros (ie, data
42 * transfer - some PC's will use the I/O bus, 68K's must use
43 * memory mapped) and drops this file in their 'C' wrapper.
44 *
45 * As far as command queueing, two queues are maintained for
46 * each 5380 in the system - commands that haven't been issued yet,
47 * and commands that are currently executing. This means that an
48 * unlimited number of commands may be queued, letting
49 * more commands propagate from the higher driver levels giving higher
50 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
51 * allowing multiple commands to propagate all the way to a SCSI-II device
52 * while a command is already executing.
53 *
54 *
55 * Issues specific to the NCR5380 :
56 *
57 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
58 * piece of hardware that requires you to sit in a loop polling for
59 * the REQ signal as long as you are connected. Some devices are
60 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
61 * while doing long seek operations. [...] These
62 * broken devices are the exception rather than the rule and I'd rather
63 * spend my time optimizing for the normal case.
64 *
65 * Architecture :
66 *
67 * At the heart of the design is a coroutine, NCR5380_main,
68 * which is started from a workqueue for each NCR5380 host in the
69 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
70 * removing the commands from the issue queue and calling
71 * NCR5380_select() if a nexus is not established.
72 *
73 * Once a nexus is established, the NCR5380_information_transfer()
74 * phase goes through the various phases as instructed by the target.
75 * if the target goes into MSG IN and sends a DISCONNECT message,
76 * the command structure is placed into the per instance disconnected
77 * queue, and NCR5380_main tries to find more work. If the target is
78 * idle for too long, the system will try to sleep.
79 *
80 * If a command has disconnected, eventually an interrupt will trigger,
81 * calling NCR5380_intr() which will in turn call NCR5380_reselect
82 * to reestablish a nexus. This will run main if necessary.
83 *
84 * On command termination, the done function will be called as
85 * appropriate.
86 *
87 * SCSI pointers are maintained in the SCp field of SCSI command
88 * structures, being initialized after the command is connected
89 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
90 * Note that in violation of the standard, an implicit SAVE POINTERS operation
91 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
92 */
93
94 /*
95 * Using this file :
96 * This file a skeleton Linux SCSI driver for the NCR 5380 series
97 * of chips. To use it, you write an architecture specific functions
98 * and macros and include this file in your driver.
99 *
100 * These macros MUST be defined :
101 *
102 * NCR5380_read(register) - read from the specified register
103 *
104 * NCR5380_write(register, value) - write to the specific register
105 *
106 * NCR5380_implementation_fields - additional fields needed for this
107 * specific implementation of the NCR5380
108 *
109 * Either real DMA *or* pseudo DMA may be implemented
110 *
111 * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer
112 * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380
113 * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory
114 * NCR5380_dma_residual - residual byte count
115 *
116 * The generic driver is initialized by calling NCR5380_init(instance),
117 * after setting the appropriate host specific fields and ID.
118 */
119
120 #ifndef NCR5380_io_delay
121 #define NCR5380_io_delay(x)
122 #endif
123
124 #ifndef NCR5380_acquire_dma_irq
125 #define NCR5380_acquire_dma_irq(x) (1)
126 #endif
127
128 #ifndef NCR5380_release_dma_irq
129 #define NCR5380_release_dma_irq(x)
130 #endif
131
132 static unsigned int disconnect_mask = ~0;
133 module_param(disconnect_mask, int, 0444);
134
135 static int do_abort(struct Scsi_Host *);
136 static void do_reset(struct Scsi_Host *);
137 static void bus_reset_cleanup(struct Scsi_Host *);
138
139 /**
140 * initialize_SCp - init the scsi pointer field
141 * @cmd: command block to set up
142 *
143 * Set up the internal fields in the SCSI command.
144 */
145
146 static inline void initialize_SCp(struct scsi_cmnd *cmd)
147 {
148 /*
149 * Initialize the Scsi Pointer field so that all of the commands in the
150 * various queues are valid.
151 */
152
153 if (scsi_bufflen(cmd)) {
154 cmd->SCp.buffer = scsi_sglist(cmd);
155 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
156 cmd->SCp.this_residual = cmd->SCp.buffer->length;
157 } else {
158 cmd->SCp.buffer = NULL;
159 cmd->SCp.ptr = NULL;
160 cmd->SCp.this_residual = 0;
161 }
162
163 cmd->SCp.Status = 0;
164 cmd->SCp.Message = 0;
165 }
166
167 static inline void advance_sg_buffer(struct scsi_cmnd *cmd)
168 {
169 struct scatterlist *s = cmd->SCp.buffer;
170
171 if (!cmd->SCp.this_residual && s && !sg_is_last(s)) {
172 cmd->SCp.buffer = sg_next(s);
173 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
174 cmd->SCp.this_residual = cmd->SCp.buffer->length;
175 }
176 }
177
178 /**
179 * NCR5380_poll_politely2 - wait for two chip register values
180 * @hostdata: host private data
181 * @reg1: 5380 register to poll
182 * @bit1: Bitmask to check
183 * @val1: Expected value
184 * @reg2: Second 5380 register to poll
185 * @bit2: Second bitmask to check
186 * @val2: Second expected value
187 * @wait: Time-out in jiffies
188 *
189 * Polls the chip in a reasonably efficient manner waiting for an
190 * event to occur. After a short quick poll we begin to yield the CPU
191 * (if possible). In irq contexts the time-out is arbitrarily limited.
192 * Callers may hold locks as long as they are held in irq mode.
193 *
194 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
195 */
196
197 static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
198 unsigned int reg1, u8 bit1, u8 val1,
199 unsigned int reg2, u8 bit2, u8 val2,
200 unsigned long wait)
201 {
202 unsigned long n = hostdata->poll_loops;
203 unsigned long deadline = jiffies + wait;
204
205 do {
206 if ((NCR5380_read(reg1) & bit1) == val1)
207 return 0;
208 if ((NCR5380_read(reg2) & bit2) == val2)
209 return 0;
210 cpu_relax();
211 } while (n--);
212
213 if (irqs_disabled() || in_interrupt())
214 return -ETIMEDOUT;
215
216 /* Repeatedly sleep for 1 ms until deadline */
217 while (time_is_after_jiffies(deadline)) {
218 schedule_timeout_uninterruptible(1);
219 if ((NCR5380_read(reg1) & bit1) == val1)
220 return 0;
221 if ((NCR5380_read(reg2) & bit2) == val2)
222 return 0;
223 }
224
225 return -ETIMEDOUT;
226 }
227
228 #if NDEBUG
229 static struct {
230 unsigned char mask;
231 const char *name;
232 } signals[] = {
233 {SR_DBP, "PARITY"},
234 {SR_RST, "RST"},
235 {SR_BSY, "BSY"},
236 {SR_REQ, "REQ"},
237 {SR_MSG, "MSG"},
238 {SR_CD, "CD"},
239 {SR_IO, "IO"},
240 {SR_SEL, "SEL"},
241 {0, NULL}
242 },
243 basrs[] = {
244 {BASR_END_DMA_TRANSFER, "END OF DMA"},
245 {BASR_DRQ, "DRQ"},
246 {BASR_PARITY_ERROR, "PARITY ERROR"},
247 {BASR_IRQ, "IRQ"},
248 {BASR_PHASE_MATCH, "PHASE MATCH"},
249 {BASR_BUSY_ERROR, "BUSY ERROR"},
250 {BASR_ATN, "ATN"},
251 {BASR_ACK, "ACK"},
252 {0, NULL}
253 },
254 icrs[] = {
255 {ICR_ASSERT_RST, "ASSERT RST"},
256 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
257 {ICR_ARBITRATION_LOST, "LOST ARB."},
258 {ICR_ASSERT_ACK, "ASSERT ACK"},
259 {ICR_ASSERT_BSY, "ASSERT BSY"},
260 {ICR_ASSERT_SEL, "ASSERT SEL"},
261 {ICR_ASSERT_ATN, "ASSERT ATN"},
262 {ICR_ASSERT_DATA, "ASSERT DATA"},
263 {0, NULL}
264 },
265 mrs[] = {
266 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
267 {MR_TARGET, "TARGET"},
268 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
269 {MR_ENABLE_PAR_INTR, "PARITY INTR"},
270 {MR_ENABLE_EOP_INTR, "EOP INTR"},
271 {MR_MONITOR_BSY, "MONITOR BSY"},
272 {MR_DMA_MODE, "DMA MODE"},
273 {MR_ARBITRATE, "ARBITRATE"},
274 {0, NULL}
275 };
276
277 /**
278 * NCR5380_print - print scsi bus signals
279 * @instance: adapter state to dump
280 *
281 * Print the SCSI bus signals for debugging purposes
282 */
283
284 static void NCR5380_print(struct Scsi_Host *instance)
285 {
286 struct NCR5380_hostdata *hostdata = shost_priv(instance);
287 unsigned char status, basr, mr, icr, i;
288
289 status = NCR5380_read(STATUS_REG);
290 mr = NCR5380_read(MODE_REG);
291 icr = NCR5380_read(INITIATOR_COMMAND_REG);
292 basr = NCR5380_read(BUS_AND_STATUS_REG);
293
294 printk(KERN_DEBUG "SR = 0x%02x : ", status);
295 for (i = 0; signals[i].mask; ++i)
296 if (status & signals[i].mask)
297 printk(KERN_CONT "%s, ", signals[i].name);
298 printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
299 for (i = 0; basrs[i].mask; ++i)
300 if (basr & basrs[i].mask)
301 printk(KERN_CONT "%s, ", basrs[i].name);
302 printk(KERN_CONT "\nICR = 0x%02x : ", icr);
303 for (i = 0; icrs[i].mask; ++i)
304 if (icr & icrs[i].mask)
305 printk(KERN_CONT "%s, ", icrs[i].name);
306 printk(KERN_CONT "\nMR = 0x%02x : ", mr);
307 for (i = 0; mrs[i].mask; ++i)
308 if (mr & mrs[i].mask)
309 printk(KERN_CONT "%s, ", mrs[i].name);
310 printk(KERN_CONT "\n");
311 }
312
313 static struct {
314 unsigned char value;
315 const char *name;
316 } phases[] = {
317 {PHASE_DATAOUT, "DATAOUT"},
318 {PHASE_DATAIN, "DATAIN"},
319 {PHASE_CMDOUT, "CMDOUT"},
320 {PHASE_STATIN, "STATIN"},
321 {PHASE_MSGOUT, "MSGOUT"},
322 {PHASE_MSGIN, "MSGIN"},
323 {PHASE_UNKNOWN, "UNKNOWN"}
324 };
325
326 /**
327 * NCR5380_print_phase - show SCSI phase
328 * @instance: adapter to dump
329 *
330 * Print the current SCSI phase for debugging purposes
331 */
332
333 static void NCR5380_print_phase(struct Scsi_Host *instance)
334 {
335 struct NCR5380_hostdata *hostdata = shost_priv(instance);
336 unsigned char status;
337 int i;
338
339 status = NCR5380_read(STATUS_REG);
340 if (!(status & SR_REQ))
341 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
342 else {
343 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
344 (phases[i].value != (status & PHASE_MASK)); ++i)
345 ;
346 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
347 }
348 }
349 #endif
350
351 /**
352 * NCR5380_info - report driver and host information
353 * @instance: relevant scsi host instance
354 *
355 * For use as the host template info() handler.
356 */
357
358 static const char *NCR5380_info(struct Scsi_Host *instance)
359 {
360 struct NCR5380_hostdata *hostdata = shost_priv(instance);
361
362 return hostdata->info;
363 }
364
365 /**
366 * NCR5380_init - initialise an NCR5380
367 * @instance: adapter to configure
368 * @flags: control flags
369 *
370 * Initializes *instance and corresponding 5380 chip,
371 * with flags OR'd into the initial flags value.
372 *
373 * Notes : I assume that the host, hostno, and id bits have been
374 * set correctly. I don't care about the irq and other fields.
375 *
376 * Returns 0 for success
377 */
378
379 static int NCR5380_init(struct Scsi_Host *instance, int flags)
380 {
381 struct NCR5380_hostdata *hostdata = shost_priv(instance);
382 int i;
383 unsigned long deadline;
384 unsigned long accesses_per_ms;
385
386 instance->max_lun = 7;
387
388 hostdata->host = instance;
389 hostdata->id_mask = 1 << instance->this_id;
390 hostdata->id_higher_mask = 0;
391 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
392 if (i > hostdata->id_mask)
393 hostdata->id_higher_mask |= i;
394 for (i = 0; i < 8; ++i)
395 hostdata->busy[i] = 0;
396 hostdata->dma_len = 0;
397
398 spin_lock_init(&hostdata->lock);
399 hostdata->connected = NULL;
400 hostdata->sensing = NULL;
401 INIT_LIST_HEAD(&hostdata->autosense);
402 INIT_LIST_HEAD(&hostdata->unissued);
403 INIT_LIST_HEAD(&hostdata->disconnected);
404
405 hostdata->flags = flags;
406
407 INIT_WORK(&hostdata->main_task, NCR5380_main);
408 hostdata->work_q = alloc_workqueue("ncr5380_%d",
409 WQ_UNBOUND | WQ_MEM_RECLAIM,
410 1, instance->host_no);
411 if (!hostdata->work_q)
412 return -ENOMEM;
413
414 snprintf(hostdata->info, sizeof(hostdata->info),
415 "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
416 instance->hostt->name, instance->irq, hostdata->io_port,
417 hostdata->base, instance->can_queue, instance->cmd_per_lun,
418 instance->sg_tablesize, instance->this_id,
419 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
420 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
421 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
422
423 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
424 NCR5380_write(MODE_REG, MR_BASE);
425 NCR5380_write(TARGET_COMMAND_REG, 0);
426 NCR5380_write(SELECT_ENABLE_REG, 0);
427
428 /* Calibrate register polling loop */
429 i = 0;
430 deadline = jiffies + 1;
431 do {
432 cpu_relax();
433 } while (time_is_after_jiffies(deadline));
434 deadline += msecs_to_jiffies(256);
435 do {
436 NCR5380_read(STATUS_REG);
437 ++i;
438 cpu_relax();
439 } while (time_is_after_jiffies(deadline));
440 accesses_per_ms = i / 256;
441 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
442
443 return 0;
444 }
445
446 /**
447 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
448 * @instance: adapter to check
449 *
450 * If the system crashed, it may have crashed with a connected target and
451 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
452 * currently established nexus, which we know nothing about. Failing that
453 * do a bus reset.
454 *
455 * Note that a bus reset will cause the chip to assert IRQ.
456 *
457 * Returns 0 if successful, otherwise -ENXIO.
458 */
459
460 static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
461 {
462 struct NCR5380_hostdata *hostdata = shost_priv(instance);
463 int pass;
464
465 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
466 switch (pass) {
467 case 1:
468 case 3:
469 case 5:
470 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
471 NCR5380_poll_politely(hostdata,
472 STATUS_REG, SR_BSY, 0, 5 * HZ);
473 break;
474 case 2:
475 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
476 do_abort(instance);
477 break;
478 case 4:
479 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
480 do_reset(instance);
481 /* Wait after a reset; the SCSI standard calls for
482 * 250ms, we wait 500ms to be on the safe side.
483 * But some Toshiba CD-ROMs need ten times that.
484 */
485 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
486 msleep(2500);
487 else
488 msleep(500);
489 break;
490 case 6:
491 shost_printk(KERN_ERR, instance, "bus locked solid\n");
492 return -ENXIO;
493 }
494 }
495 return 0;
496 }
497
498 /**
499 * NCR5380_exit - remove an NCR5380
500 * @instance: adapter to remove
501 *
502 * Assumes that no more work can be queued (e.g. by NCR5380_intr).
503 */
504
505 static void NCR5380_exit(struct Scsi_Host *instance)
506 {
507 struct NCR5380_hostdata *hostdata = shost_priv(instance);
508
509 cancel_work_sync(&hostdata->main_task);
510 destroy_workqueue(hostdata->work_q);
511 }
512
513 /**
514 * complete_cmd - finish processing a command and return it to the SCSI ML
515 * @instance: the host instance
516 * @cmd: command to complete
517 */
518
519 static void complete_cmd(struct Scsi_Host *instance,
520 struct scsi_cmnd *cmd)
521 {
522 struct NCR5380_hostdata *hostdata = shost_priv(instance);
523
524 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
525
526 if (hostdata->sensing == cmd) {
527 /* Autosense processing ends here */
528 if (status_byte(cmd->result) != GOOD) {
529 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
530 } else {
531 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
532 set_driver_byte(cmd, DRIVER_SENSE);
533 }
534 hostdata->sensing = NULL;
535 }
536
537 cmd->scsi_done(cmd);
538 }
539
540 /**
541 * NCR5380_queue_command - queue a command
542 * @instance: the relevant SCSI adapter
543 * @cmd: SCSI command
544 *
545 * cmd is added to the per-instance issue queue, with minor
546 * twiddling done to the host specific fields of cmd. If the
547 * main coroutine is not running, it is restarted.
548 */
549
550 static int NCR5380_queue_command(struct Scsi_Host *instance,
551 struct scsi_cmnd *cmd)
552 {
553 struct NCR5380_hostdata *hostdata = shost_priv(instance);
554 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
555 unsigned long flags;
556
557 #if (NDEBUG & NDEBUG_NO_WRITE)
558 switch (cmd->cmnd[0]) {
559 case WRITE_6:
560 case WRITE_10:
561 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
562 cmd->result = (DID_ERROR << 16);
563 cmd->scsi_done(cmd);
564 return 0;
565 }
566 #endif /* (NDEBUG & NDEBUG_NO_WRITE) */
567
568 cmd->result = 0;
569
570 if (!NCR5380_acquire_dma_irq(instance))
571 return SCSI_MLQUEUE_HOST_BUSY;
572
573 spin_lock_irqsave(&hostdata->lock, flags);
574
575 /*
576 * Insert the cmd into the issue queue. Note that REQUEST SENSE
577 * commands are added to the head of the queue since any command will
578 * clear the contingent allegiance condition that exists and the
579 * sense data is only guaranteed to be valid while the condition exists.
580 */
581
582 if (cmd->cmnd[0] == REQUEST_SENSE)
583 list_add(&ncmd->list, &hostdata->unissued);
584 else
585 list_add_tail(&ncmd->list, &hostdata->unissued);
586
587 spin_unlock_irqrestore(&hostdata->lock, flags);
588
589 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
590 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
591
592 /* Kick off command processing */
593 queue_work(hostdata->work_q, &hostdata->main_task);
594 return 0;
595 }
596
597 static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
598 {
599 struct NCR5380_hostdata *hostdata = shost_priv(instance);
600
601 /* Caller does the locking needed to set & test these data atomically */
602 if (list_empty(&hostdata->disconnected) &&
603 list_empty(&hostdata->unissued) &&
604 list_empty(&hostdata->autosense) &&
605 !hostdata->connected &&
606 !hostdata->selecting) {
607 NCR5380_release_dma_irq(instance);
608 }
609 }
610
611 /**
612 * dequeue_next_cmd - dequeue a command for processing
613 * @instance: the scsi host instance
614 *
615 * Priority is given to commands on the autosense queue. These commands
616 * need autosense because of a CHECK CONDITION result.
617 *
618 * Returns a command pointer if a command is found for a target that is
619 * not already busy. Otherwise returns NULL.
620 */
621
622 static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
623 {
624 struct NCR5380_hostdata *hostdata = shost_priv(instance);
625 struct NCR5380_cmd *ncmd;
626 struct scsi_cmnd *cmd;
627
628 if (hostdata->sensing || list_empty(&hostdata->autosense)) {
629 list_for_each_entry(ncmd, &hostdata->unissued, list) {
630 cmd = NCR5380_to_scmd(ncmd);
631 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
632 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
633
634 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
635 list_del(&ncmd->list);
636 dsprintk(NDEBUG_QUEUES, instance,
637 "dequeue: removed %p from issue queue\n", cmd);
638 return cmd;
639 }
640 }
641 } else {
642 /* Autosense processing begins here */
643 ncmd = list_first_entry(&hostdata->autosense,
644 struct NCR5380_cmd, list);
645 list_del(&ncmd->list);
646 cmd = NCR5380_to_scmd(ncmd);
647 dsprintk(NDEBUG_QUEUES, instance,
648 "dequeue: removed %p from autosense queue\n", cmd);
649 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
650 hostdata->sensing = cmd;
651 return cmd;
652 }
653 return NULL;
654 }
655
656 static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
657 {
658 struct NCR5380_hostdata *hostdata = shost_priv(instance);
659 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
660
661 if (hostdata->sensing == cmd) {
662 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
663 list_add(&ncmd->list, &hostdata->autosense);
664 hostdata->sensing = NULL;
665 } else
666 list_add(&ncmd->list, &hostdata->unissued);
667 }
668
669 /**
670 * NCR5380_main - NCR state machines
671 *
672 * NCR5380_main is a coroutine that runs as long as more work can
673 * be done on the NCR5380 host adapters in a system. Both
674 * NCR5380_queue_command() and NCR5380_intr() will try to start it
675 * in case it is not running.
676 */
677
678 static void NCR5380_main(struct work_struct *work)
679 {
680 struct NCR5380_hostdata *hostdata =
681 container_of(work, struct NCR5380_hostdata, main_task);
682 struct Scsi_Host *instance = hostdata->host;
683 int done;
684
685 do {
686 done = 1;
687
688 spin_lock_irq(&hostdata->lock);
689 while (!hostdata->connected && !hostdata->selecting) {
690 struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
691
692 if (!cmd)
693 break;
694
695 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
696
697 /*
698 * Attempt to establish an I_T_L nexus here.
699 * On success, instance->hostdata->connected is set.
700 * On failure, we must add the command back to the
701 * issue queue so we can keep trying.
702 */
703 /*
704 * REQUEST SENSE commands are issued without tagged
705 * queueing, even on SCSI-II devices because the
706 * contingent allegiance condition exists for the
707 * entire unit.
708 */
709
710 if (!NCR5380_select(instance, cmd)) {
711 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
712 maybe_release_dma_irq(instance);
713 } else {
714 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
715 "main: select failed, returning %p to queue\n", cmd);
716 requeue_cmd(instance, cmd);
717 }
718 }
719 if (hostdata->connected && !hostdata->dma_len) {
720 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
721 NCR5380_information_transfer(instance);
722 done = 0;
723 }
724 if (!hostdata->connected)
725 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
726 spin_unlock_irq(&hostdata->lock);
727 if (!done)
728 cond_resched();
729 } while (!done);
730 }
731
732 /*
733 * NCR5380_dma_complete - finish DMA transfer
734 * @instance: the scsi host instance
735 *
736 * Called by the interrupt handler when DMA finishes or a phase
737 * mismatch occurs (which would end the DMA transfer).
738 */
739
740 static void NCR5380_dma_complete(struct Scsi_Host *instance)
741 {
742 struct NCR5380_hostdata *hostdata = shost_priv(instance);
743 int transferred;
744 unsigned char **data;
745 int *count;
746 int saved_data = 0, overrun = 0;
747 unsigned char p;
748
749 if (hostdata->read_overruns) {
750 p = hostdata->connected->SCp.phase;
751 if (p & SR_IO) {
752 udelay(10);
753 if ((NCR5380_read(BUS_AND_STATUS_REG) &
754 (BASR_PHASE_MATCH | BASR_ACK)) ==
755 (BASR_PHASE_MATCH | BASR_ACK)) {
756 saved_data = NCR5380_read(INPUT_DATA_REG);
757 overrun = 1;
758 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
759 }
760 }
761 }
762
763 #ifdef CONFIG_SUN3
764 if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) {
765 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
766 instance->host_no);
767 BUG();
768 }
769
770 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
771 (BASR_PHASE_MATCH | BASR_ACK)) {
772 pr_err("scsi%d: BASR %02x\n", instance->host_no,
773 NCR5380_read(BUS_AND_STATUS_REG));
774 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
775 instance->host_no);
776 BUG();
777 }
778 #endif
779
780 NCR5380_write(MODE_REG, MR_BASE);
781 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
782 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
783
784 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
785 hostdata->dma_len = 0;
786
787 data = (unsigned char **)&hostdata->connected->SCp.ptr;
788 count = &hostdata->connected->SCp.this_residual;
789 *data += transferred;
790 *count -= transferred;
791
792 if (hostdata->read_overruns) {
793 int cnt, toPIO;
794
795 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
796 cnt = toPIO = hostdata->read_overruns;
797 if (overrun) {
798 dsprintk(NDEBUG_DMA, instance,
799 "Got an input overrun, using saved byte\n");
800 *(*data)++ = saved_data;
801 (*count)--;
802 cnt--;
803 toPIO--;
804 }
805 if (toPIO > 0) {
806 dsprintk(NDEBUG_DMA, instance,
807 "Doing %d byte PIO to 0x%p\n", cnt, *data);
808 NCR5380_transfer_pio(instance, &p, &cnt, data);
809 *count -= toPIO - cnt;
810 }
811 }
812 }
813 }
814
815 /**
816 * NCR5380_intr - generic NCR5380 irq handler
817 * @irq: interrupt number
818 * @dev_id: device info
819 *
820 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
821 * from the disconnected queue, and restarting NCR5380_main()
822 * as required.
823 *
824 * The chip can assert IRQ in any of six different conditions. The IRQ flag
825 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
826 * Three of these six conditions are latched in the Bus and Status Register:
827 * - End of DMA (cleared by ending DMA Mode)
828 * - Parity error (cleared by reading RPIR)
829 * - Loss of BSY (cleared by reading RPIR)
830 * Two conditions have flag bits that are not latched:
831 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
832 * - Bus reset (non-maskable)
833 * The remaining condition has no flag bit at all:
834 * - Selection/reselection
835 *
836 * Hence, establishing the cause(s) of any interrupt is partly guesswork.
837 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
838 * claimed that "the design of the [DP8490] interrupt logic ensures
839 * interrupts will not be lost (they can be on the DP5380)."
840 * The L5380/53C80 datasheet from LOGIC Devices has more details.
841 *
842 * Checking for bus reset by reading RST is futile because of interrupt
843 * latency, but a bus reset will reset chip logic. Checking for parity error
844 * is unnecessary because that interrupt is never enabled. A Loss of BSY
845 * condition will clear DMA Mode. We can tell when this occurs because the
846 * the Busy Monitor interrupt is enabled together with DMA Mode.
847 */
848
849 static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
850 {
851 struct Scsi_Host *instance = dev_id;
852 struct NCR5380_hostdata *hostdata = shost_priv(instance);
853 int handled = 0;
854 unsigned char basr;
855 unsigned long flags;
856
857 spin_lock_irqsave(&hostdata->lock, flags);
858
859 basr = NCR5380_read(BUS_AND_STATUS_REG);
860 if (basr & BASR_IRQ) {
861 unsigned char mr = NCR5380_read(MODE_REG);
862 unsigned char sr = NCR5380_read(STATUS_REG);
863
864 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
865 irq, basr, sr, mr);
866
867 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
868 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
869 * We ack IRQ after clearing Mode Register. Workarounds
870 * for End of DMA errata need to happen in DMA Mode.
871 */
872
873 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
874
875 if (hostdata->connected) {
876 NCR5380_dma_complete(instance);
877 queue_work(hostdata->work_q, &hostdata->main_task);
878 } else {
879 NCR5380_write(MODE_REG, MR_BASE);
880 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
881 }
882 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
883 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
884 /* Probably reselected */
885 NCR5380_write(SELECT_ENABLE_REG, 0);
886 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
887
888 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
889
890 if (!hostdata->connected) {
891 NCR5380_reselect(instance);
892 queue_work(hostdata->work_q, &hostdata->main_task);
893 }
894 if (!hostdata->connected)
895 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
896 } else {
897 /* Probably Bus Reset */
898 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
899
900 if (sr & SR_RST) {
901 /* Certainly Bus Reset */
902 shost_printk(KERN_WARNING, instance,
903 "bus reset interrupt\n");
904 bus_reset_cleanup(instance);
905 } else {
906 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
907 }
908 #ifdef SUN3_SCSI_VME
909 dregs->csr |= CSR_DMA_ENABLE;
910 #endif
911 }
912 handled = 1;
913 } else {
914 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
915 #ifdef SUN3_SCSI_VME
916 dregs->csr |= CSR_DMA_ENABLE;
917 #endif
918 }
919
920 spin_unlock_irqrestore(&hostdata->lock, flags);
921
922 return IRQ_RETVAL(handled);
923 }
924
925 /**
926 * NCR5380_select - attempt arbitration and selection for a given command
927 * @instance: the Scsi_Host instance
928 * @cmd: the scsi_cmnd to execute
929 *
930 * This routine establishes an I_T_L nexus for a SCSI command. This involves
931 * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message.
932 *
933 * Returns true if the operation should be retried.
934 * Returns false if it should not be retried.
935 *
936 * Side effects :
937 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
938 * with registers as they should have been on entry - ie
939 * SELECT_ENABLE will be set appropriately, the NCR5380
940 * will cease to drive any SCSI bus signals.
941 *
942 * If successful : the I_T_L nexus will be established, and
943 * hostdata->connected will be set to cmd.
944 * SELECT interrupt will be disabled.
945 *
946 * If failed (no target) : cmd->scsi_done() will be called, and the
947 * cmd->result host byte set to DID_BAD_TARGET.
948 */
949
950 static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
951 __releases(&hostdata->lock) __acquires(&hostdata->lock)
952 {
953 struct NCR5380_hostdata *hostdata = shost_priv(instance);
954 unsigned char tmp[3], phase;
955 unsigned char *data;
956 int len;
957 int err;
958 bool ret = true;
959 bool can_disconnect = instance->irq != NO_IRQ &&
960 cmd->cmnd[0] != REQUEST_SENSE &&
961 (disconnect_mask & BIT(scmd_id(cmd)));
962
963 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
964 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
965 instance->this_id);
966
967 /*
968 * Arbitration and selection phases are slow and involve dropping the
969 * lock, so we have to watch out for EH. An exception handler may
970 * change 'selecting' to NULL. This function will then return false
971 * so that the caller will forget about 'cmd'. (During information
972 * transfer phases, EH may change 'connected' to NULL.)
973 */
974 hostdata->selecting = cmd;
975
976 /*
977 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
978 * data bus during SELECTION.
979 */
980
981 NCR5380_write(TARGET_COMMAND_REG, 0);
982
983 /*
984 * Start arbitration.
985 */
986
987 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
988 NCR5380_write(MODE_REG, MR_ARBITRATE);
989
990 /* The chip now waits for BUS FREE phase. Then after the 800 ns
991 * Bus Free Delay, arbitration will begin.
992 */
993
994 spin_unlock_irq(&hostdata->lock);
995 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
996 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
997 ICR_ARBITRATION_PROGRESS, HZ);
998 spin_lock_irq(&hostdata->lock);
999 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1000 /* Reselection interrupt */
1001 goto out;
1002 }
1003 if (!hostdata->selecting) {
1004 /* Command was aborted */
1005 NCR5380_write(MODE_REG, MR_BASE);
1006 return false;
1007 }
1008 if (err < 0) {
1009 NCR5380_write(MODE_REG, MR_BASE);
1010 shost_printk(KERN_ERR, instance,
1011 "select: arbitration timeout\n");
1012 goto out;
1013 }
1014 spin_unlock_irq(&hostdata->lock);
1015
1016 /* The SCSI-2 arbitration delay is 2.4 us */
1017 udelay(3);
1018
1019 /* Check for lost arbitration */
1020 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1021 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1022 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1023 NCR5380_write(MODE_REG, MR_BASE);
1024 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
1025 spin_lock_irq(&hostdata->lock);
1026 goto out;
1027 }
1028
1029 /* After/during arbitration, BSY should be asserted.
1030 * IBM DPES-31080 Version S31Q works now
1031 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1032 */
1033 NCR5380_write(INITIATOR_COMMAND_REG,
1034 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1035
1036 /*
1037 * Again, bus clear + bus settle time is 1.2us, however, this is
1038 * a minimum so we'll udelay ceil(1.2)
1039 */
1040
1041 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1042 udelay(15);
1043 else
1044 udelay(2);
1045
1046 spin_lock_irq(&hostdata->lock);
1047
1048 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1049 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
1050 goto out;
1051
1052 if (!hostdata->selecting) {
1053 NCR5380_write(MODE_REG, MR_BASE);
1054 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1055 return false;
1056 }
1057
1058 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1059
1060 /*
1061 * Now that we have won arbitration, start Selection process, asserting
1062 * the host and target ID's on the SCSI bus.
1063 */
1064
1065 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1066
1067 /*
1068 * Raise ATN while SEL is true before BSY goes false from arbitration,
1069 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1070 * phase immediately after selection.
1071 */
1072
1073 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1074 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1075 NCR5380_write(MODE_REG, MR_BASE);
1076
1077 /*
1078 * Reselect interrupts must be turned off prior to the dropping of BSY,
1079 * otherwise we will trigger an interrupt.
1080 */
1081 NCR5380_write(SELECT_ENABLE_REG, 0);
1082
1083 spin_unlock_irq(&hostdata->lock);
1084
1085 /*
1086 * The initiator shall then wait at least two deskew delays and release
1087 * the BSY signal.
1088 */
1089 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1090
1091 /* Reset BSY */
1092 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1093 ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1094
1095 /*
1096 * Something weird happens when we cease to drive BSY - looks
1097 * like the board/chip is letting us do another read before the
1098 * appropriate propagation delay has expired, and we're confusing
1099 * a BSY signal from ourselves as the target's response to SELECTION.
1100 *
1101 * A small delay (the 'C++' frontend breaks the pipeline with an
1102 * unnecessary jump, making it work on my 386-33/Trantor T128, the
1103 * tighter 'C' code breaks and requires this) solves the problem -
1104 * the 1 us delay is arbitrary, and only used because this delay will
1105 * be the same on other platforms and since it works here, it should
1106 * work there.
1107 *
1108 * wingel suggests that this could be due to failing to wait
1109 * one deskew delay.
1110 */
1111
1112 udelay(1);
1113
1114 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1115
1116 /*
1117 * The SCSI specification calls for a 250 ms timeout for the actual
1118 * selection.
1119 */
1120
1121 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
1122 msecs_to_jiffies(250));
1123
1124 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1125 spin_lock_irq(&hostdata->lock);
1126 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1127 NCR5380_reselect(instance);
1128 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
1129 goto out;
1130 }
1131
1132 if (err < 0) {
1133 spin_lock_irq(&hostdata->lock);
1134 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1135
1136 /* Can't touch cmd if it has been reclaimed by the scsi ML */
1137 if (!hostdata->selecting)
1138 return false;
1139
1140 cmd->result = DID_BAD_TARGET << 16;
1141 complete_cmd(instance, cmd);
1142 dsprintk(NDEBUG_SELECTION, instance,
1143 "target did not respond within 250ms\n");
1144 ret = false;
1145 goto out;
1146 }
1147
1148 /*
1149 * No less than two deskew delays after the initiator detects the
1150 * BSY signal is true, it shall release the SEL signal and may
1151 * change the DATA BUS. -wingel
1152 */
1153
1154 udelay(1);
1155
1156 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1157
1158 /*
1159 * Since we followed the SCSI spec, and raised ATN while SEL
1160 * was true but before BSY was false during selection, the information
1161 * transfer phase should be a MESSAGE OUT phase so that we can send the
1162 * IDENTIFY message.
1163 */
1164
1165 /* Wait for start of REQ/ACK handshake */
1166
1167 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1168 spin_lock_irq(&hostdata->lock);
1169 if (err < 0) {
1170 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1171 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1172 goto out;
1173 }
1174 if (!hostdata->selecting) {
1175 do_abort(instance);
1176 return false;
1177 }
1178
1179 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1180 scmd_id(cmd));
1181 tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun);
1182
1183 len = 1;
1184 data = tmp;
1185 phase = PHASE_MSGOUT;
1186 NCR5380_transfer_pio(instance, &phase, &len, &data);
1187 if (len) {
1188 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1189 cmd->result = DID_ERROR << 16;
1190 complete_cmd(instance, cmd);
1191 dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
1192 ret = false;
1193 goto out;
1194 }
1195
1196 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1197
1198 hostdata->connected = cmd;
1199 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1200
1201 #ifdef SUN3_SCSI_VME
1202 dregs->csr |= CSR_INTR;
1203 #endif
1204
1205 initialize_SCp(cmd);
1206
1207 ret = false;
1208
1209 out:
1210 if (!hostdata->selecting)
1211 return false;
1212 hostdata->selecting = NULL;
1213 return ret;
1214 }
1215
1216 /*
1217 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
1218 * unsigned char *phase, int *count, unsigned char **data)
1219 *
1220 * Purpose : transfers data in given phase using polled I/O
1221 *
1222 * Inputs : instance - instance of driver, *phase - pointer to
1223 * what phase is expected, *count - pointer to number of
1224 * bytes to transfer, **data - pointer to data pointer.
1225 *
1226 * Returns : -1 when different phase is entered without transferring
1227 * maximum number of bytes, 0 if all bytes are transferred or exit
1228 * is in same phase.
1229 *
1230 * Also, *phase, *count, *data are modified in place.
1231 *
1232 * XXX Note : handling for bus free may be useful.
1233 */
1234
1235 /*
1236 * Note : this code is not as quick as it could be, however it
1237 * IS 100% reliable, and for the actual data transfer where speed
1238 * counts, we will always do a pseudo DMA or DMA transfer.
1239 */
1240
1241 static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1242 unsigned char *phase, int *count,
1243 unsigned char **data)
1244 {
1245 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1246 unsigned char p = *phase, tmp;
1247 int c = *count;
1248 unsigned char *d = *data;
1249
1250 /*
1251 * The NCR5380 chip will only drive the SCSI bus when the
1252 * phase specified in the appropriate bits of the TARGET COMMAND
1253 * REGISTER match the STATUS REGISTER
1254 */
1255
1256 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1257
1258 do {
1259 /*
1260 * Wait for assertion of REQ, after which the phase bits will be
1261 * valid
1262 */
1263
1264 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1265 break;
1266
1267 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1268
1269 /* Check for phase mismatch */
1270 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
1271 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1272 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1273 break;
1274 }
1275
1276 /* Do actual transfer from SCSI bus to / from memory */
1277 if (!(p & SR_IO))
1278 NCR5380_write(OUTPUT_DATA_REG, *d);
1279 else
1280 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1281
1282 ++d;
1283
1284 /*
1285 * The SCSI standard suggests that in MSGOUT phase, the initiator
1286 * should drop ATN on the last byte of the message phase
1287 * after REQ has been asserted for the handshake but before
1288 * the initiator raises ACK.
1289 */
1290
1291 if (!(p & SR_IO)) {
1292 if (!((p & SR_MSG) && c > 1)) {
1293 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1294 NCR5380_dprint(NDEBUG_PIO, instance);
1295 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1296 ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1297 } else {
1298 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1299 ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1300 NCR5380_dprint(NDEBUG_PIO, instance);
1301 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1302 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1303 }
1304 } else {
1305 NCR5380_dprint(NDEBUG_PIO, instance);
1306 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1307 }
1308
1309 if (NCR5380_poll_politely(hostdata,
1310 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1311 break;
1312
1313 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1314
1315 /*
1316 * We have several special cases to consider during REQ/ACK handshaking :
1317 * 1. We were in MSGOUT phase, and we are on the last byte of the
1318 * message. ATN must be dropped as ACK is dropped.
1319 *
1320 * 2. We are in a MSGIN phase, and we are on the last byte of the
1321 * message. We must exit with ACK asserted, so that the calling
1322 * code may raise ATN before dropping ACK to reject the message.
1323 *
1324 * 3. ACK and ATN are clear and the target may proceed as normal.
1325 */
1326 if (!(p == PHASE_MSGIN && c == 1)) {
1327 if (p == PHASE_MSGOUT && c > 1)
1328 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1329 else
1330 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1331 }
1332 } while (--c);
1333
1334 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1335
1336 *count = c;
1337 *data = d;
1338 tmp = NCR5380_read(STATUS_REG);
1339 /* The phase read from the bus is valid if either REQ is (already)
1340 * asserted or if ACK hasn't been released yet. The latter applies if
1341 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1342 */
1343 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1344 *phase = tmp & PHASE_MASK;
1345 else
1346 *phase = PHASE_UNKNOWN;
1347
1348 if (!c || (*phase == p))
1349 return 0;
1350 else
1351 return -1;
1352 }
1353
1354 /**
1355 * do_reset - issue a reset command
1356 * @instance: adapter to reset
1357 *
1358 * Issue a reset sequence to the NCR5380 and try and get the bus
1359 * back into sane shape.
1360 *
1361 * This clears the reset interrupt flag because there may be no handler for
1362 * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1363 * been installed. And when in EH we may have released the ST DMA interrupt.
1364 */
1365
1366 static void do_reset(struct Scsi_Host *instance)
1367 {
1368 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
1369 unsigned long flags;
1370
1371 local_irq_save(flags);
1372 NCR5380_write(TARGET_COMMAND_REG,
1373 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1374 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
1375 udelay(50);
1376 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1377 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1378 local_irq_restore(flags);
1379 }
1380
1381 /**
1382 * do_abort - abort the currently established nexus by going to
1383 * MESSAGE OUT phase and sending an ABORT message.
1384 * @instance: relevant scsi host instance
1385 *
1386 * Returns 0 on success, -1 on failure.
1387 */
1388
1389 static int do_abort(struct Scsi_Host *instance)
1390 {
1391 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1392 unsigned char *msgptr, phase, tmp;
1393 int len;
1394 int rc;
1395
1396 /* Request message out phase */
1397 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1398
1399 /*
1400 * Wait for the target to indicate a valid phase by asserting
1401 * REQ. Once this happens, we'll have either a MSGOUT phase
1402 * and can immediately send the ABORT message, or we'll have some
1403 * other phase and will have to source/sink data.
1404 *
1405 * We really don't care what value was on the bus or what value
1406 * the target sees, so we just handshake.
1407 */
1408
1409 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1410 if (rc < 0)
1411 goto timeout;
1412
1413 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
1414
1415 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1416
1417 if (tmp != PHASE_MSGOUT) {
1418 NCR5380_write(INITIATOR_COMMAND_REG,
1419 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1420 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ);
1421 if (rc < 0)
1422 goto timeout;
1423 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1424 }
1425
1426 tmp = ABORT;
1427 msgptr = &tmp;
1428 len = 1;
1429 phase = PHASE_MSGOUT;
1430 NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1431
1432 /*
1433 * If we got here, and the command completed successfully,
1434 * we're about to go into bus free state.
1435 */
1436
1437 return len ? -1 : 0;
1438
1439 timeout:
1440 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1441 return -1;
1442 }
1443
1444 /*
1445 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
1446 * unsigned char *phase, int *count, unsigned char **data)
1447 *
1448 * Purpose : transfers data in given phase using either real
1449 * or pseudo DMA.
1450 *
1451 * Inputs : instance - instance of driver, *phase - pointer to
1452 * what phase is expected, *count - pointer to number of
1453 * bytes to transfer, **data - pointer to data pointer.
1454 *
1455 * Returns : -1 when different phase is entered without transferring
1456 * maximum number of bytes, 0 if all bytes or transferred or exit
1457 * is in same phase.
1458 *
1459 * Also, *phase, *count, *data are modified in place.
1460 */
1461
1462
1463 static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1464 unsigned char *phase, int *count,
1465 unsigned char **data)
1466 {
1467 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1468 int c = *count;
1469 unsigned char p = *phase;
1470 unsigned char *d = *data;
1471 unsigned char tmp;
1472 int result = 0;
1473
1474 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1475 *phase = tmp;
1476 return -1;
1477 }
1478
1479 hostdata->connected->SCp.phase = p;
1480
1481 if (p & SR_IO) {
1482 if (hostdata->read_overruns)
1483 c -= hostdata->read_overruns;
1484 else if (hostdata->flags & FLAG_DMA_FIXUP)
1485 --c;
1486 }
1487
1488 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1489 (p & SR_IO) ? "receive" : "send", c, d);
1490
1491 #ifdef CONFIG_SUN3
1492 /* send start chain */
1493 sun3scsi_dma_start(c, *data);
1494 #endif
1495
1496 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1497 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1498 MR_ENABLE_EOP_INTR);
1499
1500 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1501 /* On the Medusa, it is a must to initialize the DMA before
1502 * starting the NCR. This is also the cleaner way for the TT.
1503 */
1504 if (p & SR_IO)
1505 result = NCR5380_dma_recv_setup(hostdata, d, c);
1506 else
1507 result = NCR5380_dma_send_setup(hostdata, d, c);
1508 }
1509
1510 /*
1511 * On the PAS16 at least I/O recovery delays are not needed here.
1512 * Everyone else seems to want them.
1513 */
1514
1515 if (p & SR_IO) {
1516 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1517 NCR5380_io_delay(1);
1518 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1519 } else {
1520 NCR5380_io_delay(1);
1521 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1522 NCR5380_io_delay(1);
1523 NCR5380_write(START_DMA_SEND_REG, 0);
1524 NCR5380_io_delay(1);
1525 }
1526
1527 #ifdef CONFIG_SUN3
1528 #ifdef SUN3_SCSI_VME
1529 dregs->csr |= CSR_DMA_ENABLE;
1530 #endif
1531 sun3_dma_active = 1;
1532 #endif
1533
1534 if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1535 /* On the Falcon, the DMA setup must be done after the last
1536 * NCR access, else the DMA setup gets trashed!
1537 */
1538 if (p & SR_IO)
1539 result = NCR5380_dma_recv_setup(hostdata, d, c);
1540 else
1541 result = NCR5380_dma_send_setup(hostdata, d, c);
1542 }
1543
1544 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
1545 if (result < 0)
1546 return result;
1547
1548 /* For real DMA, result is the byte count. DMA interrupt is expected. */
1549 if (result > 0) {
1550 hostdata->dma_len = result;
1551 return 0;
1552 }
1553
1554 /* The result is zero iff pseudo DMA send/receive was completed. */
1555 hostdata->dma_len = c;
1556
1557 /*
1558 * A note regarding the DMA errata workarounds for early NMOS silicon.
1559 *
1560 * For DMA sends, we want to wait until the last byte has been
1561 * transferred out over the bus before we turn off DMA mode. Alas, there
1562 * seems to be no terribly good way of doing this on a 5380 under all
1563 * conditions. For non-scatter-gather operations, we can wait until REQ
1564 * and ACK both go false, or until a phase mismatch occurs. Gather-sends
1565 * are nastier, since the device will be expecting more data than we
1566 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
1567 * could test Last Byte Sent to assure transfer (I imagine this is precisely
1568 * why this signal was added to the newer chips) but on the older 538[01]
1569 * this signal does not exist. The workaround for this lack is a watchdog;
1570 * we bail out of the wait-loop after a modest amount of wait-time if
1571 * the usual exit conditions are not met. Not a terribly clean or
1572 * correct solution :-%
1573 *
1574 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1575 * If the chip is in DMA receive mode, it will respond to a target's
1576 * REQ by latching the SCSI data into the INPUT DATA register and asserting
1577 * ACK, even if it has _already_ been notified by the DMA controller that
1578 * the current DMA transfer has completed! If the NCR5380 is then taken
1579 * out of DMA mode, this already-acknowledged byte is lost. This is
1580 * not a problem for "one DMA transfer per READ command", because
1581 * the situation will never arise... either all of the data is DMA'ed
1582 * properly, or the target switches to MESSAGE IN phase to signal a
1583 * disconnection (either operation bringing the DMA to a clean halt).
1584 * However, in order to handle scatter-receive, we must work around the
1585 * problem. The chosen fix is to DMA fewer bytes, then check for the
1586 * condition before taking the NCR5380 out of DMA mode. One or two extra
1587 * bytes are transferred via PIO as necessary to fill out the original
1588 * request.
1589 */
1590
1591 if (hostdata->flags & FLAG_DMA_FIXUP) {
1592 if (p & SR_IO) {
1593 /*
1594 * The workaround was to transfer fewer bytes than we
1595 * intended to with the pseudo-DMA read function, wait for
1596 * the chip to latch the last byte, read it, and then disable
1597 * pseudo-DMA mode.
1598 *
1599 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1600 * REQ is deasserted when ACK is asserted, and not reasserted
1601 * until ACK goes false. Since the NCR5380 won't lower ACK
1602 * until DACK is asserted, which won't happen unless we twiddle
1603 * the DMA port or we take the NCR5380 out of DMA mode, we
1604 * can guarantee that we won't handshake another extra
1605 * byte.
1606 */
1607
1608 if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
1609 BASR_DRQ, BASR_DRQ, HZ) < 0) {
1610 result = -1;
1611 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1612 }
1613 if (NCR5380_poll_politely(hostdata, STATUS_REG,
1614 SR_REQ, 0, HZ) < 0) {
1615 result = -1;
1616 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1617 }
1618 d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
1619 } else {
1620 /*
1621 * Wait for the last byte to be sent. If REQ is being asserted for
1622 * the byte we're interested, we'll ACK it and it will go false.
1623 */
1624 if (NCR5380_poll_politely2(hostdata,
1625 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1626 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
1627 result = -1;
1628 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1629 }
1630 }
1631 }
1632
1633 NCR5380_dma_complete(instance);
1634 return result;
1635 }
1636
1637 /*
1638 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1639 *
1640 * Purpose : run through the various SCSI phases and do as the target
1641 * directs us to. Operates on the currently connected command,
1642 * instance->connected.
1643 *
1644 * Inputs : instance, instance for which we are doing commands
1645 *
1646 * Side effects : SCSI things happen, the disconnected queue will be
1647 * modified if a command disconnects, *instance->connected will
1648 * change.
1649 *
1650 * XXX Note : we need to watch for bus free or a reset condition here
1651 * to recover from an unexpected bus free condition.
1652 */
1653
1654 static void NCR5380_information_transfer(struct Scsi_Host *instance)
1655 __releases(&hostdata->lock) __acquires(&hostdata->lock)
1656 {
1657 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1658 unsigned char msgout = NOP;
1659 int sink = 0;
1660 int len;
1661 int transfersize;
1662 unsigned char *data;
1663 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
1664 struct scsi_cmnd *cmd;
1665
1666 #ifdef SUN3_SCSI_VME
1667 dregs->csr |= CSR_INTR;
1668 #endif
1669
1670 while ((cmd = hostdata->connected)) {
1671 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1672
1673 tmp = NCR5380_read(STATUS_REG);
1674 /* We only have a valid SCSI phase when REQ is asserted */
1675 if (tmp & SR_REQ) {
1676 phase = (tmp & PHASE_MASK);
1677 if (phase != old_phase) {
1678 old_phase = phase;
1679 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1680 }
1681 #ifdef CONFIG_SUN3
1682 if (phase == PHASE_CMDOUT &&
1683 sun3_dma_setup_done != cmd) {
1684 int count;
1685
1686 advance_sg_buffer(cmd);
1687
1688 count = sun3scsi_dma_xfer_len(hostdata, cmd);
1689
1690 if (count > 0) {
1691 if (rq_data_dir(cmd->request))
1692 sun3scsi_dma_send_setup(hostdata,
1693 cmd->SCp.ptr, count);
1694 else
1695 sun3scsi_dma_recv_setup(hostdata,
1696 cmd->SCp.ptr, count);
1697 sun3_dma_setup_done = cmd;
1698 }
1699 #ifdef SUN3_SCSI_VME
1700 dregs->csr |= CSR_INTR;
1701 #endif
1702 }
1703 #endif /* CONFIG_SUN3 */
1704
1705 if (sink && (phase != PHASE_MSGOUT)) {
1706 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1707
1708 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1709 ICR_ASSERT_ACK);
1710 while (NCR5380_read(STATUS_REG) & SR_REQ)
1711 ;
1712 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1713 ICR_ASSERT_ATN);
1714 sink = 0;
1715 continue;
1716 }
1717
1718 switch (phase) {
1719 case PHASE_DATAOUT:
1720 #if (NDEBUG & NDEBUG_NO_DATAOUT)
1721 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1722 sink = 1;
1723 do_abort(instance);
1724 cmd->result = DID_ERROR << 16;
1725 complete_cmd(instance, cmd);
1726 hostdata->connected = NULL;
1727 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1728 return;
1729 #endif
1730 case PHASE_DATAIN:
1731 /*
1732 * If there is no room left in the current buffer in the
1733 * scatter-gather list, move onto the next one.
1734 */
1735
1736 advance_sg_buffer(cmd);
1737 dsprintk(NDEBUG_INFORMATION, instance,
1738 "this residual %d, sg ents %d\n",
1739 cmd->SCp.this_residual,
1740 sg_nents(cmd->SCp.buffer));
1741
1742 /*
1743 * The preferred transfer method is going to be
1744 * PSEUDO-DMA for systems that are strictly PIO,
1745 * since we can let the hardware do the handshaking.
1746 *
1747 * For this to work, we need to know the transfersize
1748 * ahead of time, since the pseudo-DMA code will sit
1749 * in an unconditional loop.
1750 */
1751
1752 transfersize = 0;
1753 if (!cmd->device->borken)
1754 transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
1755
1756 if (transfersize > 0) {
1757 len = transfersize;
1758 if (NCR5380_transfer_dma(instance, &phase,
1759 &len, (unsigned char **)&cmd->SCp.ptr)) {
1760 /*
1761 * If the watchdog timer fires, all future
1762 * accesses to this device will use the
1763 * polled-IO.
1764 */
1765 scmd_printk(KERN_INFO, cmd,
1766 "switching to slow handshake\n");
1767 cmd->device->borken = 1;
1768 do_reset(instance);
1769 bus_reset_cleanup(instance);
1770 }
1771 } else {
1772 /* Transfer a small chunk so that the
1773 * irq mode lock is not held too long.
1774 */
1775 transfersize = min(cmd->SCp.this_residual,
1776 NCR5380_PIO_CHUNK_SIZE);
1777 len = transfersize;
1778 NCR5380_transfer_pio(instance, &phase, &len,
1779 (unsigned char **)&cmd->SCp.ptr);
1780 cmd->SCp.this_residual -= transfersize - len;
1781 }
1782 #ifdef CONFIG_SUN3
1783 if (sun3_dma_setup_done == cmd)
1784 sun3_dma_setup_done = NULL;
1785 #endif
1786 return;
1787 case PHASE_MSGIN:
1788 len = 1;
1789 data = &tmp;
1790 NCR5380_transfer_pio(instance, &phase, &len, &data);
1791 cmd->SCp.Message = tmp;
1792
1793 switch (tmp) {
1794 case ABORT:
1795 case COMMAND_COMPLETE:
1796 /* Accept message by clearing ACK */
1797 sink = 1;
1798 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1799 dsprintk(NDEBUG_QUEUES, instance,
1800 "COMMAND COMPLETE %p target %d lun %llu\n",
1801 cmd, scmd_id(cmd), cmd->device->lun);
1802
1803 hostdata->connected = NULL;
1804 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1805
1806 cmd->result &= ~0xffff;
1807 cmd->result |= cmd->SCp.Status;
1808 cmd->result |= cmd->SCp.Message << 8;
1809
1810 if (cmd->cmnd[0] == REQUEST_SENSE)
1811 complete_cmd(instance, cmd);
1812 else {
1813 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1814 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1815 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1816 cmd);
1817 list_add_tail(&ncmd->list,
1818 &hostdata->autosense);
1819 } else
1820 complete_cmd(instance, cmd);
1821 }
1822
1823 /*
1824 * Restore phase bits to 0 so an interrupted selection,
1825 * arbitration can resume.
1826 */
1827 NCR5380_write(TARGET_COMMAND_REG, 0);
1828
1829 maybe_release_dma_irq(instance);
1830 return;
1831 case MESSAGE_REJECT:
1832 /* Accept message by clearing ACK */
1833 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1834 switch (hostdata->last_message) {
1835 case HEAD_OF_QUEUE_TAG:
1836 case ORDERED_QUEUE_TAG:
1837 case SIMPLE_QUEUE_TAG:
1838 cmd->device->simple_tags = 0;
1839 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1840 break;
1841 default:
1842 break;
1843 }
1844 break;
1845 case DISCONNECT:
1846 /* Accept message by clearing ACK */
1847 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1848 hostdata->connected = NULL;
1849 list_add(&ncmd->list, &hostdata->disconnected);
1850 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1851 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1852 cmd, scmd_id(cmd), cmd->device->lun);
1853
1854 /*
1855 * Restore phase bits to 0 so an interrupted selection,
1856 * arbitration can resume.
1857 */
1858 NCR5380_write(TARGET_COMMAND_REG, 0);
1859
1860 #ifdef SUN3_SCSI_VME
1861 dregs->csr |= CSR_DMA_ENABLE;
1862 #endif
1863 return;
1864 /*
1865 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
1866 * operation, in violation of the SCSI spec so we can safely
1867 * ignore SAVE/RESTORE pointers calls.
1868 *
1869 * Unfortunately, some disks violate the SCSI spec and
1870 * don't issue the required SAVE_POINTERS message before
1871 * disconnecting, and we have to break spec to remain
1872 * compatible.
1873 */
1874 case SAVE_POINTERS:
1875 case RESTORE_POINTERS:
1876 /* Accept message by clearing ACK */
1877 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1878 break;
1879 case EXTENDED_MESSAGE:
1880 /*
1881 * Start the message buffer with the EXTENDED_MESSAGE
1882 * byte, since spi_print_msg() wants the whole thing.
1883 */
1884 extended_msg[0] = EXTENDED_MESSAGE;
1885 /* Accept first byte by clearing ACK */
1886 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1887
1888 spin_unlock_irq(&hostdata->lock);
1889
1890 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1891
1892 len = 2;
1893 data = extended_msg + 1;
1894 phase = PHASE_MSGIN;
1895 NCR5380_transfer_pio(instance, &phase, &len, &data);
1896 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1897 (int)extended_msg[1],
1898 (int)extended_msg[2]);
1899
1900 if (!len && extended_msg[1] > 0 &&
1901 extended_msg[1] <= sizeof(extended_msg) - 2) {
1902 /* Accept third byte by clearing ACK */
1903 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1904 len = extended_msg[1] - 1;
1905 data = extended_msg + 3;
1906 phase = PHASE_MSGIN;
1907
1908 NCR5380_transfer_pio(instance, &phase, &len, &data);
1909 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1910 len);
1911
1912 switch (extended_msg[2]) {
1913 case EXTENDED_SDTR:
1914 case EXTENDED_WDTR:
1915 tmp = 0;
1916 }
1917 } else if (len) {
1918 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1919 tmp = 0;
1920 } else {
1921 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1922 extended_msg[2], extended_msg[1]);
1923 tmp = 0;
1924 }
1925
1926 spin_lock_irq(&hostdata->lock);
1927 if (!hostdata->connected)
1928 return;
1929
1930 /* Reject message */
1931 /* Fall through */
1932 default:
1933 /*
1934 * If we get something weird that we aren't expecting,
1935 * log it.
1936 */
1937 if (tmp == EXTENDED_MESSAGE)
1938 scmd_printk(KERN_INFO, cmd,
1939 "rejecting unknown extended message code %02x, length %d\n",
1940 extended_msg[2], extended_msg[1]);
1941 else if (tmp)
1942 scmd_printk(KERN_INFO, cmd,
1943 "rejecting unknown message code %02x\n",
1944 tmp);
1945
1946 msgout = MESSAGE_REJECT;
1947 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1948 break;
1949 } /* switch (tmp) */
1950 break;
1951 case PHASE_MSGOUT:
1952 len = 1;
1953 data = &msgout;
1954 hostdata->last_message = msgout;
1955 NCR5380_transfer_pio(instance, &phase, &len, &data);
1956 if (msgout == ABORT) {
1957 hostdata->connected = NULL;
1958 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1959 cmd->result = DID_ERROR << 16;
1960 complete_cmd(instance, cmd);
1961 maybe_release_dma_irq(instance);
1962 return;
1963 }
1964 msgout = NOP;
1965 break;
1966 case PHASE_CMDOUT:
1967 len = cmd->cmd_len;
1968 data = cmd->cmnd;
1969 /*
1970 * XXX for performance reasons, on machines with a
1971 * PSEUDO-DMA architecture we should probably
1972 * use the dma transfer function.
1973 */
1974 NCR5380_transfer_pio(instance, &phase, &len, &data);
1975 break;
1976 case PHASE_STATIN:
1977 len = 1;
1978 data = &tmp;
1979 NCR5380_transfer_pio(instance, &phase, &len, &data);
1980 cmd->SCp.Status = tmp;
1981 break;
1982 default:
1983 shost_printk(KERN_ERR, instance, "unknown phase\n");
1984 NCR5380_dprint(NDEBUG_ANY, instance);
1985 } /* switch(phase) */
1986 } else {
1987 spin_unlock_irq(&hostdata->lock);
1988 NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1989 spin_lock_irq(&hostdata->lock);
1990 }
1991 }
1992 }
1993
1994 /*
1995 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
1996 *
1997 * Purpose : does reselection, initializing the instance->connected
1998 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
1999 * nexus has been reestablished,
2000 *
2001 * Inputs : instance - this instance of the NCR5380.
2002 */
2003
2004 static void NCR5380_reselect(struct Scsi_Host *instance)
2005 {
2006 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2007 unsigned char target_mask;
2008 unsigned char lun;
2009 unsigned char msg[3];
2010 struct NCR5380_cmd *ncmd;
2011 struct scsi_cmnd *tmp;
2012
2013 /*
2014 * Disable arbitration, etc. since the host adapter obviously
2015 * lost, and tell an interrupted NCR5380_select() to restart.
2016 */
2017
2018 NCR5380_write(MODE_REG, MR_BASE);
2019
2020 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2021 if (!target_mask || target_mask & (target_mask - 1)) {
2022 shost_printk(KERN_WARNING, instance,
2023 "reselect: bad target_mask 0x%02x\n", target_mask);
2024 return;
2025 }
2026
2027 /*
2028 * At this point, we have detected that our SCSI ID is on the bus,
2029 * SEL is true and BSY was false for at least one bus settle delay
2030 * (400 ns).
2031 *
2032 * We must assert BSY ourselves, until the target drops the SEL
2033 * signal.
2034 */
2035
2036 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
2037 if (NCR5380_poll_politely(hostdata,
2038 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2039 shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n");
2040 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2041 return;
2042 }
2043 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2044
2045 /*
2046 * Wait for target to go into MSGIN.
2047 */
2048
2049 if (NCR5380_poll_politely(hostdata,
2050 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2051 if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0)
2052 /* BUS FREE phase */
2053 return;
2054 shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n");
2055 do_abort(instance);
2056 return;
2057 }
2058
2059 #ifdef CONFIG_SUN3
2060 /* acknowledge toggle to MSGIN */
2061 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
2062
2063 /* peek at the byte without really hitting the bus */
2064 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
2065 #else
2066 {
2067 int len = 1;
2068 unsigned char *data = msg;
2069 unsigned char phase = PHASE_MSGIN;
2070
2071 NCR5380_transfer_pio(instance, &phase, &len, &data);
2072
2073 if (len) {
2074 do_abort(instance);
2075 return;
2076 }
2077 }
2078 #endif /* CONFIG_SUN3 */
2079
2080 if (!(msg[0] & 0x80)) {
2081 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
2082 spi_print_msg(msg);
2083 printk("\n");
2084 do_abort(instance);
2085 return;
2086 }
2087 lun = msg[0] & 0x07;
2088
2089 /*
2090 * We need to add code for SCSI-II to track which devices have
2091 * I_T_L_Q nexuses established, and which have simple I_T_L
2092 * nexuses so we can chose to do additional data transfer.
2093 */
2094
2095 /*
2096 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2097 * just reestablished, and remove it from the disconnected queue.
2098 */
2099
2100 tmp = NULL;
2101 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2102 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2103
2104 if (target_mask == (1 << scmd_id(cmd)) &&
2105 lun == (u8)cmd->device->lun) {
2106 list_del(&ncmd->list);
2107 tmp = cmd;
2108 break;
2109 }
2110 }
2111
2112 if (tmp) {
2113 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2114 "reselect: removed %p from disconnected queue\n", tmp);
2115 } else {
2116 int target = ffs(target_mask) - 1;
2117
2118 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2119 target_mask, lun);
2120 /*
2121 * Since we have an established nexus that we can't do anything
2122 * with, we must abort it.
2123 */
2124 if (do_abort(instance) == 0)
2125 hostdata->busy[target] &= ~(1 << lun);
2126 return;
2127 }
2128
2129 #ifdef CONFIG_SUN3
2130 if (sun3_dma_setup_done != tmp) {
2131 int count;
2132
2133 advance_sg_buffer(tmp);
2134
2135 count = sun3scsi_dma_xfer_len(hostdata, tmp);
2136
2137 if (count > 0) {
2138 if (rq_data_dir(tmp->request))
2139 sun3scsi_dma_send_setup(hostdata,
2140 tmp->SCp.ptr, count);
2141 else
2142 sun3scsi_dma_recv_setup(hostdata,
2143 tmp->SCp.ptr, count);
2144 sun3_dma_setup_done = tmp;
2145 }
2146 }
2147
2148 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
2149 #endif /* CONFIG_SUN3 */
2150
2151 /* Accept message by clearing ACK */
2152 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2153
2154 hostdata->connected = tmp;
2155 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
2156 scmd_id(tmp), tmp->device->lun);
2157 }
2158
2159 /**
2160 * list_find_cmd - test for presence of a command in a linked list
2161 * @haystack: list of commands
2162 * @needle: command to search for
2163 */
2164
2165 static bool list_find_cmd(struct list_head *haystack,
2166 struct scsi_cmnd *needle)
2167 {
2168 struct NCR5380_cmd *ncmd;
2169
2170 list_for_each_entry(ncmd, haystack, list)
2171 if (NCR5380_to_scmd(ncmd) == needle)
2172 return true;
2173 return false;
2174 }
2175
2176 /**
2177 * list_remove_cmd - remove a command from linked list
2178 * @haystack: list of commands
2179 * @needle: command to remove
2180 */
2181
2182 static bool list_del_cmd(struct list_head *haystack,
2183 struct scsi_cmnd *needle)
2184 {
2185 if (list_find_cmd(haystack, needle)) {
2186 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2187
2188 list_del(&ncmd->list);
2189 return true;
2190 }
2191 return false;
2192 }
2193
2194 /**
2195 * NCR5380_abort - scsi host eh_abort_handler() method
2196 * @cmd: the command to be aborted
2197 *
2198 * Try to abort a given command by removing it from queues and/or sending
2199 * the target an abort message. This may not succeed in causing a target
2200 * to abort the command. Nonetheless, the low-level driver must forget about
2201 * the command because the mid-layer reclaims it and it may be re-issued.
2202 *
2203 * The normal path taken by a command is as follows. For EH we trace this
2204 * same path to locate and abort the command.
2205 *
2206 * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2207 * [disconnected -> connected ->]...
2208 * [autosense -> connected ->] done
2209 *
2210 * If cmd was not found at all then presumably it has already been completed,
2211 * in which case return SUCCESS to try to avoid further EH measures.
2212 *
2213 * If the command has not completed yet, we must not fail to find it.
2214 * We have no option but to forget the aborted command (even if it still
2215 * lacks sense data). The mid-layer may re-issue a command that is in error
2216 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
2217 * this driver are such that a command can appear on one queue only.
2218 *
2219 * The lock protects driver data structures, but EH handlers also use it
2220 * to serialize their own execution and prevent their own re-entry.
2221 */
2222
2223 static int NCR5380_abort(struct scsi_cmnd *cmd)
2224 {
2225 struct Scsi_Host *instance = cmd->device->host;
2226 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2227 unsigned long flags;
2228 int result = SUCCESS;
2229
2230 spin_lock_irqsave(&hostdata->lock, flags);
2231
2232 #if (NDEBUG & NDEBUG_ANY)
2233 scmd_printk(KERN_INFO, cmd, __func__);
2234 #endif
2235 NCR5380_dprint(NDEBUG_ANY, instance);
2236 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2237
2238 if (list_del_cmd(&hostdata->unissued, cmd)) {
2239 dsprintk(NDEBUG_ABORT, instance,
2240 "abort: removed %p from issue queue\n", cmd);
2241 cmd->result = DID_ABORT << 16;
2242 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
2243 goto out;
2244 }
2245
2246 if (hostdata->selecting == cmd) {
2247 dsprintk(NDEBUG_ABORT, instance,
2248 "abort: cmd %p == selecting\n", cmd);
2249 hostdata->selecting = NULL;
2250 cmd->result = DID_ABORT << 16;
2251 complete_cmd(instance, cmd);
2252 goto out;
2253 }
2254
2255 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2256 dsprintk(NDEBUG_ABORT, instance,
2257 "abort: removed %p from disconnected list\n", cmd);
2258 /* Can't call NCR5380_select() and send ABORT because that
2259 * means releasing the lock. Need a bus reset.
2260 */
2261 set_host_byte(cmd, DID_ERROR);
2262 complete_cmd(instance, cmd);
2263 result = FAILED;
2264 goto out;
2265 }
2266
2267 if (hostdata->connected == cmd) {
2268 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2269 hostdata->connected = NULL;
2270 hostdata->dma_len = 0;
2271 if (do_abort(instance)) {
2272 set_host_byte(cmd, DID_ERROR);
2273 complete_cmd(instance, cmd);
2274 result = FAILED;
2275 goto out;
2276 }
2277 set_host_byte(cmd, DID_ABORT);
2278 complete_cmd(instance, cmd);
2279 goto out;
2280 }
2281
2282 if (list_del_cmd(&hostdata->autosense, cmd)) {
2283 dsprintk(NDEBUG_ABORT, instance,
2284 "abort: removed %p from sense queue\n", cmd);
2285 complete_cmd(instance, cmd);
2286 }
2287
2288 out:
2289 if (result == FAILED)
2290 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2291 else {
2292 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
2293 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2294 }
2295
2296 queue_work(hostdata->work_q, &hostdata->main_task);
2297 maybe_release_dma_irq(instance);
2298 spin_unlock_irqrestore(&hostdata->lock, flags);
2299
2300 return result;
2301 }
2302
2303
2304 static void bus_reset_cleanup(struct Scsi_Host *instance)
2305 {
2306 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2307 int i;
2308 struct NCR5380_cmd *ncmd;
2309
2310 /* reset NCR registers */
2311 NCR5380_write(MODE_REG, MR_BASE);
2312 NCR5380_write(TARGET_COMMAND_REG, 0);
2313 NCR5380_write(SELECT_ENABLE_REG, 0);
2314
2315 /* After the reset, there are no more connected or disconnected commands
2316 * and no busy units; so clear the low-level status here to avoid
2317 * conflicts when the mid-level code tries to wake up the affected
2318 * commands!
2319 */
2320
2321 if (hostdata->selecting) {
2322 hostdata->selecting->result = DID_RESET << 16;
2323 complete_cmd(instance, hostdata->selecting);
2324 hostdata->selecting = NULL;
2325 }
2326
2327 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2328 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2329
2330 set_host_byte(cmd, DID_RESET);
2331 complete_cmd(instance, cmd);
2332 }
2333 INIT_LIST_HEAD(&hostdata->disconnected);
2334
2335 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2336 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2337
2338 cmd->scsi_done(cmd);
2339 }
2340 INIT_LIST_HEAD(&hostdata->autosense);
2341
2342 if (hostdata->connected) {
2343 set_host_byte(hostdata->connected, DID_RESET);
2344 complete_cmd(instance, hostdata->connected);
2345 hostdata->connected = NULL;
2346 }
2347
2348 for (i = 0; i < 8; ++i)
2349 hostdata->busy[i] = 0;
2350 hostdata->dma_len = 0;
2351
2352 queue_work(hostdata->work_q, &hostdata->main_task);
2353 maybe_release_dma_irq(instance);
2354 }
2355
2356 /**
2357 * NCR5380_host_reset - reset the SCSI host
2358 * @cmd: SCSI command undergoing EH
2359 *
2360 * Returns SUCCESS
2361 */
2362
2363 static int NCR5380_host_reset(struct scsi_cmnd *cmd)
2364 {
2365 struct Scsi_Host *instance = cmd->device->host;
2366 struct NCR5380_hostdata *hostdata = shost_priv(instance);
2367 unsigned long flags;
2368 struct NCR5380_cmd *ncmd;
2369
2370 spin_lock_irqsave(&hostdata->lock, flags);
2371
2372 #if (NDEBUG & NDEBUG_ANY)
2373 shost_printk(KERN_INFO, instance, __func__);
2374 #endif
2375 NCR5380_dprint(NDEBUG_ANY, instance);
2376 NCR5380_dprint_phase(NDEBUG_ANY, instance);
2377
2378 list_for_each_entry(ncmd, &hostdata->unissued, list) {
2379 struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd);
2380
2381 scmd->result = DID_RESET << 16;
2382 scmd->scsi_done(scmd);
2383 }
2384 INIT_LIST_HEAD(&hostdata->unissued);
2385
2386 do_reset(instance);
2387 bus_reset_cleanup(instance);
2388
2389 spin_unlock_irqrestore(&hostdata->lock, flags);
2390
2391 return SUCCESS;
2392 }