This source file includes following definitions.
- wait_chip_ready
- wait_firmware_ready
- wait_scsi_reset_done
- wait_HDO_off
- wait_hdi_set
- orc_read_fwrev
- orc_nv_write
- orc_nv_read
- orc_exec_scb
- se2_rd_all
- se2_update_all
- read_eeprom
- orc_load_firmware
- setup_SCBs
- init_alloc_map
- init_orchid
- orc_reset_scsi_bus
- orc_device_reset
- __orc_alloc_scb
- orc_alloc_scb
- orc_release_scb
- orchid_abort_scb
- inia100_abort_cmd
- orc_interrupt
- inia100_build_scb
- inia100_queue_lck
- DEF_SCSI_QCMD
- inia100_bus_reset
- inia100_device_reset
- inia100_scb_handler
- inia100_intr
- inia100_probe_one
- inia100_remove_one
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61 #include <linux/module.h>
62 #include <linux/errno.h>
63 #include <linux/delay.h>
64 #include <linux/interrupt.h>
65 #include <linux/pci.h>
66 #include <linux/init.h>
67 #include <linux/blkdev.h>
68 #include <linux/spinlock.h>
69 #include <linux/kernel.h>
70 #include <linux/string.h>
71 #include <linux/ioport.h>
72 #include <linux/dma-mapping.h>
73
74 #include <asm/io.h>
75 #include <asm/irq.h>
76
77 #include <scsi/scsi.h>
78 #include <scsi/scsi_cmnd.h>
79 #include <scsi/scsi_device.h>
80 #include <scsi/scsi_host.h>
81
82 #include "a100u2w.h"
83
84
85 static struct orc_scb *__orc_alloc_scb(struct orc_host * host);
86 static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb);
87
88 static struct orc_nvram nvram, *nvramp = &nvram;
89
90 static u8 default_nvram[64] =
91 {
92
93 0x01,
94 0x11,
95 0x60,
96 0x10,
97 0x00,
98 0x01,
99 0x11,
100 0x60,
101 0x10,
102 0x00,
103 0x00,
104 0x01,
105
106 0x01,
107 0x01,
108 0x00,
109 0x00,
110
111 0x07,
112 0x83,
113 0x20,
114 0x0A,
115 0x00,
116 0x00,
117
118
119 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
120 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
121
122 0x07,
123 0x83,
124 0x20,
125 0x0A,
126 0x00,
127 0x00,
128
129
130 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
131 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8, 0xC8,
132 0x00,
133 0x00,
134 0x00,
135 0x00
136 };
137
138
139 static u8 wait_chip_ready(struct orc_host * host)
140 {
141 int i;
142
143 for (i = 0; i < 10; i++) {
144 if (inb(host->base + ORC_HCTRL) & HOSTSTOP)
145 return 1;
146 msleep(100);
147 }
148 return 0;
149 }
150
151 static u8 wait_firmware_ready(struct orc_host * host)
152 {
153 int i;
154
155 for (i = 0; i < 10; i++) {
156 if (inb(host->base + ORC_HSTUS) & RREADY)
157 return 1;
158 msleep(100);
159 }
160 return 0;
161 }
162
163
164 static u8 wait_scsi_reset_done(struct orc_host * host)
165 {
166 int i;
167
168 for (i = 0; i < 10; i++) {
169 if (!(inb(host->base + ORC_HCTRL) & SCSIRST))
170 return 1;
171 mdelay(100);
172 }
173 return 0;
174 }
175
176
177 static u8 wait_HDO_off(struct orc_host * host)
178 {
179 int i;
180
181 for (i = 0; i < 10; i++) {
182 if (!(inb(host->base + ORC_HCTRL) & HDO))
183 return 1;
184 mdelay(100);
185 }
186 return 0;
187 }
188
189
190 static u8 wait_hdi_set(struct orc_host * host, u8 * data)
191 {
192 int i;
193
194 for (i = 0; i < 10; i++) {
195 if ((*data = inb(host->base + ORC_HSTUS)) & HDI)
196 return 1;
197 mdelay(100);
198 }
199 return 0;
200 }
201
202
203 static unsigned short orc_read_fwrev(struct orc_host * host)
204 {
205 u16 version;
206 u8 data;
207
208 outb(ORC_CMD_VERSION, host->base + ORC_HDATA);
209 outb(HDO, host->base + ORC_HCTRL);
210 if (wait_HDO_off(host) == 0)
211 return 0;
212
213 if (wait_hdi_set(host, &data) == 0)
214 return 0;
215 version = inb(host->base + ORC_HDATA);
216 outb(data, host->base + ORC_HSTUS);
217
218 if (wait_hdi_set(host, &data) == 0)
219 return 0;
220 version |= inb(host->base + ORC_HDATA) << 8;
221 outb(data, host->base + ORC_HSTUS);
222
223 return version;
224 }
225
226
227 static u8 orc_nv_write(struct orc_host * host, unsigned char address, unsigned char value)
228 {
229 outb(ORC_CMD_SET_NVM, host->base + ORC_HDATA);
230 outb(HDO, host->base + ORC_HCTRL);
231 if (wait_HDO_off(host) == 0)
232 return 0;
233
234 outb(address, host->base + ORC_HDATA);
235 outb(HDO, host->base + ORC_HCTRL);
236 if (wait_HDO_off(host) == 0)
237 return 0;
238
239 outb(value, host->base + ORC_HDATA);
240 outb(HDO, host->base + ORC_HCTRL);
241 if (wait_HDO_off(host) == 0)
242 return 0;
243
244 return 1;
245 }
246
247
248 static u8 orc_nv_read(struct orc_host * host, u8 address, u8 *ptr)
249 {
250 unsigned char data;
251
252 outb(ORC_CMD_GET_NVM, host->base + ORC_HDATA);
253 outb(HDO, host->base + ORC_HCTRL);
254 if (wait_HDO_off(host) == 0)
255 return 0;
256
257 outb(address, host->base + ORC_HDATA);
258 outb(HDO, host->base + ORC_HCTRL);
259 if (wait_HDO_off(host) == 0)
260 return 0;
261
262 if (wait_hdi_set(host, &data) == 0)
263 return 0;
264 *ptr = inb(host->base + ORC_HDATA);
265 outb(data, host->base + ORC_HSTUS);
266
267 return 1;
268
269 }
270
271
272
273
274
275
276
277 static void orc_exec_scb(struct orc_host * host, struct orc_scb * scb)
278 {
279 scb->status = ORCSCB_POST;
280 outb(scb->scbidx, host->base + ORC_PQUEUE);
281 }
282
283
284
285
286
287
288
289
290
291 static int se2_rd_all(struct orc_host * host)
292 {
293 int i;
294 u8 *np, chksum = 0;
295
296 np = (u8 *) nvramp;
297 for (i = 0; i < 64; i++, np++) {
298 if (orc_nv_read(host, (u8) i, np) == 0)
299 return -1;
300 }
301
302
303 np = (u8 *) nvramp;
304 for (i = 0; i < 63; i++)
305 chksum += *np++;
306
307 if (nvramp->CheckSum != (u8) chksum)
308 return -1;
309 return 1;
310 }
311
312
313
314
315
316
317
318
319 static void se2_update_all(struct orc_host * host)
320 {
321 int i;
322 u8 *np, *np1, chksum = 0;
323
324
325 np = (u8 *) default_nvram;
326 for (i = 0; i < 63; i++)
327 chksum += *np++;
328 *np = chksum;
329
330 np = (u8 *) default_nvram;
331 np1 = (u8 *) nvramp;
332 for (i = 0; i < 64; i++, np++, np1++) {
333 if (*np != *np1)
334 orc_nv_write(host, (u8) i, *np);
335 }
336 }
337
338
339
340
341
342
343
344
345
346 static void read_eeprom(struct orc_host * host)
347 {
348 if (se2_rd_all(host) != 1) {
349 se2_update_all(host);
350 se2_rd_all(host);
351 }
352 }
353
354
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357
358
359
360
361
362
363
364
365 static u8 orc_load_firmware(struct orc_host * host)
366 {
367 u32 data32;
368 u16 bios_addr;
369 u16 i;
370 u8 *data32_ptr, data;
371
372
373
374
375 data = inb(host->base + ORC_GCFG);
376 outb(data | EEPRG, host->base + ORC_GCFG);
377 outb(0x00, host->base + ORC_EBIOSADR2);
378 outw(0x0000, host->base + ORC_EBIOSADR0);
379 if (inb(host->base + ORC_EBIOSDATA) != 0x55) {
380 outb(data, host->base + ORC_GCFG);
381 return 0;
382 }
383 outw(0x0001, host->base + ORC_EBIOSADR0);
384 if (inb(host->base + ORC_EBIOSDATA) != 0xAA) {
385 outb(data, host->base + ORC_GCFG);
386 return 0;
387 }
388
389 outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL);
390 data32_ptr = (u8 *) & data32;
391 data32 = cpu_to_le32(0);
392 outw(0x0010, host->base + ORC_EBIOSADR0);
393 *data32_ptr = inb(host->base + ORC_EBIOSDATA);
394 outw(0x0011, host->base + ORC_EBIOSADR0);
395 *(data32_ptr + 1) = inb(host->base + ORC_EBIOSDATA);
396 outw(0x0012, host->base + ORC_EBIOSADR0);
397 *(data32_ptr + 2) = inb(host->base + ORC_EBIOSDATA);
398 outw(*(data32_ptr + 2), host->base + ORC_EBIOSADR2);
399 outl(le32_to_cpu(data32), host->base + ORC_FWBASEADR);
400
401
402
403 udelay(500);
404 bios_addr = (u16) le32_to_cpu(data32);
405 for (i = 0, data32_ptr = (u8 *) & data32;
406 i < 0x1000;
407 i++, bios_addr++) {
408 outw(bios_addr, host->base + ORC_EBIOSADR0);
409 *data32_ptr++ = inb(host->base + ORC_EBIOSDATA);
410 if ((i % 4) == 3) {
411 outl(le32_to_cpu(data32), host->base + ORC_RISCRAM);
412 data32_ptr = (u8 *) & data32;
413 }
414 }
415
416
417
418 outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL);
419 bios_addr -= 0x1000;
420 for (i = 0, data32_ptr = (u8 *) & data32;
421 i < 0x1000;
422 i++, bios_addr++) {
423 outw(bios_addr, host->base + ORC_EBIOSADR0);
424 *data32_ptr++ = inb(host->base + ORC_EBIOSDATA);
425 if ((i % 4) == 3) {
426 if (inl(host->base + ORC_RISCRAM) != le32_to_cpu(data32)) {
427 outb(PRGMRST, host->base + ORC_RISCCTL);
428 outb(data, host->base + ORC_GCFG);
429 return 0;
430 }
431 data32_ptr = (u8 *) & data32;
432 }
433 }
434
435
436 outb(PRGMRST, host->base + ORC_RISCCTL);
437 outb(data, host->base + ORC_GCFG);
438 return 1;
439 }
440
441
442 static void setup_SCBs(struct orc_host * host)
443 {
444 struct orc_scb *scb;
445 int i;
446 struct orc_extended_scb *escb;
447 dma_addr_t escb_phys;
448
449
450 outb(ORC_MAXQUEUE, host->base + ORC_SCBSIZE);
451
452 outl(host->scb_phys, host->base + ORC_SCBBASE0);
453
454 outl(host->scb_phys, host->base + ORC_SCBBASE1);
455
456
457 scb = host->scb_virt;
458 escb = host->escb_virt;
459
460 for (i = 0; i < ORC_MAXQUEUE; i++) {
461 escb_phys = (host->escb_phys + (sizeof(struct orc_extended_scb) * i));
462 scb->sg_addr = cpu_to_le32((u32) escb_phys);
463 scb->sense_addr = cpu_to_le32((u32) escb_phys);
464 scb->escb = escb;
465 scb->scbidx = i;
466 scb++;
467 escb++;
468 }
469 }
470
471
472
473
474
475
476
477
478
479 static void init_alloc_map(struct orc_host * host)
480 {
481 u8 i, j;
482
483 for (i = 0; i < MAX_CHANNELS; i++) {
484 for (j = 0; j < 8; j++) {
485 host->allocation_map[i][j] = 0xffffffff;
486 }
487 }
488 }
489
490
491
492
493
494
495
496
497
498
499 static int init_orchid(struct orc_host * host)
500 {
501 u8 *ptr;
502 u16 revision;
503 u8 i;
504
505 init_alloc_map(host);
506 outb(0xFF, host->base + ORC_GIMSK);
507
508 if (inb(host->base + ORC_HSTUS) & RREADY) {
509 revision = orc_read_fwrev(host);
510 if (revision == 0xFFFF) {
511 outb(DEVRST, host->base + ORC_HCTRL);
512 if (wait_chip_ready(host) == 0)
513 return -1;
514 orc_load_firmware(host);
515 setup_SCBs(host);
516 outb(0x00, host->base + ORC_HCTRL);
517 if (wait_firmware_ready(host) == 0)
518 return -1;
519
520 } else {
521 setup_SCBs(host);
522 }
523 } else {
524 outb(DEVRST, host->base + ORC_HCTRL);
525 if (wait_chip_ready(host) == 0)
526 return -1;
527 orc_load_firmware(host);
528 setup_SCBs(host);
529 outb(HDO, host->base + ORC_HCTRL);
530
531
532 if (wait_firmware_ready(host) == 0)
533 return -1;
534 }
535
536
537
538 read_eeprom(host);
539
540 if (nvramp->revision != 1)
541 return -1;
542
543 host->scsi_id = nvramp->scsi_id;
544 host->BIOScfg = nvramp->BIOSConfig1;
545 host->max_targets = MAX_TARGETS;
546 ptr = (u8 *) & (nvramp->Target00Config);
547 for (i = 0; i < 16; ptr++, i++) {
548 host->target_flag[i] = *ptr;
549 host->max_tags[i] = ORC_MAXTAGS;
550 }
551
552 if (nvramp->SCSI0Config & NCC_BUSRESET)
553 host->flags |= HCF_SCSI_RESET;
554 outb(0xFB, host->base + ORC_GIMSK);
555 return 0;
556 }
557
558
559
560
561
562
563
564
565 static int orc_reset_scsi_bus(struct orc_host * host)
566 {
567 unsigned long flags;
568
569 spin_lock_irqsave(&host->allocation_lock, flags);
570
571 init_alloc_map(host);
572
573 outb(SCSIRST, host->base + ORC_HCTRL);
574
575
576 if (wait_scsi_reset_done(host) == 0) {
577 spin_unlock_irqrestore(&host->allocation_lock, flags);
578 return FAILED;
579 } else {
580 spin_unlock_irqrestore(&host->allocation_lock, flags);
581 return SUCCESS;
582 }
583 }
584
585
586
587
588
589
590
591
592
593
594
595 static int orc_device_reset(struct orc_host * host, struct scsi_cmnd *cmd, unsigned int target)
596 {
597 struct orc_scb *scb;
598 struct orc_extended_scb *escb;
599 struct orc_scb *host_scb;
600 u8 i;
601 unsigned long flags;
602
603 spin_lock_irqsave(&(host->allocation_lock), flags);
604 scb = (struct orc_scb *) NULL;
605 escb = (struct orc_extended_scb *) NULL;
606
607
608 host_scb = host->scb_virt;
609
610
611
612 init_alloc_map(host);
613
614
615 for (i = 0; i < ORC_MAXQUEUE; i++) {
616 escb = host_scb->escb;
617 if (host_scb->status && escb->srb == cmd)
618 break;
619 host_scb++;
620 }
621
622 if (i == ORC_MAXQUEUE) {
623 printk(KERN_ERR "Unable to Reset - No SCB Found\n");
624 spin_unlock_irqrestore(&(host->allocation_lock), flags);
625 return FAILED;
626 }
627
628
629 if ((scb = __orc_alloc_scb(host)) == NULL) {
630
631 spin_unlock_irqrestore(&(host->allocation_lock), flags);
632 return FAILED;
633 }
634
635
636
637 scb->opcode = ORC_BUSDEVRST;
638 scb->target = target;
639 scb->hastat = 0;
640 scb->tastat = 0;
641 scb->status = 0x0;
642 scb->link = 0xFF;
643 scb->reserved0 = 0;
644 scb->reserved1 = 0;
645 scb->xferlen = cpu_to_le32(0);
646 scb->sg_len = cpu_to_le32(0);
647
648 escb->srb = NULL;
649 escb->srb = cmd;
650 orc_exec_scb(host, scb);
651 spin_unlock_irqrestore(&host->allocation_lock, flags);
652 return SUCCESS;
653 }
654
655
656
657
658
659
660
661
662
663
664
665 static struct orc_scb *__orc_alloc_scb(struct orc_host * host)
666 {
667 u8 channel;
668 unsigned long idx;
669 u8 index;
670 u8 i;
671
672 channel = host->index;
673 for (i = 0; i < 8; i++) {
674 for (index = 0; index < 32; index++) {
675 if ((host->allocation_map[channel][i] >> index) & 0x01) {
676 host->allocation_map[channel][i] &= ~(1 << index);
677 idx = index + 32 * i;
678
679
680
681 return host->scb_virt + idx;
682 }
683 }
684 }
685 return NULL;
686 }
687
688
689
690
691
692
693
694
695
696 static struct orc_scb *orc_alloc_scb(struct orc_host * host)
697 {
698 struct orc_scb *scb;
699 unsigned long flags;
700
701 spin_lock_irqsave(&host->allocation_lock, flags);
702 scb = __orc_alloc_scb(host);
703 spin_unlock_irqrestore(&host->allocation_lock, flags);
704 return scb;
705 }
706
707
708
709
710
711
712
713
714
715
716 static void orc_release_scb(struct orc_host *host, struct orc_scb *scb)
717 {
718 unsigned long flags;
719 u8 index, i, channel;
720
721 spin_lock_irqsave(&(host->allocation_lock), flags);
722 channel = host->index;
723 index = scb->scbidx;
724 i = index / 32;
725 index %= 32;
726 host->allocation_map[channel][i] |= (1 << index);
727 spin_unlock_irqrestore(&(host->allocation_lock), flags);
728 }
729
730
731
732
733
734
735
736
737
738 static int orchid_abort_scb(struct orc_host * host, struct orc_scb * scb)
739 {
740 unsigned char data, status;
741
742 outb(ORC_CMD_ABORT_SCB, host->base + ORC_HDATA);
743 outb(HDO, host->base + ORC_HCTRL);
744 if (wait_HDO_off(host) == 0)
745 return 0;
746
747 outb(scb->scbidx, host->base + ORC_HDATA);
748 outb(HDO, host->base + ORC_HCTRL);
749 if (wait_HDO_off(host) == 0)
750 return 0;
751
752 if (wait_hdi_set(host, &data) == 0)
753 return 0;
754 status = inb(host->base + ORC_HDATA);
755 outb(data, host->base + ORC_HSTUS);
756
757 if (status == 1)
758 return 0;
759 return 1;
760 }
761
762 static int inia100_abort_cmd(struct orc_host * host, struct scsi_cmnd *cmd)
763 {
764 struct orc_extended_scb *escb;
765 struct orc_scb *scb;
766 u8 i;
767 unsigned long flags;
768
769 spin_lock_irqsave(&(host->allocation_lock), flags);
770
771 scb = host->scb_virt;
772
773
774
775
776
777 for (i = 0; i < ORC_MAXQUEUE; i++, scb++) {
778 escb = scb->escb;
779 if (scb->status && escb->srb == cmd) {
780 if (scb->tag_msg == 0) {
781 goto out;
782 } else {
783
784 if (orchid_abort_scb(host, scb)) {
785 escb->srb = NULL;
786 spin_unlock_irqrestore(&host->allocation_lock, flags);
787 return SUCCESS;
788 } else
789 goto out;
790 }
791 }
792 }
793 out:
794 spin_unlock_irqrestore(&host->allocation_lock, flags);
795 return FAILED;
796 }
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811 static irqreturn_t orc_interrupt(struct orc_host * host)
812 {
813 u8 scb_index;
814 struct orc_scb *scb;
815
816
817 if (inb(host->base + ORC_RQUEUECNT) == 0)
818 return IRQ_NONE;
819
820 do {
821
822 scb_index = inb(host->base + ORC_RQUEUE);
823
824
825 scb = (struct orc_scb *) ((unsigned long) host->scb_virt + (unsigned long) (sizeof(struct orc_scb) * scb_index));
826 scb->status = 0x0;
827
828 inia100_scb_handler(host, scb);
829 } while (inb(host->base + ORC_RQUEUECNT));
830 return IRQ_HANDLED;
831 }
832
833
834
835
836
837
838
839
840
841
842 static int inia100_build_scb(struct orc_host * host, struct orc_scb * scb, struct scsi_cmnd * cmd)
843 {
844 struct scatterlist *sg;
845 struct orc_sgent *sgent;
846 int i, count_sg;
847 struct orc_extended_scb *escb;
848
849
850 escb = scb->escb;
851 escb->srb = cmd;
852 sgent = NULL;
853
854
855 scb->opcode = ORC_EXECSCSI;
856 scb->flags = SCF_NO_DCHK;
857 scb->target = cmd->device->id;
858 scb->lun = cmd->device->lun;
859 scb->reserved0 = 0;
860 scb->reserved1 = 0;
861 scb->sg_len = cpu_to_le32(0);
862
863 scb->xferlen = cpu_to_le32((u32) scsi_bufflen(cmd));
864 sgent = (struct orc_sgent *) & escb->sglist[0];
865
866 count_sg = scsi_dma_map(cmd);
867 if (count_sg < 0)
868 return count_sg;
869 BUG_ON(count_sg > TOTAL_SG_ENTRY);
870
871
872 if (count_sg) {
873 scb->sg_len = cpu_to_le32((u32) (count_sg * 8));
874 scsi_for_each_sg(cmd, sg, count_sg, i) {
875 sgent->base = cpu_to_le32((u32) sg_dma_address(sg));
876 sgent->length = cpu_to_le32((u32) sg_dma_len(sg));
877 sgent++;
878 }
879 } else {
880 scb->sg_len = cpu_to_le32(0);
881 sgent->base = cpu_to_le32(0);
882 sgent->length = cpu_to_le32(0);
883 }
884 scb->sg_addr = (u32) scb->sense_addr;
885 scb->hastat = 0;
886 scb->tastat = 0;
887 scb->link = 0xFF;
888 scb->sense_len = SENSE_SIZE;
889 scb->cdb_len = cmd->cmd_len;
890 if (scb->cdb_len >= IMAX_CDB) {
891 printk("max cdb length= %x\n", cmd->cmd_len);
892 scb->cdb_len = IMAX_CDB;
893 }
894 scb->ident = (u8)(cmd->device->lun & 0xff) | DISC_ALLOW;
895 if (cmd->device->tagged_supported) {
896 scb->tag_msg = SIMPLE_QUEUE_TAG;
897 } else {
898 scb->tag_msg = 0;
899 }
900 memcpy(scb->cdb, cmd->cmnd, scb->cdb_len);
901 return 0;
902 }
903
904
905
906
907
908
909
910
911
912
913
914 static int inia100_queue_lck(struct scsi_cmnd * cmd, void (*done) (struct scsi_cmnd *))
915 {
916 struct orc_scb *scb;
917 struct orc_host *host;
918
919 host = (struct orc_host *) cmd->device->host->hostdata;
920 cmd->scsi_done = done;
921
922 if ((scb = orc_alloc_scb(host)) == NULL)
923 return SCSI_MLQUEUE_HOST_BUSY;
924
925 if (inia100_build_scb(host, scb, cmd)) {
926 orc_release_scb(host, scb);
927 return SCSI_MLQUEUE_HOST_BUSY;
928 }
929 orc_exec_scb(host, scb);
930 return 0;
931 }
932
933 static DEF_SCSI_QCMD(inia100_queue)
934
935
936
937
938
939
940
941
942
943 static int inia100_abort(struct scsi_cmnd * cmd)
944 {
945 struct orc_host *host;
946
947 host = (struct orc_host *) cmd->device->host->hostdata;
948 return inia100_abort_cmd(host, cmd);
949 }
950
951
952
953
954
955
956
957
958
959 static int inia100_bus_reset(struct scsi_cmnd * cmd)
960 {
961 struct orc_host *host;
962 host = (struct orc_host *) cmd->device->host->hostdata;
963 return orc_reset_scsi_bus(host);
964 }
965
966
967
968
969
970
971
972
973 static int inia100_device_reset(struct scsi_cmnd * cmd)
974 {
975 struct orc_host *host;
976 host = (struct orc_host *) cmd->device->host->hostdata;
977 return orc_device_reset(host, cmd, scmd_id(cmd));
978
979 }
980
981
982
983
984
985
986
987
988
989
990
991 static void inia100_scb_handler(struct orc_host *host, struct orc_scb *scb)
992 {
993 struct scsi_cmnd *cmd;
994 struct orc_extended_scb *escb;
995
996 escb = scb->escb;
997 if ((cmd = (struct scsi_cmnd *) escb->srb) == NULL) {
998 printk(KERN_ERR "inia100_scb_handler: SRB pointer is empty\n");
999 orc_release_scb(host, scb);
1000 return;
1001 }
1002 escb->srb = NULL;
1003
1004 switch (scb->hastat) {
1005 case 0x0:
1006 case 0xa:
1007 case 0xb:
1008 scb->hastat = 0;
1009 break;
1010
1011 case 0x11:
1012
1013 scb->hastat = DID_TIME_OUT;
1014 break;
1015
1016 case 0x14:
1017
1018
1019
1020 scb->hastat = DID_RESET;
1021 break;
1022
1023 case 0x1a:
1024 scb->hastat = DID_ABORT;
1025 break;
1026
1027 case 0x12:
1028
1029
1030 case 0x13:
1031 case 0x16:
1032
1033 default:
1034 printk(KERN_DEBUG "inia100: %x %x\n", scb->hastat, scb->tastat);
1035 scb->hastat = DID_ERROR;
1036 break;
1037 }
1038
1039 if (scb->tastat == 2) {
1040 memcpy((unsigned char *) &cmd->sense_buffer[0],
1041 (unsigned char *) &escb->sglist[0], SENSE_SIZE);
1042 }
1043 cmd->result = scb->tastat | (scb->hastat << 16);
1044 scsi_dma_unmap(cmd);
1045 cmd->scsi_done(cmd);
1046 orc_release_scb(host, scb);
1047 }
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057 static irqreturn_t inia100_intr(int irqno, void *devid)
1058 {
1059 struct Scsi_Host *shost = (struct Scsi_Host *)devid;
1060 struct orc_host *host = (struct orc_host *)shost->hostdata;
1061 unsigned long flags;
1062 irqreturn_t res;
1063
1064 spin_lock_irqsave(shost->host_lock, flags);
1065 res = orc_interrupt(host);
1066 spin_unlock_irqrestore(shost->host_lock, flags);
1067
1068 return res;
1069 }
1070
1071 static struct scsi_host_template inia100_template = {
1072 .proc_name = "inia100",
1073 .name = inia100_REVID,
1074 .queuecommand = inia100_queue,
1075 .eh_abort_handler = inia100_abort,
1076 .eh_bus_reset_handler = inia100_bus_reset,
1077 .eh_device_reset_handler = inia100_device_reset,
1078 .can_queue = 1,
1079 .this_id = 1,
1080 .sg_tablesize = SG_ALL,
1081 };
1082
1083 static int inia100_probe_one(struct pci_dev *pdev,
1084 const struct pci_device_id *id)
1085 {
1086 struct Scsi_Host *shost;
1087 struct orc_host *host;
1088 unsigned long port, bios;
1089 int error = -ENODEV;
1090 u32 sz;
1091 unsigned long biosaddr;
1092 char *bios_phys;
1093
1094 if (pci_enable_device(pdev))
1095 goto out;
1096 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
1097 printk(KERN_WARNING "Unable to set 32bit DMA "
1098 "on inia100 adapter, ignoring.\n");
1099 goto out_disable_device;
1100 }
1101
1102 pci_set_master(pdev);
1103
1104 port = pci_resource_start(pdev, 0);
1105 if (!request_region(port, 256, "inia100")) {
1106 printk(KERN_WARNING "inia100: io port 0x%lx, is busy.\n", port);
1107 goto out_disable_device;
1108 }
1109
1110
1111 bios = inw(port + 0x50);
1112
1113
1114 shost = scsi_host_alloc(&inia100_template, sizeof(struct orc_host));
1115 if (!shost)
1116 goto out_release_region;
1117
1118 host = (struct orc_host *)shost->hostdata;
1119 host->pdev = pdev;
1120 host->base = port;
1121 host->BIOScfg = bios;
1122 spin_lock_init(&host->allocation_lock);
1123
1124
1125 sz = ORC_MAXQUEUE * sizeof(struct orc_scb);
1126 host->scb_virt = dma_alloc_coherent(&pdev->dev, sz, &host->scb_phys,
1127 GFP_KERNEL);
1128 if (!host->scb_virt) {
1129 printk("inia100: SCB memory allocation error\n");
1130 goto out_host_put;
1131 }
1132
1133
1134 sz = ORC_MAXQUEUE * sizeof(struct orc_extended_scb);
1135 host->escb_virt = dma_alloc_coherent(&pdev->dev, sz, &host->escb_phys,
1136 GFP_KERNEL);
1137 if (!host->escb_virt) {
1138 printk("inia100: ESCB memory allocation error\n");
1139 goto out_free_scb_array;
1140 }
1141
1142 biosaddr = host->BIOScfg;
1143 biosaddr = (biosaddr << 4);
1144 bios_phys = phys_to_virt(biosaddr);
1145 if (init_orchid(host)) {
1146 printk("inia100: initial orchid fail!!\n");
1147 goto out_free_escb_array;
1148 }
1149
1150 shost->io_port = host->base;
1151 shost->n_io_port = 0xff;
1152 shost->can_queue = ORC_MAXQUEUE;
1153 shost->unique_id = shost->io_port;
1154 shost->max_id = host->max_targets;
1155 shost->max_lun = 16;
1156 shost->irq = pdev->irq;
1157 shost->this_id = host->scsi_id;
1158 shost->sg_tablesize = TOTAL_SG_ENTRY;
1159
1160
1161 error = request_irq(pdev->irq, inia100_intr, IRQF_SHARED,
1162 "inia100", shost);
1163 if (error < 0) {
1164 printk(KERN_WARNING "inia100: unable to get irq %d\n",
1165 pdev->irq);
1166 goto out_free_escb_array;
1167 }
1168
1169 pci_set_drvdata(pdev, shost);
1170
1171 error = scsi_add_host(shost, &pdev->dev);
1172 if (error)
1173 goto out_free_irq;
1174
1175 scsi_scan_host(shost);
1176 return 0;
1177
1178 out_free_irq:
1179 free_irq(shost->irq, shost);
1180 out_free_escb_array:
1181 dma_free_coherent(&pdev->dev,
1182 ORC_MAXQUEUE * sizeof(struct orc_extended_scb),
1183 host->escb_virt, host->escb_phys);
1184 out_free_scb_array:
1185 dma_free_coherent(&pdev->dev,
1186 ORC_MAXQUEUE * sizeof(struct orc_scb),
1187 host->scb_virt, host->scb_phys);
1188 out_host_put:
1189 scsi_host_put(shost);
1190 out_release_region:
1191 release_region(port, 256);
1192 out_disable_device:
1193 pci_disable_device(pdev);
1194 out:
1195 return error;
1196 }
1197
1198 static void inia100_remove_one(struct pci_dev *pdev)
1199 {
1200 struct Scsi_Host *shost = pci_get_drvdata(pdev);
1201 struct orc_host *host = (struct orc_host *)shost->hostdata;
1202
1203 scsi_remove_host(shost);
1204
1205 free_irq(shost->irq, shost);
1206 dma_free_coherent(&pdev->dev,
1207 ORC_MAXQUEUE * sizeof(struct orc_extended_scb),
1208 host->escb_virt, host->escb_phys);
1209 dma_free_coherent(&pdev->dev,
1210 ORC_MAXQUEUE * sizeof(struct orc_scb),
1211 host->scb_virt, host->scb_phys);
1212 release_region(shost->io_port, 256);
1213
1214 scsi_host_put(shost);
1215 }
1216
1217 static struct pci_device_id inia100_pci_tbl[] = {
1218 {PCI_VENDOR_ID_INIT, 0x1060, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1219 {0,}
1220 };
1221 MODULE_DEVICE_TABLE(pci, inia100_pci_tbl);
1222
1223 static struct pci_driver inia100_pci_driver = {
1224 .name = "inia100",
1225 .id_table = inia100_pci_tbl,
1226 .probe = inia100_probe_one,
1227 .remove = inia100_remove_one,
1228 };
1229
1230 module_pci_driver(inia100_pci_driver);
1231
1232 MODULE_DESCRIPTION("Initio A100U2W SCSI driver");
1233 MODULE_AUTHOR("Initio Corporation");
1234 MODULE_LICENSE("Dual BSD/GPL");