This source file includes following definitions.
- cyapa_smbus_read_block
- cyapa_read_byte
- cyapa_write_byte
- cyapa_i2c_reg_read_block
- cyapa_i2c_reg_write_block
- cyapa_read_block
- cyapa_gen3_state_parse
- cyapa_gen3_bl_enter
- cyapa_gen3_bl_activate
- cyapa_gen3_bl_deactivate
- cyapa_gen3_bl_exit
- cyapa_gen3_csum
- cyapa_gen3_check_fw
- cyapa_gen3_write_buffer
- cyapa_gen3_write_fw_block
- cyapa_gen3_write_blocks
- cyapa_gen3_do_fw_update
- cyapa_gen3_do_calibrate
- cyapa_gen3_show_baseline
- cyapa_get_wait_time_for_pwr_cmd
- cyapa_gen3_set_power_mode
- cyapa_gen3_set_proximity
- cyapa_gen3_get_query_data
- cyapa_gen3_bl_query_data
- cyapa_gen3_do_operational_check
- cyapa_gen3_irq_cmd_handler
- cyapa_gen3_event_process
- cyapa_gen3_irq_handler
- cyapa_gen3_try_poll_handler
- cyapa_gen3_initialize
- cyapa_gen3_bl_initiate
- cyapa_gen3_empty_output_data
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17 #include <linux/delay.h>
18 #include <linux/i2c.h>
19 #include <linux/input.h>
20 #include <linux/input/mt.h>
21 #include <linux/module.h>
22 #include <linux/slab.h>
23 #include <asm/unaligned.h>
24 #include "cyapa.h"
25
26
27 #define GEN3_MAX_FINGERS 5
28 #define GEN3_FINGER_NUM(x) (((x) >> 4) & 0x07)
29
30 #define BLK_HEAD_BYTES 32
31
32
33 #define PRODUCT_ID_SIZE 16
34 #define QUERY_DATA_SIZE 27
35 #define REG_PROTOCOL_GEN_QUERY_OFFSET 20
36
37 #define REG_OFFSET_DATA_BASE 0x0000
38 #define REG_OFFSET_COMMAND_BASE 0x0028
39 #define REG_OFFSET_QUERY_BASE 0x002a
40
41 #define CYAPA_OFFSET_SOFT_RESET REG_OFFSET_COMMAND_BASE
42 #define OP_RECALIBRATION_MASK 0x80
43 #define OP_REPORT_BASELINE_MASK 0x40
44 #define REG_OFFSET_MAX_BASELINE 0x0026
45 #define REG_OFFSET_MIN_BASELINE 0x0027
46
47 #define REG_OFFSET_POWER_MODE (REG_OFFSET_COMMAND_BASE + 1)
48 #define SET_POWER_MODE_DELAY 10000
49 #define SET_POWER_MODE_TRIES 5
50
51 #define GEN3_BL_CMD_CHECKSUM_SEED 0xff
52 #define GEN3_BL_CMD_INITIATE_BL 0x38
53 #define GEN3_BL_CMD_WRITE_BLOCK 0x39
54 #define GEN3_BL_CMD_VERIFY_BLOCK 0x3a
55 #define GEN3_BL_CMD_TERMINATE_BL 0x3b
56 #define GEN3_BL_CMD_LAUNCH_APP 0xa5
57
58
59
60
61
62
63 #define CYAPA_DEV_NORMAL 0x03
64 #define CYAPA_DEV_BUSY 0x01
65
66 #define CYAPA_FW_BLOCK_SIZE 64
67 #define CYAPA_FW_READ_SIZE 16
68 #define CYAPA_FW_HDR_START 0x0780
69 #define CYAPA_FW_HDR_BLOCK_COUNT 2
70 #define CYAPA_FW_HDR_BLOCK_START (CYAPA_FW_HDR_START / CYAPA_FW_BLOCK_SIZE)
71 #define CYAPA_FW_HDR_SIZE (CYAPA_FW_HDR_BLOCK_COUNT * \
72 CYAPA_FW_BLOCK_SIZE)
73 #define CYAPA_FW_DATA_START 0x0800
74 #define CYAPA_FW_DATA_BLOCK_COUNT 480
75 #define CYAPA_FW_DATA_BLOCK_START (CYAPA_FW_DATA_START / CYAPA_FW_BLOCK_SIZE)
76 #define CYAPA_FW_DATA_SIZE (CYAPA_FW_DATA_BLOCK_COUNT * \
77 CYAPA_FW_BLOCK_SIZE)
78 #define CYAPA_FW_SIZE (CYAPA_FW_HDR_SIZE + CYAPA_FW_DATA_SIZE)
79 #define CYAPA_CMD_LEN 16
80
81 #define GEN3_BL_IDLE_FW_MAJ_VER_OFFSET 0x0b
82 #define GEN3_BL_IDLE_FW_MIN_VER_OFFSET (GEN3_BL_IDLE_FW_MAJ_VER_OFFSET + 1)
83
84
85 struct cyapa_touch {
86
87
88
89
90
91 u8 xy_hi;
92 u8 x_lo;
93 u8 y_lo;
94 u8 pressure;
95
96 u8 id;
97 } __packed;
98
99 struct cyapa_reg_data {
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101
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103
104
105
106 u8 device_status;
107
108
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111
112
113
114 u8 finger_btn;
115
116 struct cyapa_touch touches[5];
117 } __packed;
118
119 struct gen3_write_block_cmd {
120 u8 checksum_seed;
121 u8 cmd_code;
122 u8 key[8];
123 __be16 block_num;
124 u8 block_data[CYAPA_FW_BLOCK_SIZE];
125 u8 block_checksum;
126 u8 cmd_checksum;
127 } __packed;
128
129 static const u8 security_key[] = {
130 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 };
131 static const u8 bl_activate[] = { 0x00, 0xff, 0x38, 0x00, 0x01, 0x02, 0x03,
132 0x04, 0x05, 0x06, 0x07 };
133 static const u8 bl_deactivate[] = { 0x00, 0xff, 0x3b, 0x00, 0x01, 0x02, 0x03,
134 0x04, 0x05, 0x06, 0x07 };
135 static const u8 bl_exit[] = { 0x00, 0xff, 0xa5, 0x00, 0x01, 0x02, 0x03, 0x04,
136 0x05, 0x06, 0x07 };
137
138
139
140 #define CMD_RESET 0
141 #define CMD_POWER_MODE 1
142 #define CMD_DEV_STATUS 2
143 #define CMD_REPORT_MAX_BASELINE 3
144 #define CMD_REPORT_MIN_BASELINE 4
145 #define SMBUS_BYTE_CMD(cmd) (((cmd) & 0x3f) << 1)
146 #define CYAPA_SMBUS_RESET SMBUS_BYTE_CMD(CMD_RESET)
147 #define CYAPA_SMBUS_POWER_MODE SMBUS_BYTE_CMD(CMD_POWER_MODE)
148 #define CYAPA_SMBUS_DEV_STATUS SMBUS_BYTE_CMD(CMD_DEV_STATUS)
149 #define CYAPA_SMBUS_MAX_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MAX_BASELINE)
150 #define CYAPA_SMBUS_MIN_BASELINE SMBUS_BYTE_CMD(CMD_REPORT_MIN_BASELINE)
151
152
153 #define REG_GROUP_DATA 0
154 #define REG_GROUP_CMD 2
155 #define REG_GROUP_QUERY 3
156 #define SMBUS_GROUP_CMD(grp) (0x80 | (((grp) & 0x07) << 3))
157 #define CYAPA_SMBUS_GROUP_DATA SMBUS_GROUP_CMD(REG_GROUP_DATA)
158 #define CYAPA_SMBUS_GROUP_CMD SMBUS_GROUP_CMD(REG_GROUP_CMD)
159 #define CYAPA_SMBUS_GROUP_QUERY SMBUS_GROUP_CMD(REG_GROUP_QUERY)
160
161
162 #define CMD_BL_STATUS 0
163 #define CMD_BL_HEAD 1
164 #define CMD_BL_CMD 2
165 #define CMD_BL_DATA 3
166 #define CMD_BL_ALL 4
167 #define CMD_BLK_PRODUCT_ID 5
168 #define CMD_BLK_HEAD 6
169 #define SMBUS_BLOCK_CMD(cmd) (0xc0 | (((cmd) & 0x1f) << 1))
170
171
172 #define CYAPA_SMBUS_BL_STATUS SMBUS_BLOCK_CMD(CMD_BL_STATUS)
173 #define CYAPA_SMBUS_BL_HEAD SMBUS_BLOCK_CMD(CMD_BL_HEAD)
174 #define CYAPA_SMBUS_BL_CMD SMBUS_BLOCK_CMD(CMD_BL_CMD)
175 #define CYAPA_SMBUS_BL_DATA SMBUS_BLOCK_CMD(CMD_BL_DATA)
176 #define CYAPA_SMBUS_BL_ALL SMBUS_BLOCK_CMD(CMD_BL_ALL)
177
178
179 #define CYAPA_SMBUS_BLK_PRODUCT_ID SMBUS_BLOCK_CMD(CMD_BLK_PRODUCT_ID)
180 #define CYAPA_SMBUS_BLK_HEAD SMBUS_BLOCK_CMD(CMD_BLK_HEAD)
181
182 struct cyapa_cmd_len {
183 u8 cmd;
184 u8 len;
185 };
186
187
188 static const struct cyapa_cmd_len cyapa_i2c_cmds[] = {
189 { CYAPA_OFFSET_SOFT_RESET, 1 },
190 { REG_OFFSET_COMMAND_BASE + 1, 1 },
191 { REG_OFFSET_DATA_BASE, 1 },
192 { REG_OFFSET_DATA_BASE, sizeof(struct cyapa_reg_data) },
193
194 { REG_OFFSET_COMMAND_BASE, 0 },
195 { REG_OFFSET_QUERY_BASE, QUERY_DATA_SIZE },
196 { BL_HEAD_OFFSET, 3 },
197 { BL_HEAD_OFFSET, 16 },
198 { BL_HEAD_OFFSET, 16 },
199 { BL_DATA_OFFSET, 16 },
200 { BL_HEAD_OFFSET, 32 },
201 { REG_OFFSET_QUERY_BASE, PRODUCT_ID_SIZE },
202
203 { REG_OFFSET_DATA_BASE, 32 },
204 { REG_OFFSET_MAX_BASELINE, 1 },
205 { REG_OFFSET_MIN_BASELINE, 1 },
206 };
207
208 static const struct cyapa_cmd_len cyapa_smbus_cmds[] = {
209 { CYAPA_SMBUS_RESET, 1 },
210 { CYAPA_SMBUS_POWER_MODE, 1 },
211 { CYAPA_SMBUS_DEV_STATUS, 1 },
212 { CYAPA_SMBUS_GROUP_DATA, sizeof(struct cyapa_reg_data) },
213
214 { CYAPA_SMBUS_GROUP_CMD, 2 },
215 { CYAPA_SMBUS_GROUP_QUERY, QUERY_DATA_SIZE },
216
217 { CYAPA_SMBUS_BL_STATUS, 3 },
218 { CYAPA_SMBUS_BL_HEAD, 16 },
219 { CYAPA_SMBUS_BL_CMD, 16 },
220 { CYAPA_SMBUS_BL_DATA, 16 },
221 { CYAPA_SMBUS_BL_ALL, 32 },
222 { CYAPA_SMBUS_BLK_PRODUCT_ID, PRODUCT_ID_SIZE },
223
224 { CYAPA_SMBUS_BLK_HEAD, 16 },
225 { CYAPA_SMBUS_MAX_BASELINE, 1 },
226 { CYAPA_SMBUS_MIN_BASELINE, 1 },
227 };
228
229 static int cyapa_gen3_try_poll_handler(struct cyapa *cyapa);
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243
244 ssize_t cyapa_smbus_read_block(struct cyapa *cyapa, u8 cmd, size_t len,
245 u8 *values)
246 {
247 ssize_t ret;
248 u8 index;
249 u8 smbus_cmd;
250 u8 *buf;
251 struct i2c_client *client = cyapa->client;
252
253 if (!(SMBUS_BYTE_BLOCK_CMD_MASK & cmd))
254 return -EINVAL;
255
256 if (SMBUS_GROUP_BLOCK_CMD_MASK & cmd) {
257
258 smbus_cmd = SMBUS_ENCODE_RW(cmd, SMBUS_READ);
259 ret = i2c_smbus_read_block_data(client, smbus_cmd, values);
260 goto out;
261 }
262
263 ret = 0;
264 for (index = 0; index * I2C_SMBUS_BLOCK_MAX < len; index++) {
265 smbus_cmd = SMBUS_ENCODE_IDX(cmd, index);
266 smbus_cmd = SMBUS_ENCODE_RW(smbus_cmd, SMBUS_READ);
267 buf = values + I2C_SMBUS_BLOCK_MAX * index;
268 ret = i2c_smbus_read_block_data(client, smbus_cmd, buf);
269 if (ret < 0)
270 goto out;
271 }
272
273 out:
274 return ret > 0 ? len : ret;
275 }
276
277 static s32 cyapa_read_byte(struct cyapa *cyapa, u8 cmd_idx)
278 {
279 u8 cmd;
280
281 if (cyapa->smbus) {
282 cmd = cyapa_smbus_cmds[cmd_idx].cmd;
283 cmd = SMBUS_ENCODE_RW(cmd, SMBUS_READ);
284 } else {
285 cmd = cyapa_i2c_cmds[cmd_idx].cmd;
286 }
287 return i2c_smbus_read_byte_data(cyapa->client, cmd);
288 }
289
290 static s32 cyapa_write_byte(struct cyapa *cyapa, u8 cmd_idx, u8 value)
291 {
292 u8 cmd;
293
294 if (cyapa->smbus) {
295 cmd = cyapa_smbus_cmds[cmd_idx].cmd;
296 cmd = SMBUS_ENCODE_RW(cmd, SMBUS_WRITE);
297 } else {
298 cmd = cyapa_i2c_cmds[cmd_idx].cmd;
299 }
300 return i2c_smbus_write_byte_data(cyapa->client, cmd, value);
301 }
302
303 ssize_t cyapa_i2c_reg_read_block(struct cyapa *cyapa, u8 reg, size_t len,
304 u8 *values)
305 {
306 return i2c_smbus_read_i2c_block_data(cyapa->client, reg, len, values);
307 }
308
309 static ssize_t cyapa_i2c_reg_write_block(struct cyapa *cyapa, u8 reg,
310 size_t len, const u8 *values)
311 {
312 return i2c_smbus_write_i2c_block_data(cyapa->client, reg, len, values);
313 }
314
315 ssize_t cyapa_read_block(struct cyapa *cyapa, u8 cmd_idx, u8 *values)
316 {
317 u8 cmd;
318 size_t len;
319
320 if (cyapa->smbus) {
321 cmd = cyapa_smbus_cmds[cmd_idx].cmd;
322 len = cyapa_smbus_cmds[cmd_idx].len;
323 return cyapa_smbus_read_block(cyapa, cmd, len, values);
324 }
325 cmd = cyapa_i2c_cmds[cmd_idx].cmd;
326 len = cyapa_i2c_cmds[cmd_idx].len;
327 return cyapa_i2c_reg_read_block(cyapa, cmd, len, values);
328 }
329
330
331
332
333
334 static int cyapa_gen3_state_parse(struct cyapa *cyapa, u8 *reg_data, int len)
335 {
336 cyapa->state = CYAPA_STATE_NO_DEVICE;
337
338
339 if (reg_data[REG_BL_FILE] == BL_FILE &&
340 reg_data[REG_BL_ERROR] == BL_ERROR_NO_ERR_IDLE &&
341 (reg_data[REG_BL_STATUS] ==
342 (BL_STATUS_RUNNING | BL_STATUS_CSUM_VALID) ||
343 reg_data[REG_BL_STATUS] == BL_STATUS_RUNNING)) {
344
345
346
347
348
349 cyapa->gen = CYAPA_GEN3;
350 cyapa->state = CYAPA_STATE_BL_IDLE;
351 } else if (reg_data[REG_BL_FILE] == BL_FILE &&
352 (reg_data[REG_BL_STATUS] & BL_STATUS_RUNNING) ==
353 BL_STATUS_RUNNING) {
354 cyapa->gen = CYAPA_GEN3;
355 if (reg_data[REG_BL_STATUS] & BL_STATUS_BUSY) {
356 cyapa->state = CYAPA_STATE_BL_BUSY;
357 } else {
358 if ((reg_data[REG_BL_ERROR] & BL_ERROR_BOOTLOADING) ==
359 BL_ERROR_BOOTLOADING)
360 cyapa->state = CYAPA_STATE_BL_ACTIVE;
361 else
362 cyapa->state = CYAPA_STATE_BL_IDLE;
363 }
364 } else if ((reg_data[REG_OP_STATUS] & OP_STATUS_SRC) &&
365 (reg_data[REG_OP_DATA1] & OP_DATA_VALID)) {
366
367
368
369
370
371 if (GEN3_FINGER_NUM(reg_data[REG_OP_DATA1]) <=
372 GEN3_MAX_FINGERS) {
373
374 cyapa->gen = CYAPA_GEN3;
375 cyapa->state = CYAPA_STATE_OP;
376 }
377 } else if (reg_data[REG_OP_STATUS] == 0x0C &&
378 reg_data[REG_OP_DATA1] == 0x08) {
379
380 cyapa->gen = CYAPA_GEN3;
381 cyapa->state = CYAPA_STATE_OP;
382 } else if (reg_data[REG_BL_STATUS] &
383 (BL_STATUS_RUNNING | BL_STATUS_BUSY)) {
384 cyapa->gen = CYAPA_GEN3;
385 cyapa->state = CYAPA_STATE_BL_BUSY;
386 }
387
388 if (cyapa->gen == CYAPA_GEN3 && (cyapa->state == CYAPA_STATE_OP ||
389 cyapa->state == CYAPA_STATE_BL_IDLE ||
390 cyapa->state == CYAPA_STATE_BL_ACTIVE ||
391 cyapa->state == CYAPA_STATE_BL_BUSY))
392 return 0;
393
394 return -EAGAIN;
395 }
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407
408
409 static int cyapa_gen3_bl_enter(struct cyapa *cyapa)
410 {
411 int error;
412 int waiting_time;
413
414 error = cyapa_poll_state(cyapa, 500);
415 if (error)
416 return error;
417 if (cyapa->state == CYAPA_STATE_BL_IDLE) {
418
419 return 0;
420 }
421
422 if (cyapa->state != CYAPA_STATE_OP)
423 return -EAGAIN;
424
425 cyapa->operational = false;
426 cyapa->state = CYAPA_STATE_NO_DEVICE;
427 error = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET, 0x01);
428 if (error)
429 return -EIO;
430
431 usleep_range(25000, 50000);
432 waiting_time = 2000;
433 do {
434 error = cyapa_poll_state(cyapa, 500);
435 if (error) {
436 if (error == -ETIMEDOUT) {
437 waiting_time -= 500;
438 continue;
439 }
440 return error;
441 }
442
443 if ((cyapa->state == CYAPA_STATE_BL_IDLE) &&
444 !(cyapa->status[REG_BL_STATUS] & BL_STATUS_WATCHDOG))
445 break;
446
447 msleep(100);
448 waiting_time -= 100;
449 } while (waiting_time > 0);
450
451 if ((cyapa->state != CYAPA_STATE_BL_IDLE) ||
452 (cyapa->status[REG_BL_STATUS] & BL_STATUS_WATCHDOG))
453 return -EAGAIN;
454
455 return 0;
456 }
457
458 static int cyapa_gen3_bl_activate(struct cyapa *cyapa)
459 {
460 int error;
461
462 error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_activate),
463 bl_activate);
464 if (error)
465 return error;
466
467
468 msleep(2000);
469 error = cyapa_poll_state(cyapa, 11000);
470 if (error)
471 return error;
472 if (cyapa->state != CYAPA_STATE_BL_ACTIVE)
473 return -EAGAIN;
474
475 return 0;
476 }
477
478 static int cyapa_gen3_bl_deactivate(struct cyapa *cyapa)
479 {
480 int error;
481
482 error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_deactivate),
483 bl_deactivate);
484 if (error)
485 return error;
486
487
488 msleep(100);
489 error = cyapa_poll_state(cyapa, 500);
490 if (error)
491 return error;
492 if (cyapa->state != CYAPA_STATE_BL_IDLE)
493 return -EAGAIN;
494 return 0;
495 }
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508
509
510 static int cyapa_gen3_bl_exit(struct cyapa *cyapa)
511 {
512 int error;
513
514 error = cyapa_i2c_reg_write_block(cyapa, 0, sizeof(bl_exit), bl_exit);
515 if (error)
516 return error;
517
518
519
520
521
522 msleep(50);
523
524
525
526
527
528
529 error = cyapa_poll_state(cyapa, 4000);
530 if (error < 0)
531 return error;
532 if (cyapa->state != CYAPA_STATE_OP)
533 return -EAGAIN;
534
535 return 0;
536 }
537
538 static u16 cyapa_gen3_csum(const u8 *buf, size_t count)
539 {
540 int i;
541 u16 csum = 0;
542
543 for (i = 0; i < count; i++)
544 csum += buf[i];
545
546 return csum;
547 }
548
549
550
551
552
553
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560
561
562
563
564 static int cyapa_gen3_check_fw(struct cyapa *cyapa, const struct firmware *fw)
565 {
566 struct device *dev = &cyapa->client->dev;
567 u16 csum;
568 u16 csum_expected;
569
570
571 if (fw->size != CYAPA_FW_SIZE) {
572 dev_err(dev, "invalid firmware size = %zu, expected %u.\n",
573 fw->size, CYAPA_FW_SIZE);
574 return -EINVAL;
575 }
576
577
578 csum_expected = (fw->data[0] << 8) | fw->data[1];
579 csum = cyapa_gen3_csum(&fw->data[2], CYAPA_FW_HDR_SIZE - 2);
580 if (csum != csum_expected) {
581 dev_err(dev, "%s %04x, expected: %04x\n",
582 "invalid firmware header checksum = ",
583 csum, csum_expected);
584 return -EINVAL;
585 }
586
587
588 csum_expected = (fw->data[CYAPA_FW_HDR_SIZE - 2] << 8) |
589 fw->data[CYAPA_FW_HDR_SIZE - 1];
590 csum = cyapa_gen3_csum(&fw->data[CYAPA_FW_HDR_SIZE],
591 CYAPA_FW_DATA_SIZE);
592 if (csum != csum_expected) {
593 dev_err(dev, "%s %04x, expected: %04x\n",
594 "invalid firmware header checksum = ",
595 csum, csum_expected);
596 return -EINVAL;
597 }
598 return 0;
599 }
600
601
602
603
604
605
606
607
608 static int cyapa_gen3_write_buffer(struct cyapa *cyapa,
609 const u8 *buf, size_t len)
610 {
611 int error;
612 size_t i;
613 unsigned char cmd[CYAPA_CMD_LEN + 1];
614 size_t cmd_len;
615
616 for (i = 0; i < len; i += CYAPA_CMD_LEN) {
617 const u8 *payload = &buf[i];
618
619 cmd_len = (len - i >= CYAPA_CMD_LEN) ? CYAPA_CMD_LEN : len - i;
620 cmd[0] = i;
621 memcpy(&cmd[1], payload, cmd_len);
622
623 error = cyapa_i2c_reg_write_block(cyapa, 0, cmd_len + 1, cmd);
624 if (error)
625 return error;
626 }
627 return 0;
628 }
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646 static int cyapa_gen3_write_fw_block(struct cyapa *cyapa,
647 u16 block, const u8 *data)
648 {
649 int ret;
650 struct gen3_write_block_cmd write_block_cmd;
651 u8 status[BL_STATUS_SIZE];
652 int tries;
653 u8 bl_status, bl_error;
654
655
656 write_block_cmd.checksum_seed = GEN3_BL_CMD_CHECKSUM_SEED;
657 write_block_cmd.cmd_code = GEN3_BL_CMD_WRITE_BLOCK;
658 memcpy(write_block_cmd.key, security_key, sizeof(security_key));
659 put_unaligned_be16(block, &write_block_cmd.block_num);
660 memcpy(write_block_cmd.block_data, data, CYAPA_FW_BLOCK_SIZE);
661 write_block_cmd.block_checksum = cyapa_gen3_csum(
662 write_block_cmd.block_data, CYAPA_FW_BLOCK_SIZE);
663 write_block_cmd.cmd_checksum = cyapa_gen3_csum((u8 *)&write_block_cmd,
664 sizeof(write_block_cmd) - 1);
665
666 ret = cyapa_gen3_write_buffer(cyapa, (u8 *)&write_block_cmd,
667 sizeof(write_block_cmd));
668 if (ret)
669 return ret;
670
671
672 tries = 11;
673 do {
674 usleep_range(10000, 20000);
675
676
677 ret = cyapa_i2c_reg_read_block(cyapa, BL_HEAD_OFFSET,
678 BL_STATUS_SIZE, status);
679 if (ret != BL_STATUS_SIZE)
680 return (ret < 0) ? ret : -EIO;
681 } while ((status[REG_BL_STATUS] & BL_STATUS_BUSY) && --tries);
682
683
684 bl_status = status[REG_BL_STATUS] & ~BL_STATUS_REV_MASK;
685 bl_error = status[REG_BL_ERROR] & ~BL_ERROR_RESERVED;
686
687 if (bl_status & BL_STATUS_BUSY)
688 ret = -ETIMEDOUT;
689 else if (bl_status != BL_STATUS_RUNNING ||
690 bl_error != BL_ERROR_BOOTLOADING)
691 ret = -EIO;
692 else
693 ret = 0;
694
695 return ret;
696 }
697
698 static int cyapa_gen3_write_blocks(struct cyapa *cyapa,
699 size_t start_block, size_t block_count,
700 const u8 *image_data)
701 {
702 int error;
703 int i;
704
705 for (i = 0; i < block_count; i++) {
706 size_t block = start_block + i;
707 size_t addr = i * CYAPA_FW_BLOCK_SIZE;
708 const u8 *data = &image_data[addr];
709
710 error = cyapa_gen3_write_fw_block(cyapa, block, data);
711 if (error)
712 return error;
713 }
714 return 0;
715 }
716
717 static int cyapa_gen3_do_fw_update(struct cyapa *cyapa,
718 const struct firmware *fw)
719 {
720 struct device *dev = &cyapa->client->dev;
721 int error;
722
723
724 error = cyapa_gen3_write_blocks(cyapa,
725 CYAPA_FW_DATA_BLOCK_START, CYAPA_FW_DATA_BLOCK_COUNT,
726 &fw->data[CYAPA_FW_HDR_BLOCK_COUNT * CYAPA_FW_BLOCK_SIZE]);
727 if (error) {
728 dev_err(dev, "FW update aborted, write image: %d\n", error);
729 return error;
730 }
731
732
733 error = cyapa_gen3_write_blocks(cyapa,
734 CYAPA_FW_HDR_BLOCK_START, CYAPA_FW_HDR_BLOCK_COUNT,
735 &fw->data[0]);
736 if (error) {
737 dev_err(dev, "FW update aborted, write checksum: %d\n", error);
738 return error;
739 }
740
741 return 0;
742 }
743
744 static ssize_t cyapa_gen3_do_calibrate(struct device *dev,
745 struct device_attribute *attr,
746 const char *buf, size_t count)
747 {
748 struct cyapa *cyapa = dev_get_drvdata(dev);
749 unsigned long timeout;
750 int ret;
751
752 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
753 if (ret < 0) {
754 dev_err(dev, "Error reading dev status: %d\n", ret);
755 goto out;
756 }
757 if ((ret & CYAPA_DEV_NORMAL) != CYAPA_DEV_NORMAL) {
758 dev_warn(dev, "Trackpad device is busy, device state: 0x%02x\n",
759 ret);
760 ret = -EAGAIN;
761 goto out;
762 }
763
764 ret = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET,
765 OP_RECALIBRATION_MASK);
766 if (ret < 0) {
767 dev_err(dev, "Failed to send calibrate command: %d\n",
768 ret);
769 goto out;
770 }
771
772
773 timeout = jiffies + 2 * HZ;
774 do {
775
776
777
778
779
780 msleep(100);
781 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
782 if (ret < 0) {
783 dev_err(dev, "Error reading dev status: %d\n", ret);
784 goto out;
785 }
786 if ((ret & CYAPA_DEV_NORMAL) == CYAPA_DEV_NORMAL) {
787 dev_dbg(dev, "Calibration successful.\n");
788 goto out;
789 }
790 } while (time_is_after_jiffies(timeout));
791
792 dev_err(dev, "Failed to calibrate. Timeout.\n");
793 ret = -ETIMEDOUT;
794
795 out:
796 return ret < 0 ? ret : count;
797 }
798
799 static ssize_t cyapa_gen3_show_baseline(struct device *dev,
800 struct device_attribute *attr, char *buf)
801 {
802 struct cyapa *cyapa = dev_get_drvdata(dev);
803 int max_baseline, min_baseline;
804 int tries;
805 int ret;
806
807 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
808 if (ret < 0) {
809 dev_err(dev, "Error reading dev status. err = %d\n", ret);
810 goto out;
811 }
812 if ((ret & CYAPA_DEV_NORMAL) != CYAPA_DEV_NORMAL) {
813 dev_warn(dev, "Trackpad device is busy. device state = 0x%x\n",
814 ret);
815 ret = -EAGAIN;
816 goto out;
817 }
818
819 ret = cyapa_write_byte(cyapa, CYAPA_CMD_SOFT_RESET,
820 OP_REPORT_BASELINE_MASK);
821 if (ret < 0) {
822 dev_err(dev, "Failed to send report baseline command. %d\n",
823 ret);
824 goto out;
825 }
826
827 tries = 3;
828 do {
829 usleep_range(10000, 20000);
830
831 ret = cyapa_read_byte(cyapa, CYAPA_CMD_DEV_STATUS);
832 if (ret < 0) {
833 dev_err(dev, "Error reading dev status. err = %d\n",
834 ret);
835 goto out;
836 }
837 if ((ret & CYAPA_DEV_NORMAL) == CYAPA_DEV_NORMAL)
838 break;
839 } while (--tries);
840
841 if (tries == 0) {
842 dev_err(dev, "Device timed out going to Normal state.\n");
843 ret = -ETIMEDOUT;
844 goto out;
845 }
846
847 ret = cyapa_read_byte(cyapa, CYAPA_CMD_MAX_BASELINE);
848 if (ret < 0) {
849 dev_err(dev, "Failed to read max baseline. err = %d\n", ret);
850 goto out;
851 }
852 max_baseline = ret;
853
854 ret = cyapa_read_byte(cyapa, CYAPA_CMD_MIN_BASELINE);
855 if (ret < 0) {
856 dev_err(dev, "Failed to read min baseline. err = %d\n", ret);
857 goto out;
858 }
859 min_baseline = ret;
860
861 dev_dbg(dev, "Baseline report successful. Max: %d Min: %d\n",
862 max_baseline, min_baseline);
863 ret = scnprintf(buf, PAGE_SIZE, "%d %d\n", max_baseline, min_baseline);
864
865 out:
866 return ret;
867 }
868
869
870
871
872
873
874
875
876
877 static u16 cyapa_get_wait_time_for_pwr_cmd(u8 pwr_mode)
878 {
879 switch (pwr_mode) {
880 case PWR_MODE_FULL_ACTIVE: return 20;
881 case PWR_MODE_BTN_ONLY: return 20;
882 case PWR_MODE_OFF: return 20;
883 default: return cyapa_pwr_cmd_to_sleep_time(pwr_mode) + 50;
884 }
885 }
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907 static int cyapa_gen3_set_power_mode(struct cyapa *cyapa, u8 power_mode,
908 u16 always_unused, enum cyapa_pm_stage pm_stage)
909 {
910 struct input_dev *input = cyapa->input;
911 u8 power;
912 int tries;
913 int sleep_time;
914 int interval;
915 int ret;
916
917 if (cyapa->state != CYAPA_STATE_OP)
918 return 0;
919
920 tries = SET_POWER_MODE_TRIES;
921 while (tries--) {
922 ret = cyapa_read_byte(cyapa, CYAPA_CMD_POWER_MODE);
923 if (ret >= 0)
924 break;
925 usleep_range(SET_POWER_MODE_DELAY, 2 * SET_POWER_MODE_DELAY);
926 }
927 if (ret < 0)
928 return ret;
929
930
931
932
933
934 if ((ret & PWR_MODE_MASK) == power_mode)
935 return 0;
936
937 sleep_time = (int)cyapa_get_wait_time_for_pwr_cmd(ret & PWR_MODE_MASK);
938 power = ret;
939 power &= ~PWR_MODE_MASK;
940 power |= power_mode & PWR_MODE_MASK;
941 tries = SET_POWER_MODE_TRIES;
942 while (tries--) {
943 ret = cyapa_write_byte(cyapa, CYAPA_CMD_POWER_MODE, power);
944 if (!ret)
945 break;
946 usleep_range(SET_POWER_MODE_DELAY, 2 * SET_POWER_MODE_DELAY);
947 }
948
949
950
951
952
953
954
955 if (cyapa->operational && input && input->users &&
956 (pm_stage == CYAPA_PM_RUNTIME_SUSPEND ||
957 pm_stage == CYAPA_PM_RUNTIME_RESUME)) {
958
959 interval = 1000 / 120;
960 while (sleep_time > 0) {
961 if (sleep_time > interval)
962 msleep(interval);
963 else
964 msleep(sleep_time);
965 sleep_time -= interval;
966 cyapa_gen3_try_poll_handler(cyapa);
967 }
968 } else {
969 msleep(sleep_time);
970 }
971
972 return ret;
973 }
974
975 static int cyapa_gen3_set_proximity(struct cyapa *cyapa, bool enable)
976 {
977 return -EOPNOTSUPP;
978 }
979
980 static int cyapa_gen3_get_query_data(struct cyapa *cyapa)
981 {
982 u8 query_data[QUERY_DATA_SIZE];
983 int ret;
984
985 if (cyapa->state != CYAPA_STATE_OP)
986 return -EBUSY;
987
988 ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_QUERY, query_data);
989 if (ret != QUERY_DATA_SIZE)
990 return (ret < 0) ? ret : -EIO;
991
992 memcpy(&cyapa->product_id[0], &query_data[0], 5);
993 cyapa->product_id[5] = '-';
994 memcpy(&cyapa->product_id[6], &query_data[5], 6);
995 cyapa->product_id[12] = '-';
996 memcpy(&cyapa->product_id[13], &query_data[11], 2);
997 cyapa->product_id[15] = '\0';
998
999 cyapa->fw_maj_ver = query_data[15];
1000 cyapa->fw_min_ver = query_data[16];
1001
1002 cyapa->btn_capability = query_data[19] & CAPABILITY_BTN_MASK;
1003
1004 cyapa->gen = query_data[20] & 0x0f;
1005
1006 cyapa->max_abs_x = ((query_data[21] & 0xf0) << 4) | query_data[22];
1007 cyapa->max_abs_y = ((query_data[21] & 0x0f) << 8) | query_data[23];
1008
1009 cyapa->physical_size_x =
1010 ((query_data[24] & 0xf0) << 4) | query_data[25];
1011 cyapa->physical_size_y =
1012 ((query_data[24] & 0x0f) << 8) | query_data[26];
1013
1014 cyapa->max_z = 255;
1015
1016 return 0;
1017 }
1018
1019 static int cyapa_gen3_bl_query_data(struct cyapa *cyapa)
1020 {
1021 u8 bl_data[CYAPA_CMD_LEN];
1022 int ret;
1023
1024 ret = cyapa_i2c_reg_read_block(cyapa, 0, CYAPA_CMD_LEN, bl_data);
1025 if (ret != CYAPA_CMD_LEN)
1026 return (ret < 0) ? ret : -EIO;
1027
1028
1029
1030
1031
1032
1033
1034 if (bl_data[REG_BL_STATUS] ==
1035 (BL_STATUS_RUNNING | BL_STATUS_CSUM_VALID)) {
1036 cyapa->fw_maj_ver = bl_data[GEN3_BL_IDLE_FW_MAJ_VER_OFFSET];
1037 cyapa->fw_min_ver = bl_data[GEN3_BL_IDLE_FW_MIN_VER_OFFSET];
1038 }
1039
1040 return 0;
1041 }
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057 static int cyapa_gen3_do_operational_check(struct cyapa *cyapa)
1058 {
1059 struct device *dev = &cyapa->client->dev;
1060 int error;
1061
1062 switch (cyapa->state) {
1063 case CYAPA_STATE_BL_ACTIVE:
1064 error = cyapa_gen3_bl_deactivate(cyapa);
1065 if (error) {
1066 dev_err(dev, "failed to bl_deactivate: %d\n", error);
1067 return error;
1068 }
1069
1070
1071 case CYAPA_STATE_BL_IDLE:
1072
1073 cyapa_gen3_bl_query_data(cyapa);
1074
1075 error = cyapa_gen3_bl_exit(cyapa);
1076 if (error) {
1077 dev_err(dev, "failed to bl_exit: %d\n", error);
1078 return error;
1079 }
1080
1081
1082 case CYAPA_STATE_OP:
1083
1084
1085
1086
1087 error = cyapa_gen3_set_power_mode(cyapa,
1088 PWR_MODE_FULL_ACTIVE, 0, CYAPA_PM_ACTIVE);
1089 if (error)
1090 dev_err(dev, "%s: set full power mode failed: %d\n",
1091 __func__, error);
1092 error = cyapa_gen3_get_query_data(cyapa);
1093 if (error < 0)
1094 return error;
1095
1096
1097 if (cyapa->gen != CYAPA_GEN3) {
1098 dev_err(dev, "unsupported protocol version (%d)",
1099 cyapa->gen);
1100 return -EINVAL;
1101 }
1102
1103
1104 if (memcmp(cyapa->product_id, product_id,
1105 strlen(product_id)) != 0) {
1106 dev_err(dev, "unsupported product ID (%s)\n",
1107 cyapa->product_id);
1108 return -EINVAL;
1109 }
1110
1111 return 0;
1112
1113 default:
1114 return -EIO;
1115 }
1116 return 0;
1117 }
1118
1119
1120
1121
1122
1123 static bool cyapa_gen3_irq_cmd_handler(struct cyapa *cyapa)
1124 {
1125
1126 if (cyapa->gen != CYAPA_GEN3)
1127 return true;
1128
1129 if (cyapa->operational)
1130 return true;
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141 return false;
1142 }
1143
1144 static int cyapa_gen3_event_process(struct cyapa *cyapa,
1145 struct cyapa_reg_data *data)
1146 {
1147 struct input_dev *input = cyapa->input;
1148 int num_fingers;
1149 int i;
1150
1151 num_fingers = (data->finger_btn >> 4) & 0x0f;
1152 for (i = 0; i < num_fingers; i++) {
1153 const struct cyapa_touch *touch = &data->touches[i];
1154
1155 int slot = touch->id - 1;
1156
1157 input_mt_slot(input, slot);
1158 input_mt_report_slot_state(input, MT_TOOL_FINGER, true);
1159 input_report_abs(input, ABS_MT_POSITION_X,
1160 ((touch->xy_hi & 0xf0) << 4) | touch->x_lo);
1161 input_report_abs(input, ABS_MT_POSITION_Y,
1162 ((touch->xy_hi & 0x0f) << 8) | touch->y_lo);
1163 input_report_abs(input, ABS_MT_PRESSURE, touch->pressure);
1164 }
1165
1166 input_mt_sync_frame(input);
1167
1168 if (cyapa->btn_capability & CAPABILITY_LEFT_BTN_MASK)
1169 input_report_key(input, BTN_LEFT,
1170 !!(data->finger_btn & OP_DATA_LEFT_BTN));
1171 if (cyapa->btn_capability & CAPABILITY_MIDDLE_BTN_MASK)
1172 input_report_key(input, BTN_MIDDLE,
1173 !!(data->finger_btn & OP_DATA_MIDDLE_BTN));
1174 if (cyapa->btn_capability & CAPABILITY_RIGHT_BTN_MASK)
1175 input_report_key(input, BTN_RIGHT,
1176 !!(data->finger_btn & OP_DATA_RIGHT_BTN));
1177 input_sync(input);
1178
1179 return 0;
1180 }
1181
1182 static int cyapa_gen3_irq_handler(struct cyapa *cyapa)
1183 {
1184 struct device *dev = &cyapa->client->dev;
1185 struct cyapa_reg_data data;
1186 int ret;
1187
1188 ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_DATA, (u8 *)&data);
1189 if (ret != sizeof(data)) {
1190 dev_err(dev, "failed to read report data, (%d)\n", ret);
1191 return -EINVAL;
1192 }
1193
1194 if ((data.device_status & OP_STATUS_SRC) != OP_STATUS_SRC ||
1195 (data.device_status & OP_STATUS_DEV) != CYAPA_DEV_NORMAL ||
1196 (data.finger_btn & OP_DATA_VALID) != OP_DATA_VALID) {
1197 dev_err(dev, "invalid device state bytes: %02x %02x\n",
1198 data.device_status, data.finger_btn);
1199 return -EINVAL;
1200 }
1201
1202 return cyapa_gen3_event_process(cyapa, &data);
1203 }
1204
1205
1206
1207
1208
1209
1210
1211 static int cyapa_gen3_try_poll_handler(struct cyapa *cyapa)
1212 {
1213 struct cyapa_reg_data data;
1214 int ret;
1215
1216 ret = cyapa_read_block(cyapa, CYAPA_CMD_GROUP_DATA, (u8 *)&data);
1217 if (ret != sizeof(data))
1218 return -EINVAL;
1219
1220 if ((data.device_status & OP_STATUS_SRC) != OP_STATUS_SRC ||
1221 (data.device_status & OP_STATUS_DEV) != CYAPA_DEV_NORMAL ||
1222 (data.finger_btn & OP_DATA_VALID) != OP_DATA_VALID)
1223 return -EINVAL;
1224
1225 return cyapa_gen3_event_process(cyapa, &data);
1226
1227 }
1228
1229 static int cyapa_gen3_initialize(struct cyapa *cyapa) { return 0; }
1230 static int cyapa_gen3_bl_initiate(struct cyapa *cyapa,
1231 const struct firmware *fw) { return 0; }
1232 static int cyapa_gen3_empty_output_data(struct cyapa *cyapa,
1233 u8 *buf, int *len, cb_sort func) { return 0; }
1234
1235 const struct cyapa_dev_ops cyapa_gen3_ops = {
1236 .check_fw = cyapa_gen3_check_fw,
1237 .bl_enter = cyapa_gen3_bl_enter,
1238 .bl_activate = cyapa_gen3_bl_activate,
1239 .update_fw = cyapa_gen3_do_fw_update,
1240 .bl_deactivate = cyapa_gen3_bl_deactivate,
1241 .bl_initiate = cyapa_gen3_bl_initiate,
1242
1243 .show_baseline = cyapa_gen3_show_baseline,
1244 .calibrate_store = cyapa_gen3_do_calibrate,
1245
1246 .initialize = cyapa_gen3_initialize,
1247
1248 .state_parse = cyapa_gen3_state_parse,
1249 .operational_check = cyapa_gen3_do_operational_check,
1250
1251 .irq_handler = cyapa_gen3_irq_handler,
1252 .irq_cmd_handler = cyapa_gen3_irq_cmd_handler,
1253 .sort_empty_output_data = cyapa_gen3_empty_output_data,
1254 .set_power_mode = cyapa_gen3_set_power_mode,
1255
1256 .set_proximity = cyapa_gen3_set_proximity,
1257 };