root/arch/csky/abiv1/inc/abi/entry.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
   3 
   4 #ifndef __ASM_CSKY_ENTRY_H
   5 #define __ASM_CSKY_ENTRY_H
   6 
   7 #include <asm/setup.h>
   8 #include <abi/regdef.h>
   9 
  10 #define LSAVE_PC        8
  11 #define LSAVE_PSR       12
  12 #define LSAVE_A0        24
  13 #define LSAVE_A1        28
  14 #define LSAVE_A2        32
  15 #define LSAVE_A3        36
  16 #define LSAVE_A4        40
  17 #define LSAVE_A5        44
  18 
  19 #define usp ss1
  20 
  21 .macro USPTOKSP
  22         mtcr    sp, usp
  23         mfcr    sp, ss0
  24 .endm
  25 
  26 .macro KSPTOUSP
  27         mtcr    sp, ss0
  28         mfcr    sp, usp
  29 .endm
  30 
  31 .macro  SAVE_ALL epc_inc
  32         mtcr    r13, ss2
  33         mfcr    r13, epsr
  34         btsti   r13, 31
  35         bt      1f
  36         USPTOKSP
  37 1:
  38         subi    sp, 32
  39         subi    sp, 32
  40         subi    sp, 16
  41         stw     r13, (sp, 12)
  42 
  43         stw     lr, (sp, 4)
  44 
  45         mfcr    lr, epc
  46         movi    r13, \epc_inc
  47         add     lr, r13
  48         stw     lr, (sp, 8)
  49 
  50         mov     lr, sp
  51         addi    lr, 32
  52         addi    lr, 32
  53         addi    lr, 16
  54         bt      2f
  55         mfcr    lr, ss1
  56 2:
  57         stw     lr, (sp, 16)
  58 
  59         stw     a0, (sp, 20)
  60         stw     a0, (sp, 24)
  61         stw     a1, (sp, 28)
  62         stw     a2, (sp, 32)
  63         stw     a3, (sp, 36)
  64 
  65         addi    sp, 32
  66         addi    sp, 8
  67         mfcr    r13, ss2
  68         stw     r6, (sp)
  69         stw     r7, (sp, 4)
  70         stw     r8, (sp, 8)
  71         stw     r9, (sp, 12)
  72         stw     r10, (sp, 16)
  73         stw     r11, (sp, 20)
  74         stw     r12, (sp, 24)
  75         stw     r13, (sp, 28)
  76         stw     r14, (sp, 32)
  77         stw     r1, (sp, 36)
  78         subi    sp, 32
  79         subi    sp, 8
  80 .endm
  81 
  82 .macro  RESTORE_ALL
  83         psrclr  ie
  84         ldw     lr, (sp, 4)
  85         ldw     a0, (sp, 8)
  86         mtcr    a0, epc
  87         ldw     a0, (sp, 12)
  88         mtcr    a0, epsr
  89         btsti   a0, 31
  90         bt      1f
  91         ldw     a0, (sp, 16)
  92         mtcr    a0, ss1
  93 1:
  94         ldw     a0, (sp, 24)
  95         ldw     a1, (sp, 28)
  96         ldw     a2, (sp, 32)
  97         ldw     a3, (sp, 36)
  98 
  99         addi    sp, 32
 100         addi    sp, 8
 101         ldw     r6, (sp)
 102         ldw     r7, (sp, 4)
 103         ldw     r8, (sp, 8)
 104         ldw     r9, (sp, 12)
 105         ldw     r10, (sp, 16)
 106         ldw     r11, (sp, 20)
 107         ldw     r12, (sp, 24)
 108         ldw     r13, (sp, 28)
 109         ldw     r14, (sp, 32)
 110         ldw     r1, (sp, 36)
 111         addi    sp, 32
 112         addi    sp, 8
 113 
 114         bt      2f
 115         KSPTOUSP
 116 2:
 117         rte
 118 .endm
 119 
 120 .macro SAVE_SWITCH_STACK
 121         subi    sp, 32
 122         stm     r8-r15, (sp)
 123 .endm
 124 
 125 .macro RESTORE_SWITCH_STACK
 126         ldm     r8-r15, (sp)
 127         addi    sp, 32
 128 .endm
 129 
 130 /* MMU registers operators. */
 131 .macro RD_MIR   rx
 132         cprcr   \rx, cpcr0
 133 .endm
 134 
 135 .macro RD_MEH   rx
 136         cprcr   \rx, cpcr4
 137 .endm
 138 
 139 .macro RD_MCIR  rx
 140         cprcr   \rx, cpcr8
 141 .endm
 142 
 143 .macro RD_PGDR  rx
 144         cprcr   \rx, cpcr29
 145 .endm
 146 
 147 .macro WR_MEH   rx
 148         cpwcr   \rx, cpcr4
 149 .endm
 150 
 151 .macro WR_MCIR  rx
 152         cpwcr   \rx, cpcr8
 153 .endm
 154 
 155 .macro SETUP_MMU
 156         /* Init psr and enable ee */
 157         lrw     r6, DEFAULT_PSR_VALUE
 158         mtcr    r6, psr
 159         psrset  ee
 160 
 161         /* Select MMU as co-processor */
 162         cpseti  cp15
 163 
 164         /*
 165          * cpcr30 format:
 166          * 31 - 29 | 28 - 4 | 3 | 2 | 1 | 0
 167          *   BA     Reserved  C   D   V
 168          */
 169         cprcr   r6, cpcr30
 170         lsri    r6, 29
 171         lsli    r6, 29
 172         addi    r6, 0xe
 173         cpwcr   r6, cpcr30
 174 
 175         movi    r6, 0
 176         cpwcr   r6, cpcr31
 177 .endm
 178 
 179 .macro ANDI_R3 rx, imm
 180         lsri    \rx, 3
 181         andi    \rx, (\imm >> 3)
 182 .endm
 183 #endif /* __ASM_CSKY_ENTRY_H */