This source file includes following definitions.
- ucb1400_ts_mode_int
- ucb1400_ts_read_pressure
- ucb1400_ts_read_xpos
- ucb1400_ts_read_ypos
- ucb1400_ts_read_xres
- ucb1400_ts_read_yres
- ucb1400_ts_pen_up
- ucb1400_ts_irq_enable
- ucb1400_ts_irq_disable
- ucb1400_ts_report_event
- ucb1400_ts_event_release
- ucb1400_clear_pending_irq
- ucb1400_irq
- ucb1400_ts_stop
- ucb1400_ts_start
- ucb1400_ts_open
- ucb1400_ts_close
- ucb1400_ts_detect_irq
- ucb1400_ts_probe
- ucb1400_ts_remove
- ucb1400_ts_suspend
- ucb1400_ts_resume
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18 #include <linux/module.h>
19 #include <linux/delay.h>
20 #include <linux/sched.h>
21 #include <linux/wait.h>
22 #include <linux/input.h>
23 #include <linux/device.h>
24 #include <linux/interrupt.h>
25 #include <linux/ucb1400.h>
26
27 #define UCB1400_TS_POLL_PERIOD 10
28
29 static bool adcsync;
30 static int ts_delay = 55;
31 static int ts_delay_pressure;
32
33
34 static void ucb1400_ts_mode_int(struct ucb1400_ts *ucb)
35 {
36 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
37 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
38 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
39 UCB_TS_CR_MODE_INT);
40 }
41
42
43
44
45
46 static unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb)
47 {
48 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
49 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
50 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
51 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
52
53 udelay(ts_delay_pressure);
54
55 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
56 }
57
58
59
60
61
62
63
64 static unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb)
65 {
66 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
67 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
68 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
69 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
70 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
71 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
72 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
73 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
74 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
75
76 udelay(ts_delay);
77
78 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
79 }
80
81
82
83
84
85
86
87 static int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb)
88 {
89 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
90 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
91 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
92 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
93 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
94 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
95 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
96 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
97 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
98
99 udelay(ts_delay);
100
101 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync);
102 }
103
104
105
106
107
108 static unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb)
109 {
110 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
111 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
112 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
113 return ucb1400_adc_read(ucb->ac97, 0, adcsync);
114 }
115
116
117
118
119
120 static unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb)
121 {
122 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
123 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
124 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
125 return ucb1400_adc_read(ucb->ac97, 0, adcsync);
126 }
127
128 static int ucb1400_ts_pen_up(struct ucb1400_ts *ucb)
129 {
130 unsigned short val = ucb1400_reg_read(ucb->ac97, UCB_TS_CR);
131
132 return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW);
133 }
134
135 static void ucb1400_ts_irq_enable(struct ucb1400_ts *ucb)
136 {
137 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, UCB_IE_TSPX);
138 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
139 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_TSPX);
140 }
141
142 static void ucb1400_ts_irq_disable(struct ucb1400_ts *ucb)
143 {
144 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0);
145 }
146
147 static void ucb1400_ts_report_event(struct input_dev *idev, u16 pressure, u16 x, u16 y)
148 {
149 input_report_abs(idev, ABS_X, x);
150 input_report_abs(idev, ABS_Y, y);
151 input_report_abs(idev, ABS_PRESSURE, pressure);
152 input_report_key(idev, BTN_TOUCH, 1);
153 input_sync(idev);
154 }
155
156 static void ucb1400_ts_event_release(struct input_dev *idev)
157 {
158 input_report_abs(idev, ABS_PRESSURE, 0);
159 input_report_key(idev, BTN_TOUCH, 0);
160 input_sync(idev);
161 }
162
163 static void ucb1400_clear_pending_irq(struct ucb1400_ts *ucb)
164 {
165 unsigned int isr;
166
167 isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS);
168 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr);
169 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
170
171 if (isr & UCB_IE_TSPX)
172 ucb1400_ts_irq_disable(ucb);
173 else
174 dev_dbg(&ucb->ts_idev->dev,
175 "ucb1400: unexpected IE_STATUS = %#x\n", isr);
176 }
177
178
179
180
181
182
183
184
185 static irqreturn_t ucb1400_irq(int irqnr, void *devid)
186 {
187 struct ucb1400_ts *ucb = devid;
188 unsigned int x, y, p;
189 bool penup;
190
191 if (unlikely(irqnr != ucb->irq))
192 return IRQ_NONE;
193
194 ucb1400_clear_pending_irq(ucb);
195
196
197 msleep(UCB1400_TS_POLL_PERIOD);
198
199 while (!ucb->stopped && !(penup = ucb1400_ts_pen_up(ucb))) {
200
201 ucb1400_adc_enable(ucb->ac97);
202 x = ucb1400_ts_read_xpos(ucb);
203 y = ucb1400_ts_read_ypos(ucb);
204 p = ucb1400_ts_read_pressure(ucb);
205 ucb1400_adc_disable(ucb->ac97);
206
207 ucb1400_ts_report_event(ucb->ts_idev, p, x, y);
208
209 wait_event_timeout(ucb->ts_wait, ucb->stopped,
210 msecs_to_jiffies(UCB1400_TS_POLL_PERIOD));
211 }
212
213 ucb1400_ts_event_release(ucb->ts_idev);
214
215 if (!ucb->stopped) {
216
217 ucb1400_ts_mode_int(ucb);
218 ucb1400_ts_irq_enable(ucb);
219 }
220
221 return IRQ_HANDLED;
222 }
223
224 static void ucb1400_ts_stop(struct ucb1400_ts *ucb)
225 {
226
227 ucb->stopped = true;
228 mb();
229 wake_up(&ucb->ts_wait);
230 disable_irq(ucb->irq);
231
232 ucb1400_ts_irq_disable(ucb);
233 ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0);
234 }
235
236
237 static void ucb1400_ts_start(struct ucb1400_ts *ucb)
238 {
239
240 ucb->stopped = false;
241 mb();
242
243 ucb1400_ts_mode_int(ucb);
244 ucb1400_ts_irq_enable(ucb);
245
246 enable_irq(ucb->irq);
247 }
248
249 static int ucb1400_ts_open(struct input_dev *idev)
250 {
251 struct ucb1400_ts *ucb = input_get_drvdata(idev);
252
253 ucb1400_ts_start(ucb);
254
255 return 0;
256 }
257
258 static void ucb1400_ts_close(struct input_dev *idev)
259 {
260 struct ucb1400_ts *ucb = input_get_drvdata(idev);
261
262 ucb1400_ts_stop(ucb);
263 }
264
265 #ifndef NO_IRQ
266 #define NO_IRQ 0
267 #endif
268
269
270
271
272
273 static int ucb1400_ts_detect_irq(struct ucb1400_ts *ucb,
274 struct platform_device *pdev)
275 {
276 unsigned long mask, timeout;
277
278 mask = probe_irq_on();
279
280
281 ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC);
282 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC);
283 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
284 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
285
286
287 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA);
288 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
289
290
291 timeout = jiffies + HZ/2;
292 while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) &
293 UCB_ADC_DAT_VALID)) {
294 cpu_relax();
295 if (time_after(jiffies, timeout)) {
296 dev_err(&pdev->dev, "timed out in IRQ probe\n");
297 probe_irq_off(mask);
298 return -ENODEV;
299 }
300 }
301 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0);
302
303
304 ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0);
305 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0);
306 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
307 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
308
309
310 ucb->irq = probe_irq_off(mask);
311 if (ucb->irq < 0 || ucb->irq == NO_IRQ)
312 return -ENODEV;
313
314 return 0;
315 }
316
317 static int ucb1400_ts_probe(struct platform_device *pdev)
318 {
319 struct ucb1400_ts *ucb = dev_get_platdata(&pdev->dev);
320 int error, x_res, y_res;
321 u16 fcsr;
322
323 ucb->ts_idev = input_allocate_device();
324 if (!ucb->ts_idev) {
325 error = -ENOMEM;
326 goto err;
327 }
328
329
330 if (ucb->irq < 0) {
331 error = ucb1400_ts_detect_irq(ucb, pdev);
332 if (error) {
333 dev_err(&pdev->dev, "IRQ probe failed\n");
334 goto err_free_devs;
335 }
336 }
337 dev_dbg(&pdev->dev, "found IRQ %d\n", ucb->irq);
338
339 init_waitqueue_head(&ucb->ts_wait);
340
341 input_set_drvdata(ucb->ts_idev, ucb);
342
343 ucb->ts_idev->dev.parent = &pdev->dev;
344 ucb->ts_idev->name = "UCB1400 touchscreen interface";
345 ucb->ts_idev->id.vendor = ucb1400_reg_read(ucb->ac97,
346 AC97_VENDOR_ID1);
347 ucb->ts_idev->id.product = ucb->id;
348 ucb->ts_idev->open = ucb1400_ts_open;
349 ucb->ts_idev->close = ucb1400_ts_close;
350 ucb->ts_idev->evbit[0] = BIT_MASK(EV_ABS) | BIT_MASK(EV_KEY);
351 ucb->ts_idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
352
353
354
355
356
357
358 fcsr = ucb1400_reg_read(ucb->ac97, UCB_FCSR);
359 ucb1400_reg_write(ucb->ac97, UCB_FCSR, fcsr | UCB_FCSR_AVE);
360
361 ucb1400_adc_enable(ucb->ac97);
362 x_res = ucb1400_ts_read_xres(ucb);
363 y_res = ucb1400_ts_read_yres(ucb);
364 ucb1400_adc_disable(ucb->ac97);
365 dev_dbg(&pdev->dev, "x/y = %d/%d\n", x_res, y_res);
366
367 input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0);
368 input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0);
369 input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0);
370
371 ucb1400_ts_stop(ucb);
372
373 error = request_threaded_irq(ucb->irq, NULL, ucb1400_irq,
374 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
375 "UCB1400", ucb);
376 if (error) {
377 dev_err(&pdev->dev,
378 "unable to grab irq%d: %d\n", ucb->irq, error);
379 goto err_free_devs;
380 }
381
382 error = input_register_device(ucb->ts_idev);
383 if (error)
384 goto err_free_irq;
385
386 return 0;
387
388 err_free_irq:
389 free_irq(ucb->irq, ucb);
390 err_free_devs:
391 input_free_device(ucb->ts_idev);
392 err:
393 return error;
394 }
395
396 static int ucb1400_ts_remove(struct platform_device *pdev)
397 {
398 struct ucb1400_ts *ucb = dev_get_platdata(&pdev->dev);
399
400 free_irq(ucb->irq, ucb);
401 input_unregister_device(ucb->ts_idev);
402
403 return 0;
404 }
405
406 static int __maybe_unused ucb1400_ts_suspend(struct device *dev)
407 {
408 struct ucb1400_ts *ucb = dev_get_platdata(dev);
409 struct input_dev *idev = ucb->ts_idev;
410
411 mutex_lock(&idev->mutex);
412
413 if (idev->users)
414 ucb1400_ts_stop(ucb);
415
416 mutex_unlock(&idev->mutex);
417 return 0;
418 }
419
420 static int __maybe_unused ucb1400_ts_resume(struct device *dev)
421 {
422 struct ucb1400_ts *ucb = dev_get_platdata(dev);
423 struct input_dev *idev = ucb->ts_idev;
424
425 mutex_lock(&idev->mutex);
426
427 if (idev->users)
428 ucb1400_ts_start(ucb);
429
430 mutex_unlock(&idev->mutex);
431 return 0;
432 }
433
434 static SIMPLE_DEV_PM_OPS(ucb1400_ts_pm_ops,
435 ucb1400_ts_suspend, ucb1400_ts_resume);
436
437 static struct platform_driver ucb1400_ts_driver = {
438 .probe = ucb1400_ts_probe,
439 .remove = ucb1400_ts_remove,
440 .driver = {
441 .name = "ucb1400_ts",
442 .pm = &ucb1400_ts_pm_ops,
443 },
444 };
445 module_platform_driver(ucb1400_ts_driver);
446
447 module_param(adcsync, bool, 0444);
448 MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");
449
450 module_param(ts_delay, int, 0444);
451 MODULE_PARM_DESC(ts_delay, "Delay between panel setup and"
452 " position read. Default = 55us.");
453
454 module_param(ts_delay_pressure, int, 0444);
455 MODULE_PARM_DESC(ts_delay_pressure,
456 "delay between panel setup and pressure read."
457 " Default = 0us.");
458
459 MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
460 MODULE_LICENSE("GPL");