drivers/rtc/rtc-pcf85063.c

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This source file includes following definitions.
pcf85063_rtc_read_time
pcf85063_rtc_set_time
pcf85063_rtc_read_alarm
pcf85063_rtc_set_alarm
pcf85063_rtc_alarm_irq_enable
pcf85063_rtc_handle_irq
pcf85063_read_offset
pcf85063_set_offset
pcf85063_ioctl
pcf85063_nvmem_read
pcf85063_nvmem_write
pcf85063_load_capacitance
pcf85063_probe
   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * An I2C driver for the PCF85063 RTC
   4  * Copyright 2014 Rose Technology
   5  *
   6  * Author: Søren Andersen <san@rosetechnology.dk>
   7  * Maintainers: http://www.nslu2-linux.org/
   8  *
   9  * Copyright (C) 2019 Micro Crystal AG
  10  * Author: Alexandre Belloni <alexandre.belloni@bootlin.com>
  11  */
  12 #include <linux/i2c.h>
  13 #include <linux/bcd.h>
  14 #include <linux/rtc.h>
  15 #include <linux/module.h>
  16 #include <linux/of_device.h>
  17 #include <linux/pm_wakeirq.h>
  18 #include <linux/regmap.h>
  19 
  20 /*
  21  * Information for this driver was pulled from the following datasheets.
  22  *
  23  *  http://www.nxp.com/documents/data_sheet/PCF85063A.pdf
  24  *  http://www.nxp.com/documents/data_sheet/PCF85063TP.pdf
  25  *
  26  *  PCF85063A -- Rev. 6 — 18 November 2015
  27  *  PCF85063TP -- Rev. 4 — 6 May 2015
  28  *
  29  *  https://www.microcrystal.com/fileadmin/Media/Products/RTC/App.Manual/RV-8263-C7_App-Manual.pdf
  30  *  RV8263 -- Rev. 1.0 — January 2019
  31  */
  32 
  33 #define PCF85063_REG_CTRL1              0x00 /* status */
  34 #define PCF85063_REG_CTRL1_CAP_SEL      BIT(0)
  35 #define PCF85063_REG_CTRL1_STOP         BIT(5)
  36 
  37 #define PCF85063_REG_CTRL2              0x01
  38 #define PCF85063_CTRL2_AF               BIT(6)
  39 #define PCF85063_CTRL2_AIE              BIT(7)
  40 
  41 #define PCF85063_REG_OFFSET             0x02
  42 #define PCF85063_OFFSET_SIGN_BIT        6       /* 2's complement sign bit */
  43 #define PCF85063_OFFSET_MODE            BIT(7)
  44 #define PCF85063_OFFSET_STEP0           4340
  45 #define PCF85063_OFFSET_STEP1           4069
  46 
  47 #define PCF85063_REG_RAM                0x03
  48 
  49 #define PCF85063_REG_SC                 0x04 /* datetime */
  50 #define PCF85063_REG_SC_OS              0x80
  51 
  52 #define PCF85063_REG_ALM_S              0x0b
  53 #define PCF85063_AEN                    BIT(7)
  54 
  55 struct pcf85063_config {
  56         struct regmap_config regmap;
  57         unsigned has_alarms:1;
  58         unsigned force_cap_7000:1;
  59 };
  60 
  61 struct pcf85063 {
  62         struct rtc_device       *rtc;
  63         struct regmap           *regmap;
  64 };
  65 
  66 static int pcf85063_rtc_read_time(struct device *dev, struct rtc_time *tm)
  67 {
  68         struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
  69         int rc;
  70         u8 regs[7];
  71 
  72         /*
  73          * while reading, the time/date registers are blocked and not updated
  74          * anymore until the access is finished. To not lose a second
  75          * event, the access must be finished within one second. So, read all
  76          * time/date registers in one turn.
  77          */
  78         rc = regmap_bulk_read(pcf85063->regmap, PCF85063_REG_SC, regs,
  79                               sizeof(regs));
  80         if (rc)
  81                 return rc;
  82 
  83         /* if the clock has lost its power it makes no sense to use its time */
  84         if (regs[0] & PCF85063_REG_SC_OS) {
  85                 dev_warn(&pcf85063->rtc->dev, "Power loss detected, invalid time\n");
  86                 return -EINVAL;
  87         }
  88 
  89         tm->tm_sec = bcd2bin(regs[0] & 0x7F);
  90         tm->tm_min = bcd2bin(regs[1] & 0x7F);
  91         tm->tm_hour = bcd2bin(regs[2] & 0x3F); /* rtc hr 0-23 */
  92         tm->tm_mday = bcd2bin(regs[3] & 0x3F);
  93         tm->tm_wday = regs[4] & 0x07;
  94         tm->tm_mon = bcd2bin(regs[5] & 0x1F) - 1; /* rtc mn 1-12 */
  95         tm->tm_year = bcd2bin(regs[6]);
  96         tm->tm_year += 100;
  97 
  98         return 0;
  99 }
 100 
 101 static int pcf85063_rtc_set_time(struct device *dev, struct rtc_time *tm)
 102 {
 103         struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
 104         int rc;
 105         u8 regs[7];
 106 
 107         /*
 108          * to accurately set the time, reset the divider chain and keep it in
 109          * reset state until all time/date registers are written
 110          */
 111         rc = regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL1,
 112                                 PCF85063_REG_CTRL1_STOP,
 113                                 PCF85063_REG_CTRL1_STOP);
 114         if (rc)
 115                 return rc;
 116 
 117         /* hours, minutes and seconds */
 118         regs[0] = bin2bcd(tm->tm_sec) & 0x7F; /* clear OS flag */
 119 
 120         regs[1] = bin2bcd(tm->tm_min);
 121         regs[2] = bin2bcd(tm->tm_hour);
 122 
 123         /* Day of month, 1 - 31 */
 124         regs[3] = bin2bcd(tm->tm_mday);
 125 
 126         /* Day, 0 - 6 */
 127         regs[4] = tm->tm_wday & 0x07;
 128 
 129         /* month, 1 - 12 */
 130         regs[5] = bin2bcd(tm->tm_mon + 1);
 131 
 132         /* year and century */
 133         regs[6] = bin2bcd(tm->tm_year - 100);
 134 
 135         /* write all registers at once */
 136         rc = regmap_bulk_write(pcf85063->regmap, PCF85063_REG_SC,
 137                                regs, sizeof(regs));
 138         if (rc)
 139                 return rc;
 140 
 141         /*
 142          * Write the control register as a separate action since the size of
 143          * the register space is different between the PCF85063TP and
 144          * PCF85063A devices.  The rollover point can not be used.
 145          */
 146         return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL1,
 147                                   PCF85063_REG_CTRL1_STOP, 0);
 148 }
 149 
 150 static int pcf85063_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 151 {
 152         struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
 153         u8 buf[4];
 154         unsigned int val;
 155         int ret;
 156 
 157         ret = regmap_bulk_read(pcf85063->regmap, PCF85063_REG_ALM_S,
 158                                buf, sizeof(buf));
 159         if (ret)
 160                 return ret;
 161 
 162         alrm->time.tm_sec = bcd2bin(buf[0]);
 163         alrm->time.tm_min = bcd2bin(buf[1]);
 164         alrm->time.tm_hour = bcd2bin(buf[2]);
 165         alrm->time.tm_mday = bcd2bin(buf[3]);
 166 
 167         ret = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &val);
 168         if (ret)
 169                 return ret;
 170 
 171         alrm->enabled =  !!(val & PCF85063_CTRL2_AIE);
 172 
 173         return 0;
 174 }
 175 
 176 static int pcf85063_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 177 {
 178         struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
 179         u8 buf[5];
 180         int ret;
 181 
 182         buf[0] = bin2bcd(alrm->time.tm_sec);
 183         buf[1] = bin2bcd(alrm->time.tm_min);
 184         buf[2] = bin2bcd(alrm->time.tm_hour);
 185         buf[3] = bin2bcd(alrm->time.tm_mday);
 186         buf[4] = PCF85063_AEN; /* Do not match on week day */
 187 
 188         ret = regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2,
 189                                  PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF, 0);
 190         if (ret)
 191                 return ret;
 192 
 193         ret = regmap_bulk_write(pcf85063->regmap, PCF85063_REG_ALM_S,
 194                                 buf, sizeof(buf));
 195         if (ret)
 196                 return ret;
 197 
 198         return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2,
 199                                   PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF,
 200                                   alrm->enabled ? PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF : PCF85063_CTRL2_AF);
 201 }
 202 
 203 static int pcf85063_rtc_alarm_irq_enable(struct device *dev,
 204                                          unsigned int enabled)
 205 {
 206         struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
 207 
 208         return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2,
 209                                   PCF85063_CTRL2_AIE,
 210                                   enabled ? PCF85063_CTRL2_AIE : 0);
 211 }
 212 
 213 static irqreturn_t pcf85063_rtc_handle_irq(int irq, void *dev_id)
 214 {
 215         struct pcf85063 *pcf85063 = dev_id;
 216         unsigned int val;
 217         int err;
 218 
 219         err = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL2, &val);
 220         if (err)
 221                 return IRQ_NONE;
 222 
 223         if (val & PCF85063_CTRL2_AF) {
 224                 rtc_update_irq(pcf85063->rtc, 1, RTC_IRQF | RTC_AF);
 225                 regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL2,
 226                                    PCF85063_CTRL2_AIE | PCF85063_CTRL2_AF,
 227                                    0);
 228                 return IRQ_HANDLED;
 229         }
 230 
 231         return IRQ_NONE;
 232 }
 233 
 234 static int pcf85063_read_offset(struct device *dev, long *offset)
 235 {
 236         struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
 237         long val;
 238         u32 reg;
 239         int ret;
 240 
 241         ret = regmap_read(pcf85063->regmap, PCF85063_REG_OFFSET, &reg);
 242         if (ret < 0)
 243                 return ret;
 244 
 245         val = sign_extend32(reg & ~PCF85063_OFFSET_MODE,
 246                             PCF85063_OFFSET_SIGN_BIT);
 247 
 248         if (reg & PCF85063_OFFSET_MODE)
 249                 *offset = val * PCF85063_OFFSET_STEP1;
 250         else
 251                 *offset = val * PCF85063_OFFSET_STEP0;
 252 
 253         return 0;
 254 }
 255 
 256 static int pcf85063_set_offset(struct device *dev, long offset)
 257 {
 258         struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
 259         s8 mode0, mode1, reg;
 260         unsigned int error0, error1;
 261 
 262         if (offset > PCF85063_OFFSET_STEP0 * 63)
 263                 return -ERANGE;
 264         if (offset < PCF85063_OFFSET_STEP0 * -64)
 265                 return -ERANGE;
 266 
 267         mode0 = DIV_ROUND_CLOSEST(offset, PCF85063_OFFSET_STEP0);
 268         mode1 = DIV_ROUND_CLOSEST(offset, PCF85063_OFFSET_STEP1);
 269 
 270         error0 = abs(offset - (mode0 * PCF85063_OFFSET_STEP0));
 271         error1 = abs(offset - (mode1 * PCF85063_OFFSET_STEP1));
 272         if (mode1 > 63 || mode1 < -64 || error0 < error1)
 273                 reg = mode0 & ~PCF85063_OFFSET_MODE;
 274         else
 275                 reg = mode1 | PCF85063_OFFSET_MODE;
 276 
 277         return regmap_write(pcf85063->regmap, PCF85063_REG_OFFSET, reg);
 278 }
 279 
 280 static int pcf85063_ioctl(struct device *dev, unsigned int cmd,
 281                           unsigned long arg)
 282 {
 283         struct pcf85063 *pcf85063 = dev_get_drvdata(dev);
 284         int status, ret = 0;
 285 
 286         switch (cmd) {
 287         case RTC_VL_READ:
 288                 ret = regmap_read(pcf85063->regmap, PCF85063_REG_SC, &status);
 289                 if (ret < 0)
 290                         return ret;
 291 
 292                 if (status & PCF85063_REG_SC_OS)
 293                         dev_warn(&pcf85063->rtc->dev, "Voltage low, data loss detected.\n");
 294 
 295                 status &= PCF85063_REG_SC_OS;
 296 
 297                 if (copy_to_user((void __user *)arg, &status, sizeof(int)))
 298                         return -EFAULT;
 299 
 300                 return 0;
 301 
 302         case RTC_VL_CLR:
 303                 ret = regmap_update_bits(pcf85063->regmap, PCF85063_REG_SC,
 304                                          PCF85063_REG_SC_OS, 0);
 305 
 306                 return ret;
 307 
 308         default:
 309                 return -ENOIOCTLCMD;
 310         }
 311 }
 312 
 313 static const struct rtc_class_ops pcf85063_rtc_ops = {
 314         .read_time      = pcf85063_rtc_read_time,
 315         .set_time       = pcf85063_rtc_set_time,
 316         .read_offset    = pcf85063_read_offset,
 317         .set_offset     = pcf85063_set_offset,
 318         .ioctl          = pcf85063_ioctl,
 319 };
 320 
 321 static const struct rtc_class_ops pcf85063_rtc_ops_alarm = {
 322         .read_time      = pcf85063_rtc_read_time,
 323         .set_time       = pcf85063_rtc_set_time,
 324         .read_offset    = pcf85063_read_offset,
 325         .set_offset     = pcf85063_set_offset,
 326         .read_alarm     = pcf85063_rtc_read_alarm,
 327         .set_alarm      = pcf85063_rtc_set_alarm,
 328         .alarm_irq_enable = pcf85063_rtc_alarm_irq_enable,
 329         .ioctl          = pcf85063_ioctl,
 330 };
 331 
 332 static int pcf85063_nvmem_read(void *priv, unsigned int offset,
 333                                void *val, size_t bytes)
 334 {
 335         return regmap_read(priv, PCF85063_REG_RAM, val);
 336 }
 337 
 338 static int pcf85063_nvmem_write(void *priv, unsigned int offset,
 339                                 void *val, size_t bytes)
 340 {
 341         return regmap_write(priv, PCF85063_REG_RAM, *(u8 *)val);
 342 }
 343 
 344 static int pcf85063_load_capacitance(struct pcf85063 *pcf85063,
 345                                      const struct device_node *np,
 346                                      unsigned int force_cap)
 347 {
 348         u32 load = 7000;
 349         u8 reg = 0;
 350 
 351         if (force_cap)
 352                 load = force_cap;
 353         else
 354                 of_property_read_u32(np, "quartz-load-femtofarads", &load);
 355 
 356         switch (load) {
 357         default:
 358                 dev_warn(&pcf85063->rtc->dev, "Unknown quartz-load-femtofarads value: %d. Assuming 7000",
 359                          load);
 360                 /* fall through */
 361         case 7000:
 362                 break;
 363         case 12500:
 364                 reg = PCF85063_REG_CTRL1_CAP_SEL;
 365                 break;
 366         }
 367 
 368         return regmap_update_bits(pcf85063->regmap, PCF85063_REG_CTRL1,
 369                                   PCF85063_REG_CTRL1_CAP_SEL, reg);
 370 }
 371 
 372 static const struct pcf85063_config pcf85063a_config = {
 373         .regmap = {
 374                 .reg_bits = 8,
 375                 .val_bits = 8,
 376                 .max_register = 0x11,
 377         },
 378         .has_alarms = 1,
 379 };
 380 
 381 static const struct pcf85063_config pcf85063tp_config = {
 382         .regmap = {
 383                 .reg_bits = 8,
 384                 .val_bits = 8,
 385                 .max_register = 0x0a,
 386         },
 387 };
 388 
 389 static const struct pcf85063_config rv8263_config = {
 390         .regmap = {
 391                 .reg_bits = 8,
 392                 .val_bits = 8,
 393                 .max_register = 0x11,
 394         },
 395         .has_alarms = 1,
 396         .force_cap_7000 = 1,
 397 };
 398 
 399 static int pcf85063_probe(struct i2c_client *client)
 400 {
 401         struct pcf85063 *pcf85063;
 402         unsigned int tmp;
 403         int err;
 404         const struct pcf85063_config *config = &pcf85063tp_config;
 405         const void *data = of_device_get_match_data(&client->dev);
 406         struct nvmem_config nvmem_cfg = {
 407                 .name = "pcf85063_nvram",
 408                 .reg_read = pcf85063_nvmem_read,
 409                 .reg_write = pcf85063_nvmem_write,
 410                 .type = NVMEM_TYPE_BATTERY_BACKED,
 411                 .size = 1,
 412         };
 413 
 414         dev_dbg(&client->dev, "%s\n", __func__);
 415 
 416         pcf85063 = devm_kzalloc(&client->dev, sizeof(struct pcf85063),
 417                                 GFP_KERNEL);
 418         if (!pcf85063)
 419                 return -ENOMEM;
 420 
 421         if (data)
 422                 config = data;
 423 
 424         pcf85063->regmap = devm_regmap_init_i2c(client, &config->regmap);
 425         if (IS_ERR(pcf85063->regmap))
 426                 return PTR_ERR(pcf85063->regmap);
 427 
 428         i2c_set_clientdata(client, pcf85063);
 429 
 430         err = regmap_read(pcf85063->regmap, PCF85063_REG_CTRL1, &tmp);
 431         if (err) {
 432                 dev_err(&client->dev, "RTC chip is not present\n");
 433                 return err;
 434         }
 435 
 436         pcf85063->rtc = devm_rtc_allocate_device(&client->dev);
 437         if (IS_ERR(pcf85063->rtc))
 438                 return PTR_ERR(pcf85063->rtc);
 439 
 440         err = pcf85063_load_capacitance(pcf85063, client->dev.of_node,
 441                                         config->force_cap_7000 ? 7000 : 0);
 442         if (err < 0)
 443                 dev_warn(&client->dev, "failed to set xtal load capacitance: %d",
 444                          err);
 445 
 446         pcf85063->rtc->ops = &pcf85063_rtc_ops;
 447         pcf85063->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
 448         pcf85063->rtc->range_max = RTC_TIMESTAMP_END_2099;
 449         pcf85063->rtc->uie_unsupported = 1;
 450 
 451         if (config->has_alarms && client->irq > 0) {
 452                 err = devm_request_threaded_irq(&client->dev, client->irq,
 453                                                 NULL, pcf85063_rtc_handle_irq,
 454                                                 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
 455                                                 "pcf85063", pcf85063);
 456                 if (err) {
 457                         dev_warn(&pcf85063->rtc->dev,
 458                                  "unable to request IRQ, alarms disabled\n");
 459                 } else {
 460                         pcf85063->rtc->ops = &pcf85063_rtc_ops_alarm;
 461                         device_init_wakeup(&client->dev, true);
 462                         err = dev_pm_set_wake_irq(&client->dev, client->irq);
 463                         if (err)
 464                                 dev_err(&pcf85063->rtc->dev,
 465                                         "failed to enable irq wake\n");
 466                 }
 467         }
 468 
 469         nvmem_cfg.priv = pcf85063->regmap;
 470         rtc_nvmem_register(pcf85063->rtc, &nvmem_cfg);
 471 
 472         return rtc_register_device(pcf85063->rtc);
 473 }
 474 
 475 #ifdef CONFIG_OF
 476 static const struct of_device_id pcf85063_of_match[] = {
 477         { .compatible = "nxp,pcf85063", .data = &pcf85063tp_config },
 478         { .compatible = "nxp,pcf85063tp", .data = &pcf85063tp_config },
 479         { .compatible = "nxp,pcf85063a", .data = &pcf85063a_config },
 480         { .compatible = "microcrystal,rv8263", .data = &rv8263_config },
 481         {}
 482 };
 483 MODULE_DEVICE_TABLE(of, pcf85063_of_match);
 484 #endif
 485 
 486 static struct i2c_driver pcf85063_driver = {
 487         .driver         = {
 488                 .name   = "rtc-pcf85063",
 489                 .of_match_table = of_match_ptr(pcf85063_of_match),
 490         },
 491         .probe_new      = pcf85063_probe,
 492 };
 493 
 494 module_i2c_driver(pcf85063_driver);
 495 
 496 MODULE_AUTHOR("Søren Andersen <san@rosetechnology.dk>");
 497 MODULE_DESCRIPTION("PCF85063 RTC driver");
 498 MODULE_LICENSE("GPL");
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/rtc/rtc-pcf85063.c

DEFINITIONS
