drivers/rtc/rtc-ds1511.c

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This source file includes following definitions.
rtc_write
rtc_write_alarm
rtc_read
rtc_disable_update
rtc_enable_update
ds1511_wdog_set
ds1511_wdog_disable
ds1511_rtc_set_time
ds1511_rtc_read_time
ds1511_rtc_update_alarm
ds1511_rtc_set_alarm
ds1511_rtc_read_alarm
ds1511_interrupt
ds1511_rtc_alarm_irq_enable
ds1511_nvram_read
ds1511_nvram_write
ds1511_rtc_probe
   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * An rtc driver for the Dallas DS1511
   4  *
   5  * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
   6  * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com>
   7  *
   8  * Real time clock driver for the Dallas 1511 chip, which also
   9  * contains a watchdog timer.  There is a tiny amount of code that
  10  * platform code could use to mess with the watchdog device a little
  11  * bit, but not a full watchdog driver.
  12  */
  13 
  14 #include <linux/bcd.h>
  15 #include <linux/init.h>
  16 #include <linux/kernel.h>
  17 #include <linux/gfp.h>
  18 #include <linux/delay.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/rtc.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/io.h>
  23 #include <linux/module.h>
  24 
  25 enum ds1511reg {
  26         DS1511_SEC = 0x0,
  27         DS1511_MIN = 0x1,
  28         DS1511_HOUR = 0x2,
  29         DS1511_DOW = 0x3,
  30         DS1511_DOM = 0x4,
  31         DS1511_MONTH = 0x5,
  32         DS1511_YEAR = 0x6,
  33         DS1511_CENTURY = 0x7,
  34         DS1511_AM1_SEC = 0x8,
  35         DS1511_AM2_MIN = 0x9,
  36         DS1511_AM3_HOUR = 0xa,
  37         DS1511_AM4_DATE = 0xb,
  38         DS1511_WD_MSEC = 0xc,
  39         DS1511_WD_SEC = 0xd,
  40         DS1511_CONTROL_A = 0xe,
  41         DS1511_CONTROL_B = 0xf,
  42         DS1511_RAMADDR_LSB = 0x10,
  43         DS1511_RAMDATA = 0x13
  44 };
  45 
  46 #define DS1511_BLF1     0x80
  47 #define DS1511_BLF2     0x40
  48 #define DS1511_PRS      0x20
  49 #define DS1511_PAB      0x10
  50 #define DS1511_TDF      0x08
  51 #define DS1511_KSF      0x04
  52 #define DS1511_WDF      0x02
  53 #define DS1511_IRQF     0x01
  54 #define DS1511_TE       0x80
  55 #define DS1511_CS       0x40
  56 #define DS1511_BME      0x20
  57 #define DS1511_TPE      0x10
  58 #define DS1511_TIE      0x08
  59 #define DS1511_KIE      0x04
  60 #define DS1511_WDE      0x02
  61 #define DS1511_WDS      0x01
  62 #define DS1511_RAM_MAX  0x100
  63 
  64 #define RTC_CMD         DS1511_CONTROL_B
  65 #define RTC_CMD1        DS1511_CONTROL_A
  66 
  67 #define RTC_ALARM_SEC   DS1511_AM1_SEC
  68 #define RTC_ALARM_MIN   DS1511_AM2_MIN
  69 #define RTC_ALARM_HOUR  DS1511_AM3_HOUR
  70 #define RTC_ALARM_DATE  DS1511_AM4_DATE
  71 
  72 #define RTC_SEC         DS1511_SEC
  73 #define RTC_MIN         DS1511_MIN
  74 #define RTC_HOUR        DS1511_HOUR
  75 #define RTC_DOW         DS1511_DOW
  76 #define RTC_DOM         DS1511_DOM
  77 #define RTC_MON         DS1511_MONTH
  78 #define RTC_YEAR        DS1511_YEAR
  79 #define RTC_CENTURY     DS1511_CENTURY
  80 
  81 #define RTC_TIE DS1511_TIE
  82 #define RTC_TE  DS1511_TE
  83 
  84 struct rtc_plat_data {
  85         struct rtc_device *rtc;
  86         void __iomem *ioaddr;           /* virtual base address */
  87         int irq;
  88         unsigned int irqen;
  89         int alrm_sec;
  90         int alrm_min;
  91         int alrm_hour;
  92         int alrm_mday;
  93         spinlock_t lock;
  94 };
  95 
  96 static DEFINE_SPINLOCK(ds1511_lock);
  97 
  98 static __iomem char *ds1511_base;
  99 static u32 reg_spacing = 1;
 100 
 101 static noinline void
 102 rtc_write(uint8_t val, uint32_t reg)
 103 {
 104         writeb(val, ds1511_base + (reg * reg_spacing));
 105 }
 106 
 107 static inline void
 108 rtc_write_alarm(uint8_t val, enum ds1511reg reg)
 109 {
 110         rtc_write((val | 0x80), reg);
 111 }
 112 
 113 static noinline uint8_t
 114 rtc_read(enum ds1511reg reg)
 115 {
 116         return readb(ds1511_base + (reg * reg_spacing));
 117 }
 118 
 119 static inline void
 120 rtc_disable_update(void)
 121 {
 122         rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
 123 }
 124 
 125 static void
 126 rtc_enable_update(void)
 127 {
 128         rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
 129 }
 130 
 131 /*
 132  * #define DS1511_WDOG_RESET_SUPPORT
 133  *
 134  * Uncomment this if you want to use these routines in
 135  * some platform code.
 136  */
 137 #ifdef DS1511_WDOG_RESET_SUPPORT
 138 /*
 139  * just enough code to set the watchdog timer so that it
 140  * will reboot the system
 141  */
 142 void
 143 ds1511_wdog_set(unsigned long deciseconds)
 144 {
 145         /*
 146          * the wdog timer can take 99.99 seconds
 147          */
 148         deciseconds %= 10000;
 149         /*
 150          * set the wdog values in the wdog registers
 151          */
 152         rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC);
 153         rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC);
 154         /*
 155          * set wdog enable and wdog 'steering' bit to issue a reset
 156          */
 157         rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
 158 }
 159 
 160 void
 161 ds1511_wdog_disable(void)
 162 {
 163         /*
 164          * clear wdog enable and wdog 'steering' bits
 165          */
 166         rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
 167         /*
 168          * clear the wdog counter
 169          */
 170         rtc_write(0, DS1511_WD_MSEC);
 171         rtc_write(0, DS1511_WD_SEC);
 172 }
 173 #endif
 174 
 175 /*
 176  * set the rtc chip's idea of the time.
 177  * stupidly, some callers call with year unmolested;
 178  * and some call with  year = year - 1900.  thanks.
 179  */
 180 static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
 181 {
 182         u8 mon, day, dow, hrs, min, sec, yrs, cen;
 183         unsigned long flags;
 184 
 185         /*
 186          * won't have to change this for a while
 187          */
 188         if (rtc_tm->tm_year < 1900)
 189                 rtc_tm->tm_year += 1900;
 190 
 191         if (rtc_tm->tm_year < 1970)
 192                 return -EINVAL;
 193 
 194         yrs = rtc_tm->tm_year % 100;
 195         cen = rtc_tm->tm_year / 100;
 196         mon = rtc_tm->tm_mon + 1;   /* tm_mon starts at zero */
 197         day = rtc_tm->tm_mday;
 198         dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
 199         hrs = rtc_tm->tm_hour;
 200         min = rtc_tm->tm_min;
 201         sec = rtc_tm->tm_sec;
 202 
 203         if ((mon > 12) || (day == 0))
 204                 return -EINVAL;
 205 
 206         if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year))
 207                 return -EINVAL;
 208 
 209         if ((hrs >= 24) || (min >= 60) || (sec >= 60))
 210                 return -EINVAL;
 211 
 212         /*
 213          * each register is a different number of valid bits
 214          */
 215         sec = bin2bcd(sec) & 0x7f;
 216         min = bin2bcd(min) & 0x7f;
 217         hrs = bin2bcd(hrs) & 0x3f;
 218         day = bin2bcd(day) & 0x3f;
 219         mon = bin2bcd(mon) & 0x1f;
 220         yrs = bin2bcd(yrs) & 0xff;
 221         cen = bin2bcd(cen) & 0xff;
 222 
 223         spin_lock_irqsave(&ds1511_lock, flags);
 224         rtc_disable_update();
 225         rtc_write(cen, RTC_CENTURY);
 226         rtc_write(yrs, RTC_YEAR);
 227         rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
 228         rtc_write(day, RTC_DOM);
 229         rtc_write(hrs, RTC_HOUR);
 230         rtc_write(min, RTC_MIN);
 231         rtc_write(sec, RTC_SEC);
 232         rtc_write(dow, RTC_DOW);
 233         rtc_enable_update();
 234         spin_unlock_irqrestore(&ds1511_lock, flags);
 235 
 236         return 0;
 237 }
 238 
 239 static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
 240 {
 241         unsigned int century;
 242         unsigned long flags;
 243 
 244         spin_lock_irqsave(&ds1511_lock, flags);
 245         rtc_disable_update();
 246 
 247         rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
 248         rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
 249         rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
 250         rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
 251         rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
 252         rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
 253         rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
 254         century = rtc_read(RTC_CENTURY);
 255 
 256         rtc_enable_update();
 257         spin_unlock_irqrestore(&ds1511_lock, flags);
 258 
 259         rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
 260         rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
 261         rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
 262         rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
 263         rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday);
 264         rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
 265         rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
 266         century = bcd2bin(century) * 100;
 267 
 268         /*
 269          * Account for differences between how the RTC uses the values
 270          * and how they are defined in a struct rtc_time;
 271          */
 272         century += rtc_tm->tm_year;
 273         rtc_tm->tm_year = century - 1900;
 274 
 275         rtc_tm->tm_mon--;
 276 
 277         return 0;
 278 }
 279 
 280 /*
 281  * write the alarm register settings
 282  *
 283  * we only have the use to interrupt every second, otherwise
 284  * known as the update interrupt, or the interrupt if the whole
 285  * date/hours/mins/secs matches.  the ds1511 has many more
 286  * permutations, but the kernel doesn't.
 287  */
 288 static void
 289 ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
 290 {
 291         unsigned long flags;
 292 
 293         spin_lock_irqsave(&pdata->lock, flags);
 294         rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
 295                0x80 : bin2bcd(pdata->alrm_mday) & 0x3f,
 296                RTC_ALARM_DATE);
 297         rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
 298                0x80 : bin2bcd(pdata->alrm_hour) & 0x3f,
 299                RTC_ALARM_HOUR);
 300         rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
 301                0x80 : bin2bcd(pdata->alrm_min) & 0x7f,
 302                RTC_ALARM_MIN);
 303         rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
 304                0x80 : bin2bcd(pdata->alrm_sec) & 0x7f,
 305                RTC_ALARM_SEC);
 306         rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
 307         rtc_read(RTC_CMD1);     /* clear interrupts */
 308         spin_unlock_irqrestore(&pdata->lock, flags);
 309 }
 310 
 311 static int
 312 ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 313 {
 314         struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 315 
 316         if (pdata->irq <= 0)
 317                 return -EINVAL;
 318 
 319         pdata->alrm_mday = alrm->time.tm_mday;
 320         pdata->alrm_hour = alrm->time.tm_hour;
 321         pdata->alrm_min = alrm->time.tm_min;
 322         pdata->alrm_sec = alrm->time.tm_sec;
 323         if (alrm->enabled)
 324                 pdata->irqen |= RTC_AF;
 325 
 326         ds1511_rtc_update_alarm(pdata);
 327         return 0;
 328 }
 329 
 330 static int
 331 ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 332 {
 333         struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 334 
 335         if (pdata->irq <= 0)
 336                 return -EINVAL;
 337 
 338         alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
 339         alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
 340         alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
 341         alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
 342         alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
 343         return 0;
 344 }
 345 
 346 static irqreturn_t
 347 ds1511_interrupt(int irq, void *dev_id)
 348 {
 349         struct platform_device *pdev = dev_id;
 350         struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 351         unsigned long events = 0;
 352 
 353         spin_lock(&pdata->lock);
 354         /*
 355          * read and clear interrupt
 356          */
 357         if (rtc_read(RTC_CMD1) & DS1511_IRQF) {
 358                 events = RTC_IRQF;
 359                 if (rtc_read(RTC_ALARM_SEC) & 0x80)
 360                         events |= RTC_UF;
 361                 else
 362                         events |= RTC_AF;
 363                 rtc_update_irq(pdata->rtc, 1, events);
 364         }
 365         spin_unlock(&pdata->lock);
 366         return events ? IRQ_HANDLED : IRQ_NONE;
 367 }
 368 
 369 static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 370 {
 371         struct rtc_plat_data *pdata = dev_get_drvdata(dev);
 372 
 373         if (pdata->irq <= 0)
 374                 return -EINVAL;
 375         if (enabled)
 376                 pdata->irqen |= RTC_AF;
 377         else
 378                 pdata->irqen &= ~RTC_AF;
 379         ds1511_rtc_update_alarm(pdata);
 380         return 0;
 381 }
 382 
 383 static const struct rtc_class_ops ds1511_rtc_ops = {
 384         .read_time              = ds1511_rtc_read_time,
 385         .set_time               = ds1511_rtc_set_time,
 386         .read_alarm             = ds1511_rtc_read_alarm,
 387         .set_alarm              = ds1511_rtc_set_alarm,
 388         .alarm_irq_enable       = ds1511_rtc_alarm_irq_enable,
 389 };
 390 
 391 static int ds1511_nvram_read(void *priv, unsigned int pos, void *buf,
 392                              size_t size)
 393 {
 394         int i;
 395 
 396         rtc_write(pos, DS1511_RAMADDR_LSB);
 397         for (i = 0; i < size; i++)
 398                 *(char *)buf++ = rtc_read(DS1511_RAMDATA);
 399 
 400         return 0;
 401 }
 402 
 403 static int ds1511_nvram_write(void *priv, unsigned int pos, void *buf,
 404                               size_t size)
 405 {
 406         int i;
 407 
 408         rtc_write(pos, DS1511_RAMADDR_LSB);
 409         for (i = 0; i < size; i++)
 410                 rtc_write(*(char *)buf++, DS1511_RAMDATA);
 411 
 412         return 0;
 413 }
 414 
 415 static int ds1511_rtc_probe(struct platform_device *pdev)
 416 {
 417         struct resource *res;
 418         struct rtc_plat_data *pdata;
 419         int ret = 0;
 420         struct nvmem_config ds1511_nvmem_cfg = {
 421                 .name = "ds1511_nvram",
 422                 .word_size = 1,
 423                 .stride = 1,
 424                 .size = DS1511_RAM_MAX,
 425                 .reg_read = ds1511_nvram_read,
 426                 .reg_write = ds1511_nvram_write,
 427                 .priv = &pdev->dev,
 428         };
 429 
 430         pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
 431         if (!pdata)
 432                 return -ENOMEM;
 433 
 434         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 435         ds1511_base = devm_ioremap_resource(&pdev->dev, res);
 436         if (IS_ERR(ds1511_base))
 437                 return PTR_ERR(ds1511_base);
 438         pdata->ioaddr = ds1511_base;
 439         pdata->irq = platform_get_irq(pdev, 0);
 440 
 441         /*
 442          * turn on the clock and the crystal, etc.
 443          */
 444         rtc_write(DS1511_BME, RTC_CMD);
 445         rtc_write(0, RTC_CMD1);
 446         /*
 447          * clear the wdog counter
 448          */
 449         rtc_write(0, DS1511_WD_MSEC);
 450         rtc_write(0, DS1511_WD_SEC);
 451         /*
 452          * start the clock
 453          */
 454         rtc_enable_update();
 455 
 456         /*
 457          * check for a dying bat-tree
 458          */
 459         if (rtc_read(RTC_CMD1) & DS1511_BLF1)
 460                 dev_warn(&pdev->dev, "voltage-low detected.\n");
 461 
 462         spin_lock_init(&pdata->lock);
 463         platform_set_drvdata(pdev, pdata);
 464 
 465         pdata->rtc = devm_rtc_allocate_device(&pdev->dev);
 466         if (IS_ERR(pdata->rtc))
 467                 return PTR_ERR(pdata->rtc);
 468 
 469         pdata->rtc->ops = &ds1511_rtc_ops;
 470 
 471         pdata->rtc->nvram_old_abi = true;
 472 
 473         ret = rtc_register_device(pdata->rtc);
 474         if (ret)
 475                 return ret;
 476 
 477         rtc_nvmem_register(pdata->rtc, &ds1511_nvmem_cfg);
 478 
 479         /*
 480          * if the platform has an interrupt in mind for this device,
 481          * then by all means, set it
 482          */
 483         if (pdata->irq > 0) {
 484                 rtc_read(RTC_CMD1);
 485                 if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt,
 486                         IRQF_SHARED, pdev->name, pdev) < 0) {
 487 
 488                         dev_warn(&pdev->dev, "interrupt not available.\n");
 489                         pdata->irq = 0;
 490                 }
 491         }
 492 
 493         return 0;
 494 }
 495 
 496 /* work with hotplug and coldplug */
 497 MODULE_ALIAS("platform:ds1511");
 498 
 499 static struct platform_driver ds1511_rtc_driver = {
 500         .probe          = ds1511_rtc_probe,
 501         .driver         = {
 502                 .name   = "ds1511",
 503         },
 504 };
 505 
 506 module_platform_driver(ds1511_rtc_driver);
 507 
 508 MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>");
 509 MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
 510 MODULE_LICENSE("GPL");
/* [<][>][^][v][top][bottom][index][help] */
root/drivers/rtc/rtc-ds1511.c

DEFINITIONS
