This source file includes following definitions.
- hym8563_rtc_read_time
- hym8563_rtc_set_time
- hym8563_rtc_alarm_irq_enable
- hym8563_rtc_read_alarm
- hym8563_rtc_set_alarm
- hym8563_clkout_recalc_rate
- hym8563_clkout_round_rate
- hym8563_clkout_set_rate
- hym8563_clkout_control
- hym8563_clkout_prepare
- hym8563_clkout_unprepare
- hym8563_clkout_is_prepared
- hym8563_clkout_register_clk
- hym8563_irq
- hym8563_init_device
- hym8563_suspend
- hym8563_resume
- hym8563_probe
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12 #include <linux/module.h>
13 #include <linux/clk-provider.h>
14 #include <linux/i2c.h>
15 #include <linux/bcd.h>
16 #include <linux/rtc.h>
17
18 #define HYM8563_CTL1 0x00
19 #define HYM8563_CTL1_TEST BIT(7)
20 #define HYM8563_CTL1_STOP BIT(5)
21 #define HYM8563_CTL1_TESTC BIT(3)
22
23 #define HYM8563_CTL2 0x01
24 #define HYM8563_CTL2_TI_TP BIT(4)
25 #define HYM8563_CTL2_AF BIT(3)
26 #define HYM8563_CTL2_TF BIT(2)
27 #define HYM8563_CTL2_AIE BIT(1)
28 #define HYM8563_CTL2_TIE BIT(0)
29
30 #define HYM8563_SEC 0x02
31 #define HYM8563_SEC_VL BIT(7)
32 #define HYM8563_SEC_MASK 0x7f
33
34 #define HYM8563_MIN 0x03
35 #define HYM8563_MIN_MASK 0x7f
36
37 #define HYM8563_HOUR 0x04
38 #define HYM8563_HOUR_MASK 0x3f
39
40 #define HYM8563_DAY 0x05
41 #define HYM8563_DAY_MASK 0x3f
42
43 #define HYM8563_WEEKDAY 0x06
44 #define HYM8563_WEEKDAY_MASK 0x07
45
46 #define HYM8563_MONTH 0x07
47 #define HYM8563_MONTH_CENTURY BIT(7)
48 #define HYM8563_MONTH_MASK 0x1f
49
50 #define HYM8563_YEAR 0x08
51
52 #define HYM8563_ALM_MIN 0x09
53 #define HYM8563_ALM_HOUR 0x0a
54 #define HYM8563_ALM_DAY 0x0b
55 #define HYM8563_ALM_WEEK 0x0c
56
57
58 #define HYM8563_ALM_BIT_DISABLE BIT(7)
59
60 #define HYM8563_CLKOUT 0x0d
61 #define HYM8563_CLKOUT_ENABLE BIT(7)
62 #define HYM8563_CLKOUT_32768 0
63 #define HYM8563_CLKOUT_1024 1
64 #define HYM8563_CLKOUT_32 2
65 #define HYM8563_CLKOUT_1 3
66 #define HYM8563_CLKOUT_MASK 3
67
68 #define HYM8563_TMR_CTL 0x0e
69 #define HYM8563_TMR_CTL_ENABLE BIT(7)
70 #define HYM8563_TMR_CTL_4096 0
71 #define HYM8563_TMR_CTL_64 1
72 #define HYM8563_TMR_CTL_1 2
73 #define HYM8563_TMR_CTL_1_60 3
74 #define HYM8563_TMR_CTL_MASK 3
75
76 #define HYM8563_TMR_CNT 0x0f
77
78 struct hym8563 {
79 struct i2c_client *client;
80 struct rtc_device *rtc;
81 bool valid;
82 #ifdef CONFIG_COMMON_CLK
83 struct clk_hw clkout_hw;
84 #endif
85 };
86
87
88
89
90
91 static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
92 {
93 struct i2c_client *client = to_i2c_client(dev);
94 struct hym8563 *hym8563 = i2c_get_clientdata(client);
95 u8 buf[7];
96 int ret;
97
98 if (!hym8563->valid) {
99 dev_warn(&client->dev, "no valid clock/calendar values available\n");
100 return -EINVAL;
101 }
102
103 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
104 if (ret < 0)
105 return ret;
106
107 tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
108 tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
109 tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
110 tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
111 tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK);
112 tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1;
113 tm->tm_year = bcd2bin(buf[6]) + 100;
114
115 return 0;
116 }
117
118 static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
119 {
120 struct i2c_client *client = to_i2c_client(dev);
121 struct hym8563 *hym8563 = i2c_get_clientdata(client);
122 u8 buf[7];
123 int ret;
124
125
126 if (tm->tm_year < 100 || tm->tm_year >= 200)
127 return -EINVAL;
128
129 buf[0] = bin2bcd(tm->tm_sec);
130 buf[1] = bin2bcd(tm->tm_min);
131 buf[2] = bin2bcd(tm->tm_hour);
132 buf[3] = bin2bcd(tm->tm_mday);
133 buf[4] = bin2bcd(tm->tm_wday);
134 buf[5] = bin2bcd(tm->tm_mon + 1);
135
136
137
138
139
140
141 buf[6] = bin2bcd(tm->tm_year - 100);
142
143
144
145
146
147 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
148 HYM8563_CTL1_STOP);
149 if (ret < 0)
150 return ret;
151
152 ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
153 if (ret < 0)
154 return ret;
155
156 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
157 if (ret < 0)
158 return ret;
159
160 hym8563->valid = true;
161
162 return 0;
163 }
164
165 static int hym8563_rtc_alarm_irq_enable(struct device *dev,
166 unsigned int enabled)
167 {
168 struct i2c_client *client = to_i2c_client(dev);
169 int data;
170
171 data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
172 if (data < 0)
173 return data;
174
175 if (enabled)
176 data |= HYM8563_CTL2_AIE;
177 else
178 data &= ~HYM8563_CTL2_AIE;
179
180 return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
181 };
182
183 static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
184 {
185 struct i2c_client *client = to_i2c_client(dev);
186 struct rtc_time *alm_tm = &alm->time;
187 u8 buf[4];
188 int ret;
189
190 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
191 if (ret < 0)
192 return ret;
193
194
195 alm_tm->tm_sec = 0;
196
197 alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
198 -1 :
199 bcd2bin(buf[0] & HYM8563_MIN_MASK);
200 alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
201 -1 :
202 bcd2bin(buf[1] & HYM8563_HOUR_MASK);
203 alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
204 -1 :
205 bcd2bin(buf[2] & HYM8563_DAY_MASK);
206 alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
207 -1 :
208 bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
209
210 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
211 if (ret < 0)
212 return ret;
213
214 if (ret & HYM8563_CTL2_AIE)
215 alm->enabled = 1;
216
217 return 0;
218 }
219
220 static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
221 {
222 struct i2c_client *client = to_i2c_client(dev);
223 struct rtc_time *alm_tm = &alm->time;
224 u8 buf[4];
225 int ret;
226
227
228
229
230 if (alm_tm->tm_sec) {
231 alm_tm->tm_sec = 0;
232 alm_tm->tm_min++;
233 if (alm_tm->tm_min >= 60) {
234 alm_tm->tm_min = 0;
235 alm_tm->tm_hour++;
236 if (alm_tm->tm_hour >= 24) {
237 alm_tm->tm_hour = 0;
238 alm_tm->tm_mday++;
239 if (alm_tm->tm_mday > 31)
240 alm_tm->tm_mday = 0;
241 }
242 }
243 }
244
245 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
246 if (ret < 0)
247 return ret;
248
249 ret &= ~HYM8563_CTL2_AIE;
250
251 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
252 if (ret < 0)
253 return ret;
254
255 buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
256 bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
257
258 buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
259 bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
260
261 buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
262 bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
263
264 buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
265 bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
266
267 ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
268 if (ret < 0)
269 return ret;
270
271 return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
272 }
273
274 static const struct rtc_class_ops hym8563_rtc_ops = {
275 .read_time = hym8563_rtc_read_time,
276 .set_time = hym8563_rtc_set_time,
277 .alarm_irq_enable = hym8563_rtc_alarm_irq_enable,
278 .read_alarm = hym8563_rtc_read_alarm,
279 .set_alarm = hym8563_rtc_set_alarm,
280 };
281
282
283
284
285
286 #ifdef CONFIG_COMMON_CLK
287 #define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
288
289 static int clkout_rates[] = {
290 32768,
291 1024,
292 32,
293 1,
294 };
295
296 static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
297 unsigned long parent_rate)
298 {
299 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
300 struct i2c_client *client = hym8563->client;
301 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
302
303 if (ret < 0)
304 return 0;
305
306 ret &= HYM8563_CLKOUT_MASK;
307 return clkout_rates[ret];
308 }
309
310 static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
311 unsigned long *prate)
312 {
313 int i;
314
315 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
316 if (clkout_rates[i] <= rate)
317 return clkout_rates[i];
318
319 return 0;
320 }
321
322 static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
323 unsigned long parent_rate)
324 {
325 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
326 struct i2c_client *client = hym8563->client;
327 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
328 int i;
329
330 if (ret < 0)
331 return ret;
332
333 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
334 if (clkout_rates[i] == rate) {
335 ret &= ~HYM8563_CLKOUT_MASK;
336 ret |= i;
337 return i2c_smbus_write_byte_data(client,
338 HYM8563_CLKOUT, ret);
339 }
340
341 return -EINVAL;
342 }
343
344 static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
345 {
346 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
347 struct i2c_client *client = hym8563->client;
348 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
349
350 if (ret < 0)
351 return ret;
352
353 if (enable)
354 ret |= HYM8563_CLKOUT_ENABLE;
355 else
356 ret &= ~HYM8563_CLKOUT_ENABLE;
357
358 return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
359 }
360
361 static int hym8563_clkout_prepare(struct clk_hw *hw)
362 {
363 return hym8563_clkout_control(hw, 1);
364 }
365
366 static void hym8563_clkout_unprepare(struct clk_hw *hw)
367 {
368 hym8563_clkout_control(hw, 0);
369 }
370
371 static int hym8563_clkout_is_prepared(struct clk_hw *hw)
372 {
373 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
374 struct i2c_client *client = hym8563->client;
375 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
376
377 if (ret < 0)
378 return ret;
379
380 return !!(ret & HYM8563_CLKOUT_ENABLE);
381 }
382
383 static const struct clk_ops hym8563_clkout_ops = {
384 .prepare = hym8563_clkout_prepare,
385 .unprepare = hym8563_clkout_unprepare,
386 .is_prepared = hym8563_clkout_is_prepared,
387 .recalc_rate = hym8563_clkout_recalc_rate,
388 .round_rate = hym8563_clkout_round_rate,
389 .set_rate = hym8563_clkout_set_rate,
390 };
391
392 static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
393 {
394 struct i2c_client *client = hym8563->client;
395 struct device_node *node = client->dev.of_node;
396 struct clk *clk;
397 struct clk_init_data init;
398 int ret;
399
400 ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
401 0);
402 if (ret < 0)
403 return ERR_PTR(ret);
404
405 init.name = "hym8563-clkout";
406 init.ops = &hym8563_clkout_ops;
407 init.flags = 0;
408 init.parent_names = NULL;
409 init.num_parents = 0;
410 hym8563->clkout_hw.init = &init;
411
412
413 of_property_read_string(node, "clock-output-names", &init.name);
414
415
416 clk = clk_register(&client->dev, &hym8563->clkout_hw);
417
418 if (!IS_ERR(clk))
419 of_clk_add_provider(node, of_clk_src_simple_get, clk);
420
421 return clk;
422 }
423 #endif
424
425
426
427
428
429
430
431 static irqreturn_t hym8563_irq(int irq, void *dev_id)
432 {
433 struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
434 struct i2c_client *client = hym8563->client;
435 struct mutex *lock = &hym8563->rtc->ops_lock;
436 int data, ret;
437
438 mutex_lock(lock);
439
440
441
442 data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
443 if (data < 0) {
444 dev_err(&client->dev, "%s: error reading i2c data %d\n",
445 __func__, data);
446 goto out;
447 }
448
449 data &= ~HYM8563_CTL2_AF;
450
451 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
452 if (ret < 0) {
453 dev_err(&client->dev, "%s: error writing i2c data %d\n",
454 __func__, ret);
455 }
456
457 out:
458 mutex_unlock(lock);
459 return IRQ_HANDLED;
460 }
461
462 static int hym8563_init_device(struct i2c_client *client)
463 {
464 int ret;
465
466
467 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
468 if (ret < 0)
469 return ret;
470
471 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
472 if (ret < 0)
473 return ret;
474
475
476 ret &= ~HYM8563_CTL2_AIE;
477 ret &= ~HYM8563_CTL2_TIE;
478
479
480 if (ret & HYM8563_CTL2_AF)
481 ret &= ~HYM8563_CTL2_AF;
482
483 if (ret & HYM8563_CTL2_TF)
484 ret &= ~HYM8563_CTL2_TF;
485
486 ret &= ~HYM8563_CTL2_TI_TP;
487
488 return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
489 }
490
491 #ifdef CONFIG_PM_SLEEP
492 static int hym8563_suspend(struct device *dev)
493 {
494 struct i2c_client *client = to_i2c_client(dev);
495 int ret;
496
497 if (device_may_wakeup(dev)) {
498 ret = enable_irq_wake(client->irq);
499 if (ret) {
500 dev_err(dev, "enable_irq_wake failed, %d\n", ret);
501 return ret;
502 }
503 }
504
505 return 0;
506 }
507
508 static int hym8563_resume(struct device *dev)
509 {
510 struct i2c_client *client = to_i2c_client(dev);
511
512 if (device_may_wakeup(dev))
513 disable_irq_wake(client->irq);
514
515 return 0;
516 }
517 #endif
518
519 static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
520
521 static int hym8563_probe(struct i2c_client *client,
522 const struct i2c_device_id *id)
523 {
524 struct hym8563 *hym8563;
525 int ret;
526
527 hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
528 if (!hym8563)
529 return -ENOMEM;
530
531 hym8563->client = client;
532 i2c_set_clientdata(client, hym8563);
533
534 device_set_wakeup_capable(&client->dev, true);
535
536 ret = hym8563_init_device(client);
537 if (ret) {
538 dev_err(&client->dev, "could not init device, %d\n", ret);
539 return ret;
540 }
541
542 if (client->irq > 0) {
543 ret = devm_request_threaded_irq(&client->dev, client->irq,
544 NULL, hym8563_irq,
545 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
546 client->name, hym8563);
547 if (ret < 0) {
548 dev_err(&client->dev, "irq %d request failed, %d\n",
549 client->irq, ret);
550 return ret;
551 }
552 }
553
554
555 ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
556 if (ret < 0)
557 return ret;
558
559 hym8563->valid = !(ret & HYM8563_SEC_VL);
560 dev_dbg(&client->dev, "rtc information is %s\n",
561 hym8563->valid ? "valid" : "invalid");
562
563 hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
564 &hym8563_rtc_ops, THIS_MODULE);
565 if (IS_ERR(hym8563->rtc))
566 return PTR_ERR(hym8563->rtc);
567
568
569 hym8563->rtc->uie_unsupported = 1;
570
571 #ifdef CONFIG_COMMON_CLK
572 hym8563_clkout_register_clk(hym8563);
573 #endif
574
575 return 0;
576 }
577
578 static const struct i2c_device_id hym8563_id[] = {
579 { "hym8563", 0 },
580 {},
581 };
582 MODULE_DEVICE_TABLE(i2c, hym8563_id);
583
584 static const struct of_device_id hym8563_dt_idtable[] = {
585 { .compatible = "haoyu,hym8563" },
586 {},
587 };
588 MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
589
590 static struct i2c_driver hym8563_driver = {
591 .driver = {
592 .name = "rtc-hym8563",
593 .pm = &hym8563_pm_ops,
594 .of_match_table = hym8563_dt_idtable,
595 },
596 .probe = hym8563_probe,
597 .id_table = hym8563_id,
598 };
599
600 module_i2c_driver(hym8563_driver);
601
602 MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
603 MODULE_DESCRIPTION("HYM8563 RTC driver");
604 MODULE_LICENSE("GPL");