This source file includes following definitions.
- at91_rtc_write_ier
- at91_rtc_write_idr
- at91_rtc_read_imr
- at91_rtc_decodetime
- at91_rtc_readtime
- at91_rtc_settime
- at91_rtc_readalarm
- at91_rtc_setalarm
- at91_rtc_alarm_irq_enable
- at91_rtc_proc
- at91_rtc_interrupt
- at91_rtc_get_config
- at91_rtc_probe
- at91_rtc_remove
- at91_rtc_shutdown
- at91_rtc_suspend
- at91_rtc_resume
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16 #include <linux/bcd.h>
17 #include <linux/clk.h>
18 #include <linux/completion.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioctl.h>
21 #include <linux/io.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/of_device.h>
25 #include <linux/of.h>
26 #include <linux/platform_device.h>
27 #include <linux/rtc.h>
28 #include <linux/spinlock.h>
29 #include <linux/suspend.h>
30 #include <linux/time.h>
31 #include <linux/uaccess.h>
32
33 #include "rtc-at91rm9200.h"
34
35 #define at91_rtc_read(field) \
36 readl_relaxed(at91_rtc_regs + field)
37 #define at91_rtc_write(field, val) \
38 writel_relaxed((val), at91_rtc_regs + field)
39
40 struct at91_rtc_config {
41 bool use_shadow_imr;
42 };
43
44 static const struct at91_rtc_config *at91_rtc_config;
45 static DECLARE_COMPLETION(at91_rtc_updated);
46 static DECLARE_COMPLETION(at91_rtc_upd_rdy);
47 static void __iomem *at91_rtc_regs;
48 static int irq;
49 static DEFINE_SPINLOCK(at91_rtc_lock);
50 static u32 at91_rtc_shadow_imr;
51 static bool suspended;
52 static DEFINE_SPINLOCK(suspended_lock);
53 static unsigned long cached_events;
54 static u32 at91_rtc_imr;
55 static struct clk *sclk;
56
57 static void at91_rtc_write_ier(u32 mask)
58 {
59 unsigned long flags;
60
61 spin_lock_irqsave(&at91_rtc_lock, flags);
62 at91_rtc_shadow_imr |= mask;
63 at91_rtc_write(AT91_RTC_IER, mask);
64 spin_unlock_irqrestore(&at91_rtc_lock, flags);
65 }
66
67 static void at91_rtc_write_idr(u32 mask)
68 {
69 unsigned long flags;
70
71 spin_lock_irqsave(&at91_rtc_lock, flags);
72 at91_rtc_write(AT91_RTC_IDR, mask);
73
74
75
76
77
78
79
80
81
82
83
84 at91_rtc_read(AT91_RTC_SR);
85 at91_rtc_shadow_imr &= ~mask;
86 spin_unlock_irqrestore(&at91_rtc_lock, flags);
87 }
88
89 static u32 at91_rtc_read_imr(void)
90 {
91 unsigned long flags;
92 u32 mask;
93
94 if (at91_rtc_config->use_shadow_imr) {
95 spin_lock_irqsave(&at91_rtc_lock, flags);
96 mask = at91_rtc_shadow_imr;
97 spin_unlock_irqrestore(&at91_rtc_lock, flags);
98 } else {
99 mask = at91_rtc_read(AT91_RTC_IMR);
100 }
101
102 return mask;
103 }
104
105
106
107
108 static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg,
109 struct rtc_time *tm)
110 {
111 unsigned int time, date;
112
113
114 do {
115 time = at91_rtc_read(timereg);
116 date = at91_rtc_read(calreg);
117 } while ((time != at91_rtc_read(timereg)) ||
118 (date != at91_rtc_read(calreg)));
119
120 tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0);
121 tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8);
122 tm->tm_hour = bcd2bin((time & AT91_RTC_HOUR) >> 16);
123
124
125
126
127
128 tm->tm_year = bcd2bin(date & AT91_RTC_CENT) * 100;
129 tm->tm_year += bcd2bin((date & AT91_RTC_YEAR) >> 8);
130
131 tm->tm_wday = bcd2bin((date & AT91_RTC_DAY) >> 21) - 1;
132 tm->tm_mon = bcd2bin((date & AT91_RTC_MONTH) >> 16) - 1;
133 tm->tm_mday = bcd2bin((date & AT91_RTC_DATE) >> 24);
134 }
135
136
137
138
139 static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
140 {
141 at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm);
142 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
143 tm->tm_year = tm->tm_year - 1900;
144
145 dev_dbg(dev, "%s(): %ptR\n", __func__, tm);
146
147 return 0;
148 }
149
150
151
152
153 static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
154 {
155 unsigned long cr;
156
157 dev_dbg(dev, "%s(): %ptR\n", __func__, tm);
158
159 wait_for_completion(&at91_rtc_upd_rdy);
160
161
162 cr = at91_rtc_read(AT91_RTC_CR);
163 at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM);
164
165 at91_rtc_write_ier(AT91_RTC_ACKUPD);
166 wait_for_completion(&at91_rtc_updated);
167 at91_rtc_write_idr(AT91_RTC_ACKUPD);
168
169 at91_rtc_write(AT91_RTC_TIMR,
170 bin2bcd(tm->tm_sec) << 0
171 | bin2bcd(tm->tm_min) << 8
172 | bin2bcd(tm->tm_hour) << 16);
173
174 at91_rtc_write(AT91_RTC_CALR,
175 bin2bcd((tm->tm_year + 1900) / 100)
176 | bin2bcd(tm->tm_year % 100) << 8
177 | bin2bcd(tm->tm_mon + 1) << 16
178 | bin2bcd(tm->tm_wday + 1) << 21
179 | bin2bcd(tm->tm_mday) << 24);
180
181
182 cr = at91_rtc_read(AT91_RTC_CR);
183 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV);
184 at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM));
185 at91_rtc_write_ier(AT91_RTC_SECEV);
186
187 return 0;
188 }
189
190
191
192
193 static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
194 {
195 struct rtc_time *tm = &alrm->time;
196
197 at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm);
198 tm->tm_year = -1;
199
200 alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM)
201 ? 1 : 0;
202
203 dev_dbg(dev, "%s(): %ptR %sabled\n", __func__, tm,
204 alrm->enabled ? "en" : "dis");
205
206 return 0;
207 }
208
209
210
211
212 static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
213 {
214 struct rtc_time tm;
215
216 at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm);
217
218 tm.tm_mon = alrm->time.tm_mon;
219 tm.tm_mday = alrm->time.tm_mday;
220 tm.tm_hour = alrm->time.tm_hour;
221 tm.tm_min = alrm->time.tm_min;
222 tm.tm_sec = alrm->time.tm_sec;
223
224 at91_rtc_write_idr(AT91_RTC_ALARM);
225 at91_rtc_write(AT91_RTC_TIMALR,
226 bin2bcd(tm.tm_sec) << 0
227 | bin2bcd(tm.tm_min) << 8
228 | bin2bcd(tm.tm_hour) << 16
229 | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN);
230 at91_rtc_write(AT91_RTC_CALALR,
231 bin2bcd(tm.tm_mon + 1) << 16
232 | bin2bcd(tm.tm_mday) << 24
233 | AT91_RTC_DATEEN | AT91_RTC_MTHEN);
234
235 if (alrm->enabled) {
236 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
237 at91_rtc_write_ier(AT91_RTC_ALARM);
238 }
239
240 dev_dbg(dev, "%s(): %ptR\n", __func__, &tm);
241
242 return 0;
243 }
244
245 static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
246 {
247 dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled);
248
249 if (enabled) {
250 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
251 at91_rtc_write_ier(AT91_RTC_ALARM);
252 } else
253 at91_rtc_write_idr(AT91_RTC_ALARM);
254
255 return 0;
256 }
257
258
259
260 static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
261 {
262 unsigned long imr = at91_rtc_read_imr();
263
264 seq_printf(seq, "update_IRQ\t: %s\n",
265 (imr & AT91_RTC_ACKUPD) ? "yes" : "no");
266 seq_printf(seq, "periodic_IRQ\t: %s\n",
267 (imr & AT91_RTC_SECEV) ? "yes" : "no");
268
269 return 0;
270 }
271
272
273
274
275 static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
276 {
277 struct platform_device *pdev = dev_id;
278 struct rtc_device *rtc = platform_get_drvdata(pdev);
279 unsigned int rtsr;
280 unsigned long events = 0;
281 int ret = IRQ_NONE;
282
283 spin_lock(&suspended_lock);
284 rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr();
285 if (rtsr) {
286 if (rtsr & AT91_RTC_ALARM)
287 events |= (RTC_AF | RTC_IRQF);
288 if (rtsr & AT91_RTC_SECEV) {
289 complete(&at91_rtc_upd_rdy);
290 at91_rtc_write_idr(AT91_RTC_SECEV);
291 }
292 if (rtsr & AT91_RTC_ACKUPD)
293 complete(&at91_rtc_updated);
294
295 at91_rtc_write(AT91_RTC_SCCR, rtsr);
296
297 if (!suspended) {
298 rtc_update_irq(rtc, 1, events);
299
300 dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n",
301 __func__, events >> 8, events & 0x000000FF);
302 } else {
303 cached_events |= events;
304 at91_rtc_write_idr(at91_rtc_imr);
305 pm_system_wakeup();
306 }
307
308 ret = IRQ_HANDLED;
309 }
310 spin_unlock(&suspended_lock);
311
312 return ret;
313 }
314
315 static const struct at91_rtc_config at91rm9200_config = {
316 };
317
318 static const struct at91_rtc_config at91sam9x5_config = {
319 .use_shadow_imr = true,
320 };
321
322 #ifdef CONFIG_OF
323 static const struct of_device_id at91_rtc_dt_ids[] = {
324 {
325 .compatible = "atmel,at91rm9200-rtc",
326 .data = &at91rm9200_config,
327 }, {
328 .compatible = "atmel,at91sam9x5-rtc",
329 .data = &at91sam9x5_config,
330 }, {
331
332 }
333 };
334 MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids);
335 #endif
336
337 static const struct at91_rtc_config *
338 at91_rtc_get_config(struct platform_device *pdev)
339 {
340 const struct of_device_id *match;
341
342 if (pdev->dev.of_node) {
343 match = of_match_node(at91_rtc_dt_ids, pdev->dev.of_node);
344 if (!match)
345 return NULL;
346 return (const struct at91_rtc_config *)match->data;
347 }
348
349 return &at91rm9200_config;
350 }
351
352 static const struct rtc_class_ops at91_rtc_ops = {
353 .read_time = at91_rtc_readtime,
354 .set_time = at91_rtc_settime,
355 .read_alarm = at91_rtc_readalarm,
356 .set_alarm = at91_rtc_setalarm,
357 .proc = at91_rtc_proc,
358 .alarm_irq_enable = at91_rtc_alarm_irq_enable,
359 };
360
361
362
363
364 static int __init at91_rtc_probe(struct platform_device *pdev)
365 {
366 struct rtc_device *rtc;
367 struct resource *regs;
368 int ret = 0;
369
370 at91_rtc_config = at91_rtc_get_config(pdev);
371 if (!at91_rtc_config)
372 return -ENODEV;
373
374 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
375 if (!regs) {
376 dev_err(&pdev->dev, "no mmio resource defined\n");
377 return -ENXIO;
378 }
379
380 irq = platform_get_irq(pdev, 0);
381 if (irq < 0)
382 return -ENXIO;
383
384 at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start,
385 resource_size(regs));
386 if (!at91_rtc_regs) {
387 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
388 return -ENOMEM;
389 }
390
391 rtc = devm_rtc_allocate_device(&pdev->dev);
392 if (IS_ERR(rtc))
393 return PTR_ERR(rtc);
394 platform_set_drvdata(pdev, rtc);
395
396 sclk = devm_clk_get(&pdev->dev, NULL);
397 if (IS_ERR(sclk))
398 return PTR_ERR(sclk);
399
400 ret = clk_prepare_enable(sclk);
401 if (ret) {
402 dev_err(&pdev->dev, "Could not enable slow clock\n");
403 return ret;
404 }
405
406 at91_rtc_write(AT91_RTC_CR, 0);
407 at91_rtc_write(AT91_RTC_MR, 0);
408
409
410 at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
411 AT91_RTC_SECEV | AT91_RTC_TIMEV |
412 AT91_RTC_CALEV);
413
414 ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt,
415 IRQF_SHARED | IRQF_COND_SUSPEND,
416 "at91_rtc", pdev);
417 if (ret) {
418 dev_err(&pdev->dev, "IRQ %d already in use.\n", irq);
419 goto err_clk;
420 }
421
422
423
424
425 if (!device_can_wakeup(&pdev->dev))
426 device_init_wakeup(&pdev->dev, 1);
427
428 rtc->ops = &at91_rtc_ops;
429 rtc->range_min = RTC_TIMESTAMP_BEGIN_1900;
430 rtc->range_max = RTC_TIMESTAMP_END_2099;
431 ret = rtc_register_device(rtc);
432 if (ret)
433 goto err_clk;
434
435
436
437
438 at91_rtc_write_ier(AT91_RTC_SECEV);
439
440 dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n");
441 return 0;
442
443 err_clk:
444 clk_disable_unprepare(sclk);
445
446 return ret;
447 }
448
449
450
451
452 static int __exit at91_rtc_remove(struct platform_device *pdev)
453 {
454
455 at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
456 AT91_RTC_SECEV | AT91_RTC_TIMEV |
457 AT91_RTC_CALEV);
458
459 clk_disable_unprepare(sclk);
460
461 return 0;
462 }
463
464 static void at91_rtc_shutdown(struct platform_device *pdev)
465 {
466
467 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
468 AT91_RTC_SECEV | AT91_RTC_TIMEV |
469 AT91_RTC_CALEV);
470 }
471
472 #ifdef CONFIG_PM_SLEEP
473
474
475
476 static int at91_rtc_suspend(struct device *dev)
477 {
478
479
480
481 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
482
483 at91_rtc_imr = at91_rtc_read_imr()
484 & (AT91_RTC_ALARM|AT91_RTC_SECEV);
485 if (at91_rtc_imr) {
486 if (device_may_wakeup(dev)) {
487 unsigned long flags;
488
489 enable_irq_wake(irq);
490
491 spin_lock_irqsave(&suspended_lock, flags);
492 suspended = true;
493 spin_unlock_irqrestore(&suspended_lock, flags);
494 } else {
495 at91_rtc_write_idr(at91_rtc_imr);
496 }
497 }
498 return 0;
499 }
500
501 static int at91_rtc_resume(struct device *dev)
502 {
503 struct rtc_device *rtc = dev_get_drvdata(dev);
504
505 if (at91_rtc_imr) {
506 if (device_may_wakeup(dev)) {
507 unsigned long flags;
508
509 spin_lock_irqsave(&suspended_lock, flags);
510
511 if (cached_events) {
512 rtc_update_irq(rtc, 1, cached_events);
513 cached_events = 0;
514 }
515
516 suspended = false;
517 spin_unlock_irqrestore(&suspended_lock, flags);
518
519 disable_irq_wake(irq);
520 }
521 at91_rtc_write_ier(at91_rtc_imr);
522 }
523 return 0;
524 }
525 #endif
526
527 static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);
528
529 static struct platform_driver at91_rtc_driver = {
530 .remove = __exit_p(at91_rtc_remove),
531 .shutdown = at91_rtc_shutdown,
532 .driver = {
533 .name = "at91_rtc",
534 .pm = &at91_rtc_pm_ops,
535 .of_match_table = of_match_ptr(at91_rtc_dt_ids),
536 },
537 };
538
539 module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe);
540
541 MODULE_AUTHOR("Rick Bronson");
542 MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200");
543 MODULE_LICENSE("GPL");
544 MODULE_ALIAS("platform:at91_rtc");