This source file includes following definitions.
- i2c_dw_get_clk_rate_khz
- dw_i2c_acpi_params
- dw_i2c_acpi_configure
- dw_i2c_acpi_configure
- mscc_twi_set_sda_hold_time
- dw_i2c_of_configure
- dw_i2c_of_configure
- i2c_dw_configure_master
- i2c_dw_configure_slave
- dw_i2c_set_fifo_size
- dw_i2c_plat_pm_cleanup
- dw_i2c_plat_probe
- dw_i2c_plat_remove
- dw_i2c_plat_prepare
- dw_i2c_plat_complete
- dw_i2c_plat_suspend
- dw_i2c_plat_resume
- dw_i2c_init_driver
- dw_i2c_exit_driver
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11 #include <linux/acpi.h>
12 #include <linux/clk-provider.h>
13 #include <linux/clk.h>
14 #include <linux/delay.h>
15 #include <linux/dmi.h>
16 #include <linux/err.h>
17 #include <linux/errno.h>
18 #include <linux/i2c.h>
19 #include <linux/interrupt.h>
20 #include <linux/io.h>
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/of.h>
24 #include <linux/platform_data/i2c-designware.h>
25 #include <linux/platform_device.h>
26 #include <linux/pm.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/property.h>
29 #include <linux/reset.h>
30 #include <linux/sched.h>
31 #include <linux/slab.h>
32 #include <linux/suspend.h>
33
34 #include "i2c-designware-core.h"
35
36 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
37 {
38 return clk_get_rate(dev->clk)/1000;
39 }
40
41 #ifdef CONFIG_ACPI
42
43
44
45
46
47 static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
48 {
49 .ident = "Dell Inspiron 7348",
50 .matches = {
51 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
52 DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
53 },
54 },
55 { }
56 };
57
58 static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
59 u16 *hcnt, u16 *lcnt, u32 *sda_hold)
60 {
61 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
62 acpi_handle handle = ACPI_HANDLE(&pdev->dev);
63 union acpi_object *obj;
64
65 if (dmi_check_system(dw_i2c_no_acpi_params))
66 return;
67
68 if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
69 return;
70
71 obj = (union acpi_object *)buf.pointer;
72 if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
73 const union acpi_object *objs = obj->package.elements;
74
75 *hcnt = (u16)objs[0].integer.value;
76 *lcnt = (u16)objs[1].integer.value;
77 *sda_hold = (u32)objs[2].integer.value;
78 }
79
80 kfree(buf.pointer);
81 }
82
83 static int dw_i2c_acpi_configure(struct platform_device *pdev)
84 {
85 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
86 struct i2c_timings *t = &dev->timings;
87 u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
88
89 dev->tx_fifo_depth = 32;
90 dev->rx_fifo_depth = 32;
91
92
93
94
95
96 dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
97 dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
98 dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
99 dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
100
101 switch (t->bus_freq_hz) {
102 case 100000:
103 dev->sda_hold_time = ss_ht;
104 break;
105 case 1000000:
106 dev->sda_hold_time = fp_ht;
107 break;
108 case 3400000:
109 dev->sda_hold_time = hs_ht;
110 break;
111 case 400000:
112 default:
113 dev->sda_hold_time = fs_ht;
114 break;
115 }
116
117 return 0;
118 }
119
120 static const struct acpi_device_id dw_i2c_acpi_match[] = {
121 { "INT33C2", 0 },
122 { "INT33C3", 0 },
123 { "INT3432", 0 },
124 { "INT3433", 0 },
125 { "80860F41", ACCESS_NO_IRQ_SUSPEND },
126 { "808622C1", ACCESS_NO_IRQ_SUSPEND | MODEL_CHERRYTRAIL },
127 { "AMD0010", ACCESS_INTR_MASK },
128 { "AMDI0010", ACCESS_INTR_MASK },
129 { "AMDI0510", 0 },
130 { "APMC0D0F", 0 },
131 { "HISI02A1", 0 },
132 { "HISI02A2", 0 },
133 { }
134 };
135 MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
136 #else
137 static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
138 {
139 return -ENODEV;
140 }
141 #endif
142
143 #ifdef CONFIG_OF
144 #define MSCC_ICPU_CFG_TWI_DELAY 0x0
145 #define MSCC_ICPU_CFG_TWI_DELAY_ENABLE BIT(0)
146 #define MSCC_ICPU_CFG_TWI_SPIKE_FILTER 0x4
147
148 static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
149 {
150 writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
151 dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
152
153 return 0;
154 }
155
156 static int dw_i2c_of_configure(struct platform_device *pdev)
157 {
158 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
159 struct resource *mem;
160
161 switch (dev->flags & MODEL_MASK) {
162 case MODEL_MSCC_OCELOT:
163 mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
164 dev->ext = devm_ioremap_resource(&pdev->dev, mem);
165 if (!IS_ERR(dev->ext))
166 dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
167 break;
168 default:
169 break;
170 }
171
172 return 0;
173 }
174
175 static const struct of_device_id dw_i2c_of_match[] = {
176 { .compatible = "snps,designware-i2c", },
177 { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
178 {},
179 };
180 MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
181 #else
182 static inline int dw_i2c_of_configure(struct platform_device *pdev)
183 {
184 return -ENODEV;
185 }
186 #endif
187
188 static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
189 {
190 struct i2c_timings *t = &dev->timings;
191
192 dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
193
194 dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
195 DW_IC_CON_RESTART_EN;
196
197 dev->mode = DW_IC_MASTER;
198
199 switch (t->bus_freq_hz) {
200 case 100000:
201 dev->master_cfg |= DW_IC_CON_SPEED_STD;
202 break;
203 case 3400000:
204 dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
205 break;
206 default:
207 dev->master_cfg |= DW_IC_CON_SPEED_FAST;
208 }
209 }
210
211 static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
212 {
213 dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
214
215 dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
216 DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
217
218 dev->mode = DW_IC_SLAVE;
219 }
220
221 static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev)
222 {
223 u32 param, tx_fifo_depth, rx_fifo_depth;
224
225
226
227
228
229 param = i2c_dw_read_comp_param(dev);
230 tx_fifo_depth = ((param >> 16) & 0xff) + 1;
231 rx_fifo_depth = ((param >> 8) & 0xff) + 1;
232 if (!dev->tx_fifo_depth) {
233 dev->tx_fifo_depth = tx_fifo_depth;
234 dev->rx_fifo_depth = rx_fifo_depth;
235 } else if (tx_fifo_depth >= 2) {
236 dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
237 tx_fifo_depth);
238 dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
239 rx_fifo_depth);
240 }
241 }
242
243 static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
244 {
245 pm_runtime_disable(dev->dev);
246
247 if (dev->shared_with_punit)
248 pm_runtime_put_noidle(dev->dev);
249 }
250
251 static int dw_i2c_plat_probe(struct platform_device *pdev)
252 {
253 struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
254 struct i2c_adapter *adap;
255 struct dw_i2c_dev *dev;
256 struct i2c_timings *t;
257 u32 acpi_speed;
258 struct resource *mem;
259 int i, irq, ret;
260 static const int supported_speeds[] = {
261 0, 100000, 400000, 1000000, 3400000
262 };
263
264 irq = platform_get_irq(pdev, 0);
265 if (irq < 0)
266 return irq;
267
268 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
269 if (!dev)
270 return -ENOMEM;
271
272 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
273 dev->base = devm_ioremap_resource(&pdev->dev, mem);
274 if (IS_ERR(dev->base))
275 return PTR_ERR(dev->base);
276
277 dev->dev = &pdev->dev;
278 dev->irq = irq;
279 platform_set_drvdata(pdev, dev);
280
281 dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
282 if (IS_ERR(dev->rst))
283 return PTR_ERR(dev->rst);
284
285 reset_control_deassert(dev->rst);
286
287 t = &dev->timings;
288 if (pdata)
289 t->bus_freq_hz = pdata->i2c_scl_freq;
290 else
291 i2c_parse_fw_timings(&pdev->dev, t, false);
292
293 acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
294
295
296
297
298 for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
299 if (acpi_speed < supported_speeds[i])
300 break;
301 }
302 acpi_speed = supported_speeds[i - 1];
303
304
305
306
307
308 if (acpi_speed && t->bus_freq_hz)
309 t->bus_freq_hz = min(t->bus_freq_hz, acpi_speed);
310 else if (acpi_speed || t->bus_freq_hz)
311 t->bus_freq_hz = max(t->bus_freq_hz, acpi_speed);
312 else
313 t->bus_freq_hz = 400000;
314
315 dev->flags |= (uintptr_t)device_get_match_data(&pdev->dev);
316
317 if (pdev->dev.of_node)
318 dw_i2c_of_configure(pdev);
319
320 if (has_acpi_companion(&pdev->dev))
321 dw_i2c_acpi_configure(pdev);
322
323
324
325
326
327 if (t->bus_freq_hz != 100000 && t->bus_freq_hz != 400000 &&
328 t->bus_freq_hz != 1000000 && t->bus_freq_hz != 3400000) {
329 dev_err(&pdev->dev,
330 "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
331 t->bus_freq_hz);
332 ret = -EINVAL;
333 goto exit_reset;
334 }
335
336 ret = i2c_dw_probe_lock_support(dev);
337 if (ret)
338 goto exit_reset;
339
340 if (i2c_detect_slave_mode(&pdev->dev))
341 i2c_dw_configure_slave(dev);
342 else
343 i2c_dw_configure_master(dev);
344
345
346 dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
347 if (IS_ERR(dev->pclk)) {
348 ret = PTR_ERR(dev->pclk);
349 goto exit_reset;
350 }
351
352 dev->clk = devm_clk_get(&pdev->dev, NULL);
353 if (!i2c_dw_prepare_clk(dev, true)) {
354 u64 clk_khz;
355
356 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
357 clk_khz = dev->get_clk_rate_khz(dev);
358
359 if (!dev->sda_hold_time && t->sda_hold_ns)
360 dev->sda_hold_time =
361 div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000);
362 }
363
364 dw_i2c_set_fifo_size(dev);
365
366 adap = &dev->adapter;
367 adap->owner = THIS_MODULE;
368 adap->class = I2C_CLASS_DEPRECATED;
369 ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
370 adap->dev.of_node = pdev->dev.of_node;
371 adap->nr = -1;
372
373 if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
374 dev_pm_set_driver_flags(&pdev->dev,
375 DPM_FLAG_SMART_PREPARE |
376 DPM_FLAG_LEAVE_SUSPENDED);
377 } else {
378 dev_pm_set_driver_flags(&pdev->dev,
379 DPM_FLAG_SMART_PREPARE |
380 DPM_FLAG_SMART_SUSPEND |
381 DPM_FLAG_LEAVE_SUSPENDED);
382 }
383
384
385 WARN_ON(pm_runtime_enabled(&pdev->dev));
386
387 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
388 pm_runtime_use_autosuspend(&pdev->dev);
389 pm_runtime_set_active(&pdev->dev);
390
391 if (dev->shared_with_punit)
392 pm_runtime_get_noresume(&pdev->dev);
393
394 pm_runtime_enable(&pdev->dev);
395
396 if (dev->mode == DW_IC_SLAVE)
397 ret = i2c_dw_probe_slave(dev);
398 else
399 ret = i2c_dw_probe(dev);
400
401 if (ret)
402 goto exit_probe;
403
404 return ret;
405
406 exit_probe:
407 dw_i2c_plat_pm_cleanup(dev);
408 exit_reset:
409 reset_control_assert(dev->rst);
410 return ret;
411 }
412
413 static int dw_i2c_plat_remove(struct platform_device *pdev)
414 {
415 struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
416
417 pm_runtime_get_sync(&pdev->dev);
418
419 i2c_del_adapter(&dev->adapter);
420
421 dev->disable(dev);
422
423 pm_runtime_dont_use_autosuspend(&pdev->dev);
424 pm_runtime_put_sync(&pdev->dev);
425 dw_i2c_plat_pm_cleanup(dev);
426
427 reset_control_assert(dev->rst);
428
429 return 0;
430 }
431
432 #ifdef CONFIG_PM_SLEEP
433 static int dw_i2c_plat_prepare(struct device *dev)
434 {
435
436
437
438
439
440
441 return !has_acpi_companion(dev);
442 }
443
444 static void dw_i2c_plat_complete(struct device *dev)
445 {
446
447
448
449
450
451
452 if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
453 pm_request_resume(dev);
454 }
455 #else
456 #define dw_i2c_plat_prepare NULL
457 #define dw_i2c_plat_complete NULL
458 #endif
459
460 #ifdef CONFIG_PM
461 static int dw_i2c_plat_suspend(struct device *dev)
462 {
463 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
464
465 i_dev->suspended = true;
466
467 if (i_dev->shared_with_punit)
468 return 0;
469
470 i_dev->disable(i_dev);
471 i2c_dw_prepare_clk(i_dev, false);
472
473 return 0;
474 }
475
476 static int dw_i2c_plat_resume(struct device *dev)
477 {
478 struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
479
480 if (!i_dev->shared_with_punit)
481 i2c_dw_prepare_clk(i_dev, true);
482
483 i_dev->init(i_dev);
484 i_dev->suspended = false;
485
486 return 0;
487 }
488
489 static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
490 .prepare = dw_i2c_plat_prepare,
491 .complete = dw_i2c_plat_complete,
492 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
493 SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
494 };
495
496 #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
497 #else
498 #define DW_I2C_DEV_PMOPS NULL
499 #endif
500
501
502 MODULE_ALIAS("platform:i2c_designware");
503
504 static struct platform_driver dw_i2c_driver = {
505 .probe = dw_i2c_plat_probe,
506 .remove = dw_i2c_plat_remove,
507 .driver = {
508 .name = "i2c_designware",
509 .of_match_table = of_match_ptr(dw_i2c_of_match),
510 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
511 .pm = DW_I2C_DEV_PMOPS,
512 },
513 };
514
515 static int __init dw_i2c_init_driver(void)
516 {
517 return platform_driver_register(&dw_i2c_driver);
518 }
519 subsys_initcall(dw_i2c_init_driver);
520
521 static void __exit dw_i2c_exit_driver(void)
522 {
523 platform_driver_unregister(&dw_i2c_driver);
524 }
525 module_exit(dw_i2c_exit_driver);
526
527 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
528 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
529 MODULE_LICENSE("GPL");