root/drivers/i2c/busses/i2c-meson.c

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DEFINITIONS

This source file includes following definitions.
  1. meson_i2c_set_mask
  2. meson_i2c_reset_tokens
  3. meson_i2c_add_token
  4. meson_i2c_set_clk_div
  5. meson_i2c_get_data
  6. meson_i2c_put_data
  7. meson_i2c_prepare_xfer
  8. meson_i2c_irq
  9. meson_i2c_do_start
  10. meson_i2c_xfer_msg
  11. meson_i2c_xfer
  12. meson_i2c_func
  13. meson_i2c_probe
  14. meson_i2c_remove

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * I2C bus driver for Amlogic Meson SoCs
   4  *
   5  * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
   6  */
   7 
   8 #include <linux/clk.h>
   9 #include <linux/completion.h>
  10 #include <linux/i2c.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/io.h>
  13 #include <linux/kernel.h>
  14 #include <linux/module.h>
  15 #include <linux/of.h>
  16 #include <linux/of_device.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/types.h>
  19 
  20 /* Meson I2C register map */
  21 #define REG_CTRL                0x00
  22 #define REG_SLAVE_ADDR          0x04
  23 #define REG_TOK_LIST0           0x08
  24 #define REG_TOK_LIST1           0x0c
  25 #define REG_TOK_WDATA0          0x10
  26 #define REG_TOK_WDATA1          0x14
  27 #define REG_TOK_RDATA0          0x18
  28 #define REG_TOK_RDATA1          0x1c
  29 
  30 /* Control register fields */
  31 #define REG_CTRL_START          BIT(0)
  32 #define REG_CTRL_ACK_IGNORE     BIT(1)
  33 #define REG_CTRL_STATUS         BIT(2)
  34 #define REG_CTRL_ERROR          BIT(3)
  35 #define REG_CTRL_CLKDIV_SHIFT   12
  36 #define REG_CTRL_CLKDIV_MASK    GENMASK(21, 12)
  37 #define REG_CTRL_CLKDIVEXT_SHIFT 28
  38 #define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28)
  39 
  40 #define I2C_TIMEOUT_MS          500
  41 
  42 enum {
  43         TOKEN_END = 0,
  44         TOKEN_START,
  45         TOKEN_SLAVE_ADDR_WRITE,
  46         TOKEN_SLAVE_ADDR_READ,
  47         TOKEN_DATA,
  48         TOKEN_DATA_LAST,
  49         TOKEN_STOP,
  50 };
  51 
  52 enum {
  53         STATE_IDLE,
  54         STATE_READ,
  55         STATE_WRITE,
  56 };
  57 
  58 struct meson_i2c_data {
  59         unsigned char div_factor;
  60 };
  61 
  62 /**
  63  * struct meson_i2c - Meson I2C device private data
  64  *
  65  * @adap:       I2C adapter instance
  66  * @dev:        Pointer to device structure
  67  * @regs:       Base address of the device memory mapped registers
  68  * @clk:        Pointer to clock structure
  69  * @msg:        Pointer to the current I2C message
  70  * @state:      Current state in the driver state machine
  71  * @last:       Flag set for the last message in the transfer
  72  * @count:      Number of bytes to be sent/received in current transfer
  73  * @pos:        Current position in the send/receive buffer
  74  * @error:      Flag set when an error is received
  75  * @lock:       To avoid race conditions between irq handler and xfer code
  76  * @done:       Completion used to wait for transfer termination
  77  * @tokens:     Sequence of tokens to be written to the device
  78  * @num_tokens: Number of tokens
  79  * @data:       Pointer to the controlller's platform data
  80  */
  81 struct meson_i2c {
  82         struct i2c_adapter      adap;
  83         struct device           *dev;
  84         void __iomem            *regs;
  85         struct clk              *clk;
  86 
  87         struct i2c_msg          *msg;
  88         int                     state;
  89         bool                    last;
  90         int                     count;
  91         int                     pos;
  92         int                     error;
  93 
  94         spinlock_t              lock;
  95         struct completion       done;
  96         u32                     tokens[2];
  97         int                     num_tokens;
  98 
  99         const struct meson_i2c_data *data;
 100 };
 101 
 102 static void meson_i2c_set_mask(struct meson_i2c *i2c, int reg, u32 mask,
 103                                u32 val)
 104 {
 105         u32 data;
 106 
 107         data = readl(i2c->regs + reg);
 108         data &= ~mask;
 109         data |= val & mask;
 110         writel(data, i2c->regs + reg);
 111 }
 112 
 113 static void meson_i2c_reset_tokens(struct meson_i2c *i2c)
 114 {
 115         i2c->tokens[0] = 0;
 116         i2c->tokens[1] = 0;
 117         i2c->num_tokens = 0;
 118 }
 119 
 120 static void meson_i2c_add_token(struct meson_i2c *i2c, int token)
 121 {
 122         if (i2c->num_tokens < 8)
 123                 i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4);
 124         else
 125                 i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4);
 126 
 127         i2c->num_tokens++;
 128 }
 129 
 130 static void meson_i2c_set_clk_div(struct meson_i2c *i2c, unsigned int freq)
 131 {
 132         unsigned long clk_rate = clk_get_rate(i2c->clk);
 133         unsigned int div;
 134 
 135         div = DIV_ROUND_UP(clk_rate, freq * i2c->data->div_factor);
 136 
 137         /* clock divider has 12 bits */
 138         if (div >= (1 << 12)) {
 139                 dev_err(i2c->dev, "requested bus frequency too low\n");
 140                 div = (1 << 12) - 1;
 141         }
 142 
 143         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV_MASK,
 144                            (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT);
 145 
 146         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT_MASK,
 147                            (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);
 148 
 149         dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__,
 150                 clk_rate, freq, div);
 151 }
 152 
 153 static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len)
 154 {
 155         u32 rdata0, rdata1;
 156         int i;
 157 
 158         rdata0 = readl(i2c->regs + REG_TOK_RDATA0);
 159         rdata1 = readl(i2c->regs + REG_TOK_RDATA1);
 160 
 161         dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
 162                 rdata0, rdata1, len);
 163 
 164         for (i = 0; i < min(4, len); i++)
 165                 *buf++ = (rdata0 >> i * 8) & 0xff;
 166 
 167         for (i = 4; i < min(8, len); i++)
 168                 *buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
 169 }
 170 
 171 static void meson_i2c_put_data(struct meson_i2c *i2c, char *buf, int len)
 172 {
 173         u32 wdata0 = 0, wdata1 = 0;
 174         int i;
 175 
 176         for (i = 0; i < min(4, len); i++)
 177                 wdata0 |= *buf++ << (i * 8);
 178 
 179         for (i = 4; i < min(8, len); i++)
 180                 wdata1 |= *buf++ << ((i - 4) * 8);
 181 
 182         writel(wdata0, i2c->regs + REG_TOK_WDATA0);
 183         writel(wdata1, i2c->regs + REG_TOK_WDATA1);
 184 
 185         dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__,
 186                 wdata0, wdata1, len);
 187 }
 188 
 189 static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
 190 {
 191         bool write = !(i2c->msg->flags & I2C_M_RD);
 192         int i;
 193 
 194         i2c->count = min(i2c->msg->len - i2c->pos, 8);
 195 
 196         for (i = 0; i < i2c->count - 1; i++)
 197                 meson_i2c_add_token(i2c, TOKEN_DATA);
 198 
 199         if (i2c->count) {
 200                 if (write || i2c->pos + i2c->count < i2c->msg->len)
 201                         meson_i2c_add_token(i2c, TOKEN_DATA);
 202                 else
 203                         meson_i2c_add_token(i2c, TOKEN_DATA_LAST);
 204         }
 205 
 206         if (write)
 207                 meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
 208 
 209         if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len)
 210                 meson_i2c_add_token(i2c, TOKEN_STOP);
 211 
 212         writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0);
 213         writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1);
 214 }
 215 
 216 static irqreturn_t meson_i2c_irq(int irqno, void *dev_id)
 217 {
 218         struct meson_i2c *i2c = dev_id;
 219         unsigned int ctrl;
 220 
 221         spin_lock(&i2c->lock);
 222 
 223         meson_i2c_reset_tokens(i2c);
 224         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
 225         ctrl = readl(i2c->regs + REG_CTRL);
 226 
 227         dev_dbg(i2c->dev, "irq: state %d, pos %d, count %d, ctrl %08x\n",
 228                 i2c->state, i2c->pos, i2c->count, ctrl);
 229 
 230         if (i2c->state == STATE_IDLE) {
 231                 spin_unlock(&i2c->lock);
 232                 return IRQ_NONE;
 233         }
 234 
 235         if (ctrl & REG_CTRL_ERROR) {
 236                 /*
 237                  * The bit is set when the IGNORE_NAK bit is cleared
 238                  * and the device didn't respond. In this case, the
 239                  * I2C controller automatically generates a STOP
 240                  * condition.
 241                  */
 242                 dev_dbg(i2c->dev, "error bit set\n");
 243                 i2c->error = -ENXIO;
 244                 i2c->state = STATE_IDLE;
 245                 complete(&i2c->done);
 246                 goto out;
 247         }
 248 
 249         if (i2c->state == STATE_READ && i2c->count)
 250                 meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
 251 
 252         i2c->pos += i2c->count;
 253 
 254         if (i2c->pos >= i2c->msg->len) {
 255                 i2c->state = STATE_IDLE;
 256                 complete(&i2c->done);
 257                 goto out;
 258         }
 259 
 260         /* Restart the processing */
 261         meson_i2c_prepare_xfer(i2c);
 262         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START);
 263 out:
 264         spin_unlock(&i2c->lock);
 265 
 266         return IRQ_HANDLED;
 267 }
 268 
 269 static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg)
 270 {
 271         int token;
 272 
 273         token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ :
 274                 TOKEN_SLAVE_ADDR_WRITE;
 275 
 276         writel(msg->addr << 1, i2c->regs + REG_SLAVE_ADDR);
 277         meson_i2c_add_token(i2c, TOKEN_START);
 278         meson_i2c_add_token(i2c, token);
 279 }
 280 
 281 static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg,
 282                               int last)
 283 {
 284         unsigned long time_left, flags;
 285         int ret = 0;
 286 
 287         i2c->msg = msg;
 288         i2c->last = last;
 289         i2c->pos = 0;
 290         i2c->count = 0;
 291         i2c->error = 0;
 292 
 293         meson_i2c_reset_tokens(i2c);
 294 
 295         flags = (msg->flags & I2C_M_IGNORE_NAK) ? REG_CTRL_ACK_IGNORE : 0;
 296         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_ACK_IGNORE, flags);
 297 
 298         if (!(msg->flags & I2C_M_NOSTART))
 299                 meson_i2c_do_start(i2c, msg);
 300 
 301         i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
 302         meson_i2c_prepare_xfer(i2c);
 303         reinit_completion(&i2c->done);
 304 
 305         /* Start the transfer */
 306         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START);
 307 
 308         time_left = msecs_to_jiffies(I2C_TIMEOUT_MS);
 309         time_left = wait_for_completion_timeout(&i2c->done, time_left);
 310 
 311         /*
 312          * Protect access to i2c struct and registers from interrupt
 313          * handlers triggered by a transfer terminated after the
 314          * timeout period
 315          */
 316         spin_lock_irqsave(&i2c->lock, flags);
 317 
 318         /* Abort any active operation */
 319         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
 320 
 321         if (!time_left) {
 322                 i2c->state = STATE_IDLE;
 323                 ret = -ETIMEDOUT;
 324         }
 325 
 326         if (i2c->error)
 327                 ret = i2c->error;
 328 
 329         spin_unlock_irqrestore(&i2c->lock, flags);
 330 
 331         return ret;
 332 }
 333 
 334 static int meson_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
 335                           int num)
 336 {
 337         struct meson_i2c *i2c = adap->algo_data;
 338         int i, ret = 0;
 339 
 340         clk_enable(i2c->clk);
 341 
 342         for (i = 0; i < num; i++) {
 343                 ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1);
 344                 if (ret)
 345                         break;
 346         }
 347 
 348         clk_disable(i2c->clk);
 349 
 350         return ret ?: i;
 351 }
 352 
 353 static u32 meson_i2c_func(struct i2c_adapter *adap)
 354 {
 355         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 356 }
 357 
 358 static const struct i2c_algorithm meson_i2c_algorithm = {
 359         .master_xfer    = meson_i2c_xfer,
 360         .functionality  = meson_i2c_func,
 361 };
 362 
 363 static int meson_i2c_probe(struct platform_device *pdev)
 364 {
 365         struct device_node *np = pdev->dev.of_node;
 366         struct meson_i2c *i2c;
 367         struct resource *mem;
 368         struct i2c_timings timings;
 369         int irq, ret = 0;
 370 
 371         i2c = devm_kzalloc(&pdev->dev, sizeof(struct meson_i2c), GFP_KERNEL);
 372         if (!i2c)
 373                 return -ENOMEM;
 374 
 375         i2c_parse_fw_timings(&pdev->dev, &timings, true);
 376 
 377         i2c->dev = &pdev->dev;
 378         platform_set_drvdata(pdev, i2c);
 379 
 380         spin_lock_init(&i2c->lock);
 381         init_completion(&i2c->done);
 382 
 383         i2c->data = (const struct meson_i2c_data *)
 384                 of_device_get_match_data(&pdev->dev);
 385 
 386         i2c->clk = devm_clk_get(&pdev->dev, NULL);
 387         if (IS_ERR(i2c->clk)) {
 388                 dev_err(&pdev->dev, "can't get device clock\n");
 389                 return PTR_ERR(i2c->clk);
 390         }
 391 
 392         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 393         i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
 394         if (IS_ERR(i2c->regs))
 395                 return PTR_ERR(i2c->regs);
 396 
 397         irq = platform_get_irq(pdev, 0);
 398         if (irq < 0) {
 399                 dev_err(&pdev->dev, "can't find IRQ\n");
 400                 return irq;
 401         }
 402 
 403         ret = devm_request_irq(&pdev->dev, irq, meson_i2c_irq, 0, NULL, i2c);
 404         if (ret < 0) {
 405                 dev_err(&pdev->dev, "can't request IRQ\n");
 406                 return ret;
 407         }
 408 
 409         ret = clk_prepare(i2c->clk);
 410         if (ret < 0) {
 411                 dev_err(&pdev->dev, "can't prepare clock\n");
 412                 return ret;
 413         }
 414 
 415         strlcpy(i2c->adap.name, "Meson I2C adapter",
 416                 sizeof(i2c->adap.name));
 417         i2c->adap.owner = THIS_MODULE;
 418         i2c->adap.algo = &meson_i2c_algorithm;
 419         i2c->adap.dev.parent = &pdev->dev;
 420         i2c->adap.dev.of_node = np;
 421         i2c->adap.algo_data = i2c;
 422 
 423         /*
 424          * A transfer is triggered when START bit changes from 0 to 1.
 425          * Ensure that the bit is set to 0 after probe
 426          */
 427         meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0);
 428 
 429         ret = i2c_add_adapter(&i2c->adap);
 430         if (ret < 0) {
 431                 clk_unprepare(i2c->clk);
 432                 return ret;
 433         }
 434 
 435         meson_i2c_set_clk_div(i2c, timings.bus_freq_hz);
 436 
 437         return 0;
 438 }
 439 
 440 static int meson_i2c_remove(struct platform_device *pdev)
 441 {
 442         struct meson_i2c *i2c = platform_get_drvdata(pdev);
 443 
 444         i2c_del_adapter(&i2c->adap);
 445         clk_unprepare(i2c->clk);
 446 
 447         return 0;
 448 }
 449 
 450 static const struct meson_i2c_data i2c_meson6_data = {
 451         .div_factor = 4,
 452 };
 453 
 454 static const struct meson_i2c_data i2c_gxbb_data = {
 455         .div_factor = 4,
 456 };
 457 
 458 static const struct meson_i2c_data i2c_axg_data = {
 459         .div_factor = 3,
 460 };
 461 
 462 static const struct of_device_id meson_i2c_match[] = {
 463         { .compatible = "amlogic,meson6-i2c", .data = &i2c_meson6_data },
 464         { .compatible = "amlogic,meson-gxbb-i2c", .data = &i2c_gxbb_data },
 465         { .compatible = "amlogic,meson-axg-i2c", .data = &i2c_axg_data },
 466         {},
 467 };
 468 
 469 MODULE_DEVICE_TABLE(of, meson_i2c_match);
 470 
 471 static struct platform_driver meson_i2c_driver = {
 472         .probe   = meson_i2c_probe,
 473         .remove  = meson_i2c_remove,
 474         .driver  = {
 475                 .name  = "meson-i2c",
 476                 .of_match_table = meson_i2c_match,
 477         },
 478 };
 479 
 480 module_platform_driver(meson_i2c_driver);
 481 
 482 MODULE_DESCRIPTION("Amlogic Meson I2C Bus driver");
 483 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
 484 MODULE_LICENSE("GPL v2");

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