drivers/acpi/acpi

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This source file includes following definitions.
lpss_uart_setup
lpss_deassert_reset
byt_pwm_setup
byt_i2c_setup
bsw_pwm_setup
is_memory
lpt_register_clock_device
register_device_clock
hid_uid_match
acpi_lpss_is_supplier
acpi_lpss_is_consumer
match_hid_uid
acpi_lpss_find_device
acpi_lpss_dep
acpi_lpss_link_consumer
acpi_lpss_link_supplier
acpi_lpss_create_device_links
acpi_lpss_create_device
__lpss_reg_read
__lpss_reg_write
lpss_reg_read
lpss_ltr_show
lpss_ltr_mode_show
acpi_lpss_set_ltr
acpi_lpss_save_ctx
acpi_lpss_restore_ctx
acpi_lpss_d3_to_d0_delay
acpi_lpss_activate
acpi_lpss_dismiss
lpss_iosf_enter_d3_state
lpss_iosf_exit_d3_state
acpi_lpss_suspend
acpi_lpss_resume
acpi_lpss_do_suspend_late
acpi_lpss_suspend_late
acpi_lpss_suspend_noirq
acpi_lpss_do_resume_early
acpi_lpss_resume_early
acpi_lpss_resume_noirq
acpi_lpss_do_restore_early
acpi_lpss_restore_early
acpi_lpss_restore_noirq
acpi_lpss_do_poweroff_late
acpi_lpss_poweroff_late
acpi_lpss_poweroff_noirq
acpi_lpss_runtime_suspend
acpi_lpss_runtime_resume
acpi_lpss_platform_notify
acpi_lpss_bind
acpi_lpss_unbind
acpi_lpss_init
acpi_lpss_init
   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * ACPI support for Intel Lynxpoint LPSS.
   4  *
   5  * Copyright (C) 2013, Intel Corporation
   6  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
   7  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
   8  */
   9 
  10 #include <linux/acpi.h>
  11 #include <linux/clkdev.h>
  12 #include <linux/clk-provider.h>
  13 #include <linux/dmi.h>
  14 #include <linux/err.h>
  15 #include <linux/io.h>
  16 #include <linux/mutex.h>
  17 #include <linux/pci.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/platform_data/x86/clk-lpss.h>
  20 #include <linux/platform_data/x86/pmc_atom.h>
  21 #include <linux/pm_domain.h>
  22 #include <linux/pm_runtime.h>
  23 #include <linux/pwm.h>
  24 #include <linux/suspend.h>
  25 #include <linux/delay.h>
  26 
  27 #include "internal.h"
  28 
  29 ACPI_MODULE_NAME("acpi_lpss");
  30 
  31 #ifdef CONFIG_X86_INTEL_LPSS
  32 
  33 #include <asm/cpu_device_id.h>
  34 #include <asm/intel-family.h>
  35 #include <asm/iosf_mbi.h>
  36 
  37 #define LPSS_ADDR(desc) ((unsigned long)&desc)
  38 
  39 #define LPSS_CLK_SIZE   0x04
  40 #define LPSS_LTR_SIZE   0x18
  41 
  42 /* Offsets relative to LPSS_PRIVATE_OFFSET */
  43 #define LPSS_CLK_DIVIDER_DEF_MASK       (BIT(1) | BIT(16))
  44 #define LPSS_RESETS                     0x04
  45 #define LPSS_RESETS_RESET_FUNC          BIT(0)
  46 #define LPSS_RESETS_RESET_APB           BIT(1)
  47 #define LPSS_GENERAL                    0x08
  48 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
  49 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
  50 #define LPSS_SW_LTR                     0x10
  51 #define LPSS_AUTO_LTR                   0x14
  52 #define LPSS_LTR_SNOOP_REQ              BIT(15)
  53 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
  54 #define LPSS_LTR_SNOOP_LAT_1US          0x800
  55 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
  56 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
  57 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
  58 #define LPSS_LTR_MAX_VAL                0x3FF
  59 #define LPSS_TX_INT                     0x20
  60 #define LPSS_TX_INT_MASK                BIT(1)
  61 
  62 #define LPSS_PRV_REG_COUNT              9
  63 
  64 /* LPSS Flags */
  65 #define LPSS_CLK                        BIT(0)
  66 #define LPSS_CLK_GATE                   BIT(1)
  67 #define LPSS_CLK_DIVIDER                BIT(2)
  68 #define LPSS_LTR                        BIT(3)
  69 #define LPSS_SAVE_CTX                   BIT(4)
  70 #define LPSS_NO_D3_DELAY                BIT(5)
  71 
  72 /* Crystal Cove PMIC shares same ACPI ID between different platforms */
  73 #define BYT_CRC_HRV                     2
  74 #define CHT_CRC_HRV                     3
  75 
  76 struct lpss_private_data;
  77 
  78 struct lpss_device_desc {
  79         unsigned int flags;
  80         const char *clk_con_id;
  81         unsigned int prv_offset;
  82         size_t prv_size_override;
  83         struct property_entry *properties;
  84         void (*setup)(struct lpss_private_data *pdata);
  85         bool resume_from_noirq;
  86 };
  87 
  88 static const struct lpss_device_desc lpss_dma_desc = {
  89         .flags = LPSS_CLK,
  90 };
  91 
  92 struct lpss_private_data {
  93         struct acpi_device *adev;
  94         void __iomem *mmio_base;
  95         resource_size_t mmio_size;
  96         unsigned int fixed_clk_rate;
  97         struct clk *clk;
  98         const struct lpss_device_desc *dev_desc;
  99         u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
 100 };
 101 
 102 /* Devices which need to be in D3 before lpss_iosf_enter_d3_state() proceeds */
 103 static u32 pmc_atom_d3_mask = 0xfe000ffe;
 104 
 105 /* LPSS run time quirks */
 106 static unsigned int lpss_quirks;
 107 
 108 /*
 109  * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
 110  *
 111  * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
 112  * it can be powered off automatically whenever the last LPSS device goes down.
 113  * In case of no power any access to the DMA controller will hang the system.
 114  * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
 115  * well as on ASuS T100TA transformer.
 116  *
 117  * This quirk overrides power state of entire LPSS island to keep DMA powered
 118  * on whenever we have at least one other device in use.
 119  */
 120 #define LPSS_QUIRK_ALWAYS_POWER_ON      BIT(0)
 121 
 122 /* UART Component Parameter Register */
 123 #define LPSS_UART_CPR                   0xF4
 124 #define LPSS_UART_CPR_AFCE              BIT(4)
 125 
 126 static void lpss_uart_setup(struct lpss_private_data *pdata)
 127 {
 128         unsigned int offset;
 129         u32 val;
 130 
 131         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
 132         val = readl(pdata->mmio_base + offset);
 133         writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
 134 
 135         val = readl(pdata->mmio_base + LPSS_UART_CPR);
 136         if (!(val & LPSS_UART_CPR_AFCE)) {
 137                 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
 138                 val = readl(pdata->mmio_base + offset);
 139                 val |= LPSS_GENERAL_UART_RTS_OVRD;
 140                 writel(val, pdata->mmio_base + offset);
 141         }
 142 }
 143 
 144 static void lpss_deassert_reset(struct lpss_private_data *pdata)
 145 {
 146         unsigned int offset;
 147         u32 val;
 148 
 149         offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
 150         val = readl(pdata->mmio_base + offset);
 151         val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
 152         writel(val, pdata->mmio_base + offset);
 153 }
 154 
 155 /*
 156  * BYT PWM used for backlight control by the i915 driver on systems without
 157  * the Crystal Cove PMIC.
 158  */
 159 static struct pwm_lookup byt_pwm_lookup[] = {
 160         PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0",
 161                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 162                                "pwm-lpss-platform"),
 163 };
 164 
 165 static void byt_pwm_setup(struct lpss_private_data *pdata)
 166 {
 167         struct acpi_device *adev = pdata->adev;
 168 
 169         /* Only call pwm_add_table for the first PWM controller */
 170         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 171                 return;
 172 
 173         if (!acpi_dev_present("INT33FD", NULL, BYT_CRC_HRV))
 174                 pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));
 175 }
 176 
 177 #define LPSS_I2C_ENABLE                 0x6c
 178 
 179 static void byt_i2c_setup(struct lpss_private_data *pdata)
 180 {
 181         const char *uid_str = acpi_device_uid(pdata->adev);
 182         acpi_handle handle = pdata->adev->handle;
 183         unsigned long long shared_host = 0;
 184         acpi_status status;
 185         long uid = 0;
 186 
 187         /* Expected to always be true, but better safe then sorry */
 188         if (uid_str)
 189                 uid = simple_strtol(uid_str, NULL, 10);
 190 
 191         /* Detect I2C bus shared with PUNIT and ignore its d3 status */
 192         status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host);
 193         if (ACPI_SUCCESS(status) && shared_host && uid)
 194                 pmc_atom_d3_mask &= ~(BIT_LPSS2_F1_I2C1 << (uid - 1));
 195 
 196         lpss_deassert_reset(pdata);
 197 
 198         if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
 199                 pdata->fixed_clk_rate = 133000000;
 200 
 201         writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
 202 }
 203 
 204 /* BSW PWM used for backlight control by the i915 driver */
 205 static struct pwm_lookup bsw_pwm_lookup[] = {
 206         PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0",
 207                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 208                                "pwm-lpss-platform"),
 209 };
 210 
 211 static void bsw_pwm_setup(struct lpss_private_data *pdata)
 212 {
 213         struct acpi_device *adev = pdata->adev;
 214 
 215         /* Only call pwm_add_table for the first PWM controller */
 216         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 217                 return;
 218 
 219         pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup));
 220 }
 221 
 222 static const struct lpss_device_desc lpt_dev_desc = {
 223         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR
 224                         | LPSS_SAVE_CTX,
 225         .prv_offset = 0x800,
 226 };
 227 
 228 static const struct lpss_device_desc lpt_i2c_dev_desc = {
 229         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR | LPSS_SAVE_CTX,
 230         .prv_offset = 0x800,
 231 };
 232 
 233 static struct property_entry uart_properties[] = {
 234         PROPERTY_ENTRY_U32("reg-io-width", 4),
 235         PROPERTY_ENTRY_U32("reg-shift", 2),
 236         PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
 237         { },
 238 };
 239 
 240 static const struct lpss_device_desc lpt_uart_dev_desc = {
 241         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR
 242                         | LPSS_SAVE_CTX,
 243         .clk_con_id = "baudclk",
 244         .prv_offset = 0x800,
 245         .setup = lpss_uart_setup,
 246         .properties = uart_properties,
 247 };
 248 
 249 static const struct lpss_device_desc lpt_sdio_dev_desc = {
 250         .flags = LPSS_LTR,
 251         .prv_offset = 0x1000,
 252         .prv_size_override = 0x1018,
 253 };
 254 
 255 static const struct lpss_device_desc byt_pwm_dev_desc = {
 256         .flags = LPSS_SAVE_CTX,
 257         .prv_offset = 0x800,
 258         .setup = byt_pwm_setup,
 259 };
 260 
 261 static const struct lpss_device_desc bsw_pwm_dev_desc = {
 262         .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 263         .prv_offset = 0x800,
 264         .setup = bsw_pwm_setup,
 265 };
 266 
 267 static const struct lpss_device_desc byt_uart_dev_desc = {
 268         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 269         .clk_con_id = "baudclk",
 270         .prv_offset = 0x800,
 271         .setup = lpss_uart_setup,
 272         .properties = uart_properties,
 273 };
 274 
 275 static const struct lpss_device_desc bsw_uart_dev_desc = {
 276         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 277                         | LPSS_NO_D3_DELAY,
 278         .clk_con_id = "baudclk",
 279         .prv_offset = 0x800,
 280         .setup = lpss_uart_setup,
 281         .properties = uart_properties,
 282 };
 283 
 284 static const struct lpss_device_desc byt_spi_dev_desc = {
 285         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 286         .prv_offset = 0x400,
 287 };
 288 
 289 static const struct lpss_device_desc byt_sdio_dev_desc = {
 290         .flags = LPSS_CLK,
 291 };
 292 
 293 static const struct lpss_device_desc byt_i2c_dev_desc = {
 294         .flags = LPSS_CLK | LPSS_SAVE_CTX,
 295         .prv_offset = 0x800,
 296         .setup = byt_i2c_setup,
 297         .resume_from_noirq = true,
 298 };
 299 
 300 static const struct lpss_device_desc bsw_i2c_dev_desc = {
 301         .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 302         .prv_offset = 0x800,
 303         .setup = byt_i2c_setup,
 304         .resume_from_noirq = true,
 305 };
 306 
 307 static const struct lpss_device_desc bsw_spi_dev_desc = {
 308         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 309                         | LPSS_NO_D3_DELAY,
 310         .prv_offset = 0x400,
 311         .setup = lpss_deassert_reset,
 312 };
 313 
 314 #define ICPU(model)     { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 315 
 316 static const struct x86_cpu_id lpss_cpu_ids[] = {
 317         ICPU(INTEL_FAM6_ATOM_SILVERMONT),       /* Valleyview, Bay Trail */
 318         ICPU(INTEL_FAM6_ATOM_AIRMONT),  /* Braswell, Cherry Trail */
 319         {}
 320 };
 321 
 322 #else
 323 
 324 #define LPSS_ADDR(desc) (0UL)
 325 
 326 #endif /* CONFIG_X86_INTEL_LPSS */
 327 
 328 static const struct acpi_device_id acpi_lpss_device_ids[] = {
 329         /* Generic LPSS devices */
 330         { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
 331 
 332         /* Lynxpoint LPSS devices */
 333         { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
 334         { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
 335         { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
 336         { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
 337         { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
 338         { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
 339         { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
 340         { "INT33C7", },
 341 
 342         /* BayTrail LPSS devices */
 343         { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
 344         { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
 345         { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
 346         { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
 347         { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
 348         { "INT33B2", },
 349         { "INT33FC", },
 350 
 351         /* Braswell LPSS devices */
 352         { "80862286", LPSS_ADDR(lpss_dma_desc) },
 353         { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
 354         { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
 355         { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
 356         { "808622C0", LPSS_ADDR(lpss_dma_desc) },
 357         { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
 358 
 359         /* Broadwell LPSS devices */
 360         { "INT3430", LPSS_ADDR(lpt_dev_desc) },
 361         { "INT3431", LPSS_ADDR(lpt_dev_desc) },
 362         { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
 363         { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
 364         { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
 365         { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
 366         { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
 367         { "INT3437", },
 368 
 369         /* Wildcat Point LPSS devices */
 370         { "INT3438", LPSS_ADDR(lpt_dev_desc) },
 371 
 372         { }
 373 };
 374 
 375 #ifdef CONFIG_X86_INTEL_LPSS
 376 
 377 static int is_memory(struct acpi_resource *res, void *not_used)
 378 {
 379         struct resource r;
 380         return !acpi_dev_resource_memory(res, &r);
 381 }
 382 
 383 /* LPSS main clock device. */
 384 static struct platform_device *lpss_clk_dev;
 385 
 386 static inline void lpt_register_clock_device(void)
 387 {
 388         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
 389 }
 390 
 391 static int register_device_clock(struct acpi_device *adev,
 392                                  struct lpss_private_data *pdata)
 393 {
 394         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
 395         const char *devname = dev_name(&adev->dev);
 396         struct clk *clk;
 397         struct lpss_clk_data *clk_data;
 398         const char *parent, *clk_name;
 399         void __iomem *prv_base;
 400 
 401         if (!lpss_clk_dev)
 402                 lpt_register_clock_device();
 403 
 404         clk_data = platform_get_drvdata(lpss_clk_dev);
 405         if (!clk_data)
 406                 return -ENODEV;
 407         clk = clk_data->clk;
 408 
 409         if (!pdata->mmio_base
 410             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
 411                 return -ENODATA;
 412 
 413         parent = clk_data->name;
 414         prv_base = pdata->mmio_base + dev_desc->prv_offset;
 415 
 416         if (pdata->fixed_clk_rate) {
 417                 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
 418                                               pdata->fixed_clk_rate);
 419                 goto out;
 420         }
 421 
 422         if (dev_desc->flags & LPSS_CLK_GATE) {
 423                 clk = clk_register_gate(NULL, devname, parent, 0,
 424                                         prv_base, 0, 0, NULL);
 425                 parent = devname;
 426         }
 427 
 428         if (dev_desc->flags & LPSS_CLK_DIVIDER) {
 429                 /* Prevent division by zero */
 430                 if (!readl(prv_base))
 431                         writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
 432 
 433                 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
 434                 if (!clk_name)
 435                         return -ENOMEM;
 436                 clk = clk_register_fractional_divider(NULL, clk_name, parent,
 437                                                       0, prv_base,
 438                                                       1, 15, 16, 15, 0, NULL);
 439                 parent = clk_name;
 440 
 441                 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
 442                 if (!clk_name) {
 443                         kfree(parent);
 444                         return -ENOMEM;
 445                 }
 446                 clk = clk_register_gate(NULL, clk_name, parent,
 447                                         CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
 448                                         prv_base, 31, 0, NULL);
 449                 kfree(parent);
 450                 kfree(clk_name);
 451         }
 452 out:
 453         if (IS_ERR(clk))
 454                 return PTR_ERR(clk);
 455 
 456         pdata->clk = clk;
 457         clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
 458         return 0;
 459 }
 460 
 461 struct lpss_device_links {
 462         const char *supplier_hid;
 463         const char *supplier_uid;
 464         const char *consumer_hid;
 465         const char *consumer_uid;
 466         u32 flags;
 467         const struct dmi_system_id *dep_missing_ids;
 468 };
 469 
 470 /* Please keep this list sorted alphabetically by vendor and model */
 471 static const struct dmi_system_id i2c1_dep_missing_dmi_ids[] = {
 472         {
 473                 .matches = {
 474                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
 475                         DMI_MATCH(DMI_PRODUCT_NAME, "T200TA"),
 476                 },
 477         },
 478         {}
 479 };
 480 
 481 /*
 482  * The _DEP method is used to identify dependencies but instead of creating
 483  * device links for every handle in _DEP, only links in the following list are
 484  * created. That is necessary because, in the general case, _DEP can refer to
 485  * devices that might not have drivers, or that are on different buses, or where
 486  * the supplier is not enumerated until after the consumer is probed.
 487  */
 488 static const struct lpss_device_links lpss_device_links[] = {
 489         /* CHT External sdcard slot controller depends on PMIC I2C ctrl */
 490         {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
 491         /* CHT iGPU depends on PMIC I2C controller */
 492         {"808622C1", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
 493         /* BYT iGPU depends on the Embedded Controller I2C controller (UID 1) */
 494         {"80860F41", "1", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME,
 495          i2c1_dep_missing_dmi_ids},
 496         /* BYT CR iGPU depends on PMIC I2C controller (UID 5 on CR) */
 497         {"80860F41", "5", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
 498         /* BYT iGPU depends on PMIC I2C controller (UID 7 on non CR) */
 499         {"80860F41", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
 500 };
 501 
 502 static bool hid_uid_match(struct acpi_device *adev,
 503                           const char *hid2, const char *uid2)
 504 {
 505         const char *hid1 = acpi_device_hid(adev);
 506         const char *uid1 = acpi_device_uid(adev);
 507 
 508         if (strcmp(hid1, hid2))
 509                 return false;
 510 
 511         if (!uid2)
 512                 return true;
 513 
 514         return uid1 && !strcmp(uid1, uid2);
 515 }
 516 
 517 static bool acpi_lpss_is_supplier(struct acpi_device *adev,
 518                                   const struct lpss_device_links *link)
 519 {
 520         return hid_uid_match(adev, link->supplier_hid, link->supplier_uid);
 521 }
 522 
 523 static bool acpi_lpss_is_consumer(struct acpi_device *adev,
 524                                   const struct lpss_device_links *link)
 525 {
 526         return hid_uid_match(adev, link->consumer_hid, link->consumer_uid);
 527 }
 528 
 529 struct hid_uid {
 530         const char *hid;
 531         const char *uid;
 532 };
 533 
 534 static int match_hid_uid(struct device *dev, const void *data)
 535 {
 536         struct acpi_device *adev = ACPI_COMPANION(dev);
 537         const struct hid_uid *id = data;
 538 
 539         if (!adev)
 540                 return 0;
 541 
 542         return hid_uid_match(adev, id->hid, id->uid);
 543 }
 544 
 545 static struct device *acpi_lpss_find_device(const char *hid, const char *uid)
 546 {
 547         struct device *dev;
 548 
 549         struct hid_uid data = {
 550                 .hid = hid,
 551                 .uid = uid,
 552         };
 553 
 554         dev = bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid);
 555         if (dev)
 556                 return dev;
 557 
 558         return bus_find_device(&pci_bus_type, NULL, &data, match_hid_uid);
 559 }
 560 
 561 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle)
 562 {
 563         struct acpi_handle_list dep_devices;
 564         acpi_status status;
 565         int i;
 566 
 567         if (!acpi_has_method(adev->handle, "_DEP"))
 568                 return false;
 569 
 570         status = acpi_evaluate_reference(adev->handle, "_DEP", NULL,
 571                                          &dep_devices);
 572         if (ACPI_FAILURE(status)) {
 573                 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n");
 574                 return false;
 575         }
 576 
 577         for (i = 0; i < dep_devices.count; i++) {
 578                 if (dep_devices.handles[i] == handle)
 579                         return true;
 580         }
 581 
 582         return false;
 583 }
 584 
 585 static void acpi_lpss_link_consumer(struct device *dev1,
 586                                     const struct lpss_device_links *link)
 587 {
 588         struct device *dev2;
 589 
 590         dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid);
 591         if (!dev2)
 592                 return;
 593 
 594         if ((link->dep_missing_ids && dmi_check_system(link->dep_missing_ids))
 595             || acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1)))
 596                 device_link_add(dev2, dev1, link->flags);
 597 
 598         put_device(dev2);
 599 }
 600 
 601 static void acpi_lpss_link_supplier(struct device *dev1,
 602                                     const struct lpss_device_links *link)
 603 {
 604         struct device *dev2;
 605 
 606         dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid);
 607         if (!dev2)
 608                 return;
 609 
 610         if ((link->dep_missing_ids && dmi_check_system(link->dep_missing_ids))
 611             || acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2)))
 612                 device_link_add(dev1, dev2, link->flags);
 613 
 614         put_device(dev2);
 615 }
 616 
 617 static void acpi_lpss_create_device_links(struct acpi_device *adev,
 618                                           struct platform_device *pdev)
 619 {
 620         int i;
 621 
 622         for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) {
 623                 const struct lpss_device_links *link = &lpss_device_links[i];
 624 
 625                 if (acpi_lpss_is_supplier(adev, link))
 626                         acpi_lpss_link_consumer(&pdev->dev, link);
 627 
 628                 if (acpi_lpss_is_consumer(adev, link))
 629                         acpi_lpss_link_supplier(&pdev->dev, link);
 630         }
 631 }
 632 
 633 static int acpi_lpss_create_device(struct acpi_device *adev,
 634                                    const struct acpi_device_id *id)
 635 {
 636         const struct lpss_device_desc *dev_desc;
 637         struct lpss_private_data *pdata;
 638         struct resource_entry *rentry;
 639         struct list_head resource_list;
 640         struct platform_device *pdev;
 641         int ret;
 642 
 643         dev_desc = (const struct lpss_device_desc *)id->driver_data;
 644         if (!dev_desc) {
 645                 pdev = acpi_create_platform_device(adev, NULL);
 646                 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
 647         }
 648         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 649         if (!pdata)
 650                 return -ENOMEM;
 651 
 652         INIT_LIST_HEAD(&resource_list);
 653         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
 654         if (ret < 0)
 655                 goto err_out;
 656 
 657         list_for_each_entry(rentry, &resource_list, node)
 658                 if (resource_type(rentry->res) == IORESOURCE_MEM) {
 659                         if (dev_desc->prv_size_override)
 660                                 pdata->mmio_size = dev_desc->prv_size_override;
 661                         else
 662                                 pdata->mmio_size = resource_size(rentry->res);
 663                         pdata->mmio_base = ioremap(rentry->res->start,
 664                                                    pdata->mmio_size);
 665                         break;
 666                 }
 667 
 668         acpi_dev_free_resource_list(&resource_list);
 669 
 670         if (!pdata->mmio_base) {
 671                 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */
 672                 adev->pnp.type.platform_id = 0;
 673                 /* Skip the device, but continue the namespace scan. */
 674                 ret = 0;
 675                 goto err_out;
 676         }
 677 
 678         pdata->adev = adev;
 679         pdata->dev_desc = dev_desc;
 680 
 681         if (dev_desc->setup)
 682                 dev_desc->setup(pdata);
 683 
 684         if (dev_desc->flags & LPSS_CLK) {
 685                 ret = register_device_clock(adev, pdata);
 686                 if (ret) {
 687                         /* Skip the device, but continue the namespace scan. */
 688                         ret = 0;
 689                         goto err_out;
 690                 }
 691         }
 692 
 693         /*
 694          * This works around a known issue in ACPI tables where LPSS devices
 695          * have _PS0 and _PS3 without _PSC (and no power resources), so
 696          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
 697          */
 698         acpi_device_fix_up_power(adev);
 699 
 700         adev->driver_data = pdata;
 701         pdev = acpi_create_platform_device(adev, dev_desc->properties);
 702         if (!IS_ERR_OR_NULL(pdev)) {
 703                 acpi_lpss_create_device_links(adev, pdev);
 704                 return 1;
 705         }
 706 
 707         ret = PTR_ERR(pdev);
 708         adev->driver_data = NULL;
 709 
 710  err_out:
 711         kfree(pdata);
 712         return ret;
 713 }
 714 
 715 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
 716 {
 717         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 718 }
 719 
 720 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
 721                              unsigned int reg)
 722 {
 723         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 724 }
 725 
 726 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
 727 {
 728         struct acpi_device *adev;
 729         struct lpss_private_data *pdata;
 730         unsigned long flags;
 731         int ret;
 732 
 733         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
 734         if (WARN_ON(ret))
 735                 return ret;
 736 
 737         spin_lock_irqsave(&dev->power.lock, flags);
 738         if (pm_runtime_suspended(dev)) {
 739                 ret = -EAGAIN;
 740                 goto out;
 741         }
 742         pdata = acpi_driver_data(adev);
 743         if (WARN_ON(!pdata || !pdata->mmio_base)) {
 744                 ret = -ENODEV;
 745                 goto out;
 746         }
 747         *val = __lpss_reg_read(pdata, reg);
 748 
 749  out:
 750         spin_unlock_irqrestore(&dev->power.lock, flags);
 751         return ret;
 752 }
 753 
 754 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
 755                              char *buf)
 756 {
 757         u32 ltr_value = 0;
 758         unsigned int reg;
 759         int ret;
 760 
 761         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
 762         ret = lpss_reg_read(dev, reg, &ltr_value);
 763         if (ret)
 764                 return ret;
 765 
 766         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
 767 }
 768 
 769 static ssize_t lpss_ltr_mode_show(struct device *dev,
 770                                   struct device_attribute *attr, char *buf)
 771 {
 772         u32 ltr_mode = 0;
 773         char *outstr;
 774         int ret;
 775 
 776         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
 777         if (ret)
 778                 return ret;
 779 
 780         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
 781         return sprintf(buf, "%s\n", outstr);
 782 }
 783 
 784 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
 785 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
 786 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
 787 
 788 static struct attribute *lpss_attrs[] = {
 789         &dev_attr_auto_ltr.attr,
 790         &dev_attr_sw_ltr.attr,
 791         &dev_attr_ltr_mode.attr,
 792         NULL,
 793 };
 794 
 795 static const struct attribute_group lpss_attr_group = {
 796         .attrs = lpss_attrs,
 797         .name = "lpss_ltr",
 798 };
 799 
 800 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
 801 {
 802         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 803         u32 ltr_mode, ltr_val;
 804 
 805         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
 806         if (val < 0) {
 807                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
 808                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
 809                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 810                 }
 811                 return;
 812         }
 813         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
 814         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
 815                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
 816                 val = LPSS_LTR_MAX_VAL;
 817         } else if (val > LPSS_LTR_MAX_VAL) {
 818                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
 819                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
 820         } else {
 821                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
 822         }
 823         ltr_val |= val;
 824         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
 825         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
 826                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
 827                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 828         }
 829 }
 830 
 831 #ifdef CONFIG_PM
 832 /**
 833  * acpi_lpss_save_ctx() - Save the private registers of LPSS device
 834  * @dev: LPSS device
 835  * @pdata: pointer to the private data of the LPSS device
 836  *
 837  * Most LPSS devices have private registers which may loose their context when
 838  * the device is powered down. acpi_lpss_save_ctx() saves those registers into
 839  * prv_reg_ctx array.
 840  */
 841 static void acpi_lpss_save_ctx(struct device *dev,
 842                                struct lpss_private_data *pdata)
 843 {
 844         unsigned int i;
 845 
 846         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 847                 unsigned long offset = i * sizeof(u32);
 848 
 849                 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
 850                 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
 851                         pdata->prv_reg_ctx[i], offset);
 852         }
 853 }
 854 
 855 /**
 856  * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
 857  * @dev: LPSS device
 858  * @pdata: pointer to the private data of the LPSS device
 859  *
 860  * Restores the registers that were previously stored with acpi_lpss_save_ctx().
 861  */
 862 static void acpi_lpss_restore_ctx(struct device *dev,
 863                                   struct lpss_private_data *pdata)
 864 {
 865         unsigned int i;
 866 
 867         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 868                 unsigned long offset = i * sizeof(u32);
 869 
 870                 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
 871                 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
 872                         pdata->prv_reg_ctx[i], offset);
 873         }
 874 }
 875 
 876 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
 877 {
 878         /*
 879          * The following delay is needed or the subsequent write operations may
 880          * fail. The LPSS devices are actually PCI devices and the PCI spec
 881          * expects 10ms delay before the device can be accessed after D3 to D0
 882          * transition. However some platforms like BSW does not need this delay.
 883          */
 884         unsigned int delay = 10;        /* default 10ms delay */
 885 
 886         if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
 887                 delay = 0;
 888 
 889         msleep(delay);
 890 }
 891 
 892 static int acpi_lpss_activate(struct device *dev)
 893 {
 894         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 895         int ret;
 896 
 897         ret = acpi_dev_resume(dev);
 898         if (ret)
 899                 return ret;
 900 
 901         acpi_lpss_d3_to_d0_delay(pdata);
 902 
 903         /*
 904          * This is called only on ->probe() stage where a device is either in
 905          * known state defined by BIOS or most likely powered off. Due to this
 906          * we have to deassert reset line to be sure that ->probe() will
 907          * recognize the device.
 908          */
 909         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 910                 lpss_deassert_reset(pdata);
 911 
 912         return 0;
 913 }
 914 
 915 static void acpi_lpss_dismiss(struct device *dev)
 916 {
 917         acpi_dev_suspend(dev, false);
 918 }
 919 
 920 /* IOSF SB for LPSS island */
 921 #define LPSS_IOSF_UNIT_LPIOEP           0xA0
 922 #define LPSS_IOSF_UNIT_LPIO1            0xAB
 923 #define LPSS_IOSF_UNIT_LPIO2            0xAC
 924 
 925 #define LPSS_IOSF_PMCSR                 0x84
 926 #define LPSS_PMCSR_D0                   0
 927 #define LPSS_PMCSR_D3hot                3
 928 #define LPSS_PMCSR_Dx_MASK              GENMASK(1, 0)
 929 
 930 #define LPSS_IOSF_GPIODEF0              0x154
 931 #define LPSS_GPIODEF0_DMA1_D3           BIT(2)
 932 #define LPSS_GPIODEF0_DMA2_D3           BIT(3)
 933 #define LPSS_GPIODEF0_DMA_D3_MASK       GENMASK(3, 2)
 934 #define LPSS_GPIODEF0_DMA_LLP           BIT(13)
 935 
 936 static DEFINE_MUTEX(lpss_iosf_mutex);
 937 static bool lpss_iosf_d3_entered = true;
 938 
 939 static void lpss_iosf_enter_d3_state(void)
 940 {
 941         u32 value1 = 0;
 942         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 943         u32 value2 = LPSS_PMCSR_D3hot;
 944         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 945         /*
 946          * PMC provides an information about actual status of the LPSS devices.
 947          * Here we read the values related to LPSS power island, i.e. LPSS
 948          * devices, excluding both LPSS DMA controllers, along with SCC domain.
 949          */
 950         u32 func_dis, d3_sts_0, pmc_status;
 951         int ret;
 952 
 953         ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
 954         if (ret)
 955                 return;
 956 
 957         mutex_lock(&lpss_iosf_mutex);
 958 
 959         ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
 960         if (ret)
 961                 goto exit;
 962 
 963         /*
 964          * Get the status of entire LPSS power island per device basis.
 965          * Shutdown both LPSS DMA controllers if and only if all other devices
 966          * are already in D3hot.
 967          */
 968         pmc_status = (~(d3_sts_0 | func_dis)) & pmc_atom_d3_mask;
 969         if (pmc_status)
 970                 goto exit;
 971 
 972         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 973                         LPSS_IOSF_PMCSR, value2, mask2);
 974 
 975         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 976                         LPSS_IOSF_PMCSR, value2, mask2);
 977 
 978         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 979                         LPSS_IOSF_GPIODEF0, value1, mask1);
 980 
 981         lpss_iosf_d3_entered = true;
 982 
 983 exit:
 984         mutex_unlock(&lpss_iosf_mutex);
 985 }
 986 
 987 static void lpss_iosf_exit_d3_state(void)
 988 {
 989         u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
 990                      LPSS_GPIODEF0_DMA_LLP;
 991         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 992         u32 value2 = LPSS_PMCSR_D0;
 993         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 994 
 995         mutex_lock(&lpss_iosf_mutex);
 996 
 997         if (!lpss_iosf_d3_entered)
 998                 goto exit;
 999 
1000         lpss_iosf_d3_entered = false;
1001 
1002         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
1003                         LPSS_IOSF_GPIODEF0, value1, mask1);
1004 
1005         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
1006                         LPSS_IOSF_PMCSR, value2, mask2);
1007 
1008         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
1009                         LPSS_IOSF_PMCSR, value2, mask2);
1010 
1011 exit:
1012         mutex_unlock(&lpss_iosf_mutex);
1013 }
1014 
1015 static int acpi_lpss_suspend(struct device *dev, bool wakeup)
1016 {
1017         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1018         int ret;
1019 
1020         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1021                 acpi_lpss_save_ctx(dev, pdata);
1022 
1023         ret = acpi_dev_suspend(dev, wakeup);
1024 
1025         /*
1026          * This call must be last in the sequence, otherwise PMC will return
1027          * wrong status for devices being about to be powered off. See
1028          * lpss_iosf_enter_d3_state() for further information.
1029          */
1030         if (acpi_target_system_state() == ACPI_STATE_S0 &&
1031             lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1032                 lpss_iosf_enter_d3_state();
1033 
1034         return ret;
1035 }
1036 
1037 static int acpi_lpss_resume(struct device *dev)
1038 {
1039         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1040         int ret;
1041 
1042         /*
1043          * This call is kept first to be in symmetry with
1044          * acpi_lpss_runtime_suspend() one.
1045          */
1046         if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1047                 lpss_iosf_exit_d3_state();
1048 
1049         ret = acpi_dev_resume(dev);
1050         if (ret)
1051                 return ret;
1052 
1053         acpi_lpss_d3_to_d0_delay(pdata);
1054 
1055         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1056                 acpi_lpss_restore_ctx(dev, pdata);
1057 
1058         return 0;
1059 }
1060 
1061 #ifdef CONFIG_PM_SLEEP
1062 static int acpi_lpss_do_suspend_late(struct device *dev)
1063 {
1064         int ret;
1065 
1066         if (dev_pm_smart_suspend_and_suspended(dev))
1067                 return 0;
1068 
1069         ret = pm_generic_suspend_late(dev);
1070         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1071 }
1072 
1073 static int acpi_lpss_suspend_late(struct device *dev)
1074 {
1075         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1076 
1077         if (pdata->dev_desc->resume_from_noirq)
1078                 return 0;
1079 
1080         return acpi_lpss_do_suspend_late(dev);
1081 }
1082 
1083 static int acpi_lpss_suspend_noirq(struct device *dev)
1084 {
1085         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1086         int ret;
1087 
1088         if (pdata->dev_desc->resume_from_noirq) {
1089                 /*
1090                  * The driver's ->suspend_late callback will be invoked by
1091                  * acpi_lpss_do_suspend_late(), with the assumption that the
1092                  * driver really wanted to run that code in ->suspend_noirq, but
1093                  * it could not run after acpi_dev_suspend() and the driver
1094                  * expected the latter to be called in the "late" phase.
1095                  */
1096                 ret = acpi_lpss_do_suspend_late(dev);
1097                 if (ret)
1098                         return ret;
1099         }
1100 
1101         return acpi_subsys_suspend_noirq(dev);
1102 }
1103 
1104 static int acpi_lpss_do_resume_early(struct device *dev)
1105 {
1106         int ret = acpi_lpss_resume(dev);
1107 
1108         return ret ? ret : pm_generic_resume_early(dev);
1109 }
1110 
1111 static int acpi_lpss_resume_early(struct device *dev)
1112 {
1113         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1114 
1115         if (pdata->dev_desc->resume_from_noirq)
1116                 return 0;
1117 
1118         return acpi_lpss_do_resume_early(dev);
1119 }
1120 
1121 static int acpi_lpss_resume_noirq(struct device *dev)
1122 {
1123         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1124         int ret;
1125 
1126         /* Follow acpi_subsys_resume_noirq(). */
1127         if (dev_pm_may_skip_resume(dev))
1128                 return 0;
1129 
1130         if (dev_pm_smart_suspend_and_suspended(dev))
1131                 pm_runtime_set_active(dev);
1132 
1133         ret = pm_generic_resume_noirq(dev);
1134         if (ret)
1135                 return ret;
1136 
1137         if (!pdata->dev_desc->resume_from_noirq)
1138                 return 0;
1139 
1140         /*
1141          * The driver's ->resume_early callback will be invoked by
1142          * acpi_lpss_do_resume_early(), with the assumption that the driver
1143          * really wanted to run that code in ->resume_noirq, but it could not
1144          * run before acpi_dev_resume() and the driver expected the latter to be
1145          * called in the "early" phase.
1146          */
1147         return acpi_lpss_do_resume_early(dev);
1148 }
1149 
1150 static int acpi_lpss_do_restore_early(struct device *dev)
1151 {
1152         int ret = acpi_lpss_resume(dev);
1153 
1154         return ret ? ret : pm_generic_restore_early(dev);
1155 }
1156 
1157 static int acpi_lpss_restore_early(struct device *dev)
1158 {
1159         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1160 
1161         if (pdata->dev_desc->resume_from_noirq)
1162                 return 0;
1163 
1164         return acpi_lpss_do_restore_early(dev);
1165 }
1166 
1167 static int acpi_lpss_restore_noirq(struct device *dev)
1168 {
1169         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1170         int ret;
1171 
1172         ret = pm_generic_restore_noirq(dev);
1173         if (ret)
1174                 return ret;
1175 
1176         if (!pdata->dev_desc->resume_from_noirq)
1177                 return 0;
1178 
1179         /* This is analogous to what happens in acpi_lpss_resume_noirq(). */
1180         return acpi_lpss_do_restore_early(dev);
1181 }
1182 
1183 static int acpi_lpss_do_poweroff_late(struct device *dev)
1184 {
1185         int ret = pm_generic_poweroff_late(dev);
1186 
1187         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1188 }
1189 
1190 static int acpi_lpss_poweroff_late(struct device *dev)
1191 {
1192         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1193 
1194         if (dev_pm_smart_suspend_and_suspended(dev))
1195                 return 0;
1196 
1197         if (pdata->dev_desc->resume_from_noirq)
1198                 return 0;
1199 
1200         return acpi_lpss_do_poweroff_late(dev);
1201 }
1202 
1203 static int acpi_lpss_poweroff_noirq(struct device *dev)
1204 {
1205         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1206 
1207         if (dev_pm_smart_suspend_and_suspended(dev))
1208                 return 0;
1209 
1210         if (pdata->dev_desc->resume_from_noirq) {
1211                 /* This is analogous to the acpi_lpss_suspend_noirq() case. */
1212                 int ret = acpi_lpss_do_poweroff_late(dev);
1213                 if (ret)
1214                         return ret;
1215         }
1216 
1217         return pm_generic_poweroff_noirq(dev);
1218 }
1219 #endif /* CONFIG_PM_SLEEP */
1220 
1221 static int acpi_lpss_runtime_suspend(struct device *dev)
1222 {
1223         int ret = pm_generic_runtime_suspend(dev);
1224 
1225         return ret ? ret : acpi_lpss_suspend(dev, true);
1226 }
1227 
1228 static int acpi_lpss_runtime_resume(struct device *dev)
1229 {
1230         int ret = acpi_lpss_resume(dev);
1231 
1232         return ret ? ret : pm_generic_runtime_resume(dev);
1233 }
1234 #endif /* CONFIG_PM */
1235 
1236 static struct dev_pm_domain acpi_lpss_pm_domain = {
1237 #ifdef CONFIG_PM
1238         .activate = acpi_lpss_activate,
1239         .dismiss = acpi_lpss_dismiss,
1240 #endif
1241         .ops = {
1242 #ifdef CONFIG_PM
1243 #ifdef CONFIG_PM_SLEEP
1244                 .prepare = acpi_subsys_prepare,
1245                 .complete = acpi_subsys_complete,
1246                 .suspend = acpi_subsys_suspend,
1247                 .suspend_late = acpi_lpss_suspend_late,
1248                 .suspend_noirq = acpi_lpss_suspend_noirq,
1249                 .resume_noirq = acpi_lpss_resume_noirq,
1250                 .resume_early = acpi_lpss_resume_early,
1251                 .freeze = acpi_subsys_freeze,
1252                 .poweroff = acpi_subsys_poweroff,
1253                 .poweroff_late = acpi_lpss_poweroff_late,
1254                 .poweroff_noirq = acpi_lpss_poweroff_noirq,
1255                 .restore_noirq = acpi_lpss_restore_noirq,
1256                 .restore_early = acpi_lpss_restore_early,
1257 #endif
1258                 .runtime_suspend = acpi_lpss_runtime_suspend,
1259                 .runtime_resume = acpi_lpss_runtime_resume,
1260 #endif
1261         },
1262 };
1263 
1264 static int acpi_lpss_platform_notify(struct notifier_block *nb,
1265                                      unsigned long action, void *data)
1266 {
1267         struct platform_device *pdev = to_platform_device(data);
1268         struct lpss_private_data *pdata;
1269         struct acpi_device *adev;
1270         const struct acpi_device_id *id;
1271 
1272         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
1273         if (!id || !id->driver_data)
1274                 return 0;
1275 
1276         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
1277                 return 0;
1278 
1279         pdata = acpi_driver_data(adev);
1280         if (!pdata)
1281                 return 0;
1282 
1283         if (pdata->mmio_base &&
1284             pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
1285                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
1286                 return 0;
1287         }
1288 
1289         switch (action) {
1290         case BUS_NOTIFY_BIND_DRIVER:
1291                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1292                 break;
1293         case BUS_NOTIFY_DRIVER_NOT_BOUND:
1294         case BUS_NOTIFY_UNBOUND_DRIVER:
1295                 dev_pm_domain_set(&pdev->dev, NULL);
1296                 break;
1297         case BUS_NOTIFY_ADD_DEVICE:
1298                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1299                 if (pdata->dev_desc->flags & LPSS_LTR)
1300                         return sysfs_create_group(&pdev->dev.kobj,
1301                                                   &lpss_attr_group);
1302                 break;
1303         case BUS_NOTIFY_DEL_DEVICE:
1304                 if (pdata->dev_desc->flags & LPSS_LTR)
1305                         sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
1306                 dev_pm_domain_set(&pdev->dev, NULL);
1307                 break;
1308         default:
1309                 break;
1310         }
1311 
1312         return 0;
1313 }
1314 
1315 static struct notifier_block acpi_lpss_nb = {
1316         .notifier_call = acpi_lpss_platform_notify,
1317 };
1318 
1319 static void acpi_lpss_bind(struct device *dev)
1320 {
1321         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1322 
1323         if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
1324                 return;
1325 
1326         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
1327                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
1328         else
1329                 dev_err(dev, "MMIO size insufficient to access LTR\n");
1330 }
1331 
1332 static void acpi_lpss_unbind(struct device *dev)
1333 {
1334         dev->power.set_latency_tolerance = NULL;
1335 }
1336 
1337 static struct acpi_scan_handler lpss_handler = {
1338         .ids = acpi_lpss_device_ids,
1339         .attach = acpi_lpss_create_device,
1340         .bind = acpi_lpss_bind,
1341         .unbind = acpi_lpss_unbind,
1342 };
1343 
1344 void __init acpi_lpss_init(void)
1345 {
1346         const struct x86_cpu_id *id;
1347         int ret;
1348 
1349         ret = lpt_clk_init();
1350         if (ret)
1351                 return;
1352 
1353         id = x86_match_cpu(lpss_cpu_ids);
1354         if (id)
1355                 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
1356 
1357         bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
1358         acpi_scan_add_handler(&lpss_handler);
1359 }
1360 
1361 #else
1362 
1363 static struct acpi_scan_handler lpss_handler = {
1364         .ids = acpi_lpss_device_ids,
1365 };
1366 
1367 void __init acpi_lpss_init(void)
1368 {
1369         acpi_scan_add_handler(&lpss_handler);
1370 }
1371 
1372 #endif /* CONFIG_X86_INTEL_LPSS */
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root/drivers/acpi/acpi_lpss.c

DEFINITIONS
