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12 #ifndef __AMLRESRC_H
13 #define __AMLRESRC_H
14
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18
19 #define ACPI_RESTAG_ADDRESS "_ADR"
20 #define ACPI_RESTAG_ALIGNMENT "_ALN"
21 #define ACPI_RESTAG_ADDRESSSPACE "_ASI"
22 #define ACPI_RESTAG_ACCESSSIZE "_ASZ"
23 #define ACPI_RESTAG_TYPESPECIFICATTRIBUTES "_ATT"
24 #define ACPI_RESTAG_BASEADDRESS "_BAS"
25 #define ACPI_RESTAG_BUSMASTER "_BM_"
26 #define ACPI_RESTAG_DEBOUNCETIME "_DBT"
27 #define ACPI_RESTAG_DECODE "_DEC"
28 #define ACPI_RESTAG_DEVICEPOLARITY "_DPL"
29 #define ACPI_RESTAG_DMA "_DMA"
30 #define ACPI_RESTAG_DMATYPE "_TYP"
31 #define ACPI_RESTAG_DRIVESTRENGTH "_DRS"
32 #define ACPI_RESTAG_ENDIANNESS "_END"
33 #define ACPI_RESTAG_FLOWCONTROL "_FLC"
34 #define ACPI_RESTAG_FUNCTION "_FUN"
35 #define ACPI_RESTAG_GRANULARITY "_GRA"
36 #define ACPI_RESTAG_INTERRUPT "_INT"
37 #define ACPI_RESTAG_INTERRUPTLEVEL "_LL_"
38 #define ACPI_RESTAG_INTERRUPTSHARE "_SHR"
39 #define ACPI_RESTAG_INTERRUPTTYPE "_HE_"
40 #define ACPI_RESTAG_IORESTRICTION "_IOR"
41 #define ACPI_RESTAG_LENGTH "_LEN"
42 #define ACPI_RESTAG_LINE "_LIN"
43 #define ACPI_RESTAG_MEMATTRIBUTES "_MTP"
44 #define ACPI_RESTAG_MEMTYPE "_MEM"
45 #define ACPI_RESTAG_MAXADDR "_MAX"
46 #define ACPI_RESTAG_MINADDR "_MIN"
47 #define ACPI_RESTAG_MAXTYPE "_MAF"
48 #define ACPI_RESTAG_MINTYPE "_MIF"
49 #define ACPI_RESTAG_MODE "_MOD"
50 #define ACPI_RESTAG_PARITY "_PAR"
51 #define ACPI_RESTAG_PHASE "_PHA"
52 #define ACPI_RESTAG_PIN "_PIN"
53 #define ACPI_RESTAG_PINCONFIG "_PPI"
54 #define ACPI_RESTAG_PINCONFIG_TYPE "_TYP"
55 #define ACPI_RESTAG_PINCONFIG_VALUE "_VAL"
56 #define ACPI_RESTAG_POLARITY "_POL"
57 #define ACPI_RESTAG_REGISTERBITOFFSET "_RBO"
58 #define ACPI_RESTAG_REGISTERBITWIDTH "_RBW"
59 #define ACPI_RESTAG_RANGETYPE "_RNG"
60 #define ACPI_RESTAG_READWRITETYPE "_RW_"
61 #define ACPI_RESTAG_LENGTH_RX "_RXL"
62 #define ACPI_RESTAG_LENGTH_TX "_TXL"
63 #define ACPI_RESTAG_SLAVEMODE "_SLV"
64 #define ACPI_RESTAG_SPEED "_SPE"
65 #define ACPI_RESTAG_STOPBITS "_STB"
66 #define ACPI_RESTAG_TRANSLATION "_TRA"
67 #define ACPI_RESTAG_TRANSTYPE "_TRS"
68 #define ACPI_RESTAG_TYPE "_TTP"
69 #define ACPI_RESTAG_XFERTYPE "_SIZ"
70 #define ACPI_RESTAG_VENDORDATA "_VEN"
71
72
73
74 #define ASL_RDESC_IRQ_SIZE 0x02
75 #define ASL_RDESC_DMA_SIZE 0x02
76 #define ASL_RDESC_ST_DEPEND_SIZE 0x00
77 #define ASL_RDESC_END_DEPEND_SIZE 0x00
78 #define ASL_RDESC_IO_SIZE 0x07
79 #define ASL_RDESC_FIXED_IO_SIZE 0x03
80 #define ASL_RDESC_FIXED_DMA_SIZE 0x05
81 #define ASL_RDESC_END_TAG_SIZE 0x01
82
83 struct asl_resource_node {
84 u32 buffer_length;
85 void *buffer;
86 struct asl_resource_node *next;
87 };
88
89 struct asl_resource_info {
90 union acpi_parse_object *descriptor_type_op;
91 union acpi_parse_object *mapping_op;
92 u32 current_byte_offset;
93 };
94
95
96
97 #define ACPI_AML_SIZE_LARGE(r) (sizeof (r) - sizeof (struct aml_resource_large_header))
98 #define ACPI_AML_SIZE_SMALL(r) (sizeof (r) - sizeof (struct aml_resource_small_header))
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105
106 #pragma pack(1)
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109
110
111 #define AML_RESOURCE_SMALL_HEADER_COMMON \
112 u8 descriptor_type;
113
114 struct aml_resource_small_header {
115 AML_RESOURCE_SMALL_HEADER_COMMON};
116
117 struct aml_resource_irq {
118 AML_RESOURCE_SMALL_HEADER_COMMON u16 irq_mask;
119 u8 flags;
120 };
121
122 struct aml_resource_irq_noflags {
123 AML_RESOURCE_SMALL_HEADER_COMMON u16 irq_mask;
124 };
125
126 struct aml_resource_dma {
127 AML_RESOURCE_SMALL_HEADER_COMMON u8 dma_channel_mask;
128 u8 flags;
129 };
130
131 struct aml_resource_start_dependent {
132 AML_RESOURCE_SMALL_HEADER_COMMON u8 flags;
133 };
134
135 struct aml_resource_start_dependent_noprio {
136 AML_RESOURCE_SMALL_HEADER_COMMON};
137
138 struct aml_resource_end_dependent {
139 AML_RESOURCE_SMALL_HEADER_COMMON};
140
141 struct aml_resource_io {
142 AML_RESOURCE_SMALL_HEADER_COMMON u8 flags;
143 u16 minimum;
144 u16 maximum;
145 u8 alignment;
146 u8 address_length;
147 };
148
149 struct aml_resource_fixed_io {
150 AML_RESOURCE_SMALL_HEADER_COMMON u16 address;
151 u8 address_length;
152 };
153
154 struct aml_resource_vendor_small {
155 AML_RESOURCE_SMALL_HEADER_COMMON};
156
157 struct aml_resource_end_tag {
158 AML_RESOURCE_SMALL_HEADER_COMMON u8 checksum;
159 };
160
161 struct aml_resource_fixed_dma {
162 AML_RESOURCE_SMALL_HEADER_COMMON u16 request_lines;
163 u16 channels;
164 u8 width;
165 };
166
167
168
169
170 #define AML_RESOURCE_LARGE_HEADER_COMMON \
171 u8 descriptor_type;\
172 u16 resource_length;
173
174 struct aml_resource_large_header {
175 AML_RESOURCE_LARGE_HEADER_COMMON};
176
177
178
179 #define ACPI_RESOURCE_FLAG_DEC 2
180 #define ACPI_RESOURCE_FLAG_MIF 4
181 #define ACPI_RESOURCE_FLAG_MAF 8
182
183 struct aml_resource_memory24 {
184 AML_RESOURCE_LARGE_HEADER_COMMON u8 flags;
185 u16 minimum;
186 u16 maximum;
187 u16 alignment;
188 u16 address_length;
189 };
190
191 struct aml_resource_vendor_large {
192 AML_RESOURCE_LARGE_HEADER_COMMON};
193
194 struct aml_resource_memory32 {
195 AML_RESOURCE_LARGE_HEADER_COMMON u8 flags;
196 u32 minimum;
197 u32 maximum;
198 u32 alignment;
199 u32 address_length;
200 };
201
202 struct aml_resource_fixed_memory32 {
203 AML_RESOURCE_LARGE_HEADER_COMMON u8 flags;
204 u32 address;
205 u32 address_length;
206 };
207
208 #define AML_RESOURCE_ADDRESS_COMMON \
209 u8 resource_type; \
210 u8 flags; \
211 u8 specific_flags;
212
213 struct aml_resource_address {
214 AML_RESOURCE_LARGE_HEADER_COMMON AML_RESOURCE_ADDRESS_COMMON};
215
216 struct aml_resource_extended_address64 {
217 AML_RESOURCE_LARGE_HEADER_COMMON
218 AML_RESOURCE_ADDRESS_COMMON u8 revision_ID;
219 u8 reserved;
220 u64 granularity;
221 u64 minimum;
222 u64 maximum;
223 u64 translation_offset;
224 u64 address_length;
225 u64 type_specific;
226 };
227
228 #define AML_RESOURCE_EXTENDED_ADDRESS_REVISION 1
229
230 struct aml_resource_address64 {
231 AML_RESOURCE_LARGE_HEADER_COMMON
232 AML_RESOURCE_ADDRESS_COMMON u64 granularity;
233 u64 minimum;
234 u64 maximum;
235 u64 translation_offset;
236 u64 address_length;
237 };
238
239 struct aml_resource_address32 {
240 AML_RESOURCE_LARGE_HEADER_COMMON
241 AML_RESOURCE_ADDRESS_COMMON u32 granularity;
242 u32 minimum;
243 u32 maximum;
244 u32 translation_offset;
245 u32 address_length;
246 };
247
248 struct aml_resource_address16 {
249 AML_RESOURCE_LARGE_HEADER_COMMON
250 AML_RESOURCE_ADDRESS_COMMON u16 granularity;
251 u16 minimum;
252 u16 maximum;
253 u16 translation_offset;
254 u16 address_length;
255 };
256
257 struct aml_resource_extended_irq {
258 AML_RESOURCE_LARGE_HEADER_COMMON u8 flags;
259 u8 interrupt_count;
260 u32 interrupts[1];
261
262 };
263
264 struct aml_resource_generic_register {
265 AML_RESOURCE_LARGE_HEADER_COMMON u8 address_space_id;
266 u8 bit_width;
267 u8 bit_offset;
268 u8 access_size;
269 u64 address;
270 };
271
272
273
274 struct aml_resource_gpio {
275 AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id;
276 u8 connection_type;
277 u16 flags;
278 u16 int_flags;
279 u8 pin_config;
280 u16 drive_strength;
281 u16 debounce_timeout;
282 u16 pin_table_offset;
283 u8 res_source_index;
284 u16 res_source_offset;
285 u16 vendor_offset;
286 u16 vendor_length;
287
288
289
290
291
292
293 };
294
295 #define AML_RESOURCE_GPIO_REVISION 1
296
297
298
299 #define AML_RESOURCE_GPIO_TYPE_INT 0
300 #define AML_RESOURCE_GPIO_TYPE_IO 1
301 #define AML_RESOURCE_MAX_GPIOTYPE 1
302
303
304
305 #define AML_RESOURCE_SERIAL_COMMON \
306 u8 revision_id; \
307 u8 res_source_index; \
308 u8 type; \
309 u8 flags; \
310 u16 type_specific_flags; \
311 u8 type_revision_id; \
312 u16 type_data_length; \
313
314
315
316 #define AML_RESOURCE_I2C_SERIALBUSTYPE 1
317 #define AML_RESOURCE_SPI_SERIALBUSTYPE 2
318 #define AML_RESOURCE_UART_SERIALBUSTYPE 3
319 #define AML_RESOURCE_MAX_SERIALBUSTYPE 3
320 #define AML_RESOURCE_VENDOR_SERIALBUSTYPE 192
321
322 struct aml_resource_common_serialbus {
323 AML_RESOURCE_LARGE_HEADER_COMMON AML_RESOURCE_SERIAL_COMMON};
324
325 struct aml_resource_i2c_serialbus {
326 AML_RESOURCE_LARGE_HEADER_COMMON
327 AML_RESOURCE_SERIAL_COMMON u32 connection_speed;
328 u16 slave_address;
329
330
331
332
333
334 };
335
336 #define AML_RESOURCE_I2C_REVISION 1
337 #define AML_RESOURCE_I2C_TYPE_REVISION 1
338 #define AML_RESOURCE_I2C_MIN_DATA_LEN 6
339
340 struct aml_resource_spi_serialbus {
341 AML_RESOURCE_LARGE_HEADER_COMMON
342 AML_RESOURCE_SERIAL_COMMON u32 connection_speed;
343 u8 data_bit_length;
344 u8 clock_phase;
345 u8 clock_polarity;
346 u16 device_selection;
347
348
349
350
351
352 };
353
354 #define AML_RESOURCE_SPI_REVISION 1
355 #define AML_RESOURCE_SPI_TYPE_REVISION 1
356 #define AML_RESOURCE_SPI_MIN_DATA_LEN 9
357
358 struct aml_resource_uart_serialbus {
359 AML_RESOURCE_LARGE_HEADER_COMMON
360 AML_RESOURCE_SERIAL_COMMON u32 default_baud_rate;
361 u16 rx_fifo_size;
362 u16 tx_fifo_size;
363 u8 parity;
364 u8 lines_enabled;
365
366
367
368
369
370 };
371
372 #define AML_RESOURCE_UART_REVISION 1
373 #define AML_RESOURCE_UART_TYPE_REVISION 1
374 #define AML_RESOURCE_UART_MIN_DATA_LEN 10
375
376 struct aml_resource_pin_function {
377 AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id;
378 u16 flags;
379 u8 pin_config;
380 u16 function_number;
381 u16 pin_table_offset;
382 u8 res_source_index;
383 u16 res_source_offset;
384 u16 vendor_offset;
385 u16 vendor_length;
386
387
388
389
390
391
392 };
393
394 #define AML_RESOURCE_PIN_FUNCTION_REVISION 1
395
396 struct aml_resource_pin_config {
397 AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id;
398 u16 flags;
399 u8 pin_config_type;
400 u32 pin_config_value;
401 u16 pin_table_offset;
402 u8 res_source_index;
403 u16 res_source_offset;
404 u16 vendor_offset;
405 u16 vendor_length;
406
407
408
409
410
411
412 };
413
414 #define AML_RESOURCE_PIN_CONFIG_REVISION 1
415
416 struct aml_resource_pin_group {
417 AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id;
418 u16 flags;
419 u16 pin_table_offset;
420 u16 label_offset;
421 u16 vendor_offset;
422 u16 vendor_length;
423
424
425
426
427
428
429 };
430
431 #define AML_RESOURCE_PIN_GROUP_REVISION 1
432
433 struct aml_resource_pin_group_function {
434 AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id;
435 u16 flags;
436 u16 function_number;
437 u8 res_source_index;
438 u16 res_source_offset;
439 u16 res_source_label_offset;
440 u16 vendor_offset;
441 u16 vendor_length;
442
443
444
445
446
447
448 };
449
450 #define AML_RESOURCE_PIN_GROUP_FUNCTION_REVISION 1
451
452 struct aml_resource_pin_group_config {
453 AML_RESOURCE_LARGE_HEADER_COMMON u8 revision_id;
454 u16 flags;
455 u8 pin_config_type;
456 u32 pin_config_value;
457 u8 res_source_index;
458 u16 res_source_offset;
459 u16 res_source_label_offset;
460 u16 vendor_offset;
461 u16 vendor_length;
462
463
464
465
466
467
468 };
469
470 #define AML_RESOURCE_PIN_GROUP_CONFIG_REVISION 1
471
472
473
474 #pragma pack()
475
476
477
478 union aml_resource {
479
480
481 u8 descriptor_type;
482 struct aml_resource_small_header small_header;
483 struct aml_resource_large_header large_header;
484
485
486
487 struct aml_resource_irq irq;
488 struct aml_resource_dma dma;
489 struct aml_resource_start_dependent start_dpf;
490 struct aml_resource_end_dependent end_dpf;
491 struct aml_resource_io io;
492 struct aml_resource_fixed_io fixed_io;
493 struct aml_resource_fixed_dma fixed_dma;
494 struct aml_resource_vendor_small vendor_small;
495 struct aml_resource_end_tag end_tag;
496
497
498
499 struct aml_resource_memory24 memory24;
500 struct aml_resource_generic_register generic_reg;
501 struct aml_resource_vendor_large vendor_large;
502 struct aml_resource_memory32 memory32;
503 struct aml_resource_fixed_memory32 fixed_memory32;
504 struct aml_resource_address16 address16;
505 struct aml_resource_address32 address32;
506 struct aml_resource_address64 address64;
507 struct aml_resource_extended_address64 ext_address64;
508 struct aml_resource_extended_irq extended_irq;
509 struct aml_resource_gpio gpio;
510 struct aml_resource_i2c_serialbus i2c_serial_bus;
511 struct aml_resource_spi_serialbus spi_serial_bus;
512 struct aml_resource_uart_serialbus uart_serial_bus;
513 struct aml_resource_common_serialbus common_serial_bus;
514 struct aml_resource_pin_function pin_function;
515 struct aml_resource_pin_config pin_config;
516 struct aml_resource_pin_group pin_group;
517 struct aml_resource_pin_group_function pin_group_function;
518 struct aml_resource_pin_group_config pin_group_config;
519
520
521
522 struct aml_resource_address address;
523 u32 dword_item;
524 u16 word_item;
525 u8 byte_item;
526 };
527
528
529
530 void
531 mp_save_gpio_info(union acpi_parse_object *op,
532 union aml_resource *resource,
533 u32 pin_count, u16 *pin_list, char *device_name);
534
535 void
536 mp_save_serial_info(union acpi_parse_object *op,
537 union aml_resource *resource, char *device_name);
538
539 char *mp_get_hid_from_parse_tree(struct acpi_namespace_node *hid_node);
540
541 char *mp_get_hid_via_namestring(char *device_name);
542
543 char *mp_get_connection_info(union acpi_parse_object *op,
544 u32 pin_index,
545 struct acpi_namespace_node **target_node,
546 char **target_name);
547
548 char *mp_get_parent_device_hid(union acpi_parse_object *op,
549 struct acpi_namespace_node **target_node,
550 char **parent_device_name);
551
552 char *mp_get_ddn_value(char *device_name);
553
554 char *mp_get_hid_value(struct acpi_namespace_node *device_node);
555
556 #endif