root/drivers/hwtracing/coresight/coresight-priv.h

INCLUDED FROM

DEFINITIONS

1. coresight_insert_barrier_packet
2. CS_LOCK
3. CS_UNLOCK
4. coresight_read_reg_pair
5. coresight_write_reg_pair
6. etm_readl_cp14
7. etm_writel_cp14
8. coresight_get_uci_data

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
   4  */
   5 
   6 #ifndef _CORESIGHT_PRIV_H
   7 #define _CORESIGHT_PRIV_H
   8 
   9 #include <linux/amba/bus.h>
  10 #include <linux/bitops.h>
  11 #include <linux/io.h>
  12 #include <linux/coresight.h>
  13 #include <linux/pm_runtime.h>
  14 
  15 /*
  16  * Coresight management registers (0xf00-0xfcc)
  17  * 0xfa0 - 0xfa4: Management    registers in PFTv1.0
  18  *                Trace         registers in PFTv1.1
  19  */
  20 #define CORESIGHT_ITCTRL        0xf00
  21 #define CORESIGHT_CLAIMSET      0xfa0
  22 #define CORESIGHT_CLAIMCLR      0xfa4
  23 #define CORESIGHT_LAR           0xfb0
  24 #define CORESIGHT_LSR           0xfb4
  25 #define CORESIGHT_AUTHSTATUS    0xfb8
  26 #define CORESIGHT_DEVID         0xfc8
  27 #define CORESIGHT_DEVTYPE       0xfcc
  28 
  29 
  30 /*
  31  * Coresight device CLAIM protocol.
  32  * See PSCI - ARM DEN 0022D, Section: 6.8.1 Debug and Trace save and restore.
  33  */
  34 #define CORESIGHT_CLAIM_SELF_HOSTED     BIT(1)
  35 
  36 #define TIMEOUT_US              100
  37 #define BMVAL(val, lsb, msb)    ((val & GENMASK(msb, lsb)) >> lsb)
  38 
  39 #define ETM_MODE_EXCL_KERN      BIT(30)
  40 #define ETM_MODE_EXCL_USER      BIT(31)
  41 
  42 typedef u32 (*coresight_read_fn)(const struct device *, u32 offset);
  43 #define __coresight_simple_func(type, func, name, lo_off, hi_off)       \
  44 static ssize_t name##_show(struct device *_dev,                         \
  45                            struct device_attribute *attr, char *buf)    \
  46 {                                                                       \
  47         type *drvdata = dev_get_drvdata(_dev->parent);                  \
  48         coresight_read_fn fn = func;                                    \
  49         u64 val;                                                        \
  50         pm_runtime_get_sync(_dev->parent);                              \
  51         if (fn)                                                         \
  52                 val = (u64)fn(_dev->parent, lo_off);                    \
  53         else                                                            \
  54                 val = coresight_read_reg_pair(drvdata->base,            \
  55                                                  lo_off, hi_off);       \
  56         pm_runtime_put_sync(_dev->parent);                              \
  57         return scnprintf(buf, PAGE_SIZE, "0x%llx\n", val);              \
  58 }                                                                       \
  59 static DEVICE_ATTR_RO(name)
  60 
  61 #define coresight_simple_func(type, func, name, offset)                 \
  62         __coresight_simple_func(type, func, name, offset, -1)
  63 #define coresight_simple_reg32(type, name, offset)                      \
  64         __coresight_simple_func(type, NULL, name, offset, -1)
  65 #define coresight_simple_reg64(type, name, lo_off, hi_off)              \
  66         __coresight_simple_func(type, NULL, name, lo_off, hi_off)
  67 
  68 extern const u32 barrier_pkt[4];
  69 #define CORESIGHT_BARRIER_PKT_SIZE (sizeof(barrier_pkt))
  70 
  71 enum etm_addr_type {
  72         ETM_ADDR_TYPE_NONE,
  73         ETM_ADDR_TYPE_SINGLE,
  74         ETM_ADDR_TYPE_RANGE,
  75         ETM_ADDR_TYPE_START,
  76         ETM_ADDR_TYPE_STOP,
  77 };
  78 
  79 enum cs_mode {
  80         CS_MODE_DISABLED,
  81         CS_MODE_SYSFS,
  82         CS_MODE_PERF,
  83 };
  84 
  85 /**
  86  * struct cs_buffer - keep track of a recording session' specifics
  87  * @cur:        index of the current buffer
  88  * @nr_pages:   max number of pages granted to us
  89  * @offset:     offset within the current buffer
  90  * @data_size:  how much we collected in this run
  91  * @snapshot:   is this run in snapshot mode
  92  * @data_pages: a handle the ring buffer
  93  */
  94 struct cs_buffers {
  95         unsigned int            cur;
  96         unsigned int            nr_pages;
  97         unsigned long           offset;
  98         local_t                 data_size;
  99         bool                    snapshot;
 100         void                    **data_pages;
 101 };
 102 
 103 static inline void coresight_insert_barrier_packet(void *buf)
 104 {
 105         if (buf)
 106                 memcpy(buf, barrier_pkt, CORESIGHT_BARRIER_PKT_SIZE);
 107 }
 108 
 109 
 110 static inline void CS_LOCK(void __iomem *addr)
 111 {
 112         do {
 113                 /* Wait for things to settle */
 114                 mb();
 115                 writel_relaxed(0x0, addr + CORESIGHT_LAR);
 116         } while (0);
 117 }
 118 
 119 static inline void CS_UNLOCK(void __iomem *addr)
 120 {
 121         do {
 122                 writel_relaxed(CORESIGHT_UNLOCK, addr + CORESIGHT_LAR);
 123                 /* Make sure everyone has seen this */
 124                 mb();
 125         } while (0);
 126 }
 127 
 128 static inline u64
 129 coresight_read_reg_pair(void __iomem *addr, s32 lo_offset, s32 hi_offset)
 130 {
 131         u64 val;
 132 
 133         val = readl_relaxed(addr + lo_offset);
 134         val |= (hi_offset < 0) ? 0 :
 135                (u64)readl_relaxed(addr + hi_offset) << 32;
 136         return val;
 137 }
 138 
 139 static inline void coresight_write_reg_pair(void __iomem *addr, u64 val,
 140                                                  s32 lo_offset, s32 hi_offset)
 141 {
 142         writel_relaxed((u32)val, addr + lo_offset);
 143         if (hi_offset >= 0)
 144                 writel_relaxed((u32)(val >> 32), addr + hi_offset);
 145 }
 146 
 147 void coresight_disable_path(struct list_head *path);
 148 int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data);
 149 struct coresight_device *coresight_get_sink(struct list_head *path);
 150 struct coresight_device *coresight_get_enabled_sink(bool reset);
 151 struct coresight_device *coresight_get_sink_by_id(u32 id);
 152 struct list_head *coresight_build_path(struct coresight_device *csdev,
 153                                        struct coresight_device *sink);
 154 void coresight_release_path(struct list_head *path);
 155 
 156 #ifdef CONFIG_CORESIGHT_SOURCE_ETM3X
 157 extern int etm_readl_cp14(u32 off, unsigned int *val);
 158 extern int etm_writel_cp14(u32 off, u32 val);
 159 #else
 160 static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; }
 161 static inline int etm_writel_cp14(u32 off, u32 val) { return 0; }
 162 #endif
 163 
 164 /*
 165  * Macros and inline functions to handle CoreSight UCI data and driver
 166  * private data in AMBA ID table entries, and extract data values.
 167  */
 168 
 169 /* coresight AMBA ID, no UCI, no driver data: id table entry */
 170 #define CS_AMBA_ID(pid)                 \
 171         {                               \
 172                 .id     = pid,          \
 173                 .mask   = 0x000fffff,   \
 174         }
 175 
 176 /* coresight AMBA ID, UCI with driver data only: id table entry. */
 177 #define CS_AMBA_ID_DATA(pid, dval)                              \
 178         {                                                       \
 179                 .id     = pid,                                  \
 180                 .mask   = 0x000fffff,                           \
 181                 .data   =  (void *)&(struct amba_cs_uci_id)     \
 182                         {                               \
 183                                 .data = (void *)dval,   \
 184                         }                               \
 185         }
 186 
 187 /* coresight AMBA ID, full UCI structure: id table entry. */
 188 #define CS_AMBA_UCI_ID(pid, uci_ptr)            \
 189         {                                       \
 190                 .id     = pid,                  \
 191                 .mask   = 0x000fffff,           \
 192                 .data   = (void *)uci_ptr       \
 193         }
 194 
 195 /* extract the data value from a UCI structure given amba_id pointer. */
 196 static inline void *coresight_get_uci_data(const struct amba_id *id)
 197 {
 198         if (id->data)
 199                 return ((struct amba_cs_uci_id *)(id->data))->data;
 200         return 0;
 201 }
 202 
 203 void coresight_release_platform_data(struct coresight_platform_data *pdata);
 204 
 205 #endif