This source file includes following definitions.
- pm8xxx_mpp_update
- pm8xxx_get_groups_count
- pm8xxx_get_group_name
- pm8xxx_get_group_pins
- pm8xxx_get_functions_count
- pm8xxx_get_function_name
- pm8xxx_get_function_groups
- pm8xxx_pinmux_set_mux
- pm8xxx_pin_config_get
- pm8xxx_pin_config_set
- pm8xxx_mpp_direction_input
- pm8xxx_mpp_direction_output
- pm8xxx_mpp_get
- pm8xxx_mpp_set
- pm8xxx_mpp_of_xlate
- pm8xxx_mpp_to_irq
- pm8xxx_mpp_dbg_show_one
- pm8xxx_mpp_dbg_show
- pm8xxx_pin_populate
- pm8xxx_mpp_probe
- pm8xxx_mpp_remove
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7 #include <linux/module.h>
8 #include <linux/platform_device.h>
9 #include <linux/pinctrl/pinctrl.h>
10 #include <linux/pinctrl/pinmux.h>
11 #include <linux/pinctrl/pinconf.h>
12 #include <linux/pinctrl/pinconf-generic.h>
13 #include <linux/slab.h>
14 #include <linux/regmap.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/interrupt.h>
17 #include <linux/of_device.h>
18 #include <linux/of_irq.h>
19
20 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
21
22 #include "../core.h"
23 #include "../pinctrl-utils.h"
24
25
26 #define SSBI_REG_ADDR_MPP_BASE 0x50
27 #define SSBI_REG_ADDR_MPP(n) (SSBI_REG_ADDR_MPP_BASE + n)
28
29
30 #define PM8XXX_MPP_TYPE_D_INPUT 0
31 #define PM8XXX_MPP_TYPE_D_OUTPUT 1
32 #define PM8XXX_MPP_TYPE_D_BI_DIR 2
33 #define PM8XXX_MPP_TYPE_A_INPUT 3
34 #define PM8XXX_MPP_TYPE_A_OUTPUT 4
35 #define PM8XXX_MPP_TYPE_SINK 5
36 #define PM8XXX_MPP_TYPE_DTEST_SINK 6
37 #define PM8XXX_MPP_TYPE_DTEST_OUTPUT 7
38
39
40 #define PM8XXX_MPP_DIN_TO_INT 0
41 #define PM8XXX_MPP_DIN_TO_DBUS1 1
42 #define PM8XXX_MPP_DIN_TO_DBUS2 2
43 #define PM8XXX_MPP_DIN_TO_DBUS3 3
44
45
46 #define PM8XXX_MPP_DOUT_CTRL_LOW 0
47 #define PM8XXX_MPP_DOUT_CTRL_HIGH 1
48 #define PM8XXX_MPP_DOUT_CTRL_MPP 2
49 #define PM8XXX_MPP_DOUT_CTRL_INV_MPP 3
50
51
52 #define PM8XXX_MPP_BI_PULLUP_1KOHM 0
53 #define PM8XXX_MPP_BI_PULLUP_OPEN 1
54 #define PM8XXX_MPP_BI_PULLUP_10KOHM 2
55 #define PM8XXX_MPP_BI_PULLUP_30KOHM 3
56
57
58 #define PM8XXX_MPP_AOUT_CTRL_DISABLE 0
59 #define PM8XXX_MPP_AOUT_CTRL_ENABLE 1
60 #define PM8XXX_MPP_AOUT_CTRL_MPP_HIGH_EN 2
61 #define PM8XXX_MPP_AOUT_CTRL_MPP_LOW_EN 3
62
63
64 #define PM8XXX_MPP_CS_CTRL_DISABLE 0
65 #define PM8XXX_MPP_CS_CTRL_ENABLE 1
66 #define PM8XXX_MPP_CS_CTRL_MPP_HIGH_EN 2
67 #define PM8XXX_MPP_CS_CTRL_MPP_LOW_EN 3
68
69
70 #define PM8XXX_MPP_DTEST_CS_CTRL_EN1 0
71 #define PM8XXX_MPP_DTEST_CS_CTRL_EN2 1
72 #define PM8XXX_MPP_DTEST_CS_CTRL_EN3 2
73 #define PM8XXX_MPP_DTEST_CS_CTRL_EN4 3
74
75
76 #define PM8XXX_MPP_DTEST_DBUS1 0
77 #define PM8XXX_MPP_DTEST_DBUS2 1
78 #define PM8XXX_MPP_DTEST_DBUS3 2
79 #define PM8XXX_MPP_DTEST_DBUS4 3
80
81
82 #define PM8XXX_CONFIG_AMUX (PIN_CONFIG_END + 1)
83 #define PM8XXX_CONFIG_DTEST_SELECTOR (PIN_CONFIG_END + 2)
84 #define PM8XXX_CONFIG_ALEVEL (PIN_CONFIG_END + 3)
85 #define PM8XXX_CONFIG_PAIRED (PIN_CONFIG_END + 4)
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103
104 struct pm8xxx_pin_data {
105 unsigned reg;
106 int irq;
107
108 u8 mode;
109
110 bool input;
111 bool output;
112 bool high_z;
113 bool paired;
114 bool output_value;
115
116 u8 power_source;
117 u8 dtest;
118 u8 amux;
119 u8 aout_level;
120 u8 drive_strength;
121 unsigned pullup;
122 };
123
124 struct pm8xxx_mpp {
125 struct device *dev;
126 struct regmap *regmap;
127 struct pinctrl_dev *pctrl;
128 struct gpio_chip chip;
129
130 struct pinctrl_desc desc;
131 unsigned npins;
132 };
133
134 static const struct pinconf_generic_params pm8xxx_mpp_bindings[] = {
135 {"qcom,amux-route", PM8XXX_CONFIG_AMUX, 0},
136 {"qcom,analog-level", PM8XXX_CONFIG_ALEVEL, 0},
137 {"qcom,dtest", PM8XXX_CONFIG_DTEST_SELECTOR, 0},
138 {"qcom,paired", PM8XXX_CONFIG_PAIRED, 0},
139 };
140
141 #ifdef CONFIG_DEBUG_FS
142 static const struct pin_config_item pm8xxx_conf_items[] = {
143 PCONFDUMP(PM8XXX_CONFIG_AMUX, "analog mux", NULL, true),
144 PCONFDUMP(PM8XXX_CONFIG_ALEVEL, "analog level", NULL, true),
145 PCONFDUMP(PM8XXX_CONFIG_DTEST_SELECTOR, "dtest", NULL, true),
146 PCONFDUMP(PM8XXX_CONFIG_PAIRED, "paired", NULL, false),
147 };
148 #endif
149
150 #define PM8XXX_MAX_MPPS 12
151 static const char * const pm8xxx_groups[PM8XXX_MAX_MPPS] = {
152 "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8",
153 "mpp9", "mpp10", "mpp11", "mpp12",
154 };
155
156 #define PM8XXX_MPP_DIGITAL 0
157 #define PM8XXX_MPP_ANALOG 1
158 #define PM8XXX_MPP_SINK 2
159
160 static const char * const pm8xxx_mpp_functions[] = {
161 "digital", "analog", "sink",
162 };
163
164 static int pm8xxx_mpp_update(struct pm8xxx_mpp *pctrl,
165 struct pm8xxx_pin_data *pin)
166 {
167 unsigned level;
168 unsigned ctrl;
169 unsigned type;
170 int ret;
171 u8 val;
172
173 switch (pin->mode) {
174 case PM8XXX_MPP_DIGITAL:
175 if (pin->dtest) {
176 type = PM8XXX_MPP_TYPE_DTEST_OUTPUT;
177 ctrl = pin->dtest - 1;
178 } else if (pin->input && pin->output) {
179 type = PM8XXX_MPP_TYPE_D_BI_DIR;
180 if (pin->high_z)
181 ctrl = PM8XXX_MPP_BI_PULLUP_OPEN;
182 else if (pin->pullup == 600)
183 ctrl = PM8XXX_MPP_BI_PULLUP_1KOHM;
184 else if (pin->pullup == 10000)
185 ctrl = PM8XXX_MPP_BI_PULLUP_10KOHM;
186 else
187 ctrl = PM8XXX_MPP_BI_PULLUP_30KOHM;
188 } else if (pin->input) {
189 type = PM8XXX_MPP_TYPE_D_INPUT;
190 if (pin->dtest)
191 ctrl = pin->dtest;
192 else
193 ctrl = PM8XXX_MPP_DIN_TO_INT;
194 } else {
195 type = PM8XXX_MPP_TYPE_D_OUTPUT;
196 ctrl = !!pin->output_value;
197 if (pin->paired)
198 ctrl |= BIT(1);
199 }
200
201 level = pin->power_source;
202 break;
203 case PM8XXX_MPP_ANALOG:
204 if (pin->output) {
205 type = PM8XXX_MPP_TYPE_A_OUTPUT;
206 level = pin->aout_level;
207 ctrl = pin->output_value;
208 if (pin->paired)
209 ctrl |= BIT(1);
210 } else {
211 type = PM8XXX_MPP_TYPE_A_INPUT;
212 level = pin->amux;
213 ctrl = 0;
214 }
215 break;
216 case PM8XXX_MPP_SINK:
217 level = (pin->drive_strength / 5) - 1;
218 if (pin->dtest) {
219 type = PM8XXX_MPP_TYPE_DTEST_SINK;
220 ctrl = pin->dtest - 1;
221 } else {
222 type = PM8XXX_MPP_TYPE_SINK;
223 ctrl = pin->output_value;
224 if (pin->paired)
225 ctrl |= BIT(1);
226 }
227 break;
228 default:
229 return -EINVAL;
230 }
231
232 val = type << 5 | level << 2 | ctrl;
233 ret = regmap_write(pctrl->regmap, pin->reg, val);
234 if (ret)
235 dev_err(pctrl->dev, "failed to write register\n");
236
237 return ret;
238 }
239
240 static int pm8xxx_get_groups_count(struct pinctrl_dev *pctldev)
241 {
242 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
243
244 return pctrl->npins;
245 }
246
247 static const char *pm8xxx_get_group_name(struct pinctrl_dev *pctldev,
248 unsigned group)
249 {
250 return pm8xxx_groups[group];
251 }
252
253
254 static int pm8xxx_get_group_pins(struct pinctrl_dev *pctldev,
255 unsigned group,
256 const unsigned **pins,
257 unsigned *num_pins)
258 {
259 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
260
261 *pins = &pctrl->desc.pins[group].number;
262 *num_pins = 1;
263
264 return 0;
265 }
266
267 static const struct pinctrl_ops pm8xxx_pinctrl_ops = {
268 .get_groups_count = pm8xxx_get_groups_count,
269 .get_group_name = pm8xxx_get_group_name,
270 .get_group_pins = pm8xxx_get_group_pins,
271 .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
272 .dt_free_map = pinctrl_utils_free_map,
273 };
274
275 static int pm8xxx_get_functions_count(struct pinctrl_dev *pctldev)
276 {
277 return ARRAY_SIZE(pm8xxx_mpp_functions);
278 }
279
280 static const char *pm8xxx_get_function_name(struct pinctrl_dev *pctldev,
281 unsigned function)
282 {
283 return pm8xxx_mpp_functions[function];
284 }
285
286 static int pm8xxx_get_function_groups(struct pinctrl_dev *pctldev,
287 unsigned function,
288 const char * const **groups,
289 unsigned * const num_groups)
290 {
291 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
292
293 *groups = pm8xxx_groups;
294 *num_groups = pctrl->npins;
295 return 0;
296 }
297
298 static int pm8xxx_pinmux_set_mux(struct pinctrl_dev *pctldev,
299 unsigned function,
300 unsigned group)
301 {
302 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
303 struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;
304
305 pin->mode = function;
306 pm8xxx_mpp_update(pctrl, pin);
307
308 return 0;
309 }
310
311 static const struct pinmux_ops pm8xxx_pinmux_ops = {
312 .get_functions_count = pm8xxx_get_functions_count,
313 .get_function_name = pm8xxx_get_function_name,
314 .get_function_groups = pm8xxx_get_function_groups,
315 .set_mux = pm8xxx_pinmux_set_mux,
316 };
317
318 static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
319 unsigned int offset,
320 unsigned long *config)
321 {
322 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
323 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
324 unsigned param = pinconf_to_config_param(*config);
325 unsigned arg;
326
327 switch (param) {
328 case PIN_CONFIG_BIAS_PULL_UP:
329 arg = pin->pullup;
330 break;
331 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
332 arg = pin->high_z;
333 break;
334 case PIN_CONFIG_INPUT_ENABLE:
335 arg = pin->input;
336 break;
337 case PIN_CONFIG_OUTPUT:
338 arg = pin->output_value;
339 break;
340 case PIN_CONFIG_POWER_SOURCE:
341 arg = pin->power_source;
342 break;
343 case PIN_CONFIG_DRIVE_STRENGTH:
344 arg = pin->drive_strength;
345 break;
346 case PM8XXX_CONFIG_DTEST_SELECTOR:
347 arg = pin->dtest;
348 break;
349 case PM8XXX_CONFIG_AMUX:
350 arg = pin->amux;
351 break;
352 case PM8XXX_CONFIG_ALEVEL:
353 arg = pin->aout_level;
354 break;
355 case PM8XXX_CONFIG_PAIRED:
356 arg = pin->paired;
357 break;
358 default:
359 return -EINVAL;
360 }
361
362 *config = pinconf_to_config_packed(param, arg);
363
364 return 0;
365 }
366
367 static int pm8xxx_pin_config_set(struct pinctrl_dev *pctldev,
368 unsigned int offset,
369 unsigned long *configs,
370 unsigned num_configs)
371 {
372 struct pm8xxx_mpp *pctrl = pinctrl_dev_get_drvdata(pctldev);
373 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
374 unsigned param;
375 unsigned arg;
376 unsigned i;
377
378 for (i = 0; i < num_configs; i++) {
379 param = pinconf_to_config_param(configs[i]);
380 arg = pinconf_to_config_argument(configs[i]);
381
382 switch (param) {
383 case PIN_CONFIG_BIAS_PULL_UP:
384 pin->pullup = arg;
385 break;
386 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
387 pin->high_z = true;
388 break;
389 case PIN_CONFIG_INPUT_ENABLE:
390 pin->input = true;
391 break;
392 case PIN_CONFIG_OUTPUT:
393 pin->output = true;
394 pin->output_value = !!arg;
395 break;
396 case PIN_CONFIG_POWER_SOURCE:
397 pin->power_source = arg;
398 break;
399 case PIN_CONFIG_DRIVE_STRENGTH:
400 pin->drive_strength = arg;
401 break;
402 case PM8XXX_CONFIG_DTEST_SELECTOR:
403 pin->dtest = arg;
404 break;
405 case PM8XXX_CONFIG_AMUX:
406 pin->amux = arg;
407 break;
408 case PM8XXX_CONFIG_ALEVEL:
409 pin->aout_level = arg;
410 break;
411 case PM8XXX_CONFIG_PAIRED:
412 pin->paired = !!arg;
413 break;
414 default:
415 dev_err(pctrl->dev,
416 "unsupported config parameter: %x\n",
417 param);
418 return -EINVAL;
419 }
420 }
421
422 pm8xxx_mpp_update(pctrl, pin);
423
424 return 0;
425 }
426
427 static const struct pinconf_ops pm8xxx_pinconf_ops = {
428 .is_generic = true,
429 .pin_config_group_get = pm8xxx_pin_config_get,
430 .pin_config_group_set = pm8xxx_pin_config_set,
431 };
432
433 static struct pinctrl_desc pm8xxx_pinctrl_desc = {
434 .name = "pm8xxx_mpp",
435 .pctlops = &pm8xxx_pinctrl_ops,
436 .pmxops = &pm8xxx_pinmux_ops,
437 .confops = &pm8xxx_pinconf_ops,
438 .owner = THIS_MODULE,
439 };
440
441 static int pm8xxx_mpp_direction_input(struct gpio_chip *chip,
442 unsigned offset)
443 {
444 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
445 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
446
447 switch (pin->mode) {
448 case PM8XXX_MPP_DIGITAL:
449 pin->input = true;
450 break;
451 case PM8XXX_MPP_ANALOG:
452 pin->input = true;
453 pin->output = true;
454 break;
455 case PM8XXX_MPP_SINK:
456 return -EINVAL;
457 }
458
459 pm8xxx_mpp_update(pctrl, pin);
460
461 return 0;
462 }
463
464 static int pm8xxx_mpp_direction_output(struct gpio_chip *chip,
465 unsigned offset,
466 int value)
467 {
468 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
469 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
470
471 switch (pin->mode) {
472 case PM8XXX_MPP_DIGITAL:
473 pin->output = true;
474 break;
475 case PM8XXX_MPP_ANALOG:
476 pin->input = false;
477 pin->output = true;
478 break;
479 case PM8XXX_MPP_SINK:
480 pin->input = false;
481 pin->output = true;
482 break;
483 }
484
485 pm8xxx_mpp_update(pctrl, pin);
486
487 return 0;
488 }
489
490 static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset)
491 {
492 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
493 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
494 bool state;
495 int ret;
496
497 if (!pin->input)
498 return !!pin->output_value;
499
500 ret = irq_get_irqchip_state(pin->irq, IRQCHIP_STATE_LINE_LEVEL, &state);
501 if (!ret)
502 ret = !!state;
503
504 return ret;
505 }
506
507 static void pm8xxx_mpp_set(struct gpio_chip *chip, unsigned offset, int value)
508 {
509 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
510 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
511
512 pin->output_value = !!value;
513
514 pm8xxx_mpp_update(pctrl, pin);
515 }
516
517 static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip,
518 const struct of_phandle_args *gpio_desc,
519 u32 *flags)
520 {
521 if (chip->of_gpio_n_cells < 2)
522 return -EINVAL;
523
524 if (flags)
525 *flags = gpio_desc->args[1];
526
527 return gpio_desc->args[0] - 1;
528 }
529
530
531 static int pm8xxx_mpp_to_irq(struct gpio_chip *chip, unsigned offset)
532 {
533 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
534 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
535
536 return pin->irq;
537 }
538
539 #ifdef CONFIG_DEBUG_FS
540 #include <linux/seq_file.h>
541
542 static void pm8xxx_mpp_dbg_show_one(struct seq_file *s,
543 struct pinctrl_dev *pctldev,
544 struct gpio_chip *chip,
545 unsigned offset,
546 unsigned gpio)
547 {
548 struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip);
549 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;
550
551 static const char * const aout_lvls[] = {
552 "1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2",
553 "abus3"
554 };
555
556 static const char * const amuxs[] = {
557 "amux5", "amux6", "amux7", "amux8", "amux9", "abus1", "abus2",
558 "abus3",
559 };
560
561 seq_printf(s, " mpp%-2d:", offset + 1);
562
563 switch (pin->mode) {
564 case PM8XXX_MPP_DIGITAL:
565 seq_puts(s, " digital ");
566 if (pin->dtest) {
567 seq_printf(s, "dtest%d\n", pin->dtest);
568 } else if (pin->input && pin->output) {
569 if (pin->high_z)
570 seq_puts(s, "bi-dir high-z");
571 else
572 seq_printf(s, "bi-dir %dOhm", pin->pullup);
573 } else if (pin->input) {
574 if (pin->dtest)
575 seq_printf(s, "in dtest%d", pin->dtest);
576 else
577 seq_puts(s, "in gpio");
578 } else if (pin->output) {
579 seq_puts(s, "out ");
580
581 if (!pin->paired) {
582 seq_puts(s, pin->output_value ?
583 "high" : "low");
584 } else {
585 seq_puts(s, pin->output_value ?
586 "inverted" : "follow");
587 }
588 }
589 break;
590 case PM8XXX_MPP_ANALOG:
591 seq_puts(s, " analog ");
592 if (pin->output) {
593 seq_printf(s, "out %s ", aout_lvls[pin->aout_level]);
594 if (!pin->paired) {
595 seq_puts(s, pin->output_value ?
596 "high" : "low");
597 } else {
598 seq_puts(s, pin->output_value ?
599 "inverted" : "follow");
600 }
601 } else {
602 seq_printf(s, "input mux %s", amuxs[pin->amux]);
603 }
604 break;
605 case PM8XXX_MPP_SINK:
606 seq_printf(s, " sink %dmA ", pin->drive_strength);
607 if (pin->dtest) {
608 seq_printf(s, "dtest%d", pin->dtest);
609 } else {
610 if (!pin->paired) {
611 seq_puts(s, pin->output_value ?
612 "high" : "low");
613 } else {
614 seq_puts(s, pin->output_value ?
615 "inverted" : "follow");
616 }
617 }
618 break;
619 }
620
621 }
622
623 static void pm8xxx_mpp_dbg_show(struct seq_file *s, struct gpio_chip *chip)
624 {
625 unsigned gpio = chip->base;
626 unsigned i;
627
628 for (i = 0; i < chip->ngpio; i++, gpio++) {
629 pm8xxx_mpp_dbg_show_one(s, NULL, chip, i, gpio);
630 seq_puts(s, "\n");
631 }
632 }
633
634 #else
635 #define pm8xxx_mpp_dbg_show NULL
636 #endif
637
638 static const struct gpio_chip pm8xxx_mpp_template = {
639 .direction_input = pm8xxx_mpp_direction_input,
640 .direction_output = pm8xxx_mpp_direction_output,
641 .get = pm8xxx_mpp_get,
642 .set = pm8xxx_mpp_set,
643 .of_xlate = pm8xxx_mpp_of_xlate,
644 .to_irq = pm8xxx_mpp_to_irq,
645 .dbg_show = pm8xxx_mpp_dbg_show,
646 .owner = THIS_MODULE,
647 };
648
649 static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl,
650 struct pm8xxx_pin_data *pin)
651 {
652 unsigned int val;
653 unsigned level;
654 unsigned ctrl;
655 unsigned type;
656 int ret;
657
658 ret = regmap_read(pctrl->regmap, pin->reg, &val);
659 if (ret) {
660 dev_err(pctrl->dev, "failed to read register\n");
661 return ret;
662 }
663
664 type = (val >> 5) & 7;
665 level = (val >> 2) & 7;
666 ctrl = (val) & 3;
667
668 switch (type) {
669 case PM8XXX_MPP_TYPE_D_INPUT:
670 pin->mode = PM8XXX_MPP_DIGITAL;
671 pin->input = true;
672 pin->power_source = level;
673 pin->dtest = ctrl;
674 break;
675 case PM8XXX_MPP_TYPE_D_OUTPUT:
676 pin->mode = PM8XXX_MPP_DIGITAL;
677 pin->output = true;
678 pin->power_source = level;
679 pin->output_value = !!(ctrl & BIT(0));
680 pin->paired = !!(ctrl & BIT(1));
681 break;
682 case PM8XXX_MPP_TYPE_D_BI_DIR:
683 pin->mode = PM8XXX_MPP_DIGITAL;
684 pin->input = true;
685 pin->output = true;
686 pin->power_source = level;
687 switch (ctrl) {
688 case PM8XXX_MPP_BI_PULLUP_1KOHM:
689 pin->pullup = 600;
690 break;
691 case PM8XXX_MPP_BI_PULLUP_OPEN:
692 pin->high_z = true;
693 break;
694 case PM8XXX_MPP_BI_PULLUP_10KOHM:
695 pin->pullup = 10000;
696 break;
697 case PM8XXX_MPP_BI_PULLUP_30KOHM:
698 pin->pullup = 30000;
699 break;
700 }
701 break;
702 case PM8XXX_MPP_TYPE_A_INPUT:
703 pin->mode = PM8XXX_MPP_ANALOG;
704 pin->input = true;
705 pin->amux = level;
706 break;
707 case PM8XXX_MPP_TYPE_A_OUTPUT:
708 pin->mode = PM8XXX_MPP_ANALOG;
709 pin->output = true;
710 pin->aout_level = level;
711 pin->output_value = !!(ctrl & BIT(0));
712 pin->paired = !!(ctrl & BIT(1));
713 break;
714 case PM8XXX_MPP_TYPE_SINK:
715 pin->mode = PM8XXX_MPP_SINK;
716 pin->drive_strength = 5 * (level + 1);
717 pin->output_value = !!(ctrl & BIT(0));
718 pin->paired = !!(ctrl & BIT(1));
719 break;
720 case PM8XXX_MPP_TYPE_DTEST_SINK:
721 pin->mode = PM8XXX_MPP_SINK;
722 pin->dtest = ctrl + 1;
723 pin->drive_strength = 5 * (level + 1);
724 break;
725 case PM8XXX_MPP_TYPE_DTEST_OUTPUT:
726 pin->mode = PM8XXX_MPP_DIGITAL;
727 pin->power_source = level;
728 if (ctrl >= 1)
729 pin->dtest = ctrl;
730 break;
731 }
732
733 return 0;
734 }
735
736 static const struct of_device_id pm8xxx_mpp_of_match[] = {
737 { .compatible = "qcom,pm8018-mpp" },
738 { .compatible = "qcom,pm8038-mpp" },
739 { .compatible = "qcom,pm8058-mpp" },
740 { .compatible = "qcom,pm8917-mpp" },
741 { .compatible = "qcom,pm8821-mpp" },
742 { .compatible = "qcom,pm8921-mpp" },
743 { .compatible = "qcom,ssbi-mpp" },
744 { },
745 };
746 MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match);
747
748 static int pm8xxx_mpp_probe(struct platform_device *pdev)
749 {
750 struct pm8xxx_pin_data *pin_data;
751 struct pinctrl_pin_desc *pins;
752 struct pm8xxx_mpp *pctrl;
753 int ret;
754 int i, npins;
755
756 pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
757 if (!pctrl)
758 return -ENOMEM;
759
760 pctrl->dev = &pdev->dev;
761 npins = platform_irq_count(pdev);
762 if (!npins)
763 return -EINVAL;
764 if (npins < 0)
765 return npins;
766 pctrl->npins = npins;
767
768 pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);
769 if (!pctrl->regmap) {
770 dev_err(&pdev->dev, "parent regmap unavailable\n");
771 return -ENXIO;
772 }
773
774 pctrl->desc = pm8xxx_pinctrl_desc;
775 pctrl->desc.npins = pctrl->npins;
776
777 pins = devm_kcalloc(&pdev->dev,
778 pctrl->desc.npins,
779 sizeof(struct pinctrl_pin_desc),
780 GFP_KERNEL);
781 if (!pins)
782 return -ENOMEM;
783
784 pin_data = devm_kcalloc(&pdev->dev,
785 pctrl->desc.npins,
786 sizeof(struct pm8xxx_pin_data),
787 GFP_KERNEL);
788 if (!pin_data)
789 return -ENOMEM;
790
791 for (i = 0; i < pctrl->desc.npins; i++) {
792 pin_data[i].reg = SSBI_REG_ADDR_MPP(i);
793 pin_data[i].irq = platform_get_irq(pdev, i);
794 if (pin_data[i].irq < 0)
795 return pin_data[i].irq;
796
797 ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);
798 if (ret)
799 return ret;
800
801 pins[i].number = i;
802 pins[i].name = pm8xxx_groups[i];
803 pins[i].drv_data = &pin_data[i];
804 }
805 pctrl->desc.pins = pins;
806
807 pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_mpp_bindings);
808 pctrl->desc.custom_params = pm8xxx_mpp_bindings;
809 #ifdef CONFIG_DEBUG_FS
810 pctrl->desc.custom_conf_items = pm8xxx_conf_items;
811 #endif
812
813 pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);
814 if (IS_ERR(pctrl->pctrl)) {
815 dev_err(&pdev->dev, "couldn't register pm8xxx mpp driver\n");
816 return PTR_ERR(pctrl->pctrl);
817 }
818
819 pctrl->chip = pm8xxx_mpp_template;
820 pctrl->chip.base = -1;
821 pctrl->chip.parent = &pdev->dev;
822 pctrl->chip.of_node = pdev->dev.of_node;
823 pctrl->chip.of_gpio_n_cells = 2;
824 pctrl->chip.label = dev_name(pctrl->dev);
825 pctrl->chip.ngpio = pctrl->npins;
826 ret = gpiochip_add_data(&pctrl->chip, pctrl);
827 if (ret) {
828 dev_err(&pdev->dev, "failed register gpiochip\n");
829 return ret;
830 }
831
832 ret = gpiochip_add_pin_range(&pctrl->chip,
833 dev_name(pctrl->dev),
834 0, 0, pctrl->chip.ngpio);
835 if (ret) {
836 dev_err(pctrl->dev, "failed to add pin range\n");
837 goto unregister_gpiochip;
838 }
839
840 platform_set_drvdata(pdev, pctrl);
841
842 dev_dbg(&pdev->dev, "Qualcomm pm8xxx mpp driver probed\n");
843
844 return 0;
845
846 unregister_gpiochip:
847 gpiochip_remove(&pctrl->chip);
848
849 return ret;
850 }
851
852 static int pm8xxx_mpp_remove(struct platform_device *pdev)
853 {
854 struct pm8xxx_mpp *pctrl = platform_get_drvdata(pdev);
855
856 gpiochip_remove(&pctrl->chip);
857
858 return 0;
859 }
860
861 static struct platform_driver pm8xxx_mpp_driver = {
862 .driver = {
863 .name = "qcom-ssbi-mpp",
864 .of_match_table = pm8xxx_mpp_of_match,
865 },
866 .probe = pm8xxx_mpp_probe,
867 .remove = pm8xxx_mpp_remove,
868 };
869
870 module_platform_driver(pm8xxx_mpp_driver);
871
872 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
873 MODULE_DESCRIPTION("Qualcomm PM8xxx MPP driver");
874 MODULE_LICENSE("GPL v2");