1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2013, Sony Mobile Communications AB.
4 */
5 #ifndef __PINCTRL_MSM_H__
6 #define __PINCTRL_MSM_H__
7
8 struct pinctrl_pin_desc;
9
10 /**
11 * struct msm_function - a pinmux function
12 * @name: Name of the pinmux function.
13 * @groups: List of pingroups for this function.
14 * @ngroups: Number of entries in @groups.
15 */
16 struct msm_function {
17 const char *name;
18 const char * const *groups;
19 unsigned ngroups;
20 };
21
22 /**
23 * struct msm_pingroup - Qualcomm pingroup definition
24 * @name: Name of the pingroup.
25 * @pins: A list of pins assigned to this pingroup.
26 * @npins: Number of entries in @pins.
27 * @funcs: A list of pinmux functions that can be selected for
28 * this group. The index of the selected function is used
29 * for programming the function selector.
30 * Entries should be indices into the groups list of the
31 * struct msm_pinctrl_soc_data.
32 * @ctl_reg: Offset of the register holding control bits for this group.
33 * @io_reg: Offset of the register holding input/output bits for this group.
34 * @intr_cfg_reg: Offset of the register holding interrupt configuration bits.
35 * @intr_status_reg: Offset of the register holding the status bits for this group.
36 * @intr_target_reg: Offset of the register specifying routing of the interrupts
37 * from this group.
38 * @mux_bit: Offset in @ctl_reg for the pinmux function selection.
39 * @pull_bit: Offset in @ctl_reg for the bias configuration.
40 * @drv_bit: Offset in @ctl_reg for the drive strength configuration.
41 * @oe_bit: Offset in @ctl_reg for controlling output enable.
42 * @in_bit: Offset in @io_reg for the input bit value.
43 * @out_bit: Offset in @io_reg for the output bit value.
44 * @intr_enable_bit: Offset in @intr_cfg_reg for enabling the interrupt for this group.
45 * @intr_status_bit: Offset in @intr_status_reg for reading and acking the interrupt
46 * status.
47 * @intr_target_bit: Offset in @intr_target_reg for configuring the interrupt routing.
48 * @intr_target_kpss_val: Value in @intr_target_bit for specifying that the interrupt from
49 * this gpio should get routed to the KPSS processor.
50 * @intr_raw_status_bit: Offset in @intr_cfg_reg for the raw status bit.
51 * @intr_polarity_bit: Offset in @intr_cfg_reg for specifying polarity of the interrupt.
52 * @intr_detection_bit: Offset in @intr_cfg_reg for specifying interrupt type.
53 * @intr_detection_width: Number of bits used for specifying interrupt type,
54 * Should be 2 for SoCs that can detect both edges in hardware,
55 * otherwise 1.
56 */
57 struct msm_pingroup {
58 const char *name;
59 const unsigned *pins;
60 unsigned npins;
61
62 unsigned *funcs;
63 unsigned nfuncs;
64
65 u32 ctl_reg;
66 u32 io_reg;
67 u32 intr_cfg_reg;
68 u32 intr_status_reg;
69 u32 intr_target_reg;
70
71 unsigned int tile:2;
72
73 unsigned mux_bit:5;
74
75 unsigned pull_bit:5;
76 unsigned drv_bit:5;
77
78 unsigned oe_bit:5;
79 unsigned in_bit:5;
80 unsigned out_bit:5;
81
82 unsigned intr_enable_bit:5;
83 unsigned intr_status_bit:5;
84 unsigned intr_ack_high:1;
85
86 unsigned intr_target_bit:5;
87 unsigned intr_target_kpss_val:5;
88 unsigned intr_raw_status_bit:5;
89 unsigned intr_polarity_bit:5;
90 unsigned intr_detection_bit:5;
91 unsigned intr_detection_width:5;
92 };
93
94 /**
95 * struct msm_pinctrl_soc_data - Qualcomm pin controller driver configuration
96 * @pins: An array describing all pins the pin controller affects.
97 * @npins: The number of entries in @pins.
98 * @functions: An array describing all mux functions the SoC supports.
99 * @nfunctions: The number of entries in @functions.
100 * @groups: An array describing all pin groups the pin SoC supports.
101 * @ngroups: The numbmer of entries in @groups.
102 * @ngpio: The number of pingroups the driver should expose as GPIOs.
103 * @pull_no_keeper: The SoC does not support keeper bias.
104 */
105 struct msm_pinctrl_soc_data {
106 const struct pinctrl_pin_desc *pins;
107 unsigned npins;
108 const struct msm_function *functions;
109 unsigned nfunctions;
110 const struct msm_pingroup *groups;
111 unsigned ngroups;
112 unsigned ngpios;
113 bool pull_no_keeper;
114 const char *const *tiles;
115 unsigned int ntiles;
116 const int *reserved_gpios;
117 };
118
119 extern const struct dev_pm_ops msm_pinctrl_dev_pm_ops;
120
121 int msm_pinctrl_probe(struct platform_device *pdev,
122 const struct msm_pinctrl_soc_data *soc_data);
123 int msm_pinctrl_remove(struct platform_device *pdev);
124
125 #endif