root/drivers/pinctrl/qcom/pinctrl-sm8150.c

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DEFINITIONS

This source file includes following definitions.
  1. sm8150_pinctrl_probe
  2. sm8150_pinctrl_init
  3. sm8150_pinctrl_exit

   1 // SPDX-License-Identifier: GPL-2.0
   2 // Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
   3 
   4 #include <linux/module.h>
   5 #include <linux/of.h>
   6 #include <linux/platform_device.h>
   7 #include <linux/pinctrl/pinctrl.h>
   8 
   9 #include "pinctrl-msm.h"
  10 
  11 static const char * const sm8150_tiles[] = {
  12         "north",
  13         "south",
  14         "east",
  15         "west"
  16 };
  17 
  18 enum {
  19         NORTH,
  20         SOUTH,
  21         EAST,
  22         WEST
  23 };
  24 
  25 #define FUNCTION(fname)                                 \
  26         [msm_mux_##fname] = {                           \
  27                 .name = #fname,                         \
  28                 .groups = fname##_groups,               \
  29                 .ngroups = ARRAY_SIZE(fname##_groups),  \
  30         }
  31 
  32 #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
  33         {                                               \
  34                 .name = "gpio" #id,                     \
  35                 .pins = gpio##id##_pins,                \
  36                 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins),     \
  37                 .funcs = (int[]){                       \
  38                         msm_mux_gpio, /* gpio mode */   \
  39                         msm_mux_##f1,                   \
  40                         msm_mux_##f2,                   \
  41                         msm_mux_##f3,                   \
  42                         msm_mux_##f4,                   \
  43                         msm_mux_##f5,                   \
  44                         msm_mux_##f6,                   \
  45                         msm_mux_##f7,                   \
  46                         msm_mux_##f8,                   \
  47                         msm_mux_##f9                    \
  48                 },                                      \
  49                 .nfuncs = 10,                           \
  50                 .ctl_reg = 0x1000 * id,         \
  51                 .io_reg = 0x1000 * id + 0x4,            \
  52                 .intr_cfg_reg = 0x1000 * id + 0x8,      \
  53                 .intr_status_reg = 0x1000 * id + 0xc,   \
  54                 .intr_target_reg = 0x1000 * id + 0x8,   \
  55                 .tile = _tile,                  \
  56                 .mux_bit = 2,                   \
  57                 .pull_bit = 0,                  \
  58                 .drv_bit = 6,                   \
  59                 .oe_bit = 9,                    \
  60                 .in_bit = 0,                    \
  61                 .out_bit = 1,                   \
  62                 .intr_enable_bit = 0,           \
  63                 .intr_status_bit = 0,           \
  64                 .intr_target_bit = 5,           \
  65                 .intr_target_kpss_val = 3,      \
  66                 .intr_raw_status_bit = 4,       \
  67                 .intr_polarity_bit = 1,         \
  68                 .intr_detection_bit = 2,        \
  69                 .intr_detection_width = 2,      \
  70         }
  71 
  72 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv)      \
  73         {                                               \
  74                 .name = #pg_name,                       \
  75                 .pins = pg_name##_pins,                 \
  76                 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),      \
  77                 .ctl_reg = ctl,                         \
  78                 .io_reg = 0,                            \
  79                 .intr_cfg_reg = 0,                      \
  80                 .intr_status_reg = 0,                   \
  81                 .intr_target_reg = 0,                   \
  82                 .tile = NORTH,                          \
  83                 .mux_bit = -1,                          \
  84                 .pull_bit = pull,                       \
  85                 .drv_bit = drv,                         \
  86                 .oe_bit = -1,                           \
  87                 .in_bit = -1,                           \
  88                 .out_bit = -1,                          \
  89                 .intr_enable_bit = -1,                  \
  90                 .intr_status_bit = -1,                  \
  91                 .intr_target_bit = -1,                  \
  92                 .intr_raw_status_bit = -1,              \
  93                 .intr_polarity_bit = -1,                \
  94                 .intr_detection_bit = -1,               \
  95                 .intr_detection_width = -1,             \
  96         }
  97 
  98 #define UFS_RESET(pg_name, offset)                              \
  99         {                                               \
 100                 .name = #pg_name,                       \
 101                 .pins = pg_name##_pins,                 \
 102                 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins),      \
 103                 .ctl_reg = offset,                      \
 104                 .io_reg = offset + 0x4,                 \
 105                 .intr_cfg_reg = 0,                      \
 106                 .intr_status_reg = 0,                   \
 107                 .intr_target_reg = 0,                   \
 108                 .tile = SOUTH,                          \
 109                 .mux_bit = -1,                          \
 110                 .pull_bit = 3,                          \
 111                 .drv_bit = 0,                           \
 112                 .oe_bit = -1,                           \
 113                 .in_bit = -1,                           \
 114                 .out_bit = 0,                           \
 115                 .intr_enable_bit = -1,                  \
 116                 .intr_status_bit = -1,                  \
 117                 .intr_target_bit = -1,                  \
 118                 .intr_raw_status_bit = -1,              \
 119                 .intr_polarity_bit = -1,                \
 120                 .intr_detection_bit = -1,               \
 121                 .intr_detection_width = -1,             \
 122         }
 123 
 124 static const struct pinctrl_pin_desc sm8150_pins[] = {
 125         PINCTRL_PIN(0, "GPIO_0"),
 126         PINCTRL_PIN(1, "GPIO_1"),
 127         PINCTRL_PIN(2, "GPIO_2"),
 128         PINCTRL_PIN(3, "GPIO_3"),
 129         PINCTRL_PIN(4, "GPIO_4"),
 130         PINCTRL_PIN(5, "GPIO_5"),
 131         PINCTRL_PIN(6, "GPIO_6"),
 132         PINCTRL_PIN(7, "GPIO_7"),
 133         PINCTRL_PIN(8, "GPIO_8"),
 134         PINCTRL_PIN(9, "GPIO_9"),
 135         PINCTRL_PIN(10, "GPIO_10"),
 136         PINCTRL_PIN(11, "GPIO_11"),
 137         PINCTRL_PIN(12, "GPIO_12"),
 138         PINCTRL_PIN(13, "GPIO_13"),
 139         PINCTRL_PIN(14, "GPIO_14"),
 140         PINCTRL_PIN(15, "GPIO_15"),
 141         PINCTRL_PIN(16, "GPIO_16"),
 142         PINCTRL_PIN(17, "GPIO_17"),
 143         PINCTRL_PIN(18, "GPIO_18"),
 144         PINCTRL_PIN(19, "GPIO_19"),
 145         PINCTRL_PIN(20, "GPIO_20"),
 146         PINCTRL_PIN(21, "GPIO_21"),
 147         PINCTRL_PIN(22, "GPIO_22"),
 148         PINCTRL_PIN(23, "GPIO_23"),
 149         PINCTRL_PIN(24, "GPIO_24"),
 150         PINCTRL_PIN(25, "GPIO_25"),
 151         PINCTRL_PIN(26, "GPIO_26"),
 152         PINCTRL_PIN(27, "GPIO_27"),
 153         PINCTRL_PIN(28, "GPIO_28"),
 154         PINCTRL_PIN(29, "GPIO_29"),
 155         PINCTRL_PIN(30, "GPIO_30"),
 156         PINCTRL_PIN(31, "GPIO_31"),
 157         PINCTRL_PIN(32, "GPIO_32"),
 158         PINCTRL_PIN(33, "GPIO_33"),
 159         PINCTRL_PIN(34, "GPIO_34"),
 160         PINCTRL_PIN(35, "GPIO_35"),
 161         PINCTRL_PIN(36, "GPIO_36"),
 162         PINCTRL_PIN(37, "GPIO_37"),
 163         PINCTRL_PIN(38, "GPIO_38"),
 164         PINCTRL_PIN(39, "GPIO_39"),
 165         PINCTRL_PIN(40, "GPIO_40"),
 166         PINCTRL_PIN(41, "GPIO_41"),
 167         PINCTRL_PIN(42, "GPIO_42"),
 168         PINCTRL_PIN(43, "GPIO_43"),
 169         PINCTRL_PIN(44, "GPIO_44"),
 170         PINCTRL_PIN(45, "GPIO_45"),
 171         PINCTRL_PIN(46, "GPIO_46"),
 172         PINCTRL_PIN(47, "GPIO_47"),
 173         PINCTRL_PIN(48, "GPIO_48"),
 174         PINCTRL_PIN(49, "GPIO_49"),
 175         PINCTRL_PIN(50, "GPIO_50"),
 176         PINCTRL_PIN(51, "GPIO_51"),
 177         PINCTRL_PIN(52, "GPIO_52"),
 178         PINCTRL_PIN(53, "GPIO_53"),
 179         PINCTRL_PIN(54, "GPIO_54"),
 180         PINCTRL_PIN(55, "GPIO_55"),
 181         PINCTRL_PIN(56, "GPIO_56"),
 182         PINCTRL_PIN(57, "GPIO_57"),
 183         PINCTRL_PIN(58, "GPIO_58"),
 184         PINCTRL_PIN(59, "GPIO_59"),
 185         PINCTRL_PIN(60, "GPIO_60"),
 186         PINCTRL_PIN(61, "GPIO_61"),
 187         PINCTRL_PIN(62, "GPIO_62"),
 188         PINCTRL_PIN(63, "GPIO_63"),
 189         PINCTRL_PIN(64, "GPIO_64"),
 190         PINCTRL_PIN(65, "GPIO_65"),
 191         PINCTRL_PIN(66, "GPIO_66"),
 192         PINCTRL_PIN(67, "GPIO_67"),
 193         PINCTRL_PIN(68, "GPIO_68"),
 194         PINCTRL_PIN(69, "GPIO_69"),
 195         PINCTRL_PIN(70, "GPIO_70"),
 196         PINCTRL_PIN(71, "GPIO_71"),
 197         PINCTRL_PIN(72, "GPIO_72"),
 198         PINCTRL_PIN(73, "GPIO_73"),
 199         PINCTRL_PIN(74, "GPIO_74"),
 200         PINCTRL_PIN(75, "GPIO_75"),
 201         PINCTRL_PIN(76, "GPIO_76"),
 202         PINCTRL_PIN(77, "GPIO_77"),
 203         PINCTRL_PIN(78, "GPIO_78"),
 204         PINCTRL_PIN(79, "GPIO_79"),
 205         PINCTRL_PIN(80, "GPIO_80"),
 206         PINCTRL_PIN(81, "GPIO_81"),
 207         PINCTRL_PIN(82, "GPIO_82"),
 208         PINCTRL_PIN(83, "GPIO_83"),
 209         PINCTRL_PIN(84, "GPIO_84"),
 210         PINCTRL_PIN(85, "GPIO_85"),
 211         PINCTRL_PIN(86, "GPIO_86"),
 212         PINCTRL_PIN(87, "GPIO_87"),
 213         PINCTRL_PIN(88, "GPIO_88"),
 214         PINCTRL_PIN(89, "GPIO_89"),
 215         PINCTRL_PIN(90, "GPIO_90"),
 216         PINCTRL_PIN(91, "GPIO_91"),
 217         PINCTRL_PIN(92, "GPIO_92"),
 218         PINCTRL_PIN(93, "GPIO_93"),
 219         PINCTRL_PIN(94, "GPIO_94"),
 220         PINCTRL_PIN(95, "GPIO_95"),
 221         PINCTRL_PIN(96, "GPIO_96"),
 222         PINCTRL_PIN(97, "GPIO_97"),
 223         PINCTRL_PIN(98, "GPIO_98"),
 224         PINCTRL_PIN(99, "GPIO_99"),
 225         PINCTRL_PIN(100, "GPIO_100"),
 226         PINCTRL_PIN(101, "GPIO_101"),
 227         PINCTRL_PIN(102, "GPIO_102"),
 228         PINCTRL_PIN(103, "GPIO_103"),
 229         PINCTRL_PIN(104, "GPIO_104"),
 230         PINCTRL_PIN(105, "GPIO_105"),
 231         PINCTRL_PIN(106, "GPIO_106"),
 232         PINCTRL_PIN(107, "GPIO_107"),
 233         PINCTRL_PIN(108, "GPIO_108"),
 234         PINCTRL_PIN(109, "GPIO_109"),
 235         PINCTRL_PIN(110, "GPIO_110"),
 236         PINCTRL_PIN(111, "GPIO_111"),
 237         PINCTRL_PIN(112, "GPIO_112"),
 238         PINCTRL_PIN(113, "GPIO_113"),
 239         PINCTRL_PIN(114, "GPIO_114"),
 240         PINCTRL_PIN(115, "GPIO_115"),
 241         PINCTRL_PIN(116, "GPIO_116"),
 242         PINCTRL_PIN(117, "GPIO_117"),
 243         PINCTRL_PIN(118, "GPIO_118"),
 244         PINCTRL_PIN(119, "GPIO_119"),
 245         PINCTRL_PIN(120, "GPIO_120"),
 246         PINCTRL_PIN(121, "GPIO_121"),
 247         PINCTRL_PIN(122, "GPIO_122"),
 248         PINCTRL_PIN(123, "GPIO_123"),
 249         PINCTRL_PIN(124, "GPIO_124"),
 250         PINCTRL_PIN(125, "GPIO_125"),
 251         PINCTRL_PIN(126, "GPIO_126"),
 252         PINCTRL_PIN(127, "GPIO_127"),
 253         PINCTRL_PIN(128, "GPIO_128"),
 254         PINCTRL_PIN(129, "GPIO_129"),
 255         PINCTRL_PIN(130, "GPIO_130"),
 256         PINCTRL_PIN(131, "GPIO_131"),
 257         PINCTRL_PIN(132, "GPIO_132"),
 258         PINCTRL_PIN(133, "GPIO_133"),
 259         PINCTRL_PIN(134, "GPIO_134"),
 260         PINCTRL_PIN(135, "GPIO_135"),
 261         PINCTRL_PIN(136, "GPIO_136"),
 262         PINCTRL_PIN(137, "GPIO_137"),
 263         PINCTRL_PIN(138, "GPIO_138"),
 264         PINCTRL_PIN(139, "GPIO_139"),
 265         PINCTRL_PIN(140, "GPIO_140"),
 266         PINCTRL_PIN(141, "GPIO_141"),
 267         PINCTRL_PIN(142, "GPIO_142"),
 268         PINCTRL_PIN(143, "GPIO_143"),
 269         PINCTRL_PIN(144, "GPIO_144"),
 270         PINCTRL_PIN(145, "GPIO_145"),
 271         PINCTRL_PIN(146, "GPIO_146"),
 272         PINCTRL_PIN(147, "GPIO_147"),
 273         PINCTRL_PIN(148, "GPIO_148"),
 274         PINCTRL_PIN(149, "GPIO_149"),
 275         PINCTRL_PIN(150, "GPIO_150"),
 276         PINCTRL_PIN(151, "GPIO_151"),
 277         PINCTRL_PIN(152, "GPIO_152"),
 278         PINCTRL_PIN(153, "GPIO_153"),
 279         PINCTRL_PIN(154, "GPIO_154"),
 280         PINCTRL_PIN(155, "GPIO_155"),
 281         PINCTRL_PIN(156, "GPIO_156"),
 282         PINCTRL_PIN(157, "GPIO_157"),
 283         PINCTRL_PIN(158, "GPIO_158"),
 284         PINCTRL_PIN(159, "GPIO_159"),
 285         PINCTRL_PIN(160, "GPIO_160"),
 286         PINCTRL_PIN(161, "GPIO_161"),
 287         PINCTRL_PIN(162, "GPIO_162"),
 288         PINCTRL_PIN(163, "GPIO_163"),
 289         PINCTRL_PIN(164, "GPIO_164"),
 290         PINCTRL_PIN(165, "GPIO_165"),
 291         PINCTRL_PIN(166, "GPIO_166"),
 292         PINCTRL_PIN(167, "GPIO_167"),
 293         PINCTRL_PIN(168, "GPIO_168"),
 294         PINCTRL_PIN(169, "GPIO_169"),
 295         PINCTRL_PIN(170, "GPIO_170"),
 296         PINCTRL_PIN(171, "GPIO_171"),
 297         PINCTRL_PIN(172, "GPIO_172"),
 298         PINCTRL_PIN(173, "GPIO_173"),
 299         PINCTRL_PIN(174, "GPIO_174"),
 300         PINCTRL_PIN(175, "UFS_RESET"),
 301         PINCTRL_PIN(176, "SDC2_CLK"),
 302         PINCTRL_PIN(177, "SDC2_CMD"),
 303         PINCTRL_PIN(178, "SDC2_DATA"),
 304 };
 305 
 306 #define DECLARE_MSM_GPIO_PINS(pin) \
 307         static const unsigned int gpio##pin##_pins[] = { pin }
 308 DECLARE_MSM_GPIO_PINS(0);
 309 DECLARE_MSM_GPIO_PINS(1);
 310 DECLARE_MSM_GPIO_PINS(2);
 311 DECLARE_MSM_GPIO_PINS(3);
 312 DECLARE_MSM_GPIO_PINS(4);
 313 DECLARE_MSM_GPIO_PINS(5);
 314 DECLARE_MSM_GPIO_PINS(6);
 315 DECLARE_MSM_GPIO_PINS(7);
 316 DECLARE_MSM_GPIO_PINS(8);
 317 DECLARE_MSM_GPIO_PINS(9);
 318 DECLARE_MSM_GPIO_PINS(10);
 319 DECLARE_MSM_GPIO_PINS(11);
 320 DECLARE_MSM_GPIO_PINS(12);
 321 DECLARE_MSM_GPIO_PINS(13);
 322 DECLARE_MSM_GPIO_PINS(14);
 323 DECLARE_MSM_GPIO_PINS(15);
 324 DECLARE_MSM_GPIO_PINS(16);
 325 DECLARE_MSM_GPIO_PINS(17);
 326 DECLARE_MSM_GPIO_PINS(18);
 327 DECLARE_MSM_GPIO_PINS(19);
 328 DECLARE_MSM_GPIO_PINS(20);
 329 DECLARE_MSM_GPIO_PINS(21);
 330 DECLARE_MSM_GPIO_PINS(22);
 331 DECLARE_MSM_GPIO_PINS(23);
 332 DECLARE_MSM_GPIO_PINS(24);
 333 DECLARE_MSM_GPIO_PINS(25);
 334 DECLARE_MSM_GPIO_PINS(26);
 335 DECLARE_MSM_GPIO_PINS(27);
 336 DECLARE_MSM_GPIO_PINS(28);
 337 DECLARE_MSM_GPIO_PINS(29);
 338 DECLARE_MSM_GPIO_PINS(30);
 339 DECLARE_MSM_GPIO_PINS(31);
 340 DECLARE_MSM_GPIO_PINS(32);
 341 DECLARE_MSM_GPIO_PINS(33);
 342 DECLARE_MSM_GPIO_PINS(34);
 343 DECLARE_MSM_GPIO_PINS(35);
 344 DECLARE_MSM_GPIO_PINS(36);
 345 DECLARE_MSM_GPIO_PINS(37);
 346 DECLARE_MSM_GPIO_PINS(38);
 347 DECLARE_MSM_GPIO_PINS(39);
 348 DECLARE_MSM_GPIO_PINS(40);
 349 DECLARE_MSM_GPIO_PINS(41);
 350 DECLARE_MSM_GPIO_PINS(42);
 351 DECLARE_MSM_GPIO_PINS(43);
 352 DECLARE_MSM_GPIO_PINS(44);
 353 DECLARE_MSM_GPIO_PINS(45);
 354 DECLARE_MSM_GPIO_PINS(46);
 355 DECLARE_MSM_GPIO_PINS(47);
 356 DECLARE_MSM_GPIO_PINS(48);
 357 DECLARE_MSM_GPIO_PINS(49);
 358 DECLARE_MSM_GPIO_PINS(50);
 359 DECLARE_MSM_GPIO_PINS(51);
 360 DECLARE_MSM_GPIO_PINS(52);
 361 DECLARE_MSM_GPIO_PINS(53);
 362 DECLARE_MSM_GPIO_PINS(54);
 363 DECLARE_MSM_GPIO_PINS(55);
 364 DECLARE_MSM_GPIO_PINS(56);
 365 DECLARE_MSM_GPIO_PINS(57);
 366 DECLARE_MSM_GPIO_PINS(58);
 367 DECLARE_MSM_GPIO_PINS(59);
 368 DECLARE_MSM_GPIO_PINS(60);
 369 DECLARE_MSM_GPIO_PINS(61);
 370 DECLARE_MSM_GPIO_PINS(62);
 371 DECLARE_MSM_GPIO_PINS(63);
 372 DECLARE_MSM_GPIO_PINS(64);
 373 DECLARE_MSM_GPIO_PINS(65);
 374 DECLARE_MSM_GPIO_PINS(66);
 375 DECLARE_MSM_GPIO_PINS(67);
 376 DECLARE_MSM_GPIO_PINS(68);
 377 DECLARE_MSM_GPIO_PINS(69);
 378 DECLARE_MSM_GPIO_PINS(70);
 379 DECLARE_MSM_GPIO_PINS(71);
 380 DECLARE_MSM_GPIO_PINS(72);
 381 DECLARE_MSM_GPIO_PINS(73);
 382 DECLARE_MSM_GPIO_PINS(74);
 383 DECLARE_MSM_GPIO_PINS(75);
 384 DECLARE_MSM_GPIO_PINS(76);
 385 DECLARE_MSM_GPIO_PINS(77);
 386 DECLARE_MSM_GPIO_PINS(78);
 387 DECLARE_MSM_GPIO_PINS(79);
 388 DECLARE_MSM_GPIO_PINS(80);
 389 DECLARE_MSM_GPIO_PINS(81);
 390 DECLARE_MSM_GPIO_PINS(82);
 391 DECLARE_MSM_GPIO_PINS(83);
 392 DECLARE_MSM_GPIO_PINS(84);
 393 DECLARE_MSM_GPIO_PINS(85);
 394 DECLARE_MSM_GPIO_PINS(86);
 395 DECLARE_MSM_GPIO_PINS(87);
 396 DECLARE_MSM_GPIO_PINS(88);
 397 DECLARE_MSM_GPIO_PINS(89);
 398 DECLARE_MSM_GPIO_PINS(90);
 399 DECLARE_MSM_GPIO_PINS(91);
 400 DECLARE_MSM_GPIO_PINS(92);
 401 DECLARE_MSM_GPIO_PINS(93);
 402 DECLARE_MSM_GPIO_PINS(94);
 403 DECLARE_MSM_GPIO_PINS(95);
 404 DECLARE_MSM_GPIO_PINS(96);
 405 DECLARE_MSM_GPIO_PINS(97);
 406 DECLARE_MSM_GPIO_PINS(98);
 407 DECLARE_MSM_GPIO_PINS(99);
 408 DECLARE_MSM_GPIO_PINS(100);
 409 DECLARE_MSM_GPIO_PINS(101);
 410 DECLARE_MSM_GPIO_PINS(102);
 411 DECLARE_MSM_GPIO_PINS(103);
 412 DECLARE_MSM_GPIO_PINS(104);
 413 DECLARE_MSM_GPIO_PINS(105);
 414 DECLARE_MSM_GPIO_PINS(106);
 415 DECLARE_MSM_GPIO_PINS(107);
 416 DECLARE_MSM_GPIO_PINS(108);
 417 DECLARE_MSM_GPIO_PINS(109);
 418 DECLARE_MSM_GPIO_PINS(110);
 419 DECLARE_MSM_GPIO_PINS(111);
 420 DECLARE_MSM_GPIO_PINS(112);
 421 DECLARE_MSM_GPIO_PINS(113);
 422 DECLARE_MSM_GPIO_PINS(114);
 423 DECLARE_MSM_GPIO_PINS(115);
 424 DECLARE_MSM_GPIO_PINS(116);
 425 DECLARE_MSM_GPIO_PINS(117);
 426 DECLARE_MSM_GPIO_PINS(118);
 427 DECLARE_MSM_GPIO_PINS(119);
 428 DECLARE_MSM_GPIO_PINS(120);
 429 DECLARE_MSM_GPIO_PINS(121);
 430 DECLARE_MSM_GPIO_PINS(122);
 431 DECLARE_MSM_GPIO_PINS(123);
 432 DECLARE_MSM_GPIO_PINS(124);
 433 DECLARE_MSM_GPIO_PINS(125);
 434 DECLARE_MSM_GPIO_PINS(126);
 435 DECLARE_MSM_GPIO_PINS(127);
 436 DECLARE_MSM_GPIO_PINS(128);
 437 DECLARE_MSM_GPIO_PINS(129);
 438 DECLARE_MSM_GPIO_PINS(130);
 439 DECLARE_MSM_GPIO_PINS(131);
 440 DECLARE_MSM_GPIO_PINS(132);
 441 DECLARE_MSM_GPIO_PINS(133);
 442 DECLARE_MSM_GPIO_PINS(134);
 443 DECLARE_MSM_GPIO_PINS(135);
 444 DECLARE_MSM_GPIO_PINS(136);
 445 DECLARE_MSM_GPIO_PINS(137);
 446 DECLARE_MSM_GPIO_PINS(138);
 447 DECLARE_MSM_GPIO_PINS(139);
 448 DECLARE_MSM_GPIO_PINS(140);
 449 DECLARE_MSM_GPIO_PINS(141);
 450 DECLARE_MSM_GPIO_PINS(142);
 451 DECLARE_MSM_GPIO_PINS(143);
 452 DECLARE_MSM_GPIO_PINS(144);
 453 DECLARE_MSM_GPIO_PINS(145);
 454 DECLARE_MSM_GPIO_PINS(146);
 455 DECLARE_MSM_GPIO_PINS(147);
 456 DECLARE_MSM_GPIO_PINS(148);
 457 DECLARE_MSM_GPIO_PINS(149);
 458 DECLARE_MSM_GPIO_PINS(150);
 459 DECLARE_MSM_GPIO_PINS(151);
 460 DECLARE_MSM_GPIO_PINS(152);
 461 DECLARE_MSM_GPIO_PINS(153);
 462 DECLARE_MSM_GPIO_PINS(154);
 463 DECLARE_MSM_GPIO_PINS(155);
 464 DECLARE_MSM_GPIO_PINS(156);
 465 DECLARE_MSM_GPIO_PINS(157);
 466 DECLARE_MSM_GPIO_PINS(158);
 467 DECLARE_MSM_GPIO_PINS(159);
 468 DECLARE_MSM_GPIO_PINS(160);
 469 DECLARE_MSM_GPIO_PINS(161);
 470 DECLARE_MSM_GPIO_PINS(162);
 471 DECLARE_MSM_GPIO_PINS(163);
 472 DECLARE_MSM_GPIO_PINS(164);
 473 DECLARE_MSM_GPIO_PINS(165);
 474 DECLARE_MSM_GPIO_PINS(166);
 475 DECLARE_MSM_GPIO_PINS(167);
 476 DECLARE_MSM_GPIO_PINS(168);
 477 DECLARE_MSM_GPIO_PINS(169);
 478 DECLARE_MSM_GPIO_PINS(170);
 479 DECLARE_MSM_GPIO_PINS(171);
 480 DECLARE_MSM_GPIO_PINS(172);
 481 DECLARE_MSM_GPIO_PINS(173);
 482 DECLARE_MSM_GPIO_PINS(174);
 483 
 484 static const unsigned int ufs_reset_pins[] = { 175 };
 485 static const unsigned int sdc2_clk_pins[] = { 176 };
 486 static const unsigned int sdc2_cmd_pins[] = { 177 };
 487 static const unsigned int sdc2_data_pins[] = { 178 };
 488 
 489 enum sm8150_functions {
 490         msm_mux_adsp_ext,
 491         msm_mux_agera_pll,
 492         msm_mux_aoss_cti,
 493         msm_mux_atest_char,
 494         msm_mux_atest_char0,
 495         msm_mux_atest_char1,
 496         msm_mux_atest_char2,
 497         msm_mux_atest_char3,
 498         msm_mux_atest_usb1,
 499         msm_mux_atest_usb2,
 500         msm_mux_atest_usb10,
 501         msm_mux_atest_usb11,
 502         msm_mux_atest_usb12,
 503         msm_mux_atest_usb13,
 504         msm_mux_atest_usb20,
 505         msm_mux_atest_usb21,
 506         msm_mux_atest_usb22,
 507         msm_mux_atest_usb23,
 508         msm_mux_audio_ref,
 509         msm_mux_btfm_slimbus,
 510         msm_mux_cam_mclk,
 511         msm_mux_cci_async,
 512         msm_mux_cci_i2c,
 513         msm_mux_cci_timer0,
 514         msm_mux_cci_timer1,
 515         msm_mux_cci_timer2,
 516         msm_mux_cci_timer3,
 517         msm_mux_cci_timer4,
 518         msm_mux_cri_trng,
 519         msm_mux_cri_trng0,
 520         msm_mux_cri_trng1,
 521         msm_mux_dbg_out,
 522         msm_mux_ddr_bist,
 523         msm_mux_ddr_pxi0,
 524         msm_mux_ddr_pxi1,
 525         msm_mux_ddr_pxi2,
 526         msm_mux_ddr_pxi3,
 527         msm_mux_edp_hot,
 528         msm_mux_edp_lcd,
 529         msm_mux_emac_phy,
 530         msm_mux_emac_pps,
 531         msm_mux_gcc_gp1,
 532         msm_mux_gcc_gp2,
 533         msm_mux_gcc_gp3,
 534         msm_mux_gpio,
 535         msm_mux_jitter_bist,
 536         msm_mux_hs1_mi2s,
 537         msm_mux_hs2_mi2s,
 538         msm_mux_hs3_mi2s,
 539         msm_mux_lpass_slimbus,
 540         msm_mux_mdp_vsync,
 541         msm_mux_mdp_vsync0,
 542         msm_mux_mdp_vsync1,
 543         msm_mux_mdp_vsync2,
 544         msm_mux_mdp_vsync3,
 545         msm_mux_mss_lte,
 546         msm_mux_m_voc,
 547         msm_mux_nav_pps,
 548         msm_mux_pa_indicator,
 549         msm_mux_pci_e0,
 550         msm_mux_pci_e1,
 551         msm_mux_phase_flag,
 552         msm_mux_pll_bist,
 553         msm_mux_pll_bypassnl,
 554         msm_mux_pll_reset,
 555         msm_mux_pri_mi2s,
 556         msm_mux_pri_mi2s_ws,
 557         msm_mux_prng_rosc,
 558         msm_mux_qdss,
 559         msm_mux_qdss_cti,
 560         msm_mux_qlink_enable,
 561         msm_mux_qlink_request,
 562         msm_mux_qspi0,
 563         msm_mux_qspi1,
 564         msm_mux_qspi2,
 565         msm_mux_qspi3,
 566         msm_mux_qspi_clk,
 567         msm_mux_qspi_cs,
 568         msm_mux_qua_mi2s,
 569         msm_mux_qup0,
 570         msm_mux_qup1,
 571         msm_mux_qup2,
 572         msm_mux_qup3,
 573         msm_mux_qup4,
 574         msm_mux_qup5,
 575         msm_mux_qup6,
 576         msm_mux_qup7,
 577         msm_mux_qup8,
 578         msm_mux_qup9,
 579         msm_mux_qup10,
 580         msm_mux_qup11,
 581         msm_mux_qup12,
 582         msm_mux_qup13,
 583         msm_mux_qup14,
 584         msm_mux_qup15,
 585         msm_mux_qup16,
 586         msm_mux_qup17,
 587         msm_mux_qup18,
 588         msm_mux_qup19,
 589         msm_mux_qup_l4,
 590         msm_mux_qup_l5,
 591         msm_mux_qup_l6,
 592         msm_mux_rgmii,
 593         msm_mux_sdc4,
 594         msm_mux_sd_write,
 595         msm_mux_sec_mi2s,
 596         msm_mux_spkr_i2s,
 597         msm_mux_sp_cmu,
 598         msm_mux_ter_mi2s,
 599         msm_mux_tgu_ch0,
 600         msm_mux_tgu_ch2,
 601         msm_mux_tgu_ch1,
 602         msm_mux_tgu_ch3,
 603         msm_mux_tsense_pwm1,
 604         msm_mux_tsense_pwm2,
 605         msm_mux_tsif1,
 606         msm_mux_tsif2,
 607         msm_mux_uim1,
 608         msm_mux_uim2,
 609         msm_mux_uim_batt,
 610         msm_mux_usb2phy_ac,
 611         msm_mux_usb_phy,
 612         msm_mux_vfr_1,
 613         msm_mux_vsense_trigger,
 614         msm_mux_wlan1_adc1,
 615         msm_mux_wlan1_adc0,
 616         msm_mux_wlan2_adc1,
 617         msm_mux_wlan2_adc0,
 618         msm_mux_wmss_reset,
 619         msm_mux__,
 620 };
 621 
 622 static const char * const phase_flag_groups[] = {
 623         "gpio18", "gpio19", "gpio20", "gpio55", "gpio56",
 624         "gpio57", "gpio59", "gpio64", "gpio68", "gpio76",
 625         "gpio79", "gpio80", "gpio90", "gpio91", "gpio92",
 626         "gpio93", "gpio94", "gpio96", "gpio114", "gpio115",
 627         "gpio116", "gpio117", "gpio118", "gpio119", "gpio120",
 628         "gpio121", "gpio122", "gpio126", "gpio127", "gpio128",
 629         "gpio144", "gpio145",
 630 };
 631 
 632 static const char * const emac_pps_groups[] = {
 633         "gpio81",
 634 };
 635 
 636 static const char * const qup12_groups[] = {
 637         "gpio83", "gpio84", "gpio85", "gpio86",
 638 };
 639 
 640 static const char * const qup16_groups[] = {
 641         "gpio83", "gpio84", "gpio85", "gpio86",
 642 };
 643 
 644 static const char * const tsif1_groups[] = {
 645         "gpio88", "gpio89", "gpio90", "gpio91", "gpio97",
 646 };
 647 
 648 static const char * const qup8_groups[] = {
 649         "gpio88", "gpio89", "gpio90", "gpio91",
 650 };
 651 
 652 static const char * const qspi_cs_groups[] = {
 653         "gpio88", "gpio94",
 654 };
 655 
 656 static const char * const tgu_ch3_groups[] = {
 657         "gpio88",
 658 };
 659 
 660 static const char * const qspi0_groups[] = {
 661         "gpio89",
 662 };
 663 
 664 static const char * const mdp_vsync0_groups[] = {
 665         "gpio89",
 666 };
 667 
 668 static const char * const mdp_vsync1_groups[] = {
 669         "gpio89",
 670 };
 671 
 672 static const char * const mdp_vsync2_groups[] = {
 673         "gpio89",
 674 };
 675 
 676 static const char * const mdp_vsync3_groups[] = {
 677         "gpio89",
 678 };
 679 
 680 static const char * const tgu_ch0_groups[] = {
 681         "gpio89",
 682 };
 683 
 684 static const char * const qspi1_groups[] = {
 685         "gpio90",
 686 };
 687 
 688 static const char * const sdc4_groups[] = {
 689         "gpio90", "gpio91", "gpio92", "gpio93", "gpio94", "gpio95",
 690 };
 691 
 692 static const char * const tgu_ch1_groups[] = {
 693         "gpio90",
 694 };
 695 
 696 static const char * const wlan1_adc1_groups[] = {
 697         "gpio90",
 698 };
 699 
 700 static const char * const qspi2_groups[] = {
 701         "gpio91",
 702 };
 703 
 704 static const char * const vfr_1_groups[] = {
 705         "gpio91",
 706 };
 707 
 708 static const char * const tgu_ch2_groups[] = {
 709         "gpio91",
 710 };
 711 
 712 static const char * const wlan1_adc0_groups[] = {
 713         "gpio91",
 714 };
 715 
 716 static const char * const tsif2_groups[] = {
 717         "gpio92", "gpio93", "gpio94", "gpio95", "gpio96",
 718 };
 719 
 720 static const char * const qup11_groups[] = {
 721         "gpio92", "gpio93", "gpio94", "gpio95",
 722 };
 723 
 724 static const char * const qspi_clk_groups[] = {
 725         "gpio92",
 726 };
 727 
 728 static const char * const wlan2_adc1_groups[] = {
 729         "gpio92",
 730 };
 731 
 732 static const char * const qspi3_groups[] = {
 733         "gpio93",
 734 };
 735 
 736 static const char * const wlan2_adc0_groups[] = {
 737         "gpio93",
 738 };
 739 
 740 static const char * const sd_write_groups[] = {
 741         "gpio97",
 742 };
 743 
 744 static const char * const qup7_groups[] = {
 745         "gpio98", "gpio99", "gpio100", "gpio101",
 746 };
 747 
 748 static const char * const ddr_bist_groups[] = {
 749         "gpio98", "gpio99", "gpio145", "gpio146",
 750 };
 751 
 752 static const char * const ddr_pxi3_groups[] = {
 753         "gpio98", "gpio101",
 754 };
 755 
 756 static const char * const atest_usb13_groups[] = {
 757         "gpio99",
 758 };
 759 
 760 static const char * const ddr_pxi1_groups[] = {
 761         "gpio99", "gpio100",
 762 };
 763 
 764 static const char * const pll_bypassnl_groups[] = {
 765         "gpio100",
 766 };
 767 
 768 static const char * const atest_usb12_groups[] = {
 769         "gpio100",
 770 };
 771 
 772 static const char * const pll_reset_groups[] = {
 773         "gpio101",
 774 };
 775 
 776 static const char * const pci_e1_groups[] = {
 777         "gpio102", "gpio103",
 778 };
 779 
 780 static const char * const uim2_groups[] = {
 781         "gpio105", "gpio106", "gpio107", "gpio108",
 782 };
 783 
 784 static const char * const uim1_groups[] = {
 785         "gpio109", "gpio110", "gpio111", "gpio112",
 786 };
 787 
 788 static const char * const uim_batt_groups[] = {
 789         "gpio113",
 790 };
 791 
 792 static const char * const usb2phy_ac_groups[] = {
 793         "gpio113", "gpio123",
 794 };
 795 
 796 static const char * const aoss_cti_groups[] = {
 797         "gpio113",
 798 };
 799 
 800 static const char * const qup1_groups[] = {
 801         "gpio114", "gpio115", "gpio116", "gpio117",
 802 };
 803 
 804 static const char * const rgmii_groups[] = {
 805         "gpio4", "gpio5", "gpio6", "gpio7", "gpio59",
 806         "gpio114", "gpio115", "gpio116", "gpio117",
 807         "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
 808 };
 809 
 810 static const char * const adsp_ext_groups[] = {
 811         "gpio115",
 812 };
 813 
 814 static const char * const qup5_groups[] = {
 815         "gpio119", "gpio120", "gpio121", "gpio122",
 816 };
 817 
 818 static const char * const atest_usb22_groups[] = {
 819         "gpio123",
 820 };
 821 
 822 static const char * const emac_phy_groups[] = {
 823         "gpio124",
 824 };
 825 
 826 static const char * const hs3_mi2s_groups[] = {
 827         "gpio125", "gpio165", "gpio166", "gpio167", "gpio168",
 828 };
 829 
 830 static const char * const sec_mi2s_groups[] = {
 831         "gpio126", "gpio127", "gpio128", "gpio129", "gpio130",
 832 };
 833 
 834 static const char * const qup2_groups[] = {
 835         "gpio126", "gpio127", "gpio128", "gpio129",
 836 };
 837 
 838 static const char * const jitter_bist_groups[] = {
 839         "gpio129",
 840 };
 841 
 842 static const char * const atest_usb21_groups[] = {
 843         "gpio129",
 844 };
 845 
 846 static const char * const pll_bist_groups[] = {
 847         "gpio130",
 848 };
 849 
 850 static const char * const atest_usb20_groups[] = {
 851         "gpio130",
 852 };
 853 
 854 static const char * const atest_char0_groups[] = {
 855         "gpio130",
 856 };
 857 
 858 static const char * const ter_mi2s_groups[] = {
 859         "gpio131", "gpio132", "gpio133", "gpio134", "gpio135",
 860 };
 861 
 862 static const char * const gcc_gp1_groups[] = {
 863         "gpio131", "gpio136",
 864 };
 865 
 866 static const char * const atest_char1_groups[] = {
 867         "gpio133",
 868 };
 869 
 870 static const char * const atest_char2_groups[] = {
 871         "gpio134",
 872 };
 873 
 874 static const char * const atest_char3_groups[] = {
 875         "gpio135",
 876 };
 877 
 878 static const char * const qua_mi2s_groups[] = {
 879         "gpio136", "gpio137", "gpio138", "gpio139", "gpio140", "gpio141",
 880         "gpio142",
 881 };
 882 
 883 static const char * const pri_mi2s_groups[] = {
 884         "gpio143", "gpio144", "gpio146", "gpio147",
 885 };
 886 
 887 static const char * const qup3_groups[] = {
 888         "gpio144", "gpio145", "gpio146", "gpio147",
 889 };
 890 
 891 static const char * const ddr_pxi0_groups[] = {
 892         "gpio144", "gpio145",
 893 };
 894 
 895 static const char * const pri_mi2s_ws_groups[] = {
 896         "gpio145",
 897 };
 898 
 899 static const char * const vsense_trigger_groups[] = {
 900         "gpio145",
 901 };
 902 
 903 static const char * const atest_usb1_groups[] = {
 904         "gpio145",
 905 };
 906 
 907 static const char * const atest_usb11_groups[] = {
 908         "gpio146",
 909 };
 910 
 911 static const char * const ddr_pxi2_groups[] = {
 912         "gpio146", "gpio147",
 913 };
 914 
 915 static const char * const dbg_out_groups[] = {
 916         "gpio147",
 917 };
 918 
 919 static const char * const atest_usb10_groups[] = {
 920         "gpio147",
 921 };
 922 
 923 static const char * const spkr_i2s_groups[] = {
 924         "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
 925 };
 926 
 927 static const char * const audio_ref_groups[] = {
 928         "gpio148",
 929 };
 930 
 931 static const char * const lpass_slimbus_groups[] = {
 932         "gpio149", "gpio150", "gpio151", "gpio152",
 933 };
 934 
 935 static const char * const tsense_pwm1_groups[] = {
 936         "gpio150",
 937 };
 938 
 939 static const char * const tsense_pwm2_groups[] = {
 940         "gpio150",
 941 };
 942 
 943 static const char * const btfm_slimbus_groups[] = {
 944         "gpio153", "gpio154",
 945 };
 946 
 947 static const char * const hs1_mi2s_groups[] = {
 948         "gpio155", "gpio156", "gpio157", "gpio158", "gpio159",
 949 };
 950 
 951 static const char * const cri_trng0_groups[] = {
 952         "gpio159",
 953 };
 954 
 955 static const char * const hs2_mi2s_groups[] = {
 956         "gpio160", "gpio161", "gpio162", "gpio163", "gpio164",
 957 };
 958 
 959 static const char * const cri_trng1_groups[] = {
 960         "gpio160",
 961 };
 962 
 963 static const char * const cri_trng_groups[] = {
 964         "gpio161",
 965 };
 966 
 967 static const char * const sp_cmu_groups[] = {
 968         "gpio162",
 969 };
 970 
 971 static const char * const prng_rosc_groups[] = {
 972         "gpio163",
 973 };
 974 
 975 static const char * const qup0_groups[] = {
 976         "gpio0", "gpio1", "gpio2", "gpio3",
 977 };
 978 
 979 static const char * const gpio_groups[] = {
 980         "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
 981         "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
 982         "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
 983         "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
 984         "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
 985         "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
 986         "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
 987         "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
 988         "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
 989         "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
 990         "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
 991         "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
 992         "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
 993         "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
 994         "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
 995         "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
 996         "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
 997         "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
 998         "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
 999         "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
1000         "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
1001         "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
1002         "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152",
1003         "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158",
1004         "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164",
1005         "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170",
1006         "gpio171", "gpio172", "gpio173", "gpio174",
1007 };
1008 
1009 static const char * const qup6_groups[] = {
1010         "gpio4", "gpio5", "gpio6", "gpio7",
1011 };
1012 
1013 static const char * const qup_l6_groups[] = {
1014         "gpio6", "gpio34", "gpio97", "gpio123",
1015 };
1016 
1017 static const char * const qup_l5_groups[] = {
1018         "gpio7", "gpio33", "gpio82", "gpio96",
1019 };
1020 
1021 static const char * const mdp_vsync_groups[] = {
1022         "gpio8", "gpio9", "gpio10", "gpio81", "gpio82",
1023 };
1024 
1025 static const char * const edp_lcd_groups[] = {
1026         "gpio9",
1027 };
1028 
1029 static const char * const qup10_groups[] = {
1030         "gpio9", "gpio10", "gpio11", "gpio12",
1031 };
1032 
1033 static const char * const m_voc_groups[] = {
1034         "gpio10",
1035 };
1036 
1037 static const char * const edp_hot_groups[] = {
1038         "gpio10",
1039 };
1040 
1041 static const char * const cam_mclk_groups[] = {
1042         "gpio13", "gpio14", "gpio15", "gpio16",
1043 };
1044 
1045 static const char * const qdss_groups[] = {
1046         "gpio13", "gpio14", "gpio15", "gpio16", "gpio17",
1047         "gpio18", "gpio19", "gpio20", "gpio21", "gpio22",
1048         "gpio23", "gpio24", "gpio25", "gpio26", "gpio27",
1049         "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
1050         "gpio33", "gpio39", "gpio40", "gpio41", "gpio42",
1051         "gpio47", "gpio48", "gpio83", "gpio117", "gpio118",
1052         "gpio119", "gpio120", "gpio121", "gpio132",
1053         "gpio133", "gpio134",
1054 };
1055 
1056 static const char * const cci_i2c_groups[] = {
1057         "gpio17", "gpio18", "gpio19", "gpio20", "gpio31", "gpio32", "gpio33",
1058         "gpio34",
1059 };
1060 
1061 static const char * const cci_timer0_groups[] = {
1062         "gpio21",
1063 };
1064 
1065 static const char * const gcc_gp2_groups[] = {
1066         "gpio21", "gpio137",
1067 };
1068 
1069 static const char * const cci_timer1_groups[] = {
1070         "gpio22",
1071 };
1072 
1073 static const char * const gcc_gp3_groups[] = {
1074         "gpio22", "gpio138",
1075 };
1076 
1077 static const char * const cci_timer2_groups[] = {
1078         "gpio23",
1079 };
1080 
1081 static const char * const qup18_groups[] = {
1082         "gpio23", "gpio24", "gpio25", "gpio26",
1083 };
1084 
1085 static const char * const cci_timer3_groups[] = {
1086         "gpio24",
1087 };
1088 
1089 static const char * const cci_async_groups[] = {
1090         "gpio24", "gpio25", "gpio26",
1091 };
1092 
1093 static const char * const cci_timer4_groups[] = {
1094         "gpio25",
1095 };
1096 
1097 static const char * const qup15_groups[] = {
1098         "gpio27", "gpio28", "gpio29", "gpio30",
1099 };
1100 
1101 static const char * const pci_e0_groups[] = {
1102         "gpio35", "gpio36",
1103 };
1104 
1105 static const char * const qup_l4_groups[] = {
1106         "gpio37", "gpio59", "gpio81", "gpio95",
1107 };
1108 
1109 static const char * const agera_pll_groups[] = {
1110         "gpio37",
1111 };
1112 
1113 static const char * const usb_phy_groups[] = {
1114         "gpio38",
1115 };
1116 
1117 static const char * const qup9_groups[] = {
1118         "gpio39", "gpio40", "gpio41", "gpio42",
1119 };
1120 
1121 static const char * const qup13_groups[] = {
1122         "gpio43", "gpio44", "gpio45", "gpio46",
1123 };
1124 
1125 static const char * const qdss_cti_groups[] = {
1126         "gpio45", "gpio46", "gpio49", "gpio50", "gpio56", "gpio57", "gpio58",
1127         "gpio58",
1128 };
1129 
1130 static const char * const qup14_groups[] = {
1131         "gpio47", "gpio48", "gpio49", "gpio50",
1132 };
1133 
1134 static const char * const qup4_groups[] = {
1135         "gpio51", "gpio52", "gpio53", "gpio54",
1136 };
1137 
1138 static const char * const qup17_groups[] = {
1139         "gpio55", "gpio56", "gpio57", "gpio58",
1140 };
1141 
1142 static const char * const qup19_groups[] = {
1143         "gpio55", "gpio56", "gpio57", "gpio58",
1144 };
1145 
1146 static const char * const atest_char_groups[] = {
1147         "gpio59",
1148 };
1149 
1150 static const char * const nav_pps_groups[] = {
1151         "gpio60", "gpio60", "gpio76", "gpio76", "gpio77", "gpio77", "gpio81",
1152         "gpio81", "gpio82", "gpio82",
1153 };
1154 
1155 static const char * const atest_usb2_groups[] = {
1156         "gpio60",
1157 };
1158 
1159 static const char * const qlink_request_groups[] = {
1160         "gpio61",
1161 };
1162 
1163 static const char * const qlink_enable_groups[] = {
1164         "gpio62",
1165 };
1166 
1167 static const char * const wmss_reset_groups[] = {
1168         "gpio63",
1169 };
1170 
1171 static const char * const atest_usb23_groups[] = {
1172         "gpio63",
1173 };
1174 
1175 static const char * const pa_indicator_groups[] = {
1176         "gpio68",
1177 };
1178 
1179 static const char * const mss_lte_groups[] = {
1180         "gpio69", "gpio70",
1181 };
1182 
1183 static const struct msm_function sm8150_functions[] = {
1184         FUNCTION(adsp_ext),
1185         FUNCTION(agera_pll),
1186         FUNCTION(aoss_cti),
1187         FUNCTION(ddr_pxi2),
1188         FUNCTION(atest_char),
1189         FUNCTION(atest_char0),
1190         FUNCTION(atest_char1),
1191         FUNCTION(atest_char2),
1192         FUNCTION(atest_char3),
1193         FUNCTION(audio_ref),
1194         FUNCTION(atest_usb1),
1195         FUNCTION(atest_usb2),
1196         FUNCTION(atest_usb10),
1197         FUNCTION(atest_usb11),
1198         FUNCTION(atest_usb12),
1199         FUNCTION(atest_usb13),
1200         FUNCTION(atest_usb20),
1201         FUNCTION(atest_usb21),
1202         FUNCTION(atest_usb22),
1203         FUNCTION(atest_usb23),
1204         FUNCTION(btfm_slimbus),
1205         FUNCTION(cam_mclk),
1206         FUNCTION(cci_async),
1207         FUNCTION(cci_i2c),
1208         FUNCTION(cci_timer0),
1209         FUNCTION(cci_timer1),
1210         FUNCTION(cci_timer2),
1211         FUNCTION(cci_timer3),
1212         FUNCTION(cci_timer4),
1213         FUNCTION(cri_trng),
1214         FUNCTION(cri_trng0),
1215         FUNCTION(cri_trng1),
1216         FUNCTION(dbg_out),
1217         FUNCTION(ddr_bist),
1218         FUNCTION(ddr_pxi0),
1219         FUNCTION(ddr_pxi1),
1220         FUNCTION(ddr_pxi3),
1221         FUNCTION(edp_hot),
1222         FUNCTION(edp_lcd),
1223         FUNCTION(emac_phy),
1224         FUNCTION(emac_pps),
1225         FUNCTION(gcc_gp1),
1226         FUNCTION(gcc_gp2),
1227         FUNCTION(gcc_gp3),
1228         FUNCTION(gpio),
1229         FUNCTION(hs1_mi2s),
1230         FUNCTION(hs2_mi2s),
1231         FUNCTION(hs3_mi2s),
1232         FUNCTION(jitter_bist),
1233         FUNCTION(lpass_slimbus),
1234         FUNCTION(mdp_vsync),
1235         FUNCTION(mdp_vsync0),
1236         FUNCTION(mdp_vsync1),
1237         FUNCTION(mdp_vsync2),
1238         FUNCTION(mdp_vsync3),
1239         FUNCTION(mss_lte),
1240         FUNCTION(m_voc),
1241         FUNCTION(nav_pps),
1242         FUNCTION(pa_indicator),
1243         FUNCTION(pci_e0),
1244         FUNCTION(phase_flag),
1245         FUNCTION(pll_bypassnl),
1246         FUNCTION(pll_bist),
1247         FUNCTION(pci_e1),
1248         FUNCTION(pll_reset),
1249         FUNCTION(pri_mi2s),
1250         FUNCTION(pri_mi2s_ws),
1251         FUNCTION(prng_rosc),
1252         FUNCTION(qdss),
1253         FUNCTION(qdss_cti),
1254         FUNCTION(qlink_request),
1255         FUNCTION(qlink_enable),
1256         FUNCTION(qspi0),
1257         FUNCTION(qspi1),
1258         FUNCTION(qspi2),
1259         FUNCTION(qspi3),
1260         FUNCTION(qspi_clk),
1261         FUNCTION(qspi_cs),
1262         FUNCTION(qua_mi2s),
1263         FUNCTION(qup0),
1264         FUNCTION(qup1),
1265         FUNCTION(qup2),
1266         FUNCTION(qup3),
1267         FUNCTION(qup4),
1268         FUNCTION(qup5),
1269         FUNCTION(qup6),
1270         FUNCTION(qup7),
1271         FUNCTION(qup8),
1272         FUNCTION(qup9),
1273         FUNCTION(qup10),
1274         FUNCTION(qup11),
1275         FUNCTION(qup12),
1276         FUNCTION(qup13),
1277         FUNCTION(qup14),
1278         FUNCTION(qup15),
1279         FUNCTION(qup16),
1280         FUNCTION(qup17),
1281         FUNCTION(qup18),
1282         FUNCTION(qup19),
1283         FUNCTION(qup_l4),
1284         FUNCTION(qup_l5),
1285         FUNCTION(qup_l6),
1286         FUNCTION(rgmii),
1287         FUNCTION(sdc4),
1288         FUNCTION(sd_write),
1289         FUNCTION(sec_mi2s),
1290         FUNCTION(spkr_i2s),
1291         FUNCTION(sp_cmu),
1292         FUNCTION(ter_mi2s),
1293         FUNCTION(tgu_ch0),
1294         FUNCTION(tgu_ch1),
1295         FUNCTION(tgu_ch2),
1296         FUNCTION(tgu_ch3),
1297         FUNCTION(tsense_pwm1),
1298         FUNCTION(tsense_pwm2),
1299         FUNCTION(tsif1),
1300         FUNCTION(tsif2),
1301         FUNCTION(uim1),
1302         FUNCTION(uim2),
1303         FUNCTION(uim_batt),
1304         FUNCTION(usb2phy_ac),
1305         FUNCTION(usb_phy),
1306         FUNCTION(vfr_1),
1307         FUNCTION(vsense_trigger),
1308         FUNCTION(wlan1_adc0),
1309         FUNCTION(wlan1_adc1),
1310         FUNCTION(wlan2_adc0),
1311         FUNCTION(wlan2_adc1),
1312         FUNCTION(wmss_reset),
1313 };
1314 
1315 /*
1316  * Every pin is maintained as a single group, and missing or non-existing pin
1317  * would be maintained as dummy group to synchronize pin group index with
1318  * pin descriptor registered with pinctrl core.
1319  * Clients would not be able to request these dummy pin groups.
1320  */
1321 static const struct msm_pingroup sm8150_groups[] = {
1322         [0] = PINGROUP(0, SOUTH, qup0, _, _, _, _, _, _, _, _),
1323         [1] = PINGROUP(1, SOUTH, qup0, _, _, _, _, _, _, _, _),
1324         [2] = PINGROUP(2, SOUTH, qup0, _, _, _, _, _, _, _, _),
1325         [3] = PINGROUP(3, SOUTH, qup0, _, _, _, _, _, _, _, _),
1326         [4] = PINGROUP(4, SOUTH, qup6, rgmii, _, _, _, _, _, _, _),
1327         [5] = PINGROUP(5, SOUTH, qup6, rgmii, _, _, _, _, _, _, _),
1328         [6] = PINGROUP(6, SOUTH, qup6, rgmii, qup_l6, _, _, _, _, _, _),
1329         [7] = PINGROUP(7, SOUTH, qup6, rgmii, qup_l5, _, _, _, _, _, _),
1330         [8] = PINGROUP(8, NORTH, mdp_vsync, _, _, _, _, _, _, _, _),
1331         [9] = PINGROUP(9, NORTH, mdp_vsync, edp_lcd, qup10, _, _, _, _, _, _),
1332         [10] = PINGROUP(10, NORTH, mdp_vsync, m_voc, edp_hot, qup10, _, _, _, _, _),
1333         [11] = PINGROUP(11, NORTH, qup10, _, _, _, _, _, _, _, _),
1334         [12] = PINGROUP(12, NORTH, qup10, _, _, _, _, _, _, _, _),
1335         [13] = PINGROUP(13, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _),
1336         [14] = PINGROUP(14, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _),
1337         [15] = PINGROUP(15, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _),
1338         [16] = PINGROUP(16, NORTH, cam_mclk, qdss, _, _, _, _, _, _, _),
1339         [17] = PINGROUP(17, NORTH, cci_i2c, qdss, _, _, _, _, _, _, _),
1340         [18] = PINGROUP(18, NORTH, cci_i2c, phase_flag, _, qdss, _, _, _, _, _),
1341         [19] = PINGROUP(19, NORTH, cci_i2c, phase_flag, _, qdss, _, _, _, _, _),
1342         [20] = PINGROUP(20, NORTH, cci_i2c, phase_flag, _, qdss, _, _, _, _, _),
1343         [21] = PINGROUP(21, EAST, cci_timer0, gcc_gp2, qdss, _, _, _, _, _, _),
1344         [22] = PINGROUP(22, EAST, cci_timer1, gcc_gp3, qdss, _, _, _, _, _, _),
1345         [23] = PINGROUP(23, EAST, cci_timer2, qup18, qdss, _, _, _, _, _, _),
1346         [24] = PINGROUP(24, EAST, cci_timer3, cci_async, qup18, qdss, _, _, _, _, _),
1347         [25] = PINGROUP(25, EAST, cci_timer4, cci_async, qup18, qdss, _, _, _, _, _),
1348         [26] = PINGROUP(26, EAST, cci_async, qup18, qdss, _, _, _, _, _, _),
1349         [27] = PINGROUP(27, EAST, qup15, _, qdss, _, _, _, _, _, _),
1350         [28] = PINGROUP(28, EAST, qup15, qdss, _, _, _, _, _, _, _),
1351         [29] = PINGROUP(29, EAST, qup15, qdss, _, _, _, _, _, _, _),
1352         [30] = PINGROUP(30, EAST, qup15, qdss, _, _, _, _, _, _, _),
1353         [31] = PINGROUP(31, NORTH, cci_i2c, qdss, _, _, _, _, _, _, _),
1354         [32] = PINGROUP(32, NORTH, cci_i2c, qdss, _, _, _, _, _, _, _),
1355         [33] = PINGROUP(33, NORTH, cci_i2c, qup_l5, qdss, _, _, _, _, _, _),
1356         [34] = PINGROUP(34, NORTH, cci_i2c, qup_l6, _, _, _, _, _, _, _),
1357         [35] = PINGROUP(35, NORTH, pci_e0, _, _, _, _, _, _, _, _),
1358         [36] = PINGROUP(36, NORTH, pci_e0, _, _, _, _, _, _, _, _),
1359         [37] = PINGROUP(37, NORTH, qup_l4, agera_pll, _, _, _, _, _, _, _),
1360         [38] = PINGROUP(38, SOUTH, usb_phy, _, _, _, _, _, _, _, _),
1361         [39] = PINGROUP(39, NORTH, qup9, qdss, _, _, _, _, _, _, _),
1362         [40] = PINGROUP(40, NORTH, qup9, qdss, _, _, _, _, _, _, _),
1363         [41] = PINGROUP(41, NORTH, qup9, qdss, _, _, _, _, _, _, _),
1364         [42] = PINGROUP(42, NORTH, qup9, qdss, _, _, _, _, _, _, _),
1365         [43] = PINGROUP(43, EAST, qup13, _, _, _, _, _, _, _, _),
1366         [44] = PINGROUP(44, EAST, qup13, _, _, _, _, _, _, _, _),
1367         [45] = PINGROUP(45, EAST, qup13, qdss_cti, _, _, _, _, _, _, _),
1368         [46] = PINGROUP(46, EAST, qup13, qdss_cti, _, _, _, _, _, _, _),
1369         [47] = PINGROUP(47, EAST, qup14, qdss, _, _, _, _, _, _, _),
1370         [48] = PINGROUP(48, EAST, qup14, qdss, _, _, _, _, _, _, _),
1371         [49] = PINGROUP(49, EAST, qup14, _, qdss_cti, _, _, _, _, _, _),
1372         [50] = PINGROUP(50, EAST, qup14, qdss_cti, _, _, _, _, _, _, _),
1373         [51] = PINGROUP(51, SOUTH, qup4, _, _, _, _, _, _, _, _),
1374         [52] = PINGROUP(52, SOUTH, qup4, _, _, _, _, _, _, _, _),
1375         [53] = PINGROUP(53, SOUTH, qup4, _, _, _, _, _, _, _, _),
1376         [54] = PINGROUP(54, SOUTH, qup4, _, _, _, _, _, _, _, _),
1377         [55] = PINGROUP(55, SOUTH, qup17, qup19, phase_flag, _, _, _, _, _, _),
1378         [56] = PINGROUP(56, SOUTH, qup17, qup19, qdss_cti, phase_flag, _, _, _, _, _),
1379         [57] = PINGROUP(57, SOUTH, qup17, qup19, qdss_cti, phase_flag, _, _, _, _, _),
1380         [58] = PINGROUP(58, SOUTH, qup17, qup19, qdss_cti, phase_flag, _, _, _, _, _),
1381         [59] = PINGROUP(59, SOUTH, rgmii, qup_l4, phase_flag, _, atest_char, _, _, _, _),
1382         [60] = PINGROUP(60, SOUTH, _, nav_pps, nav_pps, atest_usb2, _, _, _, _, _),
1383         [61] = PINGROUP(61, SOUTH, qlink_request, _, _, _, _, _, _, _, _),
1384         [62] = PINGROUP(62, SOUTH, qlink_enable, _, _, _, _, _, _, _, _),
1385         [63] = PINGROUP(63, SOUTH, wmss_reset, atest_usb23, _, _, _, _, _, _, _),
1386         [64] = PINGROUP(64, SOUTH, _, phase_flag, _, _, _, _, _, _, _),
1387         [65] = PINGROUP(65, SOUTH, _, _, _, _, _, _, _, _, _),
1388         [66] = PINGROUP(66, SOUTH, _, _, _, _, _, _, _, _, _),
1389         [67] = PINGROUP(67, SOUTH, _, _, _, _, _, _, _, _, _),
1390         [68] = PINGROUP(68, SOUTH, _, pa_indicator, phase_flag, _, _, _, _, _, _),
1391         [69] = PINGROUP(69, SOUTH, mss_lte, _, _, _, _, _, _, _, _),
1392         [70] = PINGROUP(70, SOUTH, mss_lte, _, _, _, _, _, _, _, _),
1393         [71] = PINGROUP(71, SOUTH, _, _, _, _, _, _, _, _, _),
1394         [72] = PINGROUP(72, SOUTH, _, _, _, _, _, _, _, _, _),
1395         [73] = PINGROUP(73, SOUTH, _, _, _, _, _, _, _, _, _),
1396         [74] = PINGROUP(74, SOUTH, _, _, _, _, _, _, _, _, _),
1397         [75] = PINGROUP(75, SOUTH, _, _, _, _, _, _, _, _, _),
1398         [76] = PINGROUP(76, SOUTH, _, _, _, nav_pps, nav_pps, phase_flag, _, _, _),
1399         [77] = PINGROUP(77, SOUTH, _, _, _, nav_pps, nav_pps, _, _, _, _),
1400         [78] = PINGROUP(78, SOUTH, _, _, _, _, _, _, _, _, _),
1401         [79] = PINGROUP(79, SOUTH, _, _, phase_flag, _, _, _, _, _, _),
1402         [80] = PINGROUP(80, SOUTH, _, _, phase_flag, _, _, _, _, _, _),
1403         [81] = PINGROUP(81, SOUTH, _, _, _, nav_pps, nav_pps, qup_l4, mdp_vsync, emac_pps, _),
1404         [82] = PINGROUP(82, SOUTH, _, _, _, nav_pps, nav_pps, qup_l5, mdp_vsync, _, _),
1405         [83] = PINGROUP(83, NORTH, qup12, qup16, _, qdss, _, _, _, _, _),
1406         [84] = PINGROUP(84, NORTH, qup12, qup16, _, _, _, _, _, _, _),
1407         [85] = PINGROUP(85, NORTH, qup12, qup16, _, _, _, _, _, _, _),
1408         [86] = PINGROUP(86, NORTH, qup12, qup16, _, _, _, _, _, _, _),
1409         [87] = PINGROUP(87, EAST, _, _, _, _, _, _, _, _, _),
1410         [88] = PINGROUP(88, NORTH, tsif1, qup8, qspi_cs, tgu_ch3, _, _, _, _, _),
1411         [89] = PINGROUP(89, NORTH, tsif1, qup8, qspi0, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, tgu_ch0, _),
1412         [90] = PINGROUP(90, NORTH, tsif1, qup8, qspi1, sdc4, phase_flag, tgu_ch1, _, _, wlan1_adc1),
1413         [91] = PINGROUP(91, NORTH, tsif1, qup8, qspi2, sdc4, vfr_1, phase_flag, tgu_ch2, _, _),
1414         [92] = PINGROUP(92, NORTH, tsif2, qup11, qspi_clk, sdc4, phase_flag, _, wlan2_adc1, _, _),
1415         [93] = PINGROUP(93, NORTH, tsif2, qup11, qspi3, sdc4, phase_flag, _, wlan2_adc0, _, _),
1416         [94] = PINGROUP(94, NORTH, tsif2, qup11, qspi_cs, sdc4, phase_flag, _, _, _, _),
1417         [95] = PINGROUP(95, NORTH, tsif2, qup11, sdc4, qup_l4, _, _, _, _, _),
1418         [96] = PINGROUP(96, NORTH, tsif2, qup_l5, phase_flag, _, _, _, _, _, _),
1419         [97] = PINGROUP(97, NORTH, sd_write, tsif1, qup_l6, _, _, _, _, _, _),
1420         [98] = PINGROUP(98, SOUTH, qup7, ddr_bist, ddr_pxi3, _, _, _, _, _, _),
1421         [99] = PINGROUP(99, SOUTH, qup7, ddr_bist, atest_usb13, ddr_pxi1, _, _, _, _, _),
1422         [100] = PINGROUP(100, SOUTH, qup7, pll_bypassnl, atest_usb12, ddr_pxi1, _, _, _, _, _),
1423         [101] = PINGROUP(101, SOUTH, qup7, pll_reset, ddr_pxi3, _, _, _, _, _, _),
1424         [102] = PINGROUP(102, NORTH, pci_e1, _, _, _, _, _, _, _, _),
1425         [103] = PINGROUP(103, NORTH, pci_e1, _, _, _, _, _, _, _, _),
1426         [104] = PINGROUP(104, NORTH, _, _, _, _, _, _, _, _, _),
1427         [105] = PINGROUP(105, WEST, uim2, _, _, _, _, _, _, _, _),
1428         [106] = PINGROUP(106, WEST, uim2, _, _, _, _, _, _, _, _),
1429         [107] = PINGROUP(107, WEST, uim2, _, _, _, _, _, _, _, _),
1430         [108] = PINGROUP(108, WEST, uim2, _, _, _, _, _, _, _, _),
1431         [109] = PINGROUP(109, WEST, uim1, _, _, _, _, _, _, _, _),
1432         [110] = PINGROUP(110, WEST, uim1, _, _, _, _, _, _, _, _),
1433         [111] = PINGROUP(111, WEST, uim1, _, _, _, _, _, _, _, _),
1434         [112] = PINGROUP(112, WEST, uim1, _, _, _, _, _, _, _, _),
1435         [113] = PINGROUP(113, WEST, uim_batt, usb2phy_ac, aoss_cti, _, _, _, _, _, _),
1436         [114] = PINGROUP(114, SOUTH, qup1, rgmii, phase_flag, _, _, _, _, _, _),
1437         [115] = PINGROUP(115, SOUTH, qup1, rgmii, phase_flag, adsp_ext, _, _, _, _, _),
1438         [116] = PINGROUP(116, SOUTH, qup1, rgmii, phase_flag, _, _, _, _, _, _),
1439         [117] = PINGROUP(117, SOUTH, qup1, rgmii, phase_flag, _, qdss, _, _, _, _),
1440         [118] = PINGROUP(118, SOUTH, rgmii, phase_flag, _, qdss, _, _, _, _, _),
1441         [119] = PINGROUP(119, SOUTH, qup5, rgmii, phase_flag, _, qdss, _, _, _, _),
1442         [120] = PINGROUP(120, SOUTH, qup5, rgmii, phase_flag, _, qdss, _, _, _, _),
1443         [121] = PINGROUP(121, SOUTH, qup5, rgmii, phase_flag, _, qdss, _, _, _, _),
1444         [122] = PINGROUP(122, SOUTH, qup5, rgmii, phase_flag, _, _, _, _, _, _),
1445         [123] = PINGROUP(123, SOUTH, usb2phy_ac, qup_l6, atest_usb22, _, _, _, _, _, _),
1446         [124] = PINGROUP(124, SOUTH, emac_phy, _, _, _, _, _, _, _, _),
1447         [125] = PINGROUP(125, WEST, hs3_mi2s, _, _, _, _, _, _, _, _),
1448         [126] = PINGROUP(126, SOUTH, sec_mi2s, qup2, phase_flag, _, _, _, _, _, _),
1449         [127] = PINGROUP(127, SOUTH, sec_mi2s, qup2, phase_flag, _, _, _, _, _, _),
1450         [128] = PINGROUP(128, SOUTH, sec_mi2s, qup2, phase_flag, _, _, _, _, _, _),
1451         [129] = PINGROUP(129, SOUTH, sec_mi2s, qup2, jitter_bist, atest_usb21, _, _, _, _, _),
1452         [130] = PINGROUP(130, SOUTH, sec_mi2s, pll_bist, atest_usb20, atest_char0, _, _, _, _, _),
1453         [131] = PINGROUP(131, SOUTH, ter_mi2s, gcc_gp1, _, _, _, _, _, _, _),
1454         [132] = PINGROUP(132, SOUTH, ter_mi2s, _, qdss, _, _, _, _, _, _),
1455         [133] = PINGROUP(133, SOUTH, ter_mi2s, qdss, atest_char1, _, _, _, _, _, _),
1456         [134] = PINGROUP(134, SOUTH, ter_mi2s, qdss, atest_char2, _, _, _, _, _, _),
1457         [135] = PINGROUP(135, SOUTH, ter_mi2s, atest_char3, _, _, _, _, _, _, _),
1458         [136] = PINGROUP(136, SOUTH, qua_mi2s, gcc_gp1, _, _, _, _, _, _, _),
1459         [137] = PINGROUP(137, SOUTH, qua_mi2s, gcc_gp2, _, _, _, _, _, _, _),
1460         [138] = PINGROUP(138, SOUTH, qua_mi2s, gcc_gp3, _, _, _, _, _, _, _),
1461         [139] = PINGROUP(139, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _),
1462         [140] = PINGROUP(140, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _),
1463         [141] = PINGROUP(141, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _),
1464         [142] = PINGROUP(142, SOUTH, qua_mi2s, _, _, _, _, _, _, _, _),
1465         [143] = PINGROUP(143, SOUTH, pri_mi2s, _, _, _, _, _, _, _, _),
1466         [144] = PINGROUP(144, SOUTH, pri_mi2s, qup3, phase_flag, _, ddr_pxi0, _, _, _, _),
1467         [145] = PINGROUP(145, SOUTH, pri_mi2s_ws, qup3, phase_flag, ddr_bist, _, vsense_trigger, atest_usb1, ddr_pxi0, _),
1468         [146] = PINGROUP(146, SOUTH, pri_mi2s, qup3, ddr_bist, atest_usb11, ddr_pxi2, _, _, _, _),
1469         [147] = PINGROUP(147, SOUTH, pri_mi2s, qup3, dbg_out, atest_usb10, ddr_pxi2, _, _, _, _),
1470         [148] = PINGROUP(148, SOUTH, spkr_i2s, audio_ref, _, _, _, _, _, _, _),
1471         [149] = PINGROUP(149, SOUTH, lpass_slimbus, spkr_i2s, _, _, _, _, _, _, _),
1472         [150] = PINGROUP(150, SOUTH, lpass_slimbus, spkr_i2s, tsense_pwm1, tsense_pwm2, _, _, _, _, _),
1473         [151] = PINGROUP(151, SOUTH, lpass_slimbus, spkr_i2s, _, _, _, _, _, _, _),
1474         [152] = PINGROUP(152, SOUTH, lpass_slimbus, spkr_i2s, _, _, _, _, _, _, _),
1475         [153] = PINGROUP(153, SOUTH, btfm_slimbus, _, _, _, _, _, _, _, _),
1476         [154] = PINGROUP(154, SOUTH, btfm_slimbus, _, _, _, _, _, _, _, _),
1477         [155] = PINGROUP(155, WEST, hs1_mi2s, _, _, _, _, _, _, _, _),
1478         [156] = PINGROUP(156, WEST, hs1_mi2s, _, _, _, _, _, _, _, _),
1479         [157] = PINGROUP(157, WEST, hs1_mi2s, _, _, _, _, _, _, _, _),
1480         [158] = PINGROUP(158, WEST, hs1_mi2s, _, _, _, _, _, _, _, _),
1481         [159] = PINGROUP(159, WEST, hs1_mi2s, cri_trng0, _, _, _, _, _, _, _),
1482         [160] = PINGROUP(160, WEST, hs2_mi2s, cri_trng1, _, _, _, _, _, _, _),
1483         [161] = PINGROUP(161, WEST, hs2_mi2s, cri_trng, _, _, _, _, _, _, _),
1484         [162] = PINGROUP(162, WEST, hs2_mi2s, sp_cmu, _, _, _, _, _, _, _),
1485         [163] = PINGROUP(163, WEST, hs2_mi2s, prng_rosc, _, _, _, _, _, _, _),
1486         [164] = PINGROUP(164, WEST, hs2_mi2s, _, _, _, _, _, _, _, _),
1487         [165] = PINGROUP(165, WEST, hs3_mi2s, _, _, _, _, _, _, _, _),
1488         [166] = PINGROUP(166, WEST, hs3_mi2s, _, _, _, _, _, _, _, _),
1489         [167] = PINGROUP(167, WEST, hs3_mi2s, _, _, _, _, _, _, _, _),
1490         [168] = PINGROUP(168, WEST, hs3_mi2s, _, _, _, _, _, _, _, _),
1491         [169] = PINGROUP(169, NORTH, _, _, _, _, _, _, _, _, _),
1492         [170] = PINGROUP(170, NORTH, _, _, _, _, _, _, _, _, _),
1493         [171] = PINGROUP(171, NORTH, _, _, _, _, _, _, _, _, _),
1494         [172] = PINGROUP(172, NORTH, _, _, _, _, _, _, _, _, _),
1495         [173] = PINGROUP(173, NORTH, _, _, _, _, _, _, _, _, _),
1496         [174] = PINGROUP(174, NORTH, _, _, _, _, _, _, _, _, _),
1497         [175] = UFS_RESET(ufs_reset, 0xB6000),
1498         [176] = SDC_QDSD_PINGROUP(sdc2_clk, 0xB2000, 14, 6),
1499         [177] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xB2000, 11, 3),
1500         [178] = SDC_QDSD_PINGROUP(sdc2_data, 0xB2000, 9, 0),
1501 };
1502 
1503 static const struct msm_pinctrl_soc_data sm8150_pinctrl = {
1504         .pins = sm8150_pins,
1505         .npins = ARRAY_SIZE(sm8150_pins),
1506         .functions = sm8150_functions,
1507         .nfunctions = ARRAY_SIZE(sm8150_functions),
1508         .groups = sm8150_groups,
1509         .ngroups = ARRAY_SIZE(sm8150_groups),
1510         .ngpios = 176,
1511         .tiles = sm8150_tiles,
1512         .ntiles = ARRAY_SIZE(sm8150_tiles),
1513 };
1514 
1515 static int sm8150_pinctrl_probe(struct platform_device *pdev)
1516 {
1517         return msm_pinctrl_probe(pdev, &sm8150_pinctrl);
1518 }
1519 
1520 static const struct of_device_id sm8150_pinctrl_of_match[] = {
1521         { .compatible = "qcom,sm8150-pinctrl", },
1522         { },
1523 };
1524 
1525 static struct platform_driver sm8150_pinctrl_driver = {
1526         .driver = {
1527                 .name = "sm8150-pinctrl",
1528                 .of_match_table = sm8150_pinctrl_of_match,
1529         },
1530         .probe = sm8150_pinctrl_probe,
1531         .remove = msm_pinctrl_remove,
1532 };
1533 
1534 static int __init sm8150_pinctrl_init(void)
1535 {
1536         return platform_driver_register(&sm8150_pinctrl_driver);
1537 }
1538 arch_initcall(sm8150_pinctrl_init);
1539 
1540 static void __exit sm8150_pinctrl_exit(void)
1541 {
1542         platform_driver_unregister(&sm8150_pinctrl_driver);
1543 }
1544 module_exit(sm8150_pinctrl_exit);
1545 
1546 MODULE_DESCRIPTION("QTI sm8150 pinctrl driver");
1547 MODULE_LICENSE("GPL v2");
1548 MODULE_DEVICE_TABLE(of, sm8150_pinctrl_of_match);

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