This source file includes following definitions.
- armada_370_pinctrl_probe
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10 #include <linux/err.h>
11 #include <linux/init.h>
12 #include <linux/io.h>
13 #include <linux/platform_device.h>
14 #include <linux/clk.h>
15 #include <linux/of.h>
16 #include <linux/of_device.h>
17 #include <linux/pinctrl/pinctrl.h>
18
19 #include "pinctrl-mvebu.h"
20
21 static struct mvebu_mpp_mode mv88f6710_mpp_modes[] = {
22 MPP_MODE(0,
23 MPP_FUNCTION(0x0, "gpio", NULL),
24 MPP_FUNCTION(0x1, "uart0", "rxd")),
25 MPP_MODE(1,
26 MPP_FUNCTION(0x0, "gpo", NULL),
27 MPP_FUNCTION(0x1, "uart0", "txd")),
28 MPP_MODE(2,
29 MPP_FUNCTION(0x0, "gpio", NULL),
30 MPP_FUNCTION(0x1, "i2c0", "sck"),
31 MPP_FUNCTION(0x2, "uart0", "txd")),
32 MPP_MODE(3,
33 MPP_FUNCTION(0x0, "gpio", NULL),
34 MPP_FUNCTION(0x1, "i2c0", "sda"),
35 MPP_FUNCTION(0x2, "uart0", "rxd")),
36 MPP_MODE(4,
37 MPP_FUNCTION(0x0, "gpio", NULL),
38 MPP_FUNCTION(0x1, "vdd", "cpu-pd")),
39 MPP_MODE(5,
40 MPP_FUNCTION(0x0, "gpo", NULL),
41 MPP_FUNCTION(0x1, "ge0", "txclkout"),
42 MPP_FUNCTION(0x2, "uart1", "txd"),
43 MPP_FUNCTION(0x4, "spi1", "sck"),
44 MPP_FUNCTION(0x5, "audio", "mclk")),
45 MPP_MODE(6,
46 MPP_FUNCTION(0x0, "gpio", NULL),
47 MPP_FUNCTION(0x1, "ge0", "txd0"),
48 MPP_FUNCTION(0x2, "sata0", "prsnt"),
49 MPP_FUNCTION(0x4, "tdm", "rst"),
50 MPP_FUNCTION(0x5, "audio", "sdo")),
51 MPP_MODE(7,
52 MPP_FUNCTION(0x0, "gpo", NULL),
53 MPP_FUNCTION(0x1, "ge0", "txd1"),
54 MPP_FUNCTION(0x4, "tdm", "dtx"),
55 MPP_FUNCTION(0x5, "audio", "lrclk")),
56 MPP_MODE(8,
57 MPP_FUNCTION(0x0, "gpio", NULL),
58 MPP_FUNCTION(0x1, "ge0", "txd2"),
59 MPP_FUNCTION(0x2, "uart0", "rts"),
60 MPP_FUNCTION(0x4, "tdm", "drx"),
61 MPP_FUNCTION(0x5, "audio", "bclk")),
62 MPP_MODE(9,
63 MPP_FUNCTION(0x0, "gpo", NULL),
64 MPP_FUNCTION(0x1, "ge0", "txd3"),
65 MPP_FUNCTION(0x2, "uart1", "txd"),
66 MPP_FUNCTION(0x3, "sd0", "clk"),
67 MPP_FUNCTION(0x5, "audio", "spdifo")),
68 MPP_MODE(10,
69 MPP_FUNCTION(0x0, "gpio", NULL),
70 MPP_FUNCTION(0x1, "ge0", "txctl"),
71 MPP_FUNCTION(0x2, "uart0", "cts"),
72 MPP_FUNCTION(0x4, "tdm", "fsync"),
73 MPP_FUNCTION(0x5, "audio", "sdi")),
74 MPP_MODE(11,
75 MPP_FUNCTION(0x0, "gpio", NULL),
76 MPP_FUNCTION(0x1, "ge0", "rxd0"),
77 MPP_FUNCTION(0x2, "uart1", "rxd"),
78 MPP_FUNCTION(0x3, "sd0", "cmd"),
79 MPP_FUNCTION(0x4, "spi0", "cs1"),
80 MPP_FUNCTION(0x5, "sata1", "prsnt"),
81 MPP_FUNCTION(0x6, "spi1", "cs1")),
82 MPP_MODE(12,
83 MPP_FUNCTION(0x0, "gpio", NULL),
84 MPP_FUNCTION(0x1, "ge0", "rxd1"),
85 MPP_FUNCTION(0x2, "i2c1", "sda"),
86 MPP_FUNCTION(0x3, "sd0", "d0"),
87 MPP_FUNCTION(0x4, "spi1", "cs0"),
88 MPP_FUNCTION(0x5, "audio", "spdifi")),
89 MPP_MODE(13,
90 MPP_FUNCTION(0x0, "gpio", NULL),
91 MPP_FUNCTION(0x1, "ge0", "rxd2"),
92 MPP_FUNCTION(0x2, "i2c1", "sck"),
93 MPP_FUNCTION(0x3, "sd0", "d1"),
94 MPP_FUNCTION(0x4, "tdm", "pclk"),
95 MPP_FUNCTION(0x5, "audio", "rmclk")),
96 MPP_MODE(14,
97 MPP_FUNCTION(0x0, "gpio", NULL),
98 MPP_FUNCTION(0x1, "ge0", "rxd3"),
99 MPP_FUNCTION(0x2, "pcie", "clkreq0"),
100 MPP_FUNCTION(0x3, "sd0", "d2"),
101 MPP_FUNCTION(0x4, "spi1", "mosi"),
102 MPP_FUNCTION(0x5, "spi0", "cs2")),
103 MPP_MODE(15,
104 MPP_FUNCTION(0x0, "gpio", NULL),
105 MPP_FUNCTION(0x1, "ge0", "rxctl"),
106 MPP_FUNCTION(0x2, "pcie", "clkreq1"),
107 MPP_FUNCTION(0x3, "sd0", "d3"),
108 MPP_FUNCTION(0x4, "spi1", "miso"),
109 MPP_FUNCTION(0x5, "spi0", "cs3")),
110 MPP_MODE(16,
111 MPP_FUNCTION(0x0, "gpio", NULL),
112 MPP_FUNCTION(0x1, "ge0", "rxclk"),
113 MPP_FUNCTION(0x2, "uart1", "rxd"),
114 MPP_FUNCTION(0x4, "tdm", "int"),
115 MPP_FUNCTION(0x5, "audio", "extclk")),
116 MPP_MODE(17,
117 MPP_FUNCTION(0x0, "gpo", NULL),
118 MPP_FUNCTION(0x1, "ge", "mdc")),
119 MPP_MODE(18,
120 MPP_FUNCTION(0x0, "gpio", NULL),
121 MPP_FUNCTION(0x1, "ge", "mdio")),
122 MPP_MODE(19,
123 MPP_FUNCTION(0x0, "gpio", NULL),
124 MPP_FUNCTION(0x1, "ge0", "txclk"),
125 MPP_FUNCTION(0x2, "ge1", "txclkout"),
126 MPP_FUNCTION(0x4, "tdm", "pclk")),
127 MPP_MODE(20,
128 MPP_FUNCTION(0x0, "gpo", NULL),
129 MPP_FUNCTION(0x1, "ge0", "txd4"),
130 MPP_FUNCTION(0x2, "ge1", "txd0")),
131 MPP_MODE(21,
132 MPP_FUNCTION(0x0, "gpo", NULL),
133 MPP_FUNCTION(0x1, "ge0", "txd5"),
134 MPP_FUNCTION(0x2, "ge1", "txd1"),
135 MPP_FUNCTION(0x4, "uart1", "txd")),
136 MPP_MODE(22,
137 MPP_FUNCTION(0x0, "gpo", NULL),
138 MPP_FUNCTION(0x1, "ge0", "txd6"),
139 MPP_FUNCTION(0x2, "ge1", "txd2"),
140 MPP_FUNCTION(0x4, "uart0", "rts")),
141 MPP_MODE(23,
142 MPP_FUNCTION(0x0, "gpo", NULL),
143 MPP_FUNCTION(0x1, "ge0", "txd7"),
144 MPP_FUNCTION(0x2, "ge1", "txd3"),
145 MPP_FUNCTION(0x4, "spi1", "mosi")),
146 MPP_MODE(24,
147 MPP_FUNCTION(0x0, "gpio", NULL),
148 MPP_FUNCTION(0x1, "ge0", "col"),
149 MPP_FUNCTION(0x2, "ge1", "txctl"),
150 MPP_FUNCTION(0x4, "spi1", "cs0")),
151 MPP_MODE(25,
152 MPP_FUNCTION(0x0, "gpio", NULL),
153 MPP_FUNCTION(0x1, "ge0", "rxerr"),
154 MPP_FUNCTION(0x2, "ge1", "rxd0"),
155 MPP_FUNCTION(0x4, "uart1", "rxd")),
156 MPP_MODE(26,
157 MPP_FUNCTION(0x0, "gpio", NULL),
158 MPP_FUNCTION(0x1, "ge0", "crs"),
159 MPP_FUNCTION(0x2, "ge1", "rxd1"),
160 MPP_FUNCTION(0x4, "spi1", "miso")),
161 MPP_MODE(27,
162 MPP_FUNCTION(0x0, "gpio", NULL),
163 MPP_FUNCTION(0x1, "ge0", "rxd4"),
164 MPP_FUNCTION(0x2, "ge1", "rxd2"),
165 MPP_FUNCTION(0x4, "uart0", "cts")),
166 MPP_MODE(28,
167 MPP_FUNCTION(0x0, "gpio", NULL),
168 MPP_FUNCTION(0x1, "ge0", "rxd5"),
169 MPP_FUNCTION(0x2, "ge1", "rxd3")),
170 MPP_MODE(29,
171 MPP_FUNCTION(0x0, "gpio", NULL),
172 MPP_FUNCTION(0x1, "ge0", "rxd6"),
173 MPP_FUNCTION(0x2, "ge1", "rxctl"),
174 MPP_FUNCTION(0x4, "i2c1", "sda")),
175 MPP_MODE(30,
176 MPP_FUNCTION(0x0, "gpio", NULL),
177 MPP_FUNCTION(0x1, "ge0", "rxd7"),
178 MPP_FUNCTION(0x2, "ge1", "rxclk"),
179 MPP_FUNCTION(0x4, "i2c1", "sck")),
180 MPP_MODE(31,
181 MPP_FUNCTION(0x0, "gpio", NULL),
182 MPP_FUNCTION(0x3, "tclk", NULL),
183 MPP_FUNCTION(0x4, "ge0", "txerr")),
184 MPP_MODE(32,
185 MPP_FUNCTION(0x0, "gpio", NULL),
186 MPP_FUNCTION(0x1, "spi0", "cs0")),
187 MPP_MODE(33,
188 MPP_FUNCTION(0x0, "gpio", NULL),
189 MPP_FUNCTION(0x1, "dev", "bootcs"),
190 MPP_FUNCTION(0x2, "spi0", "cs0")),
191 MPP_MODE(34,
192 MPP_FUNCTION(0x0, "gpo", NULL),
193 MPP_FUNCTION(0x1, "dev", "we0"),
194 MPP_FUNCTION(0x2, "spi0", "mosi")),
195 MPP_MODE(35,
196 MPP_FUNCTION(0x0, "gpo", NULL),
197 MPP_FUNCTION(0x1, "dev", "oe"),
198 MPP_FUNCTION(0x2, "spi0", "sck")),
199 MPP_MODE(36,
200 MPP_FUNCTION(0x0, "gpo", NULL),
201 MPP_FUNCTION(0x1, "dev", "a1"),
202 MPP_FUNCTION(0x2, "spi0", "miso")),
203 MPP_MODE(37,
204 MPP_FUNCTION(0x0, "gpo", NULL),
205 MPP_FUNCTION(0x1, "dev", "a0"),
206 MPP_FUNCTION(0x2, "sata0", "prsnt")),
207 MPP_MODE(38,
208 MPP_FUNCTION(0x0, "gpio", NULL),
209 MPP_FUNCTION(0x1, "dev", "ready"),
210 MPP_FUNCTION(0x2, "uart1", "cts"),
211 MPP_FUNCTION(0x3, "uart0", "cts")),
212 MPP_MODE(39,
213 MPP_FUNCTION(0x0, "gpo", NULL),
214 MPP_FUNCTION(0x1, "dev", "ad0"),
215 MPP_FUNCTION(0x2, "audio", "spdifo")),
216 MPP_MODE(40,
217 MPP_FUNCTION(0x0, "gpio", NULL),
218 MPP_FUNCTION(0x1, "dev", "ad1"),
219 MPP_FUNCTION(0x2, "uart1", "rts"),
220 MPP_FUNCTION(0x3, "uart0", "rts")),
221 MPP_MODE(41,
222 MPP_FUNCTION(0x0, "gpio", NULL),
223 MPP_FUNCTION(0x1, "dev", "ad2"),
224 MPP_FUNCTION(0x2, "uart1", "rxd")),
225 MPP_MODE(42,
226 MPP_FUNCTION(0x0, "gpo", NULL),
227 MPP_FUNCTION(0x1, "dev", "ad3"),
228 MPP_FUNCTION(0x2, "uart1", "txd")),
229 MPP_MODE(43,
230 MPP_FUNCTION(0x0, "gpo", NULL),
231 MPP_FUNCTION(0x1, "dev", "ad4"),
232 MPP_FUNCTION(0x2, "audio", "bclk")),
233 MPP_MODE(44,
234 MPP_FUNCTION(0x0, "gpo", NULL),
235 MPP_FUNCTION(0x1, "dev", "ad5"),
236 MPP_FUNCTION(0x2, "audio", "mclk")),
237 MPP_MODE(45,
238 MPP_FUNCTION(0x0, "gpo", NULL),
239 MPP_FUNCTION(0x1, "dev", "ad6"),
240 MPP_FUNCTION(0x2, "audio", "lrclk")),
241 MPP_MODE(46,
242 MPP_FUNCTION(0x0, "gpo", NULL),
243 MPP_FUNCTION(0x1, "dev", "ad7"),
244 MPP_FUNCTION(0x2, "audio", "sdo")),
245 MPP_MODE(47,
246 MPP_FUNCTION(0x0, "gpo", NULL),
247 MPP_FUNCTION(0x1, "dev", "ad8"),
248 MPP_FUNCTION(0x3, "sd0", "clk"),
249 MPP_FUNCTION(0x5, "audio", "spdifo")),
250 MPP_MODE(48,
251 MPP_FUNCTION(0x0, "gpio", NULL),
252 MPP_FUNCTION(0x1, "dev", "ad9"),
253 MPP_FUNCTION(0x2, "uart0", "rts"),
254 MPP_FUNCTION(0x3, "sd0", "cmd"),
255 MPP_FUNCTION(0x4, "sata1", "prsnt"),
256 MPP_FUNCTION(0x5, "spi0", "cs1")),
257 MPP_MODE(49,
258 MPP_FUNCTION(0x0, "gpio", NULL),
259 MPP_FUNCTION(0x1, "dev", "ad10"),
260 MPP_FUNCTION(0x2, "pcie", "clkreq1"),
261 MPP_FUNCTION(0x3, "sd0", "d0"),
262 MPP_FUNCTION(0x4, "spi1", "cs0"),
263 MPP_FUNCTION(0x5, "audio", "spdifi")),
264 MPP_MODE(50,
265 MPP_FUNCTION(0x0, "gpio", NULL),
266 MPP_FUNCTION(0x1, "dev", "ad11"),
267 MPP_FUNCTION(0x2, "uart0", "cts"),
268 MPP_FUNCTION(0x3, "sd0", "d1"),
269 MPP_FUNCTION(0x4, "spi1", "miso"),
270 MPP_FUNCTION(0x5, "audio", "rmclk")),
271 MPP_MODE(51,
272 MPP_FUNCTION(0x0, "gpio", NULL),
273 MPP_FUNCTION(0x1, "dev", "ad12"),
274 MPP_FUNCTION(0x2, "i2c1", "sda"),
275 MPP_FUNCTION(0x3, "sd0", "d2"),
276 MPP_FUNCTION(0x4, "spi1", "mosi")),
277 MPP_MODE(52,
278 MPP_FUNCTION(0x0, "gpio", NULL),
279 MPP_FUNCTION(0x1, "dev", "ad13"),
280 MPP_FUNCTION(0x2, "i2c1", "sck"),
281 MPP_FUNCTION(0x3, "sd0", "d3"),
282 MPP_FUNCTION(0x4, "spi1", "sck")),
283 MPP_MODE(53,
284 MPP_FUNCTION(0x0, "gpio", NULL),
285 MPP_FUNCTION(0x1, "dev", "ad14"),
286 MPP_FUNCTION(0x2, "sd0", "clk"),
287 MPP_FUNCTION(0x3, "tdm", "pclk"),
288 MPP_FUNCTION(0x4, "spi0", "cs2"),
289 MPP_FUNCTION(0x5, "pcie", "clkreq1")),
290 MPP_MODE(54,
291 MPP_FUNCTION(0x0, "gpo", NULL),
292 MPP_FUNCTION(0x1, "dev", "ad15"),
293 MPP_FUNCTION(0x3, "tdm", "dtx")),
294 MPP_MODE(55,
295 MPP_FUNCTION(0x0, "gpio", NULL),
296 MPP_FUNCTION(0x1, "dev", "cs1"),
297 MPP_FUNCTION(0x2, "uart1", "txd"),
298 MPP_FUNCTION(0x3, "tdm", "rst"),
299 MPP_FUNCTION(0x4, "sata1", "prsnt"),
300 MPP_FUNCTION(0x5, "sata0", "prsnt")),
301 MPP_MODE(56,
302 MPP_FUNCTION(0x0, "gpio", NULL),
303 MPP_FUNCTION(0x1, "dev", "cs2"),
304 MPP_FUNCTION(0x2, "uart1", "cts"),
305 MPP_FUNCTION(0x3, "uart0", "cts"),
306 MPP_FUNCTION(0x4, "spi0", "cs3"),
307 MPP_FUNCTION(0x5, "pcie", "clkreq0"),
308 MPP_FUNCTION(0x6, "spi1", "cs1")),
309 MPP_MODE(57,
310 MPP_FUNCTION(0x0, "gpio", NULL),
311 MPP_FUNCTION(0x1, "dev", "cs3"),
312 MPP_FUNCTION(0x2, "uart1", "rxd"),
313 MPP_FUNCTION(0x3, "tdm", "fsync"),
314 MPP_FUNCTION(0x4, "sata0", "prsnt"),
315 MPP_FUNCTION(0x5, "audio", "sdo")),
316 MPP_MODE(58,
317 MPP_FUNCTION(0x0, "gpio", NULL),
318 MPP_FUNCTION(0x1, "dev", "cs0"),
319 MPP_FUNCTION(0x2, "uart1", "rts"),
320 MPP_FUNCTION(0x3, "tdm", "int"),
321 MPP_FUNCTION(0x5, "audio", "extclk"),
322 MPP_FUNCTION(0x6, "uart0", "rts")),
323 MPP_MODE(59,
324 MPP_FUNCTION(0x0, "gpo", NULL),
325 MPP_FUNCTION(0x1, "dev", "ale0"),
326 MPP_FUNCTION(0x2, "uart1", "rts"),
327 MPP_FUNCTION(0x3, "uart0", "rts"),
328 MPP_FUNCTION(0x5, "audio", "bclk")),
329 MPP_MODE(60,
330 MPP_FUNCTION(0x0, "gpio", NULL),
331 MPP_FUNCTION(0x1, "dev", "ale1"),
332 MPP_FUNCTION(0x2, "uart1", "rxd"),
333 MPP_FUNCTION(0x3, "sata0", "prsnt"),
334 MPP_FUNCTION(0x4, "pcie", "rstout"),
335 MPP_FUNCTION(0x5, "audio", "sdi")),
336 MPP_MODE(61,
337 MPP_FUNCTION(0x0, "gpo", NULL),
338 MPP_FUNCTION(0x1, "dev", "we1"),
339 MPP_FUNCTION(0x2, "uart1", "txd"),
340 MPP_FUNCTION(0x5, "audio", "lrclk")),
341 MPP_MODE(62,
342 MPP_FUNCTION(0x0, "gpio", NULL),
343 MPP_FUNCTION(0x1, "dev", "a2"),
344 MPP_FUNCTION(0x2, "uart1", "cts"),
345 MPP_FUNCTION(0x3, "tdm", "drx"),
346 MPP_FUNCTION(0x4, "pcie", "clkreq0"),
347 MPP_FUNCTION(0x5, "audio", "mclk"),
348 MPP_FUNCTION(0x6, "uart0", "cts")),
349 MPP_MODE(63,
350 MPP_FUNCTION(0x0, "gpio", NULL),
351 MPP_FUNCTION(0x1, "spi0", "sck"),
352 MPP_FUNCTION(0x2, "tclk", NULL)),
353 MPP_MODE(64,
354 MPP_FUNCTION(0x0, "gpio", NULL),
355 MPP_FUNCTION(0x1, "spi0", "miso"),
356 MPP_FUNCTION(0x2, "spi0", "cs1")),
357 MPP_MODE(65,
358 MPP_FUNCTION(0x0, "gpio", NULL),
359 MPP_FUNCTION(0x1, "spi0", "mosi"),
360 MPP_FUNCTION(0x2, "spi0", "cs2")),
361 };
362
363 static struct mvebu_pinctrl_soc_info armada_370_pinctrl_info;
364
365 static const struct of_device_id armada_370_pinctrl_of_match[] = {
366 { .compatible = "marvell,mv88f6710-pinctrl" },
367 { },
368 };
369
370 static const struct mvebu_mpp_ctrl mv88f6710_mpp_controls[] = {
371 MPP_FUNC_CTRL(0, 65, NULL, mvebu_mmio_mpp_ctrl),
372 };
373
374 static struct pinctrl_gpio_range mv88f6710_mpp_gpio_ranges[] = {
375 MPP_GPIO_RANGE(0, 0, 0, 32),
376 MPP_GPIO_RANGE(1, 32, 32, 32),
377 MPP_GPIO_RANGE(2, 64, 64, 2),
378 };
379
380 static int armada_370_pinctrl_probe(struct platform_device *pdev)
381 {
382 struct mvebu_pinctrl_soc_info *soc = &armada_370_pinctrl_info;
383
384 soc->variant = 0;
385 soc->controls = mv88f6710_mpp_controls;
386 soc->ncontrols = ARRAY_SIZE(mv88f6710_mpp_controls);
387 soc->modes = mv88f6710_mpp_modes;
388 soc->nmodes = ARRAY_SIZE(mv88f6710_mpp_modes);
389 soc->gpioranges = mv88f6710_mpp_gpio_ranges;
390 soc->ngpioranges = ARRAY_SIZE(mv88f6710_mpp_gpio_ranges);
391
392 pdev->dev.platform_data = soc;
393
394 return mvebu_pinctrl_simple_mmio_probe(pdev);
395 }
396
397 static struct platform_driver armada_370_pinctrl_driver = {
398 .driver = {
399 .name = "armada-370-pinctrl",
400 .of_match_table = armada_370_pinctrl_of_match,
401 },
402 .probe = armada_370_pinctrl_probe,
403 };
404 builtin_platform_driver(armada_370_pinctrl_driver);