This source file includes following definitions.
- imx23_pinctrl_probe
- imx23_pinctrl_init
1
2
3
4
5
6
7
8 #include <linux/init.h>
9 #include <linux/of_device.h>
10 #include <linux/pinctrl/pinctrl.h>
11 #include "pinctrl-mxs.h"
12
13 enum imx23_pin_enum {
14 GPMI_D00 = PINID(0, 0),
15 GPMI_D01 = PINID(0, 1),
16 GPMI_D02 = PINID(0, 2),
17 GPMI_D03 = PINID(0, 3),
18 GPMI_D04 = PINID(0, 4),
19 GPMI_D05 = PINID(0, 5),
20 GPMI_D06 = PINID(0, 6),
21 GPMI_D07 = PINID(0, 7),
22 GPMI_D08 = PINID(0, 8),
23 GPMI_D09 = PINID(0, 9),
24 GPMI_D10 = PINID(0, 10),
25 GPMI_D11 = PINID(0, 11),
26 GPMI_D12 = PINID(0, 12),
27 GPMI_D13 = PINID(0, 13),
28 GPMI_D14 = PINID(0, 14),
29 GPMI_D15 = PINID(0, 15),
30 GPMI_CLE = PINID(0, 16),
31 GPMI_ALE = PINID(0, 17),
32 GPMI_CE2N = PINID(0, 18),
33 GPMI_RDY0 = PINID(0, 19),
34 GPMI_RDY1 = PINID(0, 20),
35 GPMI_RDY2 = PINID(0, 21),
36 GPMI_RDY3 = PINID(0, 22),
37 GPMI_WPN = PINID(0, 23),
38 GPMI_WRN = PINID(0, 24),
39 GPMI_RDN = PINID(0, 25),
40 AUART1_CTS = PINID(0, 26),
41 AUART1_RTS = PINID(0, 27),
42 AUART1_RX = PINID(0, 28),
43 AUART1_TX = PINID(0, 29),
44 I2C_SCL = PINID(0, 30),
45 I2C_SDA = PINID(0, 31),
46 LCD_D00 = PINID(1, 0),
47 LCD_D01 = PINID(1, 1),
48 LCD_D02 = PINID(1, 2),
49 LCD_D03 = PINID(1, 3),
50 LCD_D04 = PINID(1, 4),
51 LCD_D05 = PINID(1, 5),
52 LCD_D06 = PINID(1, 6),
53 LCD_D07 = PINID(1, 7),
54 LCD_D08 = PINID(1, 8),
55 LCD_D09 = PINID(1, 9),
56 LCD_D10 = PINID(1, 10),
57 LCD_D11 = PINID(1, 11),
58 LCD_D12 = PINID(1, 12),
59 LCD_D13 = PINID(1, 13),
60 LCD_D14 = PINID(1, 14),
61 LCD_D15 = PINID(1, 15),
62 LCD_D16 = PINID(1, 16),
63 LCD_D17 = PINID(1, 17),
64 LCD_RESET = PINID(1, 18),
65 LCD_RS = PINID(1, 19),
66 LCD_WR = PINID(1, 20),
67 LCD_CS = PINID(1, 21),
68 LCD_DOTCK = PINID(1, 22),
69 LCD_ENABLE = PINID(1, 23),
70 LCD_HSYNC = PINID(1, 24),
71 LCD_VSYNC = PINID(1, 25),
72 PWM0 = PINID(1, 26),
73 PWM1 = PINID(1, 27),
74 PWM2 = PINID(1, 28),
75 PWM3 = PINID(1, 29),
76 PWM4 = PINID(1, 30),
77 SSP1_CMD = PINID(2, 0),
78 SSP1_DETECT = PINID(2, 1),
79 SSP1_DATA0 = PINID(2, 2),
80 SSP1_DATA1 = PINID(2, 3),
81 SSP1_DATA2 = PINID(2, 4),
82 SSP1_DATA3 = PINID(2, 5),
83 SSP1_SCK = PINID(2, 6),
84 ROTARYA = PINID(2, 7),
85 ROTARYB = PINID(2, 8),
86 EMI_A00 = PINID(2, 9),
87 EMI_A01 = PINID(2, 10),
88 EMI_A02 = PINID(2, 11),
89 EMI_A03 = PINID(2, 12),
90 EMI_A04 = PINID(2, 13),
91 EMI_A05 = PINID(2, 14),
92 EMI_A06 = PINID(2, 15),
93 EMI_A07 = PINID(2, 16),
94 EMI_A08 = PINID(2, 17),
95 EMI_A09 = PINID(2, 18),
96 EMI_A10 = PINID(2, 19),
97 EMI_A11 = PINID(2, 20),
98 EMI_A12 = PINID(2, 21),
99 EMI_BA0 = PINID(2, 22),
100 EMI_BA1 = PINID(2, 23),
101 EMI_CASN = PINID(2, 24),
102 EMI_CE0N = PINID(2, 25),
103 EMI_CE1N = PINID(2, 26),
104 GPMI_CE1N = PINID(2, 27),
105 GPMI_CE0N = PINID(2, 28),
106 EMI_CKE = PINID(2, 29),
107 EMI_RASN = PINID(2, 30),
108 EMI_WEN = PINID(2, 31),
109 EMI_D00 = PINID(3, 0),
110 EMI_D01 = PINID(3, 1),
111 EMI_D02 = PINID(3, 2),
112 EMI_D03 = PINID(3, 3),
113 EMI_D04 = PINID(3, 4),
114 EMI_D05 = PINID(3, 5),
115 EMI_D06 = PINID(3, 6),
116 EMI_D07 = PINID(3, 7),
117 EMI_D08 = PINID(3, 8),
118 EMI_D09 = PINID(3, 9),
119 EMI_D10 = PINID(3, 10),
120 EMI_D11 = PINID(3, 11),
121 EMI_D12 = PINID(3, 12),
122 EMI_D13 = PINID(3, 13),
123 EMI_D14 = PINID(3, 14),
124 EMI_D15 = PINID(3, 15),
125 EMI_DQM0 = PINID(3, 16),
126 EMI_DQM1 = PINID(3, 17),
127 EMI_DQS0 = PINID(3, 18),
128 EMI_DQS1 = PINID(3, 19),
129 EMI_CLK = PINID(3, 20),
130 EMI_CLKN = PINID(3, 21),
131 };
132
133 static const struct pinctrl_pin_desc imx23_pins[] = {
134 MXS_PINCTRL_PIN(GPMI_D00),
135 MXS_PINCTRL_PIN(GPMI_D01),
136 MXS_PINCTRL_PIN(GPMI_D02),
137 MXS_PINCTRL_PIN(GPMI_D03),
138 MXS_PINCTRL_PIN(GPMI_D04),
139 MXS_PINCTRL_PIN(GPMI_D05),
140 MXS_PINCTRL_PIN(GPMI_D06),
141 MXS_PINCTRL_PIN(GPMI_D07),
142 MXS_PINCTRL_PIN(GPMI_D08),
143 MXS_PINCTRL_PIN(GPMI_D09),
144 MXS_PINCTRL_PIN(GPMI_D10),
145 MXS_PINCTRL_PIN(GPMI_D11),
146 MXS_PINCTRL_PIN(GPMI_D12),
147 MXS_PINCTRL_PIN(GPMI_D13),
148 MXS_PINCTRL_PIN(GPMI_D14),
149 MXS_PINCTRL_PIN(GPMI_D15),
150 MXS_PINCTRL_PIN(GPMI_CLE),
151 MXS_PINCTRL_PIN(GPMI_ALE),
152 MXS_PINCTRL_PIN(GPMI_CE2N),
153 MXS_PINCTRL_PIN(GPMI_RDY0),
154 MXS_PINCTRL_PIN(GPMI_RDY1),
155 MXS_PINCTRL_PIN(GPMI_RDY2),
156 MXS_PINCTRL_PIN(GPMI_RDY3),
157 MXS_PINCTRL_PIN(GPMI_WPN),
158 MXS_PINCTRL_PIN(GPMI_WRN),
159 MXS_PINCTRL_PIN(GPMI_RDN),
160 MXS_PINCTRL_PIN(AUART1_CTS),
161 MXS_PINCTRL_PIN(AUART1_RTS),
162 MXS_PINCTRL_PIN(AUART1_RX),
163 MXS_PINCTRL_PIN(AUART1_TX),
164 MXS_PINCTRL_PIN(I2C_SCL),
165 MXS_PINCTRL_PIN(I2C_SDA),
166 MXS_PINCTRL_PIN(LCD_D00),
167 MXS_PINCTRL_PIN(LCD_D01),
168 MXS_PINCTRL_PIN(LCD_D02),
169 MXS_PINCTRL_PIN(LCD_D03),
170 MXS_PINCTRL_PIN(LCD_D04),
171 MXS_PINCTRL_PIN(LCD_D05),
172 MXS_PINCTRL_PIN(LCD_D06),
173 MXS_PINCTRL_PIN(LCD_D07),
174 MXS_PINCTRL_PIN(LCD_D08),
175 MXS_PINCTRL_PIN(LCD_D09),
176 MXS_PINCTRL_PIN(LCD_D10),
177 MXS_PINCTRL_PIN(LCD_D11),
178 MXS_PINCTRL_PIN(LCD_D12),
179 MXS_PINCTRL_PIN(LCD_D13),
180 MXS_PINCTRL_PIN(LCD_D14),
181 MXS_PINCTRL_PIN(LCD_D15),
182 MXS_PINCTRL_PIN(LCD_D16),
183 MXS_PINCTRL_PIN(LCD_D17),
184 MXS_PINCTRL_PIN(LCD_RESET),
185 MXS_PINCTRL_PIN(LCD_RS),
186 MXS_PINCTRL_PIN(LCD_WR),
187 MXS_PINCTRL_PIN(LCD_CS),
188 MXS_PINCTRL_PIN(LCD_DOTCK),
189 MXS_PINCTRL_PIN(LCD_ENABLE),
190 MXS_PINCTRL_PIN(LCD_HSYNC),
191 MXS_PINCTRL_PIN(LCD_VSYNC),
192 MXS_PINCTRL_PIN(PWM0),
193 MXS_PINCTRL_PIN(PWM1),
194 MXS_PINCTRL_PIN(PWM2),
195 MXS_PINCTRL_PIN(PWM3),
196 MXS_PINCTRL_PIN(PWM4),
197 MXS_PINCTRL_PIN(SSP1_CMD),
198 MXS_PINCTRL_PIN(SSP1_DETECT),
199 MXS_PINCTRL_PIN(SSP1_DATA0),
200 MXS_PINCTRL_PIN(SSP1_DATA1),
201 MXS_PINCTRL_PIN(SSP1_DATA2),
202 MXS_PINCTRL_PIN(SSP1_DATA3),
203 MXS_PINCTRL_PIN(SSP1_SCK),
204 MXS_PINCTRL_PIN(ROTARYA),
205 MXS_PINCTRL_PIN(ROTARYB),
206 MXS_PINCTRL_PIN(EMI_A00),
207 MXS_PINCTRL_PIN(EMI_A01),
208 MXS_PINCTRL_PIN(EMI_A02),
209 MXS_PINCTRL_PIN(EMI_A03),
210 MXS_PINCTRL_PIN(EMI_A04),
211 MXS_PINCTRL_PIN(EMI_A05),
212 MXS_PINCTRL_PIN(EMI_A06),
213 MXS_PINCTRL_PIN(EMI_A07),
214 MXS_PINCTRL_PIN(EMI_A08),
215 MXS_PINCTRL_PIN(EMI_A09),
216 MXS_PINCTRL_PIN(EMI_A10),
217 MXS_PINCTRL_PIN(EMI_A11),
218 MXS_PINCTRL_PIN(EMI_A12),
219 MXS_PINCTRL_PIN(EMI_BA0),
220 MXS_PINCTRL_PIN(EMI_BA1),
221 MXS_PINCTRL_PIN(EMI_CASN),
222 MXS_PINCTRL_PIN(EMI_CE0N),
223 MXS_PINCTRL_PIN(EMI_CE1N),
224 MXS_PINCTRL_PIN(GPMI_CE1N),
225 MXS_PINCTRL_PIN(GPMI_CE0N),
226 MXS_PINCTRL_PIN(EMI_CKE),
227 MXS_PINCTRL_PIN(EMI_RASN),
228 MXS_PINCTRL_PIN(EMI_WEN),
229 MXS_PINCTRL_PIN(EMI_D00),
230 MXS_PINCTRL_PIN(EMI_D01),
231 MXS_PINCTRL_PIN(EMI_D02),
232 MXS_PINCTRL_PIN(EMI_D03),
233 MXS_PINCTRL_PIN(EMI_D04),
234 MXS_PINCTRL_PIN(EMI_D05),
235 MXS_PINCTRL_PIN(EMI_D06),
236 MXS_PINCTRL_PIN(EMI_D07),
237 MXS_PINCTRL_PIN(EMI_D08),
238 MXS_PINCTRL_PIN(EMI_D09),
239 MXS_PINCTRL_PIN(EMI_D10),
240 MXS_PINCTRL_PIN(EMI_D11),
241 MXS_PINCTRL_PIN(EMI_D12),
242 MXS_PINCTRL_PIN(EMI_D13),
243 MXS_PINCTRL_PIN(EMI_D14),
244 MXS_PINCTRL_PIN(EMI_D15),
245 MXS_PINCTRL_PIN(EMI_DQM0),
246 MXS_PINCTRL_PIN(EMI_DQM1),
247 MXS_PINCTRL_PIN(EMI_DQS0),
248 MXS_PINCTRL_PIN(EMI_DQS1),
249 MXS_PINCTRL_PIN(EMI_CLK),
250 MXS_PINCTRL_PIN(EMI_CLKN),
251 };
252
253 static const struct mxs_regs imx23_regs = {
254 .muxsel = 0x100,
255 .drive = 0x200,
256 .pull = 0x400,
257 };
258
259 static struct mxs_pinctrl_soc_data imx23_pinctrl_data = {
260 .regs = &imx23_regs,
261 .pins = imx23_pins,
262 .npins = ARRAY_SIZE(imx23_pins),
263 };
264
265 static int imx23_pinctrl_probe(struct platform_device *pdev)
266 {
267 return mxs_pinctrl_probe(pdev, &imx23_pinctrl_data);
268 }
269
270 static const struct of_device_id imx23_pinctrl_of_match[] = {
271 { .compatible = "fsl,imx23-pinctrl", },
272 { }
273 };
274
275 static struct platform_driver imx23_pinctrl_driver = {
276 .driver = {
277 .name = "imx23-pinctrl",
278 .suppress_bind_attrs = true,
279 .of_match_table = imx23_pinctrl_of_match,
280 },
281 .probe = imx23_pinctrl_probe,
282 };
283
284 static int __init imx23_pinctrl_init(void)
285 {
286 return platform_driver_register(&imx23_pinctrl_driver);
287 }
288 postcore_initcall(imx23_pinctrl_init);