1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Exceptions for specific devices. Usually work-arounds for fatal design flaws.
4 * Derived from fixup.c of i386 tree.
5 */
6
7 #include <linux/pci.h>
8 #include <linux/init.h>
9 #include <linux/vgaarb.h>
10 #include <linux/screen_info.h>
11 #include <asm/uv/uv.h>
12
13 /*
14 * Fixup to mark boot BIOS video selected by BIOS before it changes
15 *
16 * From information provided by "Jon Smirl" <jonsmirl@gmail.com>
17 *
18 * The standard boot ROM sequence for an x86 machine uses the BIOS
19 * to select an initial video card for boot display. This boot video
20 * card will have its BIOS copied to 0xC0000 in system RAM.
21 * IORESOURCE_ROM_SHADOW is used to associate the boot video
22 * card with this copy. On laptops this copy has to be used since
23 * the main ROM may be compressed or combined with another image.
24 * See pci_map_rom() for use of this flag. Before marking the device
25 * with IORESOURCE_ROM_SHADOW check if a vga_default_device is already set
26 * by either arch code or vga-arbitration; if so only apply the fixup to this
27 * already-determined primary video card.
28 */
29
30 static void pci_fixup_video(struct pci_dev *pdev)
31 {
32 struct pci_dev *bridge;
33 struct pci_bus *bus;
34 u16 config;
35 struct resource *res;
36
37 if (is_uv_system())
38 return;
39 /* Maybe, this machine supports legacy memory map. */
40
41 /* Is VGA routed to us? */
42 bus = pdev->bus;
43 while (bus) {
44 bridge = bus->self;
45
46 /*
47 * From information provided by
48 * "David Miller" <davem@davemloft.net>
49 * The bridge control register is valid for PCI header
50 * type BRIDGE, or CARDBUS. Host to PCI controllers use
51 * PCI header type NORMAL.
52 */
53 if (bridge && (pci_is_bridge(bridge))) {
54 pci_read_config_word(bridge, PCI_BRIDGE_CONTROL,
55 &config);
56 if (!(config & PCI_BRIDGE_CTL_VGA))
57 return;
58 }
59 bus = bus->parent;
60 }
61 if (!vga_default_device() || pdev == vga_default_device()) {
62 pci_read_config_word(pdev, PCI_COMMAND, &config);
63 if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {
64 res = &pdev->resource[PCI_ROM_RESOURCE];
65
66 pci_disable_rom(pdev);
67 if (res->parent)
68 release_resource(res);
69
70 res->start = 0xC0000;
71 res->end = res->start + 0x20000 - 1;
72 res->flags = IORESOURCE_MEM | IORESOURCE_ROM_SHADOW |
73 IORESOURCE_PCI_FIXED;
74 dev_info(&pdev->dev, "Video device with shadowed ROM at %pR\n",
75 res);
76 }
77 }
78 }
79 DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
80 PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);