root/drivers/s390/net/ctcm_fsms.h

/* [<][>][^][v][top][bottom][index][help] */

INCLUDED FROM


   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright IBM Corp. 2001, 2007
   4  * Authors:     Fritz Elfert (felfert@millenux.com)
   5  *              Peter Tiedemann (ptiedem@de.ibm.com)
   6  *      MPC additions :
   7  *              Belinda Thompson (belindat@us.ibm.com)
   8  *              Andy Richter (richtera@us.ibm.com)
   9  */
  10 #ifndef _CTCM_FSMS_H_
  11 #define _CTCM_FSMS_H_
  12 
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/kernel.h>
  16 #include <linux/slab.h>
  17 #include <linux/errno.h>
  18 #include <linux/types.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/timer.h>
  21 #include <linux/bitops.h>
  22 
  23 #include <linux/signal.h>
  24 #include <linux/string.h>
  25 
  26 #include <linux/ip.h>
  27 #include <linux/if_arp.h>
  28 #include <linux/tcp.h>
  29 #include <linux/skbuff.h>
  30 #include <linux/ctype.h>
  31 #include <net/dst.h>
  32 
  33 #include <linux/io.h>
  34 #include <asm/ccwdev.h>
  35 #include <asm/ccwgroup.h>
  36 #include <linux/uaccess.h>
  37 
  38 #include <asm/idals.h>
  39 
  40 #include "fsm.h"
  41 #include "ctcm_main.h"
  42 
  43 /*
  44  * Definitions for the channel statemachine(s) for ctc and ctcmpc
  45  *
  46  * To allow better kerntyping, prefix-less definitions for channel states
  47  * and channel events have been replaced :
  48  * ch_event... -> ctc_ch_event...
  49  * CH_EVENT... -> CTC_EVENT...
  50  * ch_state... -> ctc_ch_state...
  51  * CH_STATE... -> CTC_STATE...
  52  */
  53 /*
  54  * Events of the channel statemachine(s) for ctc and ctcmpc
  55  */
  56 enum ctc_ch_events {
  57         /*
  58          * Events, representing return code of
  59          * I/O operations (ccw_device_start, ccw_device_halt et al.)
  60          */
  61         CTC_EVENT_IO_SUCCESS,
  62         CTC_EVENT_IO_EBUSY,
  63         CTC_EVENT_IO_ENODEV,
  64         CTC_EVENT_IO_UNKNOWN,
  65 
  66         CTC_EVENT_ATTNBUSY,
  67         CTC_EVENT_ATTN,
  68         CTC_EVENT_BUSY,
  69         /*
  70          * Events, representing unit-check
  71          */
  72         CTC_EVENT_UC_RCRESET,
  73         CTC_EVENT_UC_RSRESET,
  74         CTC_EVENT_UC_TXTIMEOUT,
  75         CTC_EVENT_UC_TXPARITY,
  76         CTC_EVENT_UC_HWFAIL,
  77         CTC_EVENT_UC_RXPARITY,
  78         CTC_EVENT_UC_ZERO,
  79         CTC_EVENT_UC_UNKNOWN,
  80         /*
  81          * Events, representing subchannel-check
  82          */
  83         CTC_EVENT_SC_UNKNOWN,
  84         /*
  85          * Events, representing machine checks
  86          */
  87         CTC_EVENT_MC_FAIL,
  88         CTC_EVENT_MC_GOOD,
  89         /*
  90          * Event, representing normal IRQ
  91          */
  92         CTC_EVENT_IRQ,
  93         CTC_EVENT_FINSTAT,
  94         /*
  95          * Event, representing timer expiry.
  96          */
  97         CTC_EVENT_TIMER,
  98         /*
  99          * Events, representing commands from upper levels.
 100          */
 101         CTC_EVENT_START,
 102         CTC_EVENT_STOP,
 103         CTC_NR_EVENTS,
 104         /*
 105          * additional MPC events
 106          */
 107         CTC_EVENT_SEND_XID = CTC_NR_EVENTS,
 108         CTC_EVENT_RSWEEP_TIMER,
 109         /*
 110          * MUST be always the last element!!
 111          */
 112         CTC_MPC_NR_EVENTS,
 113 };
 114 
 115 /*
 116  * States of the channel statemachine(s) for ctc and ctcmpc.
 117  */
 118 enum ctc_ch_states {
 119         /*
 120          * Channel not assigned to any device,
 121          * initial state, direction invalid
 122          */
 123         CTC_STATE_IDLE,
 124         /*
 125          * Channel assigned but not operating
 126          */
 127         CTC_STATE_STOPPED,
 128         CTC_STATE_STARTWAIT,
 129         CTC_STATE_STARTRETRY,
 130         CTC_STATE_SETUPWAIT,
 131         CTC_STATE_RXINIT,
 132         CTC_STATE_TXINIT,
 133         CTC_STATE_RX,
 134         CTC_STATE_TX,
 135         CTC_STATE_RXIDLE,
 136         CTC_STATE_TXIDLE,
 137         CTC_STATE_RXERR,
 138         CTC_STATE_TXERR,
 139         CTC_STATE_TERM,
 140         CTC_STATE_DTERM,
 141         CTC_STATE_NOTOP,
 142         CTC_NR_STATES,     /* MUST be the last element of non-expanded states */
 143         /*
 144          * additional MPC states
 145          */
 146         CH_XID0_PENDING = CTC_NR_STATES,
 147         CH_XID0_INPROGRESS,
 148         CH_XID7_PENDING,
 149         CH_XID7_PENDING1,
 150         CH_XID7_PENDING2,
 151         CH_XID7_PENDING3,
 152         CH_XID7_PENDING4,
 153         CTC_MPC_NR_STATES, /* MUST be the last element of expanded mpc states */
 154 };
 155 
 156 extern const char *ctc_ch_event_names[];
 157 
 158 extern const char *ctc_ch_state_names[];
 159 
 160 void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg);
 161 void ctcm_purge_skb_queue(struct sk_buff_head *q);
 162 void fsm_action_nop(fsm_instance *fi, int event, void *arg);
 163 
 164 /*
 165  * ----- non-static actions for ctcm channel statemachine -----
 166  *
 167  */
 168 void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg);
 169 
 170 /*
 171  * ----- FSM (state/event/action) of the ctcm channel statemachine -----
 172  */
 173 extern const fsm_node ch_fsm[];
 174 extern int ch_fsm_len;
 175 
 176 
 177 /*
 178  * ----- non-static actions for ctcmpc channel statemachine ----
 179  *
 180  */
 181 /* shared :
 182 void ctcm_chx_txidle(fsm_instance * fi, int event, void *arg);
 183  */
 184 void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg);
 185 
 186 /*
 187  * ----- FSM (state/event/action) of the ctcmpc channel statemachine -----
 188  */
 189 extern const fsm_node ctcmpc_ch_fsm[];
 190 extern int mpc_ch_fsm_len;
 191 
 192 /*
 193  * Definitions for the device interface statemachine for ctc and mpc
 194  */
 195 
 196 /*
 197  * States of the device interface statemachine.
 198  */
 199 enum dev_states {
 200         DEV_STATE_STOPPED,
 201         DEV_STATE_STARTWAIT_RXTX,
 202         DEV_STATE_STARTWAIT_RX,
 203         DEV_STATE_STARTWAIT_TX,
 204         DEV_STATE_STOPWAIT_RXTX,
 205         DEV_STATE_STOPWAIT_RX,
 206         DEV_STATE_STOPWAIT_TX,
 207         DEV_STATE_RUNNING,
 208         /*
 209          * MUST be always the last element!!
 210          */
 211         CTCM_NR_DEV_STATES
 212 };
 213 
 214 extern const char *dev_state_names[];
 215 
 216 /*
 217  * Events of the device interface statemachine.
 218  * ctcm and ctcmpc
 219  */
 220 enum dev_events {
 221         DEV_EVENT_START,
 222         DEV_EVENT_STOP,
 223         DEV_EVENT_RXUP,
 224         DEV_EVENT_TXUP,
 225         DEV_EVENT_RXDOWN,
 226         DEV_EVENT_TXDOWN,
 227         DEV_EVENT_RESTART,
 228         /*
 229          * MUST be always the last element!!
 230          */
 231         CTCM_NR_DEV_EVENTS
 232 };
 233 
 234 extern const char *dev_event_names[];
 235 
 236 /*
 237  * Actions for the device interface statemachine.
 238  * ctc and ctcmpc
 239  */
 240 /*
 241 static void dev_action_start(fsm_instance * fi, int event, void *arg);
 242 static void dev_action_stop(fsm_instance * fi, int event, void *arg);
 243 static void dev_action_restart(fsm_instance *fi, int event, void *arg);
 244 static void dev_action_chup(fsm_instance * fi, int event, void *arg);
 245 static void dev_action_chdown(fsm_instance * fi, int event, void *arg);
 246 */
 247 
 248 /*
 249  * The (state/event/action) fsm table of the device interface statemachine.
 250  * ctcm and ctcmpc
 251  */
 252 extern const fsm_node dev_fsm[];
 253 extern int dev_fsm_len;
 254 
 255 
 256 /*
 257  * Definitions for the MPC Group statemachine
 258  */
 259 
 260 /*
 261  * MPC Group Station FSM States
 262 
 263 State Name              When In This State
 264 ======================  =======================================
 265 MPCG_STATE_RESET        Initial State When Driver Loaded
 266                         We receive and send NOTHING
 267 
 268 MPCG_STATE_INOP         INOP Received.
 269                         Group level non-recoverable error
 270 
 271 MPCG_STATE_READY        XID exchanges for at least 1 write and
 272                         1 read channel have completed.
 273                         Group is ready for data transfer.
 274 
 275 States from ctc_mpc_alloc_channel
 276 ==============================================================
 277 MPCG_STATE_XID2INITW    Awaiting XID2(0) Initiation
 278                               ATTN from other side will start
 279                               XID negotiations.
 280                               Y-side protocol only.
 281 
 282 MPCG_STATE_XID2INITX    XID2(0) negotiations are in progress.
 283                               At least 1, but not all, XID2(0)'s
 284                               have been received from partner.
 285 
 286 MPCG_STATE_XID7INITW    XID2(0) complete
 287                               No XID2(7)'s have yet been received.
 288                               XID2(7) negotiations pending.
 289 
 290 MPCG_STATE_XID7INITX    XID2(7) negotiations in progress.
 291                               At least 1, but not all, XID2(7)'s
 292                               have been received from partner.
 293 
 294 MPCG_STATE_XID7INITF    XID2(7) negotiations complete.
 295                               Transitioning to READY.
 296 
 297 MPCG_STATE_READY              Ready for Data Transfer.
 298 
 299 
 300 States from ctc_mpc_establish_connectivity call
 301 ==============================================================
 302 MPCG_STATE_XID0IOWAIT   Initiating XID2(0) negotiations.
 303                               X-side protocol only.
 304                               ATTN-BUSY from other side will convert
 305                               this to Y-side protocol and the
 306                               ctc_mpc_alloc_channel flow will begin.
 307 
 308 MPCG_STATE_XID0IOWAIX   XID2(0) negotiations are in progress.
 309                               At least 1, but not all, XID2(0)'s
 310                               have been received from partner.
 311 
 312 MPCG_STATE_XID7INITI    XID2(0) complete
 313                               No XID2(7)'s have yet been received.
 314                               XID2(7) negotiations pending.
 315 
 316 MPCG_STATE_XID7INITZ    XID2(7) negotiations in progress.
 317                               At least 1, but not all, XID2(7)'s
 318                               have been received from partner.
 319 
 320 MPCG_STATE_XID7INITF    XID2(7) negotiations complete.
 321                               Transitioning to READY.
 322 
 323 MPCG_STATE_READY              Ready for Data Transfer.
 324 
 325 */
 326 
 327 enum mpcg_events {
 328         MPCG_EVENT_INOP,
 329         MPCG_EVENT_DISCONC,
 330         MPCG_EVENT_XID0DO,
 331         MPCG_EVENT_XID2,
 332         MPCG_EVENT_XID2DONE,
 333         MPCG_EVENT_XID7DONE,
 334         MPCG_EVENT_TIMER,
 335         MPCG_EVENT_DOIO,
 336         MPCG_NR_EVENTS,
 337 };
 338 
 339 enum mpcg_states {
 340         MPCG_STATE_RESET,
 341         MPCG_STATE_INOP,
 342         MPCG_STATE_XID2INITW,
 343         MPCG_STATE_XID2INITX,
 344         MPCG_STATE_XID7INITW,
 345         MPCG_STATE_XID7INITX,
 346         MPCG_STATE_XID0IOWAIT,
 347         MPCG_STATE_XID0IOWAIX,
 348         MPCG_STATE_XID7INITI,
 349         MPCG_STATE_XID7INITZ,
 350         MPCG_STATE_XID7INITF,
 351         MPCG_STATE_FLOWC,
 352         MPCG_STATE_READY,
 353         MPCG_NR_STATES,
 354 };
 355 
 356 #endif
 357 /* --- This is the END my friend --- */

/* [<][>][^][v][top][bottom][index][help] */