This source file includes following definitions.
- imx7ulp_wdt_enable
- imx7ulp_wdt_is_enabled
- imx7ulp_wdt_ping
- imx7ulp_wdt_start
- imx7ulp_wdt_stop
- imx7ulp_wdt_set_timeout
- imx7ulp_wdt_restart
- imx7ulp_wdt_init
- imx7ulp_wdt_action
- imx7ulp_wdt_probe
- imx7ulp_wdt_suspend
- imx7ulp_wdt_resume
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5
6 #include <linux/clk.h>
7 #include <linux/init.h>
8 #include <linux/io.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/of.h>
12 #include <linux/platform_device.h>
13 #include <linux/reboot.h>
14 #include <linux/watchdog.h>
15
16 #define WDOG_CS 0x0
17 #define WDOG_CS_CMD32EN BIT(13)
18 #define WDOG_CS_ULK BIT(11)
19 #define WDOG_CS_RCS BIT(10)
20 #define WDOG_CS_EN BIT(7)
21 #define WDOG_CS_UPDATE BIT(5)
22
23 #define WDOG_CNT 0x4
24 #define WDOG_TOVAL 0x8
25
26 #define REFRESH_SEQ0 0xA602
27 #define REFRESH_SEQ1 0xB480
28 #define REFRESH ((REFRESH_SEQ1 << 16) | REFRESH_SEQ0)
29
30 #define UNLOCK_SEQ0 0xC520
31 #define UNLOCK_SEQ1 0xD928
32 #define UNLOCK ((UNLOCK_SEQ1 << 16) | UNLOCK_SEQ0)
33
34 #define DEFAULT_TIMEOUT 60
35 #define MAX_TIMEOUT 128
36 #define WDOG_CLOCK_RATE 1000
37
38 static bool nowayout = WATCHDOG_NOWAYOUT;
39 module_param(nowayout, bool, 0000);
40 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
41 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
42
43 struct imx7ulp_wdt_device {
44 struct notifier_block restart_handler;
45 struct watchdog_device wdd;
46 void __iomem *base;
47 struct clk *clk;
48 };
49
50 static inline void imx7ulp_wdt_enable(void __iomem *base, bool enable)
51 {
52 u32 val = readl(base + WDOG_CS);
53
54 writel(UNLOCK, base + WDOG_CNT);
55 if (enable)
56 writel(val | WDOG_CS_EN, base + WDOG_CS);
57 else
58 writel(val & ~WDOG_CS_EN, base + WDOG_CS);
59 }
60
61 static inline bool imx7ulp_wdt_is_enabled(void __iomem *base)
62 {
63 u32 val = readl(base + WDOG_CS);
64
65 return val & WDOG_CS_EN;
66 }
67
68 static int imx7ulp_wdt_ping(struct watchdog_device *wdog)
69 {
70 struct imx7ulp_wdt_device *wdt = watchdog_get_drvdata(wdog);
71
72 writel(REFRESH, wdt->base + WDOG_CNT);
73
74 return 0;
75 }
76
77 static int imx7ulp_wdt_start(struct watchdog_device *wdog)
78 {
79 struct imx7ulp_wdt_device *wdt = watchdog_get_drvdata(wdog);
80
81 imx7ulp_wdt_enable(wdt->base, true);
82
83 return 0;
84 }
85
86 static int imx7ulp_wdt_stop(struct watchdog_device *wdog)
87 {
88 struct imx7ulp_wdt_device *wdt = watchdog_get_drvdata(wdog);
89
90 imx7ulp_wdt_enable(wdt->base, false);
91
92 return 0;
93 }
94
95 static int imx7ulp_wdt_set_timeout(struct watchdog_device *wdog,
96 unsigned int timeout)
97 {
98 struct imx7ulp_wdt_device *wdt = watchdog_get_drvdata(wdog);
99 u32 val = WDOG_CLOCK_RATE * timeout;
100
101 writel(UNLOCK, wdt->base + WDOG_CNT);
102 writel(val, wdt->base + WDOG_TOVAL);
103
104 wdog->timeout = timeout;
105
106 return 0;
107 }
108
109 static int imx7ulp_wdt_restart(struct watchdog_device *wdog,
110 unsigned long action, void *data)
111 {
112 struct imx7ulp_wdt_device *wdt = watchdog_get_drvdata(wdog);
113
114 imx7ulp_wdt_enable(wdt->base, true);
115 imx7ulp_wdt_set_timeout(&wdt->wdd, 1);
116
117
118 while (true)
119 ;
120
121 return NOTIFY_DONE;
122 }
123
124 static const struct watchdog_ops imx7ulp_wdt_ops = {
125 .owner = THIS_MODULE,
126 .start = imx7ulp_wdt_start,
127 .stop = imx7ulp_wdt_stop,
128 .ping = imx7ulp_wdt_ping,
129 .set_timeout = imx7ulp_wdt_set_timeout,
130 .restart = imx7ulp_wdt_restart,
131 };
132
133 static const struct watchdog_info imx7ulp_wdt_info = {
134 .identity = "i.MX7ULP watchdog timer",
135 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
136 WDIOF_MAGICCLOSE,
137 };
138
139 static inline void imx7ulp_wdt_init(void __iomem *base, unsigned int timeout)
140 {
141 u32 val;
142
143
144 writel_relaxed(UNLOCK_SEQ0, base + WDOG_CNT);
145 writel_relaxed(UNLOCK_SEQ1, base + WDOG_CNT);
146
147
148 writel(timeout, base + WDOG_TOVAL);
149
150 val = BIT(13) | BIT(8) | BIT(5);
151 writel(val, base + WDOG_CS);
152 }
153
154 static void imx7ulp_wdt_action(void *data)
155 {
156 clk_disable_unprepare(data);
157 }
158
159 static int imx7ulp_wdt_probe(struct platform_device *pdev)
160 {
161 struct imx7ulp_wdt_device *imx7ulp_wdt;
162 struct device *dev = &pdev->dev;
163 struct watchdog_device *wdog;
164 int ret;
165
166 imx7ulp_wdt = devm_kzalloc(dev, sizeof(*imx7ulp_wdt), GFP_KERNEL);
167 if (!imx7ulp_wdt)
168 return -ENOMEM;
169
170 platform_set_drvdata(pdev, imx7ulp_wdt);
171
172 imx7ulp_wdt->base = devm_platform_ioremap_resource(pdev, 0);
173 if (IS_ERR(imx7ulp_wdt->base))
174 return PTR_ERR(imx7ulp_wdt->base);
175
176 imx7ulp_wdt->clk = devm_clk_get(dev, NULL);
177 if (IS_ERR(imx7ulp_wdt->clk)) {
178 dev_err(dev, "Failed to get watchdog clock\n");
179 return PTR_ERR(imx7ulp_wdt->clk);
180 }
181
182 ret = clk_prepare_enable(imx7ulp_wdt->clk);
183 if (ret)
184 return ret;
185
186 ret = devm_add_action_or_reset(dev, imx7ulp_wdt_action, imx7ulp_wdt->clk);
187 if (ret)
188 return ret;
189
190 wdog = &imx7ulp_wdt->wdd;
191 wdog->info = &imx7ulp_wdt_info;
192 wdog->ops = &imx7ulp_wdt_ops;
193 wdog->min_timeout = 1;
194 wdog->max_timeout = MAX_TIMEOUT;
195 wdog->parent = dev;
196 wdog->timeout = DEFAULT_TIMEOUT;
197
198 watchdog_init_timeout(wdog, 0, dev);
199 watchdog_stop_on_reboot(wdog);
200 watchdog_stop_on_unregister(wdog);
201 watchdog_set_drvdata(wdog, imx7ulp_wdt);
202 imx7ulp_wdt_init(imx7ulp_wdt->base, wdog->timeout * WDOG_CLOCK_RATE);
203
204 return devm_watchdog_register_device(dev, wdog);
205 }
206
207 static int __maybe_unused imx7ulp_wdt_suspend(struct device *dev)
208 {
209 struct imx7ulp_wdt_device *imx7ulp_wdt = dev_get_drvdata(dev);
210
211 if (watchdog_active(&imx7ulp_wdt->wdd))
212 imx7ulp_wdt_stop(&imx7ulp_wdt->wdd);
213
214 clk_disable_unprepare(imx7ulp_wdt->clk);
215
216 return 0;
217 }
218
219 static int __maybe_unused imx7ulp_wdt_resume(struct device *dev)
220 {
221 struct imx7ulp_wdt_device *imx7ulp_wdt = dev_get_drvdata(dev);
222 u32 timeout = imx7ulp_wdt->wdd.timeout * WDOG_CLOCK_RATE;
223 int ret;
224
225 ret = clk_prepare_enable(imx7ulp_wdt->clk);
226 if (ret)
227 return ret;
228
229 if (imx7ulp_wdt_is_enabled(imx7ulp_wdt->base))
230 imx7ulp_wdt_init(imx7ulp_wdt->base, timeout);
231
232 if (watchdog_active(&imx7ulp_wdt->wdd))
233 imx7ulp_wdt_start(&imx7ulp_wdt->wdd);
234
235 return 0;
236 }
237
238 static SIMPLE_DEV_PM_OPS(imx7ulp_wdt_pm_ops, imx7ulp_wdt_suspend,
239 imx7ulp_wdt_resume);
240
241 static const struct of_device_id imx7ulp_wdt_dt_ids[] = {
242 { .compatible = "fsl,imx7ulp-wdt", },
243 { }
244 };
245 MODULE_DEVICE_TABLE(of, imx7ulp_wdt_dt_ids);
246
247 static struct platform_driver imx7ulp_wdt_driver = {
248 .probe = imx7ulp_wdt_probe,
249 .driver = {
250 .name = "imx7ulp-wdt",
251 .pm = &imx7ulp_wdt_pm_ops,
252 .of_match_table = imx7ulp_wdt_dt_ids,
253 },
254 };
255 module_platform_driver(imx7ulp_wdt_driver);
256
257 MODULE_AUTHOR("Anson Huang <Anson.Huang@nxp.com>");
258 MODULE_DESCRIPTION("Freescale i.MX7ULP watchdog driver");
259 MODULE_LICENSE("GPL v2");