root/drivers/watchdog/at91sam9_wdt.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * drivers/watchdog/at91sam9_wdt.h
   4  *
   5  * Copyright (C) 2007 Andrew Victor
   6  * Copyright (C) 2007 Atmel Corporation.
   7  *
   8  * Watchdog Timer (WDT) - System peripherals regsters.
   9  * Based on AT91SAM9261 datasheet revision D.
  10  *
  11  */
  12 
  13 #ifndef AT91_WDT_H
  14 #define AT91_WDT_H
  15 
  16 #define AT91_WDT_CR             0x00                    /* Watchdog Control Register */
  17 #define         AT91_WDT_WDRSTT         (1    << 0)             /* Restart */
  18 #define         AT91_WDT_KEY            (0xa5 << 24)            /* KEY Password */
  19 
  20 #define AT91_WDT_MR             0x04                    /* Watchdog Mode Register */
  21 #define         AT91_WDT_WDV            (0xfff << 0)            /* Counter Value */
  22 #define                 AT91_WDT_SET_WDV(x)     ((x) & AT91_WDT_WDV)
  23 #define         AT91_WDT_WDFIEN         (1     << 12)           /* Fault Interrupt Enable */
  24 #define         AT91_WDT_WDRSTEN        (1     << 13)           /* Reset Processor */
  25 #define         AT91_WDT_WDRPROC        (1     << 14)           /* Timer Restart */
  26 #define         AT91_WDT_WDDIS          (1     << 15)           /* Watchdog Disable */
  27 #define         AT91_WDT_WDD            (0xfff << 16)           /* Delta Value */
  28 #define                 AT91_WDT_SET_WDD(x)     (((x) << 16) & AT91_WDT_WDD)
  29 #define         AT91_WDT_WDDBGHLT       (1     << 28)           /* Debug Halt */
  30 #define         AT91_WDT_WDIDLEHLT      (1     << 29)           /* Idle Halt */
  31 
  32 #define AT91_WDT_SR             0x08                    /* Watchdog Status Register */
  33 #define         AT91_WDT_WDUNF          (1 << 0)                /* Watchdog Underflow */
  34 #define         AT91_WDT_WDERR          (1 << 1)                /* Watchdog Error */
  35 
  36 #endif