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13 #ifndef ASIC_REG_TPC5_RTR_REGS_H_
14 #define ASIC_REG_TPC5_RTR_REGS_H_
15
16
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20
21
22 #define mmTPC5_RTR_HBW_RD_RQ_E_ARB 0xF40100
23
24 #define mmTPC5_RTR_HBW_RD_RQ_W_ARB 0xF40104
25
26 #define mmTPC5_RTR_HBW_RD_RQ_N_ARB 0xF40108
27
28 #define mmTPC5_RTR_HBW_RD_RQ_S_ARB 0xF4010C
29
30 #define mmTPC5_RTR_HBW_RD_RQ_L_ARB 0xF40110
31
32 #define mmTPC5_RTR_HBW_E_ARB_MAX 0xF40120
33
34 #define mmTPC5_RTR_HBW_W_ARB_MAX 0xF40124
35
36 #define mmTPC5_RTR_HBW_N_ARB_MAX 0xF40128
37
38 #define mmTPC5_RTR_HBW_S_ARB_MAX 0xF4012C
39
40 #define mmTPC5_RTR_HBW_L_ARB_MAX 0xF40130
41
42 #define mmTPC5_RTR_HBW_RD_RS_E_ARB 0xF40140
43
44 #define mmTPC5_RTR_HBW_RD_RS_W_ARB 0xF40144
45
46 #define mmTPC5_RTR_HBW_RD_RS_N_ARB 0xF40148
47
48 #define mmTPC5_RTR_HBW_RD_RS_S_ARB 0xF4014C
49
50 #define mmTPC5_RTR_HBW_RD_RS_L_ARB 0xF40150
51
52 #define mmTPC5_RTR_HBW_WR_RQ_E_ARB 0xF40170
53
54 #define mmTPC5_RTR_HBW_WR_RQ_W_ARB 0xF40174
55
56 #define mmTPC5_RTR_HBW_WR_RQ_N_ARB 0xF40178
57
58 #define mmTPC5_RTR_HBW_WR_RQ_S_ARB 0xF4017C
59
60 #define mmTPC5_RTR_HBW_WR_RQ_L_ARB 0xF40180
61
62 #define mmTPC5_RTR_HBW_WR_RS_E_ARB 0xF40190
63
64 #define mmTPC5_RTR_HBW_WR_RS_W_ARB 0xF40194
65
66 #define mmTPC5_RTR_HBW_WR_RS_N_ARB 0xF40198
67
68 #define mmTPC5_RTR_HBW_WR_RS_S_ARB 0xF4019C
69
70 #define mmTPC5_RTR_HBW_WR_RS_L_ARB 0xF401A0
71
72 #define mmTPC5_RTR_LBW_RD_RQ_E_ARB 0xF40200
73
74 #define mmTPC5_RTR_LBW_RD_RQ_W_ARB 0xF40204
75
76 #define mmTPC5_RTR_LBW_RD_RQ_N_ARB 0xF40208
77
78 #define mmTPC5_RTR_LBW_RD_RQ_S_ARB 0xF4020C
79
80 #define mmTPC5_RTR_LBW_RD_RQ_L_ARB 0xF40210
81
82 #define mmTPC5_RTR_LBW_E_ARB_MAX 0xF40220
83
84 #define mmTPC5_RTR_LBW_W_ARB_MAX 0xF40224
85
86 #define mmTPC5_RTR_LBW_N_ARB_MAX 0xF40228
87
88 #define mmTPC5_RTR_LBW_S_ARB_MAX 0xF4022C
89
90 #define mmTPC5_RTR_LBW_L_ARB_MAX 0xF40230
91
92 #define mmTPC5_RTR_LBW_RD_RS_E_ARB 0xF40250
93
94 #define mmTPC5_RTR_LBW_RD_RS_W_ARB 0xF40254
95
96 #define mmTPC5_RTR_LBW_RD_RS_N_ARB 0xF40258
97
98 #define mmTPC5_RTR_LBW_RD_RS_S_ARB 0xF4025C
99
100 #define mmTPC5_RTR_LBW_RD_RS_L_ARB 0xF40260
101
102 #define mmTPC5_RTR_LBW_WR_RQ_E_ARB 0xF40270
103
104 #define mmTPC5_RTR_LBW_WR_RQ_W_ARB 0xF40274
105
106 #define mmTPC5_RTR_LBW_WR_RQ_N_ARB 0xF40278
107
108 #define mmTPC5_RTR_LBW_WR_RQ_S_ARB 0xF4027C
109
110 #define mmTPC5_RTR_LBW_WR_RQ_L_ARB 0xF40280
111
112 #define mmTPC5_RTR_LBW_WR_RS_E_ARB 0xF40290
113
114 #define mmTPC5_RTR_LBW_WR_RS_W_ARB 0xF40294
115
116 #define mmTPC5_RTR_LBW_WR_RS_N_ARB 0xF40298
117
118 #define mmTPC5_RTR_LBW_WR_RS_S_ARB 0xF4029C
119
120 #define mmTPC5_RTR_LBW_WR_RS_L_ARB 0xF402A0
121
122 #define mmTPC5_RTR_DBG_E_ARB 0xF40300
123
124 #define mmTPC5_RTR_DBG_W_ARB 0xF40304
125
126 #define mmTPC5_RTR_DBG_N_ARB 0xF40308
127
128 #define mmTPC5_RTR_DBG_S_ARB 0xF4030C
129
130 #define mmTPC5_RTR_DBG_L_ARB 0xF40310
131
132 #define mmTPC5_RTR_DBG_E_ARB_MAX 0xF40320
133
134 #define mmTPC5_RTR_DBG_W_ARB_MAX 0xF40324
135
136 #define mmTPC5_RTR_DBG_N_ARB_MAX 0xF40328
137
138 #define mmTPC5_RTR_DBG_S_ARB_MAX 0xF4032C
139
140 #define mmTPC5_RTR_DBG_L_ARB_MAX 0xF40330
141
142 #define mmTPC5_RTR_SPLIT_COEF_0 0xF40400
143
144 #define mmTPC5_RTR_SPLIT_COEF_1 0xF40404
145
146 #define mmTPC5_RTR_SPLIT_COEF_2 0xF40408
147
148 #define mmTPC5_RTR_SPLIT_COEF_3 0xF4040C
149
150 #define mmTPC5_RTR_SPLIT_COEF_4 0xF40410
151
152 #define mmTPC5_RTR_SPLIT_COEF_5 0xF40414
153
154 #define mmTPC5_RTR_SPLIT_COEF_6 0xF40418
155
156 #define mmTPC5_RTR_SPLIT_COEF_7 0xF4041C
157
158 #define mmTPC5_RTR_SPLIT_COEF_8 0xF40420
159
160 #define mmTPC5_RTR_SPLIT_COEF_9 0xF40424
161
162 #define mmTPC5_RTR_SPLIT_CFG 0xF40440
163
164 #define mmTPC5_RTR_SPLIT_RD_SAT 0xF40444
165
166 #define mmTPC5_RTR_SPLIT_RD_RST_TOKEN 0xF40448
167
168 #define mmTPC5_RTR_SPLIT_RD_TIMEOUT_0 0xF4044C
169
170 #define mmTPC5_RTR_SPLIT_RD_TIMEOUT_1 0xF40450
171
172 #define mmTPC5_RTR_SPLIT_WR_SAT 0xF40454
173
174 #define mmTPC5_RTR_WPLIT_WR_TST_TOLEN 0xF40458
175
176 #define mmTPC5_RTR_SPLIT_WR_TIMEOUT_0 0xF4045C
177
178 #define mmTPC5_RTR_SPLIT_WR_TIMEOUT_1 0xF40460
179
180 #define mmTPC5_RTR_HBW_RANGE_HIT 0xF40470
181
182 #define mmTPC5_RTR_HBW_RANGE_MASK_L_0 0xF40480
183
184 #define mmTPC5_RTR_HBW_RANGE_MASK_L_1 0xF40484
185
186 #define mmTPC5_RTR_HBW_RANGE_MASK_L_2 0xF40488
187
188 #define mmTPC5_RTR_HBW_RANGE_MASK_L_3 0xF4048C
189
190 #define mmTPC5_RTR_HBW_RANGE_MASK_L_4 0xF40490
191
192 #define mmTPC5_RTR_HBW_RANGE_MASK_L_5 0xF40494
193
194 #define mmTPC5_RTR_HBW_RANGE_MASK_L_6 0xF40498
195
196 #define mmTPC5_RTR_HBW_RANGE_MASK_L_7 0xF4049C
197
198 #define mmTPC5_RTR_HBW_RANGE_MASK_H_0 0xF404A0
199
200 #define mmTPC5_RTR_HBW_RANGE_MASK_H_1 0xF404A4
201
202 #define mmTPC5_RTR_HBW_RANGE_MASK_H_2 0xF404A8
203
204 #define mmTPC5_RTR_HBW_RANGE_MASK_H_3 0xF404AC
205
206 #define mmTPC5_RTR_HBW_RANGE_MASK_H_4 0xF404B0
207
208 #define mmTPC5_RTR_HBW_RANGE_MASK_H_5 0xF404B4
209
210 #define mmTPC5_RTR_HBW_RANGE_MASK_H_6 0xF404B8
211
212 #define mmTPC5_RTR_HBW_RANGE_MASK_H_7 0xF404BC
213
214 #define mmTPC5_RTR_HBW_RANGE_BASE_L_0 0xF404C0
215
216 #define mmTPC5_RTR_HBW_RANGE_BASE_L_1 0xF404C4
217
218 #define mmTPC5_RTR_HBW_RANGE_BASE_L_2 0xF404C8
219
220 #define mmTPC5_RTR_HBW_RANGE_BASE_L_3 0xF404CC
221
222 #define mmTPC5_RTR_HBW_RANGE_BASE_L_4 0xF404D0
223
224 #define mmTPC5_RTR_HBW_RANGE_BASE_L_5 0xF404D4
225
226 #define mmTPC5_RTR_HBW_RANGE_BASE_L_6 0xF404D8
227
228 #define mmTPC5_RTR_HBW_RANGE_BASE_L_7 0xF404DC
229
230 #define mmTPC5_RTR_HBW_RANGE_BASE_H_0 0xF404E0
231
232 #define mmTPC5_RTR_HBW_RANGE_BASE_H_1 0xF404E4
233
234 #define mmTPC5_RTR_HBW_RANGE_BASE_H_2 0xF404E8
235
236 #define mmTPC5_RTR_HBW_RANGE_BASE_H_3 0xF404EC
237
238 #define mmTPC5_RTR_HBW_RANGE_BASE_H_4 0xF404F0
239
240 #define mmTPC5_RTR_HBW_RANGE_BASE_H_5 0xF404F4
241
242 #define mmTPC5_RTR_HBW_RANGE_BASE_H_6 0xF404F8
243
244 #define mmTPC5_RTR_HBW_RANGE_BASE_H_7 0xF404FC
245
246 #define mmTPC5_RTR_LBW_RANGE_HIT 0xF40500
247
248 #define mmTPC5_RTR_LBW_RANGE_MASK_0 0xF40510
249
250 #define mmTPC5_RTR_LBW_RANGE_MASK_1 0xF40514
251
252 #define mmTPC5_RTR_LBW_RANGE_MASK_2 0xF40518
253
254 #define mmTPC5_RTR_LBW_RANGE_MASK_3 0xF4051C
255
256 #define mmTPC5_RTR_LBW_RANGE_MASK_4 0xF40520
257
258 #define mmTPC5_RTR_LBW_RANGE_MASK_5 0xF40524
259
260 #define mmTPC5_RTR_LBW_RANGE_MASK_6 0xF40528
261
262 #define mmTPC5_RTR_LBW_RANGE_MASK_7 0xF4052C
263
264 #define mmTPC5_RTR_LBW_RANGE_MASK_8 0xF40530
265
266 #define mmTPC5_RTR_LBW_RANGE_MASK_9 0xF40534
267
268 #define mmTPC5_RTR_LBW_RANGE_MASK_10 0xF40538
269
270 #define mmTPC5_RTR_LBW_RANGE_MASK_11 0xF4053C
271
272 #define mmTPC5_RTR_LBW_RANGE_MASK_12 0xF40540
273
274 #define mmTPC5_RTR_LBW_RANGE_MASK_13 0xF40544
275
276 #define mmTPC5_RTR_LBW_RANGE_MASK_14 0xF40548
277
278 #define mmTPC5_RTR_LBW_RANGE_MASK_15 0xF4054C
279
280 #define mmTPC5_RTR_LBW_RANGE_BASE_0 0xF40550
281
282 #define mmTPC5_RTR_LBW_RANGE_BASE_1 0xF40554
283
284 #define mmTPC5_RTR_LBW_RANGE_BASE_2 0xF40558
285
286 #define mmTPC5_RTR_LBW_RANGE_BASE_3 0xF4055C
287
288 #define mmTPC5_RTR_LBW_RANGE_BASE_4 0xF40560
289
290 #define mmTPC5_RTR_LBW_RANGE_BASE_5 0xF40564
291
292 #define mmTPC5_RTR_LBW_RANGE_BASE_6 0xF40568
293
294 #define mmTPC5_RTR_LBW_RANGE_BASE_7 0xF4056C
295
296 #define mmTPC5_RTR_LBW_RANGE_BASE_8 0xF40570
297
298 #define mmTPC5_RTR_LBW_RANGE_BASE_9 0xF40574
299
300 #define mmTPC5_RTR_LBW_RANGE_BASE_10 0xF40578
301
302 #define mmTPC5_RTR_LBW_RANGE_BASE_11 0xF4057C
303
304 #define mmTPC5_RTR_LBW_RANGE_BASE_12 0xF40580
305
306 #define mmTPC5_RTR_LBW_RANGE_BASE_13 0xF40584
307
308 #define mmTPC5_RTR_LBW_RANGE_BASE_14 0xF40588
309
310 #define mmTPC5_RTR_LBW_RANGE_BASE_15 0xF4058C
311
312 #define mmTPC5_RTR_RGLTR 0xF40590
313
314 #define mmTPC5_RTR_RGLTR_WR_RESULT 0xF40594
315
316 #define mmTPC5_RTR_RGLTR_RD_RESULT 0xF40598
317
318 #define mmTPC5_RTR_SCRAMB_EN 0xF40600
319
320 #define mmTPC5_RTR_NON_LIN_SCRAMB 0xF40604
321
322 #endif