root/drivers/misc/habanalabs/include/goya/asic_reg/tpc7_nrtr_regs.h

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INCLUDED FROM


   1 /* SPDX-License-Identifier: GPL-2.0
   2  *
   3  * Copyright 2016-2018 HabanaLabs, Ltd.
   4  * All Rights Reserved.
   5  *
   6  */
   7 
   8 /************************************
   9  ** This is an auto-generated file **
  10  **       DO NOT EDIT BELOW        **
  11  ************************************/
  12 
  13 #ifndef ASIC_REG_TPC7_NRTR_REGS_H_
  14 #define ASIC_REG_TPC7_NRTR_REGS_H_
  15 
  16 /*
  17  *****************************************
  18  *   TPC7_NRTR (Prototype: IF_NRTR)
  19  *****************************************
  20  */
  21 
  22 #define mmTPC7_NRTR_HBW_MAX_CRED                                     0xFC0100
  23 
  24 #define mmTPC7_NRTR_LBW_MAX_CRED                                     0xFC0120
  25 
  26 #define mmTPC7_NRTR_DBG_E_ARB                                        0xFC0300
  27 
  28 #define mmTPC7_NRTR_DBG_W_ARB                                        0xFC0304
  29 
  30 #define mmTPC7_NRTR_DBG_N_ARB                                        0xFC0308
  31 
  32 #define mmTPC7_NRTR_DBG_S_ARB                                        0xFC030C
  33 
  34 #define mmTPC7_NRTR_DBG_L_ARB                                        0xFC0310
  35 
  36 #define mmTPC7_NRTR_DBG_E_ARB_MAX                                    0xFC0320
  37 
  38 #define mmTPC7_NRTR_DBG_W_ARB_MAX                                    0xFC0324
  39 
  40 #define mmTPC7_NRTR_DBG_N_ARB_MAX                                    0xFC0328
  41 
  42 #define mmTPC7_NRTR_DBG_S_ARB_MAX                                    0xFC032C
  43 
  44 #define mmTPC7_NRTR_DBG_L_ARB_MAX                                    0xFC0330
  45 
  46 #define mmTPC7_NRTR_SPLIT_COEF_0                                     0xFC0400
  47 
  48 #define mmTPC7_NRTR_SPLIT_COEF_1                                     0xFC0404
  49 
  50 #define mmTPC7_NRTR_SPLIT_COEF_2                                     0xFC0408
  51 
  52 #define mmTPC7_NRTR_SPLIT_COEF_3                                     0xFC040C
  53 
  54 #define mmTPC7_NRTR_SPLIT_COEF_4                                     0xFC0410
  55 
  56 #define mmTPC7_NRTR_SPLIT_COEF_5                                     0xFC0414
  57 
  58 #define mmTPC7_NRTR_SPLIT_COEF_6                                     0xFC0418
  59 
  60 #define mmTPC7_NRTR_SPLIT_COEF_7                                     0xFC041C
  61 
  62 #define mmTPC7_NRTR_SPLIT_COEF_8                                     0xFC0420
  63 
  64 #define mmTPC7_NRTR_SPLIT_COEF_9                                     0xFC0424
  65 
  66 #define mmTPC7_NRTR_SPLIT_CFG                                        0xFC0440
  67 
  68 #define mmTPC7_NRTR_SPLIT_RD_SAT                                     0xFC0444
  69 
  70 #define mmTPC7_NRTR_SPLIT_RD_RST_TOKEN                               0xFC0448
  71 
  72 #define mmTPC7_NRTR_SPLIT_RD_TIMEOUT_0                               0xFC044C
  73 
  74 #define mmTPC7_NRTR_SPLIT_RD_TIMEOUT_1                               0xFC0450
  75 
  76 #define mmTPC7_NRTR_SPLIT_WR_SAT                                     0xFC0454
  77 
  78 #define mmTPC7_NRTR_WPLIT_WR_TST_TOLEN                               0xFC0458
  79 
  80 #define mmTPC7_NRTR_SPLIT_WR_TIMEOUT_0                               0xFC045C
  81 
  82 #define mmTPC7_NRTR_SPLIT_WR_TIMEOUT_1                               0xFC0460
  83 
  84 #define mmTPC7_NRTR_HBW_RANGE_HIT                                    0xFC0470
  85 
  86 #define mmTPC7_NRTR_HBW_RANGE_MASK_L_0                               0xFC0480
  87 
  88 #define mmTPC7_NRTR_HBW_RANGE_MASK_L_1                               0xFC0484
  89 
  90 #define mmTPC7_NRTR_HBW_RANGE_MASK_L_2                               0xFC0488
  91 
  92 #define mmTPC7_NRTR_HBW_RANGE_MASK_L_3                               0xFC048C
  93 
  94 #define mmTPC7_NRTR_HBW_RANGE_MASK_L_4                               0xFC0490
  95 
  96 #define mmTPC7_NRTR_HBW_RANGE_MASK_L_5                               0xFC0494
  97 
  98 #define mmTPC7_NRTR_HBW_RANGE_MASK_L_6                               0xFC0498
  99 
 100 #define mmTPC7_NRTR_HBW_RANGE_MASK_L_7                               0xFC049C
 101 
 102 #define mmTPC7_NRTR_HBW_RANGE_MASK_H_0                               0xFC04A0
 103 
 104 #define mmTPC7_NRTR_HBW_RANGE_MASK_H_1                               0xFC04A4
 105 
 106 #define mmTPC7_NRTR_HBW_RANGE_MASK_H_2                               0xFC04A8
 107 
 108 #define mmTPC7_NRTR_HBW_RANGE_MASK_H_3                               0xFC04AC
 109 
 110 #define mmTPC7_NRTR_HBW_RANGE_MASK_H_4                               0xFC04B0
 111 
 112 #define mmTPC7_NRTR_HBW_RANGE_MASK_H_5                               0xFC04B4
 113 
 114 #define mmTPC7_NRTR_HBW_RANGE_MASK_H_6                               0xFC04B8
 115 
 116 #define mmTPC7_NRTR_HBW_RANGE_MASK_H_7                               0xFC04BC
 117 
 118 #define mmTPC7_NRTR_HBW_RANGE_BASE_L_0                               0xFC04C0
 119 
 120 #define mmTPC7_NRTR_HBW_RANGE_BASE_L_1                               0xFC04C4
 121 
 122 #define mmTPC7_NRTR_HBW_RANGE_BASE_L_2                               0xFC04C8
 123 
 124 #define mmTPC7_NRTR_HBW_RANGE_BASE_L_3                               0xFC04CC
 125 
 126 #define mmTPC7_NRTR_HBW_RANGE_BASE_L_4                               0xFC04D0
 127 
 128 #define mmTPC7_NRTR_HBW_RANGE_BASE_L_5                               0xFC04D4
 129 
 130 #define mmTPC7_NRTR_HBW_RANGE_BASE_L_6                               0xFC04D8
 131 
 132 #define mmTPC7_NRTR_HBW_RANGE_BASE_L_7                               0xFC04DC
 133 
 134 #define mmTPC7_NRTR_HBW_RANGE_BASE_H_0                               0xFC04E0
 135 
 136 #define mmTPC7_NRTR_HBW_RANGE_BASE_H_1                               0xFC04E4
 137 
 138 #define mmTPC7_NRTR_HBW_RANGE_BASE_H_2                               0xFC04E8
 139 
 140 #define mmTPC7_NRTR_HBW_RANGE_BASE_H_3                               0xFC04EC
 141 
 142 #define mmTPC7_NRTR_HBW_RANGE_BASE_H_4                               0xFC04F0
 143 
 144 #define mmTPC7_NRTR_HBW_RANGE_BASE_H_5                               0xFC04F4
 145 
 146 #define mmTPC7_NRTR_HBW_RANGE_BASE_H_6                               0xFC04F8
 147 
 148 #define mmTPC7_NRTR_HBW_RANGE_BASE_H_7                               0xFC04FC
 149 
 150 #define mmTPC7_NRTR_LBW_RANGE_HIT                                    0xFC0500
 151 
 152 #define mmTPC7_NRTR_LBW_RANGE_MASK_0                                 0xFC0510
 153 
 154 #define mmTPC7_NRTR_LBW_RANGE_MASK_1                                 0xFC0514
 155 
 156 #define mmTPC7_NRTR_LBW_RANGE_MASK_2                                 0xFC0518
 157 
 158 #define mmTPC7_NRTR_LBW_RANGE_MASK_3                                 0xFC051C
 159 
 160 #define mmTPC7_NRTR_LBW_RANGE_MASK_4                                 0xFC0520
 161 
 162 #define mmTPC7_NRTR_LBW_RANGE_MASK_5                                 0xFC0524
 163 
 164 #define mmTPC7_NRTR_LBW_RANGE_MASK_6                                 0xFC0528
 165 
 166 #define mmTPC7_NRTR_LBW_RANGE_MASK_7                                 0xFC052C
 167 
 168 #define mmTPC7_NRTR_LBW_RANGE_MASK_8                                 0xFC0530
 169 
 170 #define mmTPC7_NRTR_LBW_RANGE_MASK_9                                 0xFC0534
 171 
 172 #define mmTPC7_NRTR_LBW_RANGE_MASK_10                                0xFC0538
 173 
 174 #define mmTPC7_NRTR_LBW_RANGE_MASK_11                                0xFC053C
 175 
 176 #define mmTPC7_NRTR_LBW_RANGE_MASK_12                                0xFC0540
 177 
 178 #define mmTPC7_NRTR_LBW_RANGE_MASK_13                                0xFC0544
 179 
 180 #define mmTPC7_NRTR_LBW_RANGE_MASK_14                                0xFC0548
 181 
 182 #define mmTPC7_NRTR_LBW_RANGE_MASK_15                                0xFC054C
 183 
 184 #define mmTPC7_NRTR_LBW_RANGE_BASE_0                                 0xFC0550
 185 
 186 #define mmTPC7_NRTR_LBW_RANGE_BASE_1                                 0xFC0554
 187 
 188 #define mmTPC7_NRTR_LBW_RANGE_BASE_2                                 0xFC0558
 189 
 190 #define mmTPC7_NRTR_LBW_RANGE_BASE_3                                 0xFC055C
 191 
 192 #define mmTPC7_NRTR_LBW_RANGE_BASE_4                                 0xFC0560
 193 
 194 #define mmTPC7_NRTR_LBW_RANGE_BASE_5                                 0xFC0564
 195 
 196 #define mmTPC7_NRTR_LBW_RANGE_BASE_6                                 0xFC0568
 197 
 198 #define mmTPC7_NRTR_LBW_RANGE_BASE_7                                 0xFC056C
 199 
 200 #define mmTPC7_NRTR_LBW_RANGE_BASE_8                                 0xFC0570
 201 
 202 #define mmTPC7_NRTR_LBW_RANGE_BASE_9                                 0xFC0574
 203 
 204 #define mmTPC7_NRTR_LBW_RANGE_BASE_10                                0xFC0578
 205 
 206 #define mmTPC7_NRTR_LBW_RANGE_BASE_11                                0xFC057C
 207 
 208 #define mmTPC7_NRTR_LBW_RANGE_BASE_12                                0xFC0580
 209 
 210 #define mmTPC7_NRTR_LBW_RANGE_BASE_13                                0xFC0584
 211 
 212 #define mmTPC7_NRTR_LBW_RANGE_BASE_14                                0xFC0588
 213 
 214 #define mmTPC7_NRTR_LBW_RANGE_BASE_15                                0xFC058C
 215 
 216 #define mmTPC7_NRTR_RGLTR                                            0xFC0590
 217 
 218 #define mmTPC7_NRTR_RGLTR_WR_RESULT                                  0xFC0594
 219 
 220 #define mmTPC7_NRTR_RGLTR_RD_RESULT                                  0xFC0598
 221 
 222 #define mmTPC7_NRTR_SCRAMB_EN                                        0xFC0600
 223 
 224 #define mmTPC7_NRTR_NON_LIN_SCRAMB                                   0xFC0604
 225 
 226 #endif /* ASIC_REG_TPC7_NRTR_REGS_H_ */

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