1
2
3
4
5
6
7
8 #ifndef GOYA_REG_MAP_H_
9 #define GOYA_REG_MAP_H_
10
11
12
13
14 #define mmCPU_PQ_BASE_ADDR_LOW mmPSOC_GLOBAL_CONF_SCRATCHPAD_0
15 #define mmCPU_PQ_BASE_ADDR_HIGH mmPSOC_GLOBAL_CONF_SCRATCHPAD_1
16 #define mmCPU_EQ_BASE_ADDR_LOW mmPSOC_GLOBAL_CONF_SCRATCHPAD_2
17 #define mmCPU_EQ_BASE_ADDR_HIGH mmPSOC_GLOBAL_CONF_SCRATCHPAD_3
18 #define mmCPU_EQ_LENGTH mmPSOC_GLOBAL_CONF_SCRATCHPAD_4
19 #define mmCPU_PQ_LENGTH mmPSOC_GLOBAL_CONF_SCRATCHPAD_5
20 #define mmCPU_EQ_CI mmPSOC_GLOBAL_CONF_SCRATCHPAD_6
21 #define mmCPU_PQ_INIT_STATUS mmPSOC_GLOBAL_CONF_SCRATCHPAD_7
22 #define mmCPU_CQ_BASE_ADDR_LOW mmPSOC_GLOBAL_CONF_SCRATCHPAD_8
23 #define mmCPU_CQ_BASE_ADDR_HIGH mmPSOC_GLOBAL_CONF_SCRATCHPAD_9
24 #define mmCPU_CQ_LENGTH mmPSOC_GLOBAL_CONF_SCRATCHPAD_10
25 #define mmUPD_STS mmPSOC_GLOBAL_CONF_SCRATCHPAD_26
26 #define mmUPD_CMD mmPSOC_GLOBAL_CONF_SCRATCHPAD_27
27 #define mmPREBOOT_VER_OFFSET mmPSOC_GLOBAL_CONF_SCRATCHPAD_28
28 #define mmUBOOT_VER_OFFSET mmPSOC_GLOBAL_CONF_SCRATCHPAD_29
29 #define mmUBOOT_OFFSET mmPSOC_GLOBAL_CONF_SCRATCHPAD_30
30 #define mmBTL_ID mmPSOC_GLOBAL_CONF_SCRATCHPAD_31
31
32 #define mmHW_STATE mmPSOC_GLOBAL_CONF_APP_STATUS
33
34 #endif