root/drivers/w1/slaves/w1_ds2781.h

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INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * 1-Wire implementation for the ds2780 chip
   4  *
   5  * Author: Renata Sayakhova <renata@oktetlabs.ru>
   6  *
   7  * Based on w1-ds2760 driver
   8  */
   9 
  10 #ifndef _W1_DS2781_H
  11 #define _W1_DS2781_H
  12 
  13 /* Function commands */
  14 #define W1_DS2781_READ_DATA             0x69
  15 #define W1_DS2781_WRITE_DATA            0x6C
  16 #define W1_DS2781_COPY_DATA             0x48
  17 #define W1_DS2781_RECALL_DATA           0xB8
  18 #define W1_DS2781_LOCK                  0x6A
  19 
  20 /* Register map */
  21 /* Register 0x00 Reserved */
  22 #define DS2781_STATUS                   0x01
  23 #define DS2781_RAAC_MSB                 0x02
  24 #define DS2781_RAAC_LSB                 0x03
  25 #define DS2781_RSAC_MSB                 0x04
  26 #define DS2781_RSAC_LSB                 0x05
  27 #define DS2781_RARC                     0x06
  28 #define DS2781_RSRC                     0x07
  29 #define DS2781_IAVG_MSB                 0x08
  30 #define DS2781_IAVG_LSB                 0x09
  31 #define DS2781_TEMP_MSB                 0x0A
  32 #define DS2781_TEMP_LSB                 0x0B
  33 #define DS2781_VOLT_MSB                 0x0C
  34 #define DS2781_VOLT_LSB                 0x0D
  35 #define DS2781_CURRENT_MSB              0x0E
  36 #define DS2781_CURRENT_LSB              0x0F
  37 #define DS2781_ACR_MSB                  0x10
  38 #define DS2781_ACR_LSB                  0x11
  39 #define DS2781_ACRL_MSB                 0x12
  40 #define DS2781_ACRL_LSB                 0x13
  41 #define DS2781_AS                       0x14
  42 #define DS2781_SFR                      0x15
  43 #define DS2781_FULL_MSB                 0x16
  44 #define DS2781_FULL_LSB                 0x17
  45 #define DS2781_AE_MSB                   0x18
  46 #define DS2781_AE_LSB                   0x19
  47 #define DS2781_SE_MSB                   0x1A
  48 #define DS2781_SE_LSB                   0x1B
  49 /* Register 0x1C - 0x1E Reserved */
  50 #define DS2781_EEPROM           0x1F
  51 #define DS2781_EEPROM_BLOCK0_START      0x20
  52 /* Register 0x20 - 0x2F User EEPROM */
  53 #define DS2781_EEPROM_BLOCK0_END        0x2F
  54 /* Register 0x30 - 0x5F Reserved */
  55 #define DS2781_EEPROM_BLOCK1_START      0x60
  56 #define DS2781_CONTROL                  0x60
  57 #define DS2781_AB                       0x61
  58 #define DS2781_AC_MSB                   0x62
  59 #define DS2781_AC_LSB                   0x63
  60 #define DS2781_VCHG                     0x64
  61 #define DS2781_IMIN                     0x65
  62 #define DS2781_VAE                      0x66
  63 #define DS2781_IAE                      0x67
  64 #define DS2781_AE_40                    0x68
  65 #define DS2781_RSNSP                    0x69
  66 #define DS2781_FULL_40_MSB              0x6A
  67 #define DS2781_FULL_40_LSB              0x6B
  68 #define DS2781_FULL_4_SLOPE             0x6C
  69 #define DS2781_FULL_3_SLOPE             0x6D
  70 #define DS2781_FULL_2_SLOPE             0x6E
  71 #define DS2781_FULL_1_SLOPE             0x6F
  72 #define DS2781_AE_4_SLOPE               0x70
  73 #define DS2781_AE_3_SLOPE               0x71
  74 #define DS2781_AE_2_SLOPE               0x72
  75 #define DS2781_AE_1_SLOPE               0x73
  76 #define DS2781_SE_4_SLOPE               0x74
  77 #define DS2781_SE_3_SLOPE               0x75
  78 #define DS2781_SE_2_SLOPE               0x76
  79 #define DS2781_SE_1_SLOPE               0x77
  80 #define DS2781_RSGAIN_MSB               0x78
  81 #define DS2781_RSGAIN_LSB               0x79
  82 #define DS2781_RSTC                     0x7A
  83 #define DS2781_COB                      0x7B
  84 #define DS2781_TBP34                    0x7C
  85 #define DS2781_TBP23                    0x7D
  86 #define DS2781_TBP12                    0x7E
  87 #define DS2781_EEPROM_BLOCK1_END        0x7F
  88 /* Register 0x7D - 0xFF Reserved */
  89 
  90 #define DS2781_FSGAIN_MSB               0xB0
  91 #define DS2781_FSGAIN_LSB               0xB1
  92 
  93 /* Number of valid register addresses */
  94 #define DS2781_DATA_SIZE                0xB2
  95 
  96 /* Status register bits */
  97 #define DS2781_STATUS_CHGTF             (1 << 7)
  98 #define DS2781_STATUS_AEF               (1 << 6)
  99 #define DS2781_STATUS_SEF               (1 << 5)
 100 #define DS2781_STATUS_LEARNF            (1 << 4)
 101 /* Bit 3 Reserved */
 102 #define DS2781_STATUS_UVF               (1 << 2)
 103 #define DS2781_STATUS_PORF              (1 << 1)
 104 /* Bit 0 Reserved */
 105 
 106 /* Control register bits */
 107 /* Bit 7 Reserved */
 108 #define DS2781_CONTROL_NBEN             (1 << 7)
 109 #define DS2781_CONTROL_UVEN             (1 << 6)
 110 #define DS2781_CONTROL_PMOD             (1 << 5)
 111 #define DS2781_CONTROL_RNAOP            (1 << 4)
 112 #define DS1781_CONTROL_UVTH             (1 << 3)
 113 /* Bit 0 - 2 Reserved */
 114 
 115 /* Special feature register bits */
 116 /* Bit 1 - 7 Reserved */
 117 #define DS2781_SFR_PIOSC                (1 << 0)
 118 
 119 /* EEPROM register bits */
 120 #define DS2781_EEPROM_EEC               (1 << 7)
 121 #define DS2781_EEPROM_LOCK              (1 << 6)
 122 /* Bit 2 - 6 Reserved */
 123 #define DS2781_EEPROM_BL1               (1 << 1)
 124 #define DS2781_EEPROM_BL0               (1 << 0)
 125 
 126 extern int w1_ds2781_io(struct device *dev, char *buf, int addr, size_t count,
 127                         int io);
 128 extern int w1_ds2781_eeprom_cmd(struct device *dev, int addr, int cmd);
 129 
 130 #endif /* !_W1_DS2781_H */
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